11e7fbdf0SIvan Malov /* SPDX-License-Identifier: BSD-3-Clause 21e7fbdf0SIvan Malov * 398d26ef7SAndrew Rybchenko * Copyright(c) 2019-2021 Xilinx, Inc. 41e7fbdf0SIvan Malov * Copyright(c) 2019 Solarflare Communications Inc. 51e7fbdf0SIvan Malov * 61e7fbdf0SIvan Malov * This software was jointly developed between OKTET Labs (under contract 71e7fbdf0SIvan Malov * for Solarflare) and Solarflare Communications, Inc. 81e7fbdf0SIvan Malov */ 91e7fbdf0SIvan Malov 101e7fbdf0SIvan Malov #ifndef _SFC_SWITCH_H 111e7fbdf0SIvan Malov #define _SFC_SWITCH_H 121e7fbdf0SIvan Malov 131e7fbdf0SIvan Malov #include <stdint.h> 141e7fbdf0SIvan Malov 151e7fbdf0SIvan Malov #include "efx.h" 161e7fbdf0SIvan Malov 171e7fbdf0SIvan Malov #include "sfc.h" 181e7fbdf0SIvan Malov 191e7fbdf0SIvan Malov #ifdef __cplusplus 201e7fbdf0SIvan Malov extern "C" { 211e7fbdf0SIvan Malov #endif 221e7fbdf0SIvan Malov 231e7fbdf0SIvan Malov /** Options for MAE switch port type */ 241e7fbdf0SIvan Malov enum sfc_mae_switch_port_type { 251e7fbdf0SIvan Malov /** 261e7fbdf0SIvan Malov * The switch port is operated by a self-sufficient RTE ethdev 271e7fbdf0SIvan Malov * and thus refers to its underlying PCIe function 281e7fbdf0SIvan Malov */ 291e7fbdf0SIvan Malov SFC_MAE_SWITCH_PORT_INDEPENDENT = 0, 30a62ec905SIgor Romanov /** 31a62ec905SIgor Romanov * The switch port is operated by a representor RTE ethdev 32a62ec905SIgor Romanov * and thus refers to the represented PCIe function 33a62ec905SIgor Romanov */ 34a62ec905SIgor Romanov SFC_MAE_SWITCH_PORT_REPRESENTOR, 351e7fbdf0SIvan Malov }; 361e7fbdf0SIvan Malov 3726706314SViacheslav Galaktionov struct sfc_mae_switch_port_indep_data { 3826706314SViacheslav Galaktionov bool mae_admin; 3926706314SViacheslav Galaktionov }; 4026706314SViacheslav Galaktionov 41768d1e44SViacheslav Galaktionov struct sfc_mae_switch_port_repr_data { 42768d1e44SViacheslav Galaktionov efx_pcie_interface_t intf; 43768d1e44SViacheslav Galaktionov uint16_t pf; 44768d1e44SViacheslav Galaktionov uint16_t vf; 45768d1e44SViacheslav Galaktionov }; 46768d1e44SViacheslav Galaktionov 47768d1e44SViacheslav Galaktionov union sfc_mae_switch_port_data { 4826706314SViacheslav Galaktionov struct sfc_mae_switch_port_indep_data indep; 49768d1e44SViacheslav Galaktionov struct sfc_mae_switch_port_repr_data repr; 50768d1e44SViacheslav Galaktionov }; 51768d1e44SViacheslav Galaktionov 521e7fbdf0SIvan Malov struct sfc_mae_switch_port_request { 531e7fbdf0SIvan Malov enum sfc_mae_switch_port_type type; 541e7fbdf0SIvan Malov const efx_mport_sel_t *entity_mportp; 551fb65e4dSIvan Malov const efx_mport_sel_t *ethdev_mportp; 561fb65e4dSIvan Malov uint16_t ethdev_port_id; 57768d1e44SViacheslav Galaktionov union sfc_mae_switch_port_data port_data; 581e7fbdf0SIvan Malov }; 591e7fbdf0SIvan Malov 60599e4e9aSViacheslav Galaktionov typedef void (sfc_mae_switch_port_iterator_cb)( 61599e4e9aSViacheslav Galaktionov enum sfc_mae_switch_port_type type, 62599e4e9aSViacheslav Galaktionov const efx_mport_sel_t *ethdev_mportp, 63599e4e9aSViacheslav Galaktionov uint16_t ethdev_port_id, 64599e4e9aSViacheslav Galaktionov const efx_mport_sel_t *entity_mportp, 65599e4e9aSViacheslav Galaktionov uint16_t switch_port_id, 66599e4e9aSViacheslav Galaktionov union sfc_mae_switch_port_data *port_datap, 67599e4e9aSViacheslav Galaktionov void *user_datap); 68599e4e9aSViacheslav Galaktionov 69599e4e9aSViacheslav Galaktionov int sfc_mae_switch_ports_iterate(uint16_t switch_domain_id, 70599e4e9aSViacheslav Galaktionov sfc_mae_switch_port_iterator_cb *cb, 71599e4e9aSViacheslav Galaktionov void *data); 72599e4e9aSViacheslav Galaktionov 731e7fbdf0SIvan Malov int sfc_mae_assign_switch_domain(struct sfc_adapter *sa, 741e7fbdf0SIvan Malov uint16_t *switch_domain_id); 751e7fbdf0SIvan Malov 7644db08d5SViacheslav Galaktionov int sfc_mae_switch_domain_controllers(uint16_t switch_domain_id, 7744db08d5SViacheslav Galaktionov const efx_pcie_interface_t **controllers, 7844db08d5SViacheslav Galaktionov size_t *nb_controllers); 7944db08d5SViacheslav Galaktionov 8044db08d5SViacheslav Galaktionov int sfc_mae_switch_domain_map_controllers(uint16_t switch_domain_id, 8144db08d5SViacheslav Galaktionov efx_pcie_interface_t *controllers, 8244db08d5SViacheslav Galaktionov size_t nb_controllers); 8344db08d5SViacheslav Galaktionov 84599e4e9aSViacheslav Galaktionov int sfc_mae_switch_controller_from_mapping( 85599e4e9aSViacheslav Galaktionov const efx_pcie_interface_t *controllers, 86599e4e9aSViacheslav Galaktionov size_t nb_controllers, 87599e4e9aSViacheslav Galaktionov efx_pcie_interface_t intf, 88599e4e9aSViacheslav Galaktionov int *controller); 89599e4e9aSViacheslav Galaktionov 90c75d560dSViacheslav Galaktionov int sfc_mae_switch_domain_get_controller(uint16_t switch_domain_id, 91c75d560dSViacheslav Galaktionov efx_pcie_interface_t intf, 92c75d560dSViacheslav Galaktionov int *controller); 93c75d560dSViacheslav Galaktionov 946ded2e01SViacheslav Galaktionov int sfc_mae_switch_domain_get_intf(uint16_t switch_domain_id, 956ded2e01SViacheslav Galaktionov int controller, 966ded2e01SViacheslav Galaktionov efx_pcie_interface_t *intf); 976ded2e01SViacheslav Galaktionov 981e7fbdf0SIvan Malov int sfc_mae_assign_switch_port(uint16_t switch_domain_id, 991e7fbdf0SIvan Malov const struct sfc_mae_switch_port_request *req, 1001e7fbdf0SIvan Malov uint16_t *switch_port_id); 1011e7fbdf0SIvan Malov 10226706314SViacheslav Galaktionov int sfc_mae_clear_switch_port(uint16_t switch_domain_id, 10326706314SViacheslav Galaktionov uint16_t switch_port_id); 10426706314SViacheslav Galaktionov 105*ef96f7ebSIvan Malov /* 106*ef96f7ebSIvan Malov * For user flows, allowed_mae_switch_port_types can only contain bit 107*ef96f7ebSIvan Malov * SFC_MAE_SWITCH_PORT_INDEPENDENT, meaning that only those ethdevs 108*ef96f7ebSIvan Malov * that have their own MAE m-ports can be accessed by a port-based 109*ef96f7ebSIvan Malov * action. For driver-internal flows, this mask can also contain 110*ef96f7ebSIvan Malov * bit SFC_MAE_SWITCH_PORT_REPRESENTOR to allow VF traffic to be 111*ef96f7ebSIvan Malov * sent to the common MAE m-port of all such REPRESENTOR ports 112*ef96f7ebSIvan Malov * via a port-based action, for default switch interconnection. 113*ef96f7ebSIvan Malov */ 1143419c9a7SIvan Malov int sfc_mae_switch_get_ethdev_mport(uint16_t switch_domain_id, 1151fb65e4dSIvan Malov uint16_t ethdev_port_id, 116*ef96f7ebSIvan Malov unsigned int allowed_mae_switch_port_types, 1171fb65e4dSIvan Malov efx_mport_sel_t *mport_sel); 1181fb65e4dSIvan Malov 1190fb3e8a9SIvan Malov int sfc_mae_switch_get_entity_mport(uint16_t switch_domain_id, 1200fb3e8a9SIvan Malov uint16_t ethdev_port_id, 1210fb3e8a9SIvan Malov efx_mport_sel_t *mport_sel); 1220fb3e8a9SIvan Malov 123599e4e9aSViacheslav Galaktionov int sfc_mae_switch_port_id_by_entity(uint16_t switch_domain_id, 124599e4e9aSViacheslav Galaktionov const efx_mport_sel_t *entity_mportp, 125599e4e9aSViacheslav Galaktionov enum sfc_mae_switch_port_type type, 126599e4e9aSViacheslav Galaktionov uint16_t *switch_port_id); 127599e4e9aSViacheslav Galaktionov 12826706314SViacheslav Galaktionov int sfc_mae_get_switch_domain_admin(uint16_t switch_domain_id, 12926706314SViacheslav Galaktionov uint16_t *port_id); 13026706314SViacheslav Galaktionov 1311e7fbdf0SIvan Malov #ifdef __cplusplus 1321e7fbdf0SIvan Malov } 1331e7fbdf0SIvan Malov #endif 1341e7fbdf0SIvan Malov #endif /* _SFC_SWITCH_H */ 135