1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_bus_vdev.h> 15 #include <rte_cycles.h> 16 #include <rte_debug.h> 17 #include <rte_devargs.h> 18 #include <rte_dev.h> 19 #include <rte_kvargs.h> 20 #include <rte_malloc.h> 21 #include <rte_mbuf_pool_ops.h> 22 #include <rte_prefetch.h> 23 24 #include "octeontx_ethdev.h" 25 #include "octeontx_rxtx.h" 26 #include "octeontx_logs.h" 27 28 struct evdev_priv_data { 29 OFFLOAD_FLAGS; /*Sequence should not be changed */ 30 } __rte_cache_aligned; 31 32 struct octeontx_vdev_init_params { 33 uint8_t nr_port; 34 }; 35 36 uint16_t 37 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 38 39 enum octeontx_link_speed { 40 OCTEONTX_LINK_SPEED_SGMII, 41 OCTEONTX_LINK_SPEED_XAUI, 42 OCTEONTX_LINK_SPEED_RXAUI, 43 OCTEONTX_LINK_SPEED_10G_R, 44 OCTEONTX_LINK_SPEED_40G_R, 45 OCTEONTX_LINK_SPEED_RESERVE1, 46 OCTEONTX_LINK_SPEED_QSGMII, 47 OCTEONTX_LINK_SPEED_RESERVE2 48 }; 49 50 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_mbox, mbox, NOTICE); 51 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_init, init, NOTICE); 52 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_driver, driver, NOTICE); 53 54 /* Parse integer from integer argument */ 55 static int 56 parse_integer_arg(const char *key __rte_unused, 57 const char *value, void *extra_args) 58 { 59 int *i = (int *)extra_args; 60 61 *i = atoi(value); 62 if (*i < 0) { 63 octeontx_log_err("argument has to be positive."); 64 return -1; 65 } 66 67 return 0; 68 } 69 70 static int 71 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 72 struct rte_vdev_device *dev) 73 { 74 struct rte_kvargs *kvlist = NULL; 75 int ret = 0; 76 77 static const char * const octeontx_vdev_valid_params[] = { 78 OCTEONTX_VDEV_NR_PORT_ARG, 79 NULL 80 }; 81 82 const char *input_args = rte_vdev_device_args(dev); 83 if (params == NULL) 84 return -EINVAL; 85 86 87 if (input_args) { 88 kvlist = rte_kvargs_parse(input_args, 89 octeontx_vdev_valid_params); 90 if (kvlist == NULL) 91 return -1; 92 93 ret = rte_kvargs_process(kvlist, 94 OCTEONTX_VDEV_NR_PORT_ARG, 95 &parse_integer_arg, 96 ¶ms->nr_port); 97 if (ret < 0) 98 goto free_kvlist; 99 } 100 101 free_kvlist: 102 rte_kvargs_free(kvlist); 103 return ret; 104 } 105 106 static int 107 octeontx_port_open(struct octeontx_nic *nic) 108 { 109 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 110 octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg; 111 int res; 112 113 res = 0; 114 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 115 PMD_INIT_FUNC_TRACE(); 116 117 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 118 if (res < 0) { 119 octeontx_log_err("failed to open port %d", res); 120 return res; 121 } 122 123 nic->node = bgx_port_conf.node; 124 nic->port_ena = bgx_port_conf.enable; 125 nic->base_ichan = bgx_port_conf.base_chan; 126 nic->base_ochan = bgx_port_conf.base_chan; 127 nic->num_ichans = bgx_port_conf.num_chans; 128 nic->num_ochans = bgx_port_conf.num_chans; 129 nic->bgx_mtu = bgx_port_conf.mtu; 130 nic->bpen = bgx_port_conf.bpen; 131 nic->fcs_strip = bgx_port_conf.fcs_strip; 132 nic->bcast_mode = bgx_port_conf.bcast_mode; 133 nic->mcast_mode = bgx_port_conf.mcast_mode; 134 nic->speed = bgx_port_conf.mode; 135 136 memset(&fifo_cfg, 0x0, sizeof(fifo_cfg)); 137 138 res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg); 139 if (res < 0) { 140 octeontx_log_err("failed to get port %d fifo cfg", res); 141 return res; 142 } 143 144 nic->fc.rx_fifosz = fifo_cfg.rx_fifosz; 145 146 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 147 RTE_ETHER_ADDR_LEN); 148 149 octeontx_log_dbg("port opened %d", nic->port_id); 150 return res; 151 } 152 153 static void 154 octeontx_link_status_print(struct rte_eth_dev *eth_dev, 155 struct rte_eth_link *link) 156 { 157 if (link && link->link_status) 158 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s", 159 (eth_dev->data->port_id), 160 link->link_speed, 161 link->link_duplex == ETH_LINK_FULL_DUPLEX ? 162 "full-duplex" : "half-duplex"); 163 else 164 octeontx_log_info("Port %d: Link Down", 165 (int)(eth_dev->data->port_id)); 166 } 167 168 static void 169 octeontx_link_status_update(struct octeontx_nic *nic, 170 struct rte_eth_link *link) 171 { 172 memset(link, 0, sizeof(*link)); 173 174 link->link_status = nic->link_up ? ETH_LINK_UP : ETH_LINK_DOWN; 175 176 switch (nic->speed) { 177 case OCTEONTX_LINK_SPEED_SGMII: 178 link->link_speed = ETH_SPEED_NUM_1G; 179 break; 180 181 case OCTEONTX_LINK_SPEED_XAUI: 182 link->link_speed = ETH_SPEED_NUM_10G; 183 break; 184 185 case OCTEONTX_LINK_SPEED_RXAUI: 186 case OCTEONTX_LINK_SPEED_10G_R: 187 link->link_speed = ETH_SPEED_NUM_10G; 188 break; 189 case OCTEONTX_LINK_SPEED_QSGMII: 190 link->link_speed = ETH_SPEED_NUM_5G; 191 break; 192 case OCTEONTX_LINK_SPEED_40G_R: 193 link->link_speed = ETH_SPEED_NUM_40G; 194 break; 195 196 case OCTEONTX_LINK_SPEED_RESERVE1: 197 case OCTEONTX_LINK_SPEED_RESERVE2: 198 default: 199 link->link_speed = ETH_SPEED_NUM_NONE; 200 octeontx_log_err("incorrect link speed %d", nic->speed); 201 break; 202 } 203 204 link->link_duplex = ETH_LINK_FULL_DUPLEX; 205 link->link_autoneg = ETH_LINK_AUTONEG; 206 } 207 208 static void 209 octeontx_link_status_poll(void *arg) 210 { 211 struct octeontx_nic *nic = arg; 212 struct rte_eth_link link; 213 struct rte_eth_dev *dev; 214 int res; 215 216 PMD_INIT_FUNC_TRACE(); 217 218 dev = nic->dev; 219 220 res = octeontx_bgx_port_link_status(nic->port_id); 221 if (res < 0) { 222 octeontx_log_err("Failed to get port %d link status", 223 nic->port_id); 224 } else { 225 if (nic->link_up != (uint8_t)res) { 226 nic->link_up = (uint8_t)res; 227 octeontx_link_status_update(nic, &link); 228 octeontx_link_status_print(dev, &link); 229 rte_eth_linkstatus_set(dev, &link); 230 rte_eth_dev_callback_process(dev, 231 RTE_ETH_EVENT_INTR_LSC, 232 NULL); 233 } 234 } 235 236 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 237 octeontx_link_status_poll, nic); 238 if (res < 0) 239 octeontx_log_err("Failed to restart alarm for port %d, err: %d", 240 nic->port_id, res); 241 } 242 243 static void 244 octeontx_port_close(struct octeontx_nic *nic) 245 { 246 PMD_INIT_FUNC_TRACE(); 247 248 rte_eal_alarm_cancel(octeontx_link_status_poll, nic); 249 octeontx_bgx_port_close(nic->port_id); 250 octeontx_log_dbg("port closed %d", nic->port_id); 251 } 252 253 static int 254 octeontx_port_start(struct octeontx_nic *nic) 255 { 256 PMD_INIT_FUNC_TRACE(); 257 258 return octeontx_bgx_port_start(nic->port_id); 259 } 260 261 static int 262 octeontx_port_stop(struct octeontx_nic *nic) 263 { 264 PMD_INIT_FUNC_TRACE(); 265 266 return octeontx_bgx_port_stop(nic->port_id); 267 } 268 269 static int 270 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 271 { 272 struct rte_eth_dev *dev; 273 int res; 274 275 res = 0; 276 PMD_INIT_FUNC_TRACE(); 277 dev = nic->dev; 278 279 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 280 if (res < 0) { 281 octeontx_log_err("failed to set promiscuous mode %d", 282 nic->port_id); 283 return res; 284 } 285 286 /* Set proper flag for the mode */ 287 dev->data->promiscuous = (en != 0) ? 1 : 0; 288 289 octeontx_log_dbg("port %d : promiscuous mode %s", 290 nic->port_id, en ? "set" : "unset"); 291 292 return 0; 293 } 294 295 static int 296 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 297 { 298 octeontx_mbox_bgx_port_stats_t bgx_stats; 299 int res; 300 301 PMD_INIT_FUNC_TRACE(); 302 303 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 304 if (res < 0) { 305 octeontx_log_err("failed to get port stats %d", nic->port_id); 306 return res; 307 } 308 309 stats->ipackets = bgx_stats.rx_packets; 310 stats->ibytes = bgx_stats.rx_bytes; 311 stats->imissed = bgx_stats.rx_dropped; 312 stats->ierrors = bgx_stats.rx_errors; 313 stats->opackets = bgx_stats.tx_packets; 314 stats->obytes = bgx_stats.tx_bytes; 315 stats->oerrors = bgx_stats.tx_errors; 316 317 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 318 nic->port_id, stats->ipackets, stats->opackets); 319 320 return 0; 321 } 322 323 static int 324 octeontx_port_stats_clr(struct octeontx_nic *nic) 325 { 326 PMD_INIT_FUNC_TRACE(); 327 328 return octeontx_bgx_port_stats_clr(nic->port_id); 329 } 330 331 static inline void 332 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 333 struct rte_event_dev_info *info) 334 { 335 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 336 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 337 338 dev_conf->nb_event_ports = info->max_event_ports; 339 dev_conf->nb_event_queues = info->max_event_queues; 340 341 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 342 dev_conf->nb_event_port_dequeue_depth = 343 info->max_event_port_dequeue_depth; 344 dev_conf->nb_event_port_enqueue_depth = 345 info->max_event_port_enqueue_depth; 346 dev_conf->nb_event_port_enqueue_depth = 347 info->max_event_port_enqueue_depth; 348 dev_conf->nb_events_limit = 349 info->max_num_events; 350 } 351 352 static uint16_t 353 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev) 354 { 355 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 356 uint16_t flags = 0; 357 358 if (nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM || 359 nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM) 360 flags |= OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F; 361 362 if (nic->tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM || 363 nic->tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM || 364 nic->tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM || 365 nic->tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM) 366 flags |= OCCTX_TX_OFFLOAD_L3_L4_CSUM_F; 367 368 if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)) 369 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F; 370 371 if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS) 372 flags |= OCCTX_TX_MULTI_SEG_F; 373 374 return flags; 375 } 376 377 static uint16_t 378 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev) 379 { 380 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 381 uint16_t flags = 0; 382 383 if (nic->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM | 384 DEV_RX_OFFLOAD_UDP_CKSUM)) 385 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 386 387 if (nic->rx_offloads & (DEV_RX_OFFLOAD_IPV4_CKSUM | 388 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)) 389 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 390 391 if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) { 392 flags |= OCCTX_RX_MULTI_SEG_F; 393 eth_dev->data->scattered_rx = 1; 394 /* If scatter mode is enabled, TX should also be in multi 395 * seg mode, else memory leak will occur 396 */ 397 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS; 398 } 399 400 return flags; 401 } 402 403 static int 404 octeontx_dev_configure(struct rte_eth_dev *dev) 405 { 406 struct rte_eth_dev_data *data = dev->data; 407 struct rte_eth_conf *conf = &data->dev_conf; 408 struct rte_eth_rxmode *rxmode = &conf->rxmode; 409 struct rte_eth_txmode *txmode = &conf->txmode; 410 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 411 int ret; 412 413 PMD_INIT_FUNC_TRACE(); 414 RTE_SET_USED(conf); 415 416 if (!rte_eal_has_hugepages()) { 417 octeontx_log_err("huge page is not configured"); 418 return -EINVAL; 419 } 420 421 if (txmode->mq_mode) { 422 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 423 return -EINVAL; 424 } 425 426 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 427 rxmode->mq_mode != ETH_MQ_RX_RSS) { 428 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 429 return -EINVAL; 430 } 431 432 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 433 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 434 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 435 } 436 437 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 438 octeontx_log_err("setting link speed/duplex not supported"); 439 return -EINVAL; 440 } 441 442 if (conf->dcb_capability_en) { 443 octeontx_log_err("DCB enable not supported"); 444 return -EINVAL; 445 } 446 447 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 448 octeontx_log_err("flow director not supported"); 449 return -EINVAL; 450 } 451 452 nic->num_tx_queues = dev->data->nb_tx_queues; 453 454 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ, 455 nic->num_tx_queues, 456 nic->base_ochan); 457 if (ret) { 458 octeontx_log_err("failed to open channel %d no-of-txq %d", 459 nic->base_ochan, nic->num_tx_queues); 460 return -EFAULT; 461 } 462 463 ret = octeontx_dev_vlan_offload_init(dev); 464 if (ret) { 465 octeontx_log_err("failed to initialize vlan offload"); 466 return -EFAULT; 467 } 468 469 nic->pki.classifier_enable = false; 470 nic->pki.hash_enable = true; 471 nic->pki.initialized = false; 472 473 nic->rx_offloads |= rxmode->offloads; 474 nic->tx_offloads |= txmode->offloads; 475 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev); 476 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev); 477 478 return 0; 479 } 480 481 static int 482 octeontx_dev_close(struct rte_eth_dev *dev) 483 { 484 struct octeontx_txq *txq = NULL; 485 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 486 unsigned int i; 487 int ret; 488 489 PMD_INIT_FUNC_TRACE(); 490 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 491 return 0; 492 493 rte_event_dev_close(nic->evdev); 494 495 octeontx_dev_flow_ctrl_fini(dev); 496 497 octeontx_dev_vlan_offload_fini(dev); 498 499 ret = octeontx_pko_channel_close(nic->base_ochan); 500 if (ret < 0) { 501 octeontx_log_err("failed to close channel %d VF%d %d %d", 502 nic->base_ochan, nic->port_id, nic->num_tx_queues, 503 ret); 504 } 505 /* Free txq resources for this port */ 506 for (i = 0; i < nic->num_tx_queues; i++) { 507 txq = dev->data->tx_queues[i]; 508 if (!txq) 509 continue; 510 511 rte_free(txq); 512 } 513 514 octeontx_port_close(nic); 515 516 return 0; 517 } 518 519 static int 520 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 521 { 522 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD; 523 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 524 struct rte_eth_dev_data *data = eth_dev->data; 525 int rc = 0; 526 527 /* Check if MTU is within the allowed range */ 528 if (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS) 529 return -EINVAL; 530 531 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM; 532 533 /* Refuse MTU that requires the support of scattered packets 534 * when this feature has not been enabled before. 535 */ 536 if (data->dev_started && frame_size > buffsz && 537 !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) { 538 octeontx_log_err("Scatter mode is disabled"); 539 return -EINVAL; 540 } 541 542 /* Check <seg size> * <max_seg> >= max_frame */ 543 if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) && 544 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX)) 545 return -EINVAL; 546 547 rc = octeontx_pko_send_mtu(nic->port_id, frame_size); 548 if (rc) 549 return rc; 550 551 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size); 552 if (rc) 553 return rc; 554 555 octeontx_log_info("Received pkt beyond maxlen %d will be dropped", 556 frame_size); 557 558 return rc; 559 } 560 561 static int 562 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq) 563 { 564 struct rte_eth_dev *eth_dev = rxq->eth_dev; 565 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 566 struct rte_eth_dev_data *data = eth_dev->data; 567 struct rte_pktmbuf_pool_private *mbp_priv; 568 struct evdev_priv_data *evdev_priv; 569 struct rte_eventdev *dev; 570 uint32_t buffsz; 571 572 /* Get rx buffer size */ 573 mbp_priv = rte_mempool_get_priv(rxq->pool); 574 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM; 575 576 /* Setup scatter mode if needed by jumbo */ 577 if (data->mtu > buffsz) { 578 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER; 579 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev); 580 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev); 581 } 582 583 /* Sharing offload flags via eventdev priv region */ 584 dev = &rte_eventdevs[rxq->evdev]; 585 evdev_priv = dev->data->dev_private; 586 evdev_priv->rx_offload_flags = nic->rx_offload_flags; 587 evdev_priv->tx_offload_flags = nic->tx_offload_flags; 588 589 /* Setup MTU */ 590 nic->mtu = data->mtu; 591 592 return 0; 593 } 594 595 static int 596 octeontx_dev_start(struct rte_eth_dev *dev) 597 { 598 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 599 struct octeontx_rxq *rxq; 600 int ret, i; 601 602 PMD_INIT_FUNC_TRACE(); 603 /* Rechecking if any new offload set to update 604 * rx/tx burst function pointer accordingly. 605 */ 606 for (i = 0; i < dev->data->nb_rx_queues; i++) { 607 rxq = dev->data->rx_queues[i]; 608 octeontx_recheck_rx_offloads(rxq); 609 } 610 611 /* Setting up the mtu */ 612 ret = octeontx_dev_mtu_set(dev, nic->mtu); 613 if (ret) { 614 octeontx_log_err("Failed to set default MTU size %d", ret); 615 goto error; 616 } 617 618 /* 619 * Tx start 620 */ 621 octeontx_set_tx_function(dev); 622 ret = octeontx_pko_channel_start(nic->base_ochan); 623 if (ret < 0) { 624 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 625 nic->port_id, nic->num_tx_queues, nic->base_ochan, 626 ret); 627 goto error; 628 } 629 630 /* 631 * Rx start 632 */ 633 dev->rx_pkt_burst = octeontx_recv_pkts; 634 ret = octeontx_pki_port_start(nic->port_id); 635 if (ret < 0) { 636 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 637 goto channel_stop_error; 638 } 639 640 /* 641 * Start port 642 */ 643 ret = octeontx_port_start(nic); 644 if (ret < 0) { 645 octeontx_log_err("failed start port %d", ret); 646 goto pki_port_stop_error; 647 } 648 649 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 650 nic->base_ochan, nic->num_tx_queues, nic->port_id); 651 652 ret = rte_event_dev_start(nic->evdev); 653 if (ret < 0) { 654 octeontx_log_err("failed to start evdev: ret (%d)", ret); 655 goto pki_port_stop_error; 656 } 657 658 /* Success */ 659 return ret; 660 661 pki_port_stop_error: 662 octeontx_pki_port_stop(nic->port_id); 663 channel_stop_error: 664 octeontx_pko_channel_stop(nic->base_ochan); 665 error: 666 return ret; 667 } 668 669 static int 670 octeontx_dev_stop(struct rte_eth_dev *dev) 671 { 672 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 673 int ret; 674 675 PMD_INIT_FUNC_TRACE(); 676 677 rte_event_dev_stop(nic->evdev); 678 679 ret = octeontx_port_stop(nic); 680 if (ret < 0) { 681 octeontx_log_err("failed to req stop port %d res=%d", 682 nic->port_id, ret); 683 return ret; 684 } 685 686 ret = octeontx_pki_port_stop(nic->port_id); 687 if (ret < 0) { 688 octeontx_log_err("failed to stop pki port %d res=%d", 689 nic->port_id, ret); 690 return ret; 691 } 692 693 ret = octeontx_pko_channel_stop(nic->base_ochan); 694 if (ret < 0) { 695 octeontx_log_err("failed to stop channel %d VF%d %d %d", 696 nic->base_ochan, nic->port_id, nic->num_tx_queues, 697 ret); 698 return ret; 699 } 700 701 return 0; 702 } 703 704 static int 705 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 706 { 707 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 708 709 PMD_INIT_FUNC_TRACE(); 710 return octeontx_port_promisc_set(nic, 1); 711 } 712 713 static int 714 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 715 { 716 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 717 718 PMD_INIT_FUNC_TRACE(); 719 return octeontx_port_promisc_set(nic, 0); 720 } 721 722 static int 723 octeontx_port_link_status(struct octeontx_nic *nic) 724 { 725 int res; 726 727 PMD_INIT_FUNC_TRACE(); 728 res = octeontx_bgx_port_link_status(nic->port_id); 729 if (res < 0) { 730 octeontx_log_err("failed to get port %d link status", 731 nic->port_id); 732 return res; 733 } 734 735 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) { 736 nic->link_up = (uint8_t)res; 737 nic->print_flag = 1; 738 } 739 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 740 741 return res; 742 } 743 744 /* 745 * Return 0 means link status changed, -1 means not changed 746 */ 747 static int 748 octeontx_dev_link_update(struct rte_eth_dev *dev, 749 int wait_to_complete __rte_unused) 750 { 751 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 752 struct rte_eth_link link; 753 int res; 754 755 PMD_INIT_FUNC_TRACE(); 756 757 res = octeontx_port_link_status(nic); 758 if (res < 0) { 759 octeontx_log_err("failed to request link status %d", res); 760 return res; 761 } 762 763 octeontx_link_status_update(nic, &link); 764 if (nic->print_flag) { 765 octeontx_link_status_print(nic->dev, &link); 766 nic->print_flag = 0; 767 } 768 769 return rte_eth_linkstatus_set(dev, &link); 770 } 771 772 static int 773 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 774 { 775 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 776 777 PMD_INIT_FUNC_TRACE(); 778 return octeontx_port_stats(nic, stats); 779 } 780 781 static int 782 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 783 { 784 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 785 786 PMD_INIT_FUNC_TRACE(); 787 return octeontx_port_stats_clr(nic); 788 } 789 790 static void 791 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index) 792 { 793 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 794 int ret; 795 796 ret = octeontx_bgx_port_mac_del(nic->port_id, index); 797 if (ret != 0) 798 octeontx_log_err("failed to del MAC address filter on port %d", 799 nic->port_id); 800 } 801 802 static int 803 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev, 804 struct rte_ether_addr *mac_addr, 805 uint32_t index, 806 __rte_unused uint32_t vmdq) 807 { 808 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 809 int ret; 810 811 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes, 812 index); 813 if (ret < 0) { 814 octeontx_log_err("failed to add MAC address filter on port %d", 815 nic->port_id); 816 return ret; 817 } 818 819 return 0; 820 } 821 822 static int 823 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 824 struct rte_ether_addr *addr) 825 { 826 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 827 int ret; 828 829 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 830 if (ret == 0) { 831 /* Update same mac address to BGX CAM table */ 832 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes, 833 0); 834 } 835 if (ret < 0) { 836 octeontx_log_err("failed to set MAC address on port %d", 837 nic->port_id); 838 } 839 840 return ret; 841 } 842 843 static int 844 octeontx_dev_info(struct rte_eth_dev *dev, 845 struct rte_eth_dev_info *dev_info) 846 { 847 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 848 849 /* Autonegotiation may be disabled */ 850 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 851 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 852 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 853 ETH_LINK_SPEED_40G; 854 855 /* Min/Max MTU supported */ 856 dev_info->min_rx_bufsize = OCCTX_MIN_FRS; 857 dev_info->max_rx_pktlen = OCCTX_MAX_FRS; 858 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD; 859 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD; 860 861 dev_info->max_mac_addrs = 862 octeontx_bgx_port_mac_entries_get(nic->port_id); 863 dev_info->max_rx_queues = 1; 864 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 865 dev_info->min_rx_bufsize = 0; 866 867 dev_info->default_rxconf = (struct rte_eth_rxconf) { 868 .rx_free_thresh = 0, 869 .rx_drop_en = 0, 870 .offloads = OCTEONTX_RX_OFFLOADS, 871 }; 872 873 dev_info->default_txconf = (struct rte_eth_txconf) { 874 .tx_free_thresh = 0, 875 .offloads = OCTEONTX_TX_OFFLOADS, 876 }; 877 878 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 879 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 880 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS; 881 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS; 882 883 return 0; 884 } 885 886 static void 887 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 888 { 889 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 890 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 891 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 892 } 893 894 static int 895 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 896 uint16_t qidx) 897 { 898 struct octeontx_txq *txq; 899 int res; 900 901 PMD_INIT_FUNC_TRACE(); 902 903 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 904 return 0; 905 906 txq = dev->data->tx_queues[qidx]; 907 908 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 909 &txq->dq, 910 sizeof(octeontx_dq_t), 911 txq->queue_id, 912 octeontx_dq_info_getter); 913 if (res < 0) { 914 res = -EFAULT; 915 goto close_port; 916 } 917 918 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 919 return res; 920 921 close_port: 922 (void)octeontx_port_stop(nic); 923 octeontx_pko_channel_stop(nic->base_ochan); 924 octeontx_pko_channel_close(nic->base_ochan); 925 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 926 return res; 927 } 928 929 int 930 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 931 { 932 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 933 934 PMD_INIT_FUNC_TRACE(); 935 qidx = qidx % PKO_VF_NUM_DQ; 936 return octeontx_vf_start_tx_queue(dev, nic, qidx); 937 } 938 939 static inline int 940 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 941 uint16_t qidx) 942 { 943 int ret = 0; 944 945 RTE_SET_USED(nic); 946 PMD_INIT_FUNC_TRACE(); 947 948 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 949 return 0; 950 951 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 952 return ret; 953 } 954 955 int 956 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 957 { 958 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 959 960 PMD_INIT_FUNC_TRACE(); 961 qidx = qidx % PKO_VF_NUM_DQ; 962 963 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 964 } 965 966 static void 967 octeontx_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 968 { 969 int res; 970 971 PMD_INIT_FUNC_TRACE(); 972 973 if (dev->data->tx_queues[qid]) { 974 res = octeontx_dev_tx_queue_stop(dev, qid); 975 if (res < 0) 976 octeontx_log_err("failed stop tx_queue(%d)\n", qid); 977 978 rte_free(dev->data->tx_queues[qid]); 979 } 980 } 981 982 static int 983 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 984 uint16_t nb_desc, unsigned int socket_id, 985 const struct rte_eth_txconf *tx_conf __rte_unused) 986 { 987 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 988 struct octeontx_txq *txq = NULL; 989 uint16_t dq_num; 990 int res = 0; 991 992 RTE_SET_USED(nb_desc); 993 RTE_SET_USED(socket_id); 994 995 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx; 996 997 /* Socket id check */ 998 if (socket_id != (unsigned int)SOCKET_ID_ANY && 999 socket_id != (unsigned int)nic->node) 1000 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 1001 socket_id, nic->node); 1002 1003 /* Free memory prior to re-allocation if needed. */ 1004 if (dev->data->tx_queues[qidx] != NULL) { 1005 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 1006 qidx); 1007 octeontx_dev_tx_queue_release(dev, qidx); 1008 dev->data->tx_queues[qidx] = NULL; 1009 } 1010 1011 /* Allocating tx queue data structure */ 1012 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 1013 RTE_CACHE_LINE_SIZE, nic->node); 1014 if (txq == NULL) { 1015 octeontx_log_err("failed to allocate txq=%d", qidx); 1016 res = -ENOMEM; 1017 goto err; 1018 } 1019 1020 txq->eth_dev = dev; 1021 txq->queue_id = dq_num; 1022 dev->data->tx_queues[qidx] = txq; 1023 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1024 1025 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 1026 &txq->dq, 1027 sizeof(octeontx_dq_t), 1028 txq->queue_id, 1029 octeontx_dq_info_getter); 1030 if (res < 0) { 1031 res = -EFAULT; 1032 goto err; 1033 } 1034 1035 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 1036 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 1037 txq->dq.ioreg_va, 1038 txq->dq.fc_status_va); 1039 1040 return res; 1041 1042 err: 1043 if (txq) 1044 rte_free(txq); 1045 1046 return res; 1047 } 1048 1049 static int 1050 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 1051 uint16_t nb_desc, unsigned int socket_id, 1052 const struct rte_eth_rxconf *rx_conf, 1053 struct rte_mempool *mb_pool) 1054 { 1055 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1056 struct rte_mempool_ops *mp_ops = NULL; 1057 struct octeontx_rxq *rxq = NULL; 1058 pki_pktbuf_cfg_t pktbuf_conf; 1059 pki_hash_cfg_t pki_hash; 1060 pki_qos_cfg_t pki_qos; 1061 uintptr_t pool; 1062 int ret, port; 1063 uint16_t gaura; 1064 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 1065 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 1066 1067 RTE_SET_USED(nb_desc); 1068 1069 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 1070 memset(&pki_hash, 0, sizeof(pki_hash)); 1071 memset(&pki_qos, 0, sizeof(pki_qos)); 1072 1073 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 1074 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 1075 octeontx_log_err("failed to find octeontx_fpavf mempool"); 1076 return -ENOTSUP; 1077 } 1078 1079 /* Handle forbidden configurations */ 1080 if (nic->pki.classifier_enable) { 1081 octeontx_log_err("cannot setup queue %d. " 1082 "Classifier option unsupported", qidx); 1083 return -EINVAL; 1084 } 1085 1086 port = nic->port_id; 1087 1088 /* Rx deferred start is not supported */ 1089 if (rx_conf->rx_deferred_start) { 1090 octeontx_log_err("rx deferred start not supported"); 1091 return -EINVAL; 1092 } 1093 1094 /* Verify queue index */ 1095 if (qidx >= dev->data->nb_rx_queues) { 1096 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 1097 qidx, (dev->data->nb_rx_queues - 1)); 1098 return -ENOTSUP; 1099 } 1100 1101 /* Socket id check */ 1102 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1103 socket_id != (unsigned int)nic->node) 1104 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 1105 socket_id, nic->node); 1106 1107 /* Allocating rx queue data structure */ 1108 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 1109 RTE_CACHE_LINE_SIZE, nic->node); 1110 if (rxq == NULL) { 1111 octeontx_log_err("failed to allocate rxq=%d", qidx); 1112 return -ENOMEM; 1113 } 1114 1115 if (!nic->pki.initialized) { 1116 pktbuf_conf.port_type = 0; 1117 pki_hash.port_type = 0; 1118 pki_qos.port_type = 0; 1119 1120 pktbuf_conf.mmask.f_wqe_skip = 1; 1121 pktbuf_conf.mmask.f_first_skip = 1; 1122 pktbuf_conf.mmask.f_later_skip = 1; 1123 pktbuf_conf.mmask.f_mbuff_size = 1; 1124 pktbuf_conf.mmask.f_cache_mode = 1; 1125 1126 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 1127 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 1128 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 1129 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 1130 RTE_PKTMBUF_HEADROOM - 1131 rte_pktmbuf_priv_size(mb_pool) - 1132 sizeof(struct rte_mbuf)); 1133 1134 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 1135 1136 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 1137 if (ret != 0) { 1138 octeontx_log_err("fail to configure pktbuf for port %d", 1139 port); 1140 rte_free(rxq); 1141 return ret; 1142 } 1143 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 1144 "\tmbuf_size:\t0x%0x\n" 1145 "\twqe_skip:\t0x%0x\n" 1146 "\tfirst_skip:\t0x%0x\n" 1147 "\tlater_skip:\t0x%0x\n" 1148 "\tcache_mode:\t%s\n", 1149 port, 1150 pktbuf_conf.mbuff_size, 1151 pktbuf_conf.wqe_skip, 1152 pktbuf_conf.first_skip, 1153 pktbuf_conf.later_skip, 1154 (pktbuf_conf.cache_mode == 1155 PKI_OPC_MODE_STT) ? 1156 "STT" : 1157 (pktbuf_conf.cache_mode == 1158 PKI_OPC_MODE_STF) ? 1159 "STF" : 1160 (pktbuf_conf.cache_mode == 1161 PKI_OPC_MODE_STF1_STT) ? 1162 "STF1_STT" : "STF2_STT"); 1163 1164 if (nic->pki.hash_enable) { 1165 pki_hash.tag_dlc = 1; 1166 pki_hash.tag_slc = 1; 1167 pki_hash.tag_dlf = 1; 1168 pki_hash.tag_slf = 1; 1169 pki_hash.tag_prt = 1; 1170 octeontx_pki_port_hash_config(port, &pki_hash); 1171 } 1172 1173 pool = (uintptr_t)mb_pool->pool_id; 1174 1175 /* Get the gaura Id */ 1176 gaura = octeontx_fpa_bufpool_gaura(pool); 1177 1178 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 1179 pki_qos.num_entry = 1; 1180 pki_qos.drop_policy = 0; 1181 pki_qos.tag_type = 0L; 1182 pki_qos.qos_entry[0].port_add = 0; 1183 pki_qos.qos_entry[0].gaura = gaura; 1184 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 1185 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 1186 pki_qos.qos_entry[0].grptag_bad = 0; 1187 pki_qos.qos_entry[0].grptag_ok = 0; 1188 1189 ret = octeontx_pki_port_create_qos(port, &pki_qos); 1190 if (ret < 0) { 1191 octeontx_log_err("failed to create QOS port=%d, q=%d", 1192 port, qidx); 1193 rte_free(rxq); 1194 return ret; 1195 } 1196 nic->pki.initialized = true; 1197 } 1198 1199 rxq->port_id = nic->port_id; 1200 rxq->eth_dev = dev; 1201 rxq->queue_id = qidx; 1202 rxq->evdev = nic->evdev; 1203 rxq->ev_queues = ev_queues; 1204 rxq->ev_ports = ev_ports; 1205 rxq->pool = mb_pool; 1206 1207 octeontx_recheck_rx_offloads(rxq); 1208 dev->data->rx_queues[qidx] = rxq; 1209 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1210 1211 return 0; 1212 } 1213 1214 static void 1215 octeontx_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 1216 { 1217 rte_free(dev->data->rx_queues[qid]); 1218 } 1219 1220 static const uint32_t * 1221 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 1222 { 1223 static const uint32_t ptypes[] = { 1224 RTE_PTYPE_L3_IPV4, 1225 RTE_PTYPE_L3_IPV4_EXT, 1226 RTE_PTYPE_L3_IPV6, 1227 RTE_PTYPE_L3_IPV6_EXT, 1228 RTE_PTYPE_L4_TCP, 1229 RTE_PTYPE_L4_UDP, 1230 RTE_PTYPE_L4_FRAG, 1231 RTE_PTYPE_UNKNOWN 1232 }; 1233 1234 if (dev->rx_pkt_burst == octeontx_recv_pkts) 1235 return ptypes; 1236 1237 return NULL; 1238 } 1239 1240 static int 1241 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1242 { 1243 RTE_SET_USED(dev); 1244 1245 if (!strcmp(pool, "octeontx_fpavf")) 1246 return 0; 1247 1248 return -ENOTSUP; 1249 } 1250 1251 /* Initialize and register driver with DPDK Application */ 1252 static const struct eth_dev_ops octeontx_dev_ops = { 1253 .dev_configure = octeontx_dev_configure, 1254 .dev_infos_get = octeontx_dev_info, 1255 .dev_close = octeontx_dev_close, 1256 .dev_start = octeontx_dev_start, 1257 .dev_stop = octeontx_dev_stop, 1258 .promiscuous_enable = octeontx_dev_promisc_enable, 1259 .promiscuous_disable = octeontx_dev_promisc_disable, 1260 .link_update = octeontx_dev_link_update, 1261 .stats_get = octeontx_dev_stats_get, 1262 .stats_reset = octeontx_dev_stats_reset, 1263 .mac_addr_remove = octeontx_dev_mac_addr_del, 1264 .mac_addr_add = octeontx_dev_mac_addr_add, 1265 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1266 .vlan_offload_set = octeontx_dev_vlan_offload_set, 1267 .vlan_filter_set = octeontx_dev_vlan_filter_set, 1268 .tx_queue_start = octeontx_dev_tx_queue_start, 1269 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1270 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1271 .tx_queue_release = octeontx_dev_tx_queue_release, 1272 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1273 .rx_queue_release = octeontx_dev_rx_queue_release, 1274 .dev_set_link_up = octeontx_dev_set_link_up, 1275 .dev_set_link_down = octeontx_dev_set_link_down, 1276 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1277 .mtu_set = octeontx_dev_mtu_set, 1278 .pool_ops_supported = octeontx_pool_ops, 1279 .flow_ctrl_get = octeontx_dev_flow_ctrl_get, 1280 .flow_ctrl_set = octeontx_dev_flow_ctrl_set, 1281 }; 1282 1283 /* Create Ethdev interface per BGX LMAC ports */ 1284 static int 1285 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1286 int socket_id) 1287 { 1288 int res; 1289 size_t pko_vfid; 1290 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1291 struct octeontx_nic *nic = NULL; 1292 struct rte_eth_dev *eth_dev = NULL; 1293 struct rte_eth_dev_data *data; 1294 const char *name = rte_vdev_device_name(dev); 1295 int max_entries; 1296 1297 PMD_INIT_FUNC_TRACE(); 1298 1299 sprintf(octtx_name, "%s_%d", name, port); 1300 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1301 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1302 if (eth_dev == NULL) 1303 return -ENODEV; 1304 1305 eth_dev->dev_ops = &octeontx_dev_ops; 1306 eth_dev->device = &dev->device; 1307 octeontx_set_tx_function(eth_dev); 1308 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1309 rte_eth_dev_probing_finish(eth_dev); 1310 return 0; 1311 } 1312 1313 /* Reserve an ethdev entry */ 1314 eth_dev = rte_eth_dev_allocate(octtx_name); 1315 if (eth_dev == NULL) { 1316 octeontx_log_err("failed to allocate rte_eth_dev"); 1317 res = -ENOMEM; 1318 goto err; 1319 } 1320 data = eth_dev->data; 1321 1322 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1323 if (nic == NULL) { 1324 octeontx_log_err("failed to allocate nic structure"); 1325 res = -ENOMEM; 1326 goto err; 1327 } 1328 data->dev_private = nic; 1329 pko_vfid = octeontx_pko_get_vfid(); 1330 1331 if (pko_vfid == SIZE_MAX) { 1332 octeontx_log_err("failed to get pko vfid"); 1333 res = -ENODEV; 1334 goto err; 1335 } 1336 1337 nic->pko_vfid = pko_vfid; 1338 nic->port_id = port; 1339 nic->evdev = evdev; 1340 1341 res = octeontx_port_open(nic); 1342 if (res < 0) 1343 goto err; 1344 1345 /* Rx side port configuration */ 1346 res = octeontx_pki_port_open(port); 1347 if (res != 0) { 1348 octeontx_log_err("failed to open PKI port %d", port); 1349 res = -ENODEV; 1350 goto err; 1351 } 1352 1353 eth_dev->device = &dev->device; 1354 eth_dev->intr_handle = NULL; 1355 eth_dev->data->numa_node = dev->device.numa_node; 1356 1357 data->port_id = eth_dev->data->port_id; 1358 1359 nic->ev_queues = 1; 1360 nic->ev_ports = 1; 1361 nic->print_flag = -1; 1362 1363 data->dev_link.link_status = ETH_LINK_DOWN; 1364 data->dev_started = 0; 1365 data->promiscuous = 0; 1366 data->all_multicast = 0; 1367 data->scattered_rx = 0; 1368 1369 /* Get maximum number of supported MAC entries */ 1370 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id); 1371 if (max_entries < 0) { 1372 octeontx_log_err("Failed to get max entries for mac addr"); 1373 res = -ENOTSUP; 1374 goto err; 1375 } 1376 1377 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries * 1378 RTE_ETHER_ADDR_LEN, 0, 1379 socket_id); 1380 if (data->mac_addrs == NULL) { 1381 octeontx_log_err("failed to allocate memory for mac_addrs"); 1382 res = -ENOMEM; 1383 goto err; 1384 } 1385 1386 eth_dev->dev_ops = &octeontx_dev_ops; 1387 1388 /* Finally save ethdev pointer to the NIC structure */ 1389 nic->dev = eth_dev; 1390 1391 if (nic->port_id != data->port_id) { 1392 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1393 data->port_id, nic->port_id); 1394 res = -EINVAL; 1395 goto free_mac_addrs; 1396 } 1397 1398 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 1399 octeontx_link_status_poll, nic); 1400 if (res) { 1401 octeontx_log_err("Failed to start link polling alarm"); 1402 goto err; 1403 } 1404 1405 /* Update port_id mac to eth_dev */ 1406 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1407 1408 /* Update same mac address to BGX CAM table at index 0 */ 1409 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0); 1410 1411 res = octeontx_dev_flow_ctrl_init(eth_dev); 1412 if (res < 0) 1413 goto err; 1414 1415 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1416 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1417 nic->port_id, nic->port_ena, 1418 nic->base_ochan, nic->num_ochans, 1419 nic->num_tx_queues); 1420 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu); 1421 1422 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1423 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1424 1425 rte_eth_dev_probing_finish(eth_dev); 1426 return data->port_id; 1427 1428 free_mac_addrs: 1429 rte_free(data->mac_addrs); 1430 data->mac_addrs = NULL; 1431 err: 1432 if (nic) 1433 octeontx_port_close(nic); 1434 1435 rte_eth_dev_release_port(eth_dev); 1436 1437 return res; 1438 } 1439 1440 /* Un initialize octeontx device */ 1441 static int 1442 octeontx_remove(struct rte_vdev_device *dev) 1443 { 1444 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1445 struct rte_eth_dev *eth_dev = NULL; 1446 struct octeontx_nic *nic = NULL; 1447 int i; 1448 1449 if (dev == NULL) 1450 return -EINVAL; 1451 1452 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1453 sprintf(octtx_name, "eth_octeontx_%d", i); 1454 1455 eth_dev = rte_eth_dev_allocated(octtx_name); 1456 if (eth_dev == NULL) 1457 continue; /* port already released */ 1458 1459 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1460 rte_eth_dev_release_port(eth_dev); 1461 continue; 1462 } 1463 1464 nic = octeontx_pmd_priv(eth_dev); 1465 rte_event_dev_stop(nic->evdev); 1466 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1467 octeontx_dev_close(eth_dev); 1468 rte_eth_dev_release_port(eth_dev); 1469 } 1470 1471 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1472 return 0; 1473 1474 /* Free FC resource */ 1475 octeontx_pko_fc_free(); 1476 1477 return 0; 1478 } 1479 1480 /* Initialize octeontx device */ 1481 static int 1482 octeontx_probe(struct rte_vdev_device *dev) 1483 { 1484 const char *dev_name; 1485 static int probe_once; 1486 uint8_t socket_id, qlist; 1487 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1488 struct rte_event_dev_config dev_conf; 1489 const char *eventdev_name = "event_octeontx"; 1490 struct rte_event_dev_info info; 1491 struct rte_eth_dev *eth_dev; 1492 1493 struct octeontx_vdev_init_params init_params = { 1494 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1495 }; 1496 1497 dev_name = rte_vdev_device_name(dev); 1498 1499 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1500 strlen(rte_vdev_device_args(dev)) == 0) { 1501 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1502 if (!eth_dev) { 1503 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1504 return -1; 1505 } 1506 /* TODO: request info from primary to set up Rx and Tx */ 1507 eth_dev->dev_ops = &octeontx_dev_ops; 1508 eth_dev->device = &dev->device; 1509 rte_eth_dev_probing_finish(eth_dev); 1510 return 0; 1511 } 1512 1513 res = octeontx_parse_vdev_init_params(&init_params, dev); 1514 if (res < 0) 1515 return -EINVAL; 1516 1517 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1518 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1519 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1520 return -ENOTSUP; 1521 } 1522 1523 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1524 1525 socket_id = rte_socket_id(); 1526 1527 tx_vfcnt = octeontx_pko_vf_count(); 1528 1529 if (tx_vfcnt < init_params.nr_port) { 1530 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1531 tx_vfcnt, init_params.nr_port); 1532 return -EINVAL; 1533 } 1534 evdev = rte_event_dev_get_dev_id(eventdev_name); 1535 if (evdev < 0) { 1536 octeontx_log_err("eventdev %s not found", eventdev_name); 1537 return -ENODEV; 1538 } 1539 1540 res = rte_event_dev_info_get(evdev, &info); 1541 if (res < 0) { 1542 octeontx_log_err("failed to eventdev info %d", res); 1543 return -EINVAL; 1544 } 1545 1546 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1547 info.max_event_queues, info.max_event_ports); 1548 1549 if (octeontx_pko_init_fc(tx_vfcnt)) 1550 return -ENOMEM; 1551 1552 devconf_set_default_sane_values(&dev_conf, &info); 1553 res = rte_event_dev_configure(evdev, &dev_conf); 1554 if (res < 0) 1555 goto parse_error; 1556 1557 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1558 (uint32_t *)&pnum); 1559 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1560 (uint32_t *)&qnum); 1561 if (pnum < qnum) { 1562 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1563 pnum, qnum); 1564 res = -EINVAL; 1565 goto parse_error; 1566 } 1567 1568 /* Enable all queues available */ 1569 for (i = 0; i < qnum; i++) { 1570 res = rte_event_queue_setup(evdev, i, NULL); 1571 if (res < 0) { 1572 octeontx_log_err("failed to setup event_q(%d): res %d", 1573 i, res); 1574 goto parse_error; 1575 } 1576 } 1577 1578 /* Enable all ports available */ 1579 for (i = 0; i < pnum; i++) { 1580 res = rte_event_port_setup(evdev, i, NULL); 1581 if (res < 0) { 1582 res = -ENODEV; 1583 octeontx_log_err("failed to setup ev port(%d) res=%d", 1584 i, res); 1585 goto parse_error; 1586 } 1587 } 1588 1589 /* 1590 * Do 1:1 links for ports & queues. All queues would be mapped to 1591 * one port. If there are more ports than queues, then some ports 1592 * won't be linked to any queue. 1593 */ 1594 for (i = 0; i < qnum; i++) { 1595 /* Link one queue to one event port */ 1596 qlist = i; 1597 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1598 if (res < 0) { 1599 res = -ENODEV; 1600 octeontx_log_err("failed to link port (%d): res=%d", 1601 i, res); 1602 goto parse_error; 1603 } 1604 } 1605 1606 /* Create ethdev interface */ 1607 for (i = 0; i < init_params.nr_port; i++) { 1608 port_id = octeontx_create(dev, i, evdev, socket_id); 1609 if (port_id < 0) { 1610 octeontx_log_err("failed to create device %s", 1611 dev_name); 1612 res = -ENODEV; 1613 goto parse_error; 1614 } 1615 1616 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1617 port_id); 1618 } 1619 1620 if (probe_once) { 1621 octeontx_log_err("interface %s not supported", dev_name); 1622 octeontx_remove(dev); 1623 res = -ENOTSUP; 1624 goto parse_error; 1625 } 1626 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1627 probe_once = 1; 1628 1629 return 0; 1630 1631 parse_error: 1632 octeontx_pko_fc_free(); 1633 return res; 1634 } 1635 1636 static struct rte_vdev_driver octeontx_pmd_drv = { 1637 .probe = octeontx_probe, 1638 .remove = octeontx_remove, 1639 }; 1640 1641 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1642 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1643 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1644