1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_debug.h> 15 #include <rte_devargs.h> 16 #include <rte_dev.h> 17 #include <rte_kvargs.h> 18 #include <rte_malloc.h> 19 #include <rte_mbuf_pool_ops.h> 20 #include <rte_prefetch.h> 21 #include <rte_bus_vdev.h> 22 23 #include "octeontx_ethdev.h" 24 #include "octeontx_rxtx.h" 25 #include "octeontx_logs.h" 26 27 struct octeontx_vdev_init_params { 28 uint8_t nr_port; 29 }; 30 31 uint16_t 32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 33 34 enum octeontx_link_speed { 35 OCTEONTX_LINK_SPEED_SGMII, 36 OCTEONTX_LINK_SPEED_XAUI, 37 OCTEONTX_LINK_SPEED_RXAUI, 38 OCTEONTX_LINK_SPEED_10G_R, 39 OCTEONTX_LINK_SPEED_40G_R, 40 OCTEONTX_LINK_SPEED_RESERVE1, 41 OCTEONTX_LINK_SPEED_QSGMII, 42 OCTEONTX_LINK_SPEED_RESERVE2 43 }; 44 45 int otx_net_logtype_mbox; 46 int otx_net_logtype_init; 47 int otx_net_logtype_driver; 48 49 RTE_INIT(otx_net_init_log) 50 { 51 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); 52 if (otx_net_logtype_mbox >= 0) 53 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); 54 55 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); 56 if (otx_net_logtype_init >= 0) 57 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); 58 59 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); 60 if (otx_net_logtype_driver >= 0) 61 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); 62 } 63 64 /* Parse integer from integer argument */ 65 static int 66 parse_integer_arg(const char *key __rte_unused, 67 const char *value, void *extra_args) 68 { 69 int *i = (int *)extra_args; 70 71 *i = atoi(value); 72 if (*i < 0) { 73 octeontx_log_err("argument has to be positive."); 74 return -1; 75 } 76 77 return 0; 78 } 79 80 static int 81 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 82 struct rte_vdev_device *dev) 83 { 84 struct rte_kvargs *kvlist = NULL; 85 int ret = 0; 86 87 static const char * const octeontx_vdev_valid_params[] = { 88 OCTEONTX_VDEV_NR_PORT_ARG, 89 NULL 90 }; 91 92 const char *input_args = rte_vdev_device_args(dev); 93 if (params == NULL) 94 return -EINVAL; 95 96 97 if (input_args) { 98 kvlist = rte_kvargs_parse(input_args, 99 octeontx_vdev_valid_params); 100 if (kvlist == NULL) 101 return -1; 102 103 ret = rte_kvargs_process(kvlist, 104 OCTEONTX_VDEV_NR_PORT_ARG, 105 &parse_integer_arg, 106 ¶ms->nr_port); 107 if (ret < 0) 108 goto free_kvlist; 109 } 110 111 free_kvlist: 112 rte_kvargs_free(kvlist); 113 return ret; 114 } 115 116 static int 117 octeontx_port_open(struct octeontx_nic *nic) 118 { 119 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 120 int res; 121 122 res = 0; 123 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 124 PMD_INIT_FUNC_TRACE(); 125 126 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 127 if (res < 0) { 128 octeontx_log_err("failed to open port %d", res); 129 return res; 130 } 131 132 nic->node = bgx_port_conf.node; 133 nic->port_ena = bgx_port_conf.enable; 134 nic->base_ichan = bgx_port_conf.base_chan; 135 nic->base_ochan = bgx_port_conf.base_chan; 136 nic->num_ichans = bgx_port_conf.num_chans; 137 nic->num_ochans = bgx_port_conf.num_chans; 138 nic->mtu = bgx_port_conf.mtu; 139 nic->bpen = bgx_port_conf.bpen; 140 nic->fcs_strip = bgx_port_conf.fcs_strip; 141 nic->bcast_mode = bgx_port_conf.bcast_mode; 142 nic->mcast_mode = bgx_port_conf.mcast_mode; 143 nic->speed = bgx_port_conf.mode; 144 145 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 146 RTE_ETHER_ADDR_LEN); 147 148 octeontx_log_dbg("port opened %d", nic->port_id); 149 return res; 150 } 151 152 static void 153 octeontx_port_close(struct octeontx_nic *nic) 154 { 155 PMD_INIT_FUNC_TRACE(); 156 157 octeontx_bgx_port_close(nic->port_id); 158 octeontx_log_dbg("port closed %d", nic->port_id); 159 } 160 161 static int 162 octeontx_port_start(struct octeontx_nic *nic) 163 { 164 PMD_INIT_FUNC_TRACE(); 165 166 return octeontx_bgx_port_start(nic->port_id); 167 } 168 169 static int 170 octeontx_port_stop(struct octeontx_nic *nic) 171 { 172 PMD_INIT_FUNC_TRACE(); 173 174 return octeontx_bgx_port_stop(nic->port_id); 175 } 176 177 static int 178 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 179 { 180 struct rte_eth_dev *dev; 181 int res; 182 183 res = 0; 184 PMD_INIT_FUNC_TRACE(); 185 dev = nic->dev; 186 187 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 188 if (res < 0) { 189 octeontx_log_err("failed to set promiscuous mode %d", 190 nic->port_id); 191 return res; 192 } 193 194 /* Set proper flag for the mode */ 195 dev->data->promiscuous = (en != 0) ? 1 : 0; 196 197 octeontx_log_dbg("port %d : promiscuous mode %s", 198 nic->port_id, en ? "set" : "unset"); 199 200 return 0; 201 } 202 203 static int 204 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 205 { 206 octeontx_mbox_bgx_port_stats_t bgx_stats; 207 int res; 208 209 PMD_INIT_FUNC_TRACE(); 210 211 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 212 if (res < 0) { 213 octeontx_log_err("failed to get port stats %d", nic->port_id); 214 return res; 215 } 216 217 stats->ipackets = bgx_stats.rx_packets; 218 stats->ibytes = bgx_stats.rx_bytes; 219 stats->imissed = bgx_stats.rx_dropped; 220 stats->ierrors = bgx_stats.rx_errors; 221 stats->opackets = bgx_stats.tx_packets; 222 stats->obytes = bgx_stats.tx_bytes; 223 stats->oerrors = bgx_stats.tx_errors; 224 225 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 226 nic->port_id, stats->ipackets, stats->opackets); 227 228 return 0; 229 } 230 231 static int 232 octeontx_port_stats_clr(struct octeontx_nic *nic) 233 { 234 PMD_INIT_FUNC_TRACE(); 235 236 return octeontx_bgx_port_stats_clr(nic->port_id); 237 } 238 239 static inline void 240 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 241 struct rte_event_dev_info *info) 242 { 243 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 244 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 245 246 dev_conf->nb_event_ports = info->max_event_ports; 247 dev_conf->nb_event_queues = info->max_event_queues; 248 249 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 250 dev_conf->nb_event_port_dequeue_depth = 251 info->max_event_port_dequeue_depth; 252 dev_conf->nb_event_port_enqueue_depth = 253 info->max_event_port_enqueue_depth; 254 dev_conf->nb_event_port_enqueue_depth = 255 info->max_event_port_enqueue_depth; 256 dev_conf->nb_events_limit = 257 info->max_num_events; 258 } 259 260 static int 261 octeontx_dev_configure(struct rte_eth_dev *dev) 262 { 263 struct rte_eth_dev_data *data = dev->data; 264 struct rte_eth_conf *conf = &data->dev_conf; 265 struct rte_eth_rxmode *rxmode = &conf->rxmode; 266 struct rte_eth_txmode *txmode = &conf->txmode; 267 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 268 int ret; 269 270 PMD_INIT_FUNC_TRACE(); 271 RTE_SET_USED(conf); 272 273 if (!rte_eal_has_hugepages()) { 274 octeontx_log_err("huge page is not configured"); 275 return -EINVAL; 276 } 277 278 if (txmode->mq_mode) { 279 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 280 return -EINVAL; 281 } 282 283 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 284 rxmode->mq_mode != ETH_MQ_RX_RSS) { 285 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 286 return -EINVAL; 287 } 288 289 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 290 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 291 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 292 } 293 294 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 295 octeontx_log_err("setting link speed/duplex not supported"); 296 return -EINVAL; 297 } 298 299 if (conf->dcb_capability_en) { 300 octeontx_log_err("DCB enable not supported"); 301 return -EINVAL; 302 } 303 304 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 305 octeontx_log_err("flow director not supported"); 306 return -EINVAL; 307 } 308 309 nic->num_tx_queues = dev->data->nb_tx_queues; 310 311 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ, 312 nic->num_tx_queues, 313 nic->base_ochan); 314 if (ret) { 315 octeontx_log_err("failed to open channel %d no-of-txq %d", 316 nic->base_ochan, nic->num_tx_queues); 317 return -EFAULT; 318 } 319 320 nic->pki.classifier_enable = false; 321 nic->pki.hash_enable = true; 322 nic->pki.initialized = false; 323 324 return 0; 325 } 326 327 static void 328 octeontx_dev_close(struct rte_eth_dev *dev) 329 { 330 struct octeontx_txq *txq = NULL; 331 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 332 unsigned int i; 333 int ret; 334 335 PMD_INIT_FUNC_TRACE(); 336 337 rte_event_dev_close(nic->evdev); 338 339 ret = octeontx_pko_channel_close(nic->base_ochan); 340 if (ret < 0) { 341 octeontx_log_err("failed to close channel %d VF%d %d %d", 342 nic->base_ochan, nic->port_id, nic->num_tx_queues, 343 ret); 344 } 345 /* Free txq resources for this port */ 346 for (i = 0; i < nic->num_tx_queues; i++) { 347 txq = dev->data->tx_queues[i]; 348 if (!txq) 349 continue; 350 351 rte_free(txq); 352 } 353 354 /* Free MAC address table */ 355 rte_free(dev->data->mac_addrs); 356 dev->data->mac_addrs = NULL; 357 358 dev->tx_pkt_burst = NULL; 359 dev->rx_pkt_burst = NULL; 360 } 361 362 static int 363 octeontx_dev_start(struct rte_eth_dev *dev) 364 { 365 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 366 int ret; 367 368 ret = 0; 369 370 PMD_INIT_FUNC_TRACE(); 371 /* 372 * Tx start 373 */ 374 dev->tx_pkt_burst = octeontx_xmit_pkts; 375 ret = octeontx_pko_channel_start(nic->base_ochan); 376 if (ret < 0) { 377 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 378 nic->port_id, nic->num_tx_queues, nic->base_ochan, 379 ret); 380 goto error; 381 } 382 383 /* 384 * Rx start 385 */ 386 dev->rx_pkt_burst = octeontx_recv_pkts; 387 ret = octeontx_pki_port_start(nic->port_id); 388 if (ret < 0) { 389 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 390 goto channel_stop_error; 391 } 392 393 /* 394 * Start port 395 */ 396 ret = octeontx_port_start(nic); 397 if (ret < 0) { 398 octeontx_log_err("failed start port %d", ret); 399 goto pki_port_stop_error; 400 } 401 402 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 403 nic->base_ochan, nic->num_tx_queues, nic->port_id); 404 405 ret = rte_event_dev_start(nic->evdev); 406 if (ret < 0) { 407 octeontx_log_err("failed to start evdev: ret (%d)", ret); 408 goto pki_port_stop_error; 409 } 410 411 /* Success */ 412 return ret; 413 414 pki_port_stop_error: 415 octeontx_pki_port_stop(nic->port_id); 416 channel_stop_error: 417 octeontx_pko_channel_stop(nic->base_ochan); 418 error: 419 return ret; 420 } 421 422 static void 423 octeontx_dev_stop(struct rte_eth_dev *dev) 424 { 425 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 426 int ret; 427 428 PMD_INIT_FUNC_TRACE(); 429 430 rte_event_dev_stop(nic->evdev); 431 432 ret = octeontx_port_stop(nic); 433 if (ret < 0) { 434 octeontx_log_err("failed to req stop port %d res=%d", 435 nic->port_id, ret); 436 return; 437 } 438 439 ret = octeontx_pki_port_stop(nic->port_id); 440 if (ret < 0) { 441 octeontx_log_err("failed to stop pki port %d res=%d", 442 nic->port_id, ret); 443 return; 444 } 445 446 ret = octeontx_pko_channel_stop(nic->base_ochan); 447 if (ret < 0) { 448 octeontx_log_err("failed to stop channel %d VF%d %d %d", 449 nic->base_ochan, nic->port_id, nic->num_tx_queues, 450 ret); 451 return; 452 } 453 } 454 455 static int 456 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 457 { 458 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 459 460 PMD_INIT_FUNC_TRACE(); 461 return octeontx_port_promisc_set(nic, 1); 462 } 463 464 static int 465 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 466 { 467 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 468 469 PMD_INIT_FUNC_TRACE(); 470 return octeontx_port_promisc_set(nic, 0); 471 } 472 473 static int 474 octeontx_port_link_status(struct octeontx_nic *nic) 475 { 476 int res; 477 478 PMD_INIT_FUNC_TRACE(); 479 res = octeontx_bgx_port_link_status(nic->port_id); 480 if (res < 0) { 481 octeontx_log_err("failed to get port %d link status", 482 nic->port_id); 483 return res; 484 } 485 486 nic->link_up = (uint8_t)res; 487 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 488 489 return res; 490 } 491 492 /* 493 * Return 0 means link status changed, -1 means not changed 494 */ 495 static int 496 octeontx_dev_link_update(struct rte_eth_dev *dev, 497 int wait_to_complete __rte_unused) 498 { 499 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 500 struct rte_eth_link link; 501 int res; 502 503 PMD_INIT_FUNC_TRACE(); 504 505 res = octeontx_port_link_status(nic); 506 if (res < 0) { 507 octeontx_log_err("failed to request link status %d", res); 508 return res; 509 } 510 511 link.link_status = nic->link_up; 512 513 switch (nic->speed) { 514 case OCTEONTX_LINK_SPEED_SGMII: 515 link.link_speed = ETH_SPEED_NUM_1G; 516 break; 517 518 case OCTEONTX_LINK_SPEED_XAUI: 519 link.link_speed = ETH_SPEED_NUM_10G; 520 break; 521 522 case OCTEONTX_LINK_SPEED_RXAUI: 523 case OCTEONTX_LINK_SPEED_10G_R: 524 link.link_speed = ETH_SPEED_NUM_10G; 525 break; 526 case OCTEONTX_LINK_SPEED_QSGMII: 527 link.link_speed = ETH_SPEED_NUM_5G; 528 break; 529 case OCTEONTX_LINK_SPEED_40G_R: 530 link.link_speed = ETH_SPEED_NUM_40G; 531 break; 532 533 case OCTEONTX_LINK_SPEED_RESERVE1: 534 case OCTEONTX_LINK_SPEED_RESERVE2: 535 default: 536 link.link_speed = ETH_SPEED_NUM_NONE; 537 octeontx_log_err("incorrect link speed %d", nic->speed); 538 break; 539 } 540 541 link.link_duplex = ETH_LINK_FULL_DUPLEX; 542 link.link_autoneg = ETH_LINK_AUTONEG; 543 544 return rte_eth_linkstatus_set(dev, &link); 545 } 546 547 static int 548 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 549 { 550 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 551 552 PMD_INIT_FUNC_TRACE(); 553 return octeontx_port_stats(nic, stats); 554 } 555 556 static int 557 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 558 { 559 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 560 561 PMD_INIT_FUNC_TRACE(); 562 return octeontx_port_stats_clr(nic); 563 } 564 565 static void 566 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index) 567 { 568 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 569 int ret; 570 571 ret = octeontx_bgx_port_mac_del(nic->port_id, index); 572 if (ret != 0) 573 octeontx_log_err("failed to del MAC address filter on port %d", 574 nic->port_id); 575 } 576 577 static int 578 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev, 579 struct rte_ether_addr *mac_addr, 580 __rte_unused uint32_t index, 581 __rte_unused uint32_t vmdq) 582 { 583 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 584 int ret; 585 586 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes); 587 if (ret < 0) { 588 octeontx_log_err("failed to add MAC address filter on port %d", 589 nic->port_id); 590 return ret; 591 } 592 593 return 0; 594 } 595 596 static int 597 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 598 struct rte_ether_addr *addr) 599 { 600 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 601 int ret; 602 603 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 604 if (ret != 0) 605 octeontx_log_err("failed to set MAC address on port %d", 606 nic->port_id); 607 608 return ret; 609 } 610 611 static int 612 octeontx_dev_info(struct rte_eth_dev *dev, 613 struct rte_eth_dev_info *dev_info) 614 { 615 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 616 617 /* Autonegotiation may be disabled */ 618 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 619 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 620 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 621 ETH_LINK_SPEED_40G; 622 623 dev_info->max_mac_addrs = 624 octeontx_bgx_port_mac_entries_get(nic->port_id); 625 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 626 dev_info->max_rx_queues = 1; 627 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 628 dev_info->min_rx_bufsize = 0; 629 630 dev_info->default_rxconf = (struct rte_eth_rxconf) { 631 .rx_free_thresh = 0, 632 .rx_drop_en = 0, 633 .offloads = OCTEONTX_RX_OFFLOADS, 634 }; 635 636 dev_info->default_txconf = (struct rte_eth_txconf) { 637 .tx_free_thresh = 0, 638 .offloads = OCTEONTX_TX_OFFLOADS, 639 }; 640 641 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 642 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 643 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS; 644 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS; 645 646 return 0; 647 } 648 649 static void 650 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 651 { 652 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 653 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 654 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 655 } 656 657 static int 658 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 659 uint16_t qidx) 660 { 661 struct octeontx_txq *txq; 662 int res; 663 664 PMD_INIT_FUNC_TRACE(); 665 666 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 667 return 0; 668 669 txq = dev->data->tx_queues[qidx]; 670 671 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 672 &txq->dq, 673 sizeof(octeontx_dq_t), 674 txq->queue_id, 675 octeontx_dq_info_getter); 676 if (res < 0) { 677 res = -EFAULT; 678 goto close_port; 679 } 680 681 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 682 return res; 683 684 close_port: 685 (void)octeontx_port_stop(nic); 686 octeontx_pko_channel_stop(nic->base_ochan); 687 octeontx_pko_channel_close(nic->base_ochan); 688 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 689 return res; 690 } 691 692 static int 693 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 694 { 695 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 696 697 PMD_INIT_FUNC_TRACE(); 698 qidx = qidx % PKO_VF_NUM_DQ; 699 return octeontx_vf_start_tx_queue(dev, nic, qidx); 700 } 701 702 static inline int 703 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 704 uint16_t qidx) 705 { 706 int ret = 0; 707 708 RTE_SET_USED(nic); 709 PMD_INIT_FUNC_TRACE(); 710 711 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 712 return 0; 713 714 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 715 return ret; 716 } 717 718 static int 719 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 720 { 721 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 722 723 PMD_INIT_FUNC_TRACE(); 724 qidx = qidx % PKO_VF_NUM_DQ; 725 726 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 727 } 728 729 static void 730 octeontx_dev_tx_queue_release(void *tx_queue) 731 { 732 struct octeontx_txq *txq = tx_queue; 733 int res; 734 735 PMD_INIT_FUNC_TRACE(); 736 737 if (txq) { 738 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 739 if (res < 0) 740 octeontx_log_err("failed stop tx_queue(%d)\n", 741 txq->queue_id); 742 743 rte_free(txq); 744 } 745 } 746 747 static int 748 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 749 uint16_t nb_desc, unsigned int socket_id, 750 const struct rte_eth_txconf *tx_conf __rte_unused) 751 { 752 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 753 struct octeontx_txq *txq = NULL; 754 uint16_t dq_num; 755 int res = 0; 756 757 RTE_SET_USED(nb_desc); 758 RTE_SET_USED(socket_id); 759 760 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx; 761 762 /* Socket id check */ 763 if (socket_id != (unsigned int)SOCKET_ID_ANY && 764 socket_id != (unsigned int)nic->node) 765 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 766 socket_id, nic->node); 767 768 /* Free memory prior to re-allocation if needed. */ 769 if (dev->data->tx_queues[qidx] != NULL) { 770 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 771 qidx); 772 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 773 dev->data->tx_queues[qidx] = NULL; 774 } 775 776 /* Allocating tx queue data structure */ 777 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 778 RTE_CACHE_LINE_SIZE, nic->node); 779 if (txq == NULL) { 780 octeontx_log_err("failed to allocate txq=%d", qidx); 781 res = -ENOMEM; 782 goto err; 783 } 784 785 txq->eth_dev = dev; 786 txq->queue_id = dq_num; 787 dev->data->tx_queues[qidx] = txq; 788 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 789 790 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 791 &txq->dq, 792 sizeof(octeontx_dq_t), 793 txq->queue_id, 794 octeontx_dq_info_getter); 795 if (res < 0) { 796 res = -EFAULT; 797 goto err; 798 } 799 800 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 801 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 802 txq->dq.ioreg_va, 803 txq->dq.fc_status_va); 804 805 return res; 806 807 err: 808 if (txq) 809 rte_free(txq); 810 811 return res; 812 } 813 814 static int 815 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 816 uint16_t nb_desc, unsigned int socket_id, 817 const struct rte_eth_rxconf *rx_conf, 818 struct rte_mempool *mb_pool) 819 { 820 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 821 struct rte_mempool_ops *mp_ops = NULL; 822 struct octeontx_rxq *rxq = NULL; 823 pki_pktbuf_cfg_t pktbuf_conf; 824 pki_hash_cfg_t pki_hash; 825 pki_qos_cfg_t pki_qos; 826 uintptr_t pool; 827 int ret, port; 828 uint16_t gaura; 829 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 830 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 831 832 RTE_SET_USED(nb_desc); 833 834 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 835 memset(&pki_hash, 0, sizeof(pki_hash)); 836 memset(&pki_qos, 0, sizeof(pki_qos)); 837 838 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 839 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 840 octeontx_log_err("failed to find octeontx_fpavf mempool"); 841 return -ENOTSUP; 842 } 843 844 /* Handle forbidden configurations */ 845 if (nic->pki.classifier_enable) { 846 octeontx_log_err("cannot setup queue %d. " 847 "Classifier option unsupported", qidx); 848 return -EINVAL; 849 } 850 851 port = nic->port_id; 852 853 /* Rx deferred start is not supported */ 854 if (rx_conf->rx_deferred_start) { 855 octeontx_log_err("rx deferred start not supported"); 856 return -EINVAL; 857 } 858 859 /* Verify queue index */ 860 if (qidx >= dev->data->nb_rx_queues) { 861 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 862 qidx, (dev->data->nb_rx_queues - 1)); 863 return -ENOTSUP; 864 } 865 866 /* Socket id check */ 867 if (socket_id != (unsigned int)SOCKET_ID_ANY && 868 socket_id != (unsigned int)nic->node) 869 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 870 socket_id, nic->node); 871 872 /* Allocating rx queue data structure */ 873 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 874 RTE_CACHE_LINE_SIZE, nic->node); 875 if (rxq == NULL) { 876 octeontx_log_err("failed to allocate rxq=%d", qidx); 877 return -ENOMEM; 878 } 879 880 if (!nic->pki.initialized) { 881 pktbuf_conf.port_type = 0; 882 pki_hash.port_type = 0; 883 pki_qos.port_type = 0; 884 885 pktbuf_conf.mmask.f_wqe_skip = 1; 886 pktbuf_conf.mmask.f_first_skip = 1; 887 pktbuf_conf.mmask.f_later_skip = 1; 888 pktbuf_conf.mmask.f_mbuff_size = 1; 889 pktbuf_conf.mmask.f_cache_mode = 1; 890 891 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 892 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 893 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 894 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 895 RTE_PKTMBUF_HEADROOM - 896 rte_pktmbuf_priv_size(mb_pool) - 897 sizeof(struct rte_mbuf)); 898 899 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 900 901 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 902 if (ret != 0) { 903 octeontx_log_err("fail to configure pktbuf for port %d", 904 port); 905 rte_free(rxq); 906 return ret; 907 } 908 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 909 "\tmbuf_size:\t0x%0x\n" 910 "\twqe_skip:\t0x%0x\n" 911 "\tfirst_skip:\t0x%0x\n" 912 "\tlater_skip:\t0x%0x\n" 913 "\tcache_mode:\t%s\n", 914 port, 915 pktbuf_conf.mbuff_size, 916 pktbuf_conf.wqe_skip, 917 pktbuf_conf.first_skip, 918 pktbuf_conf.later_skip, 919 (pktbuf_conf.cache_mode == 920 PKI_OPC_MODE_STT) ? 921 "STT" : 922 (pktbuf_conf.cache_mode == 923 PKI_OPC_MODE_STF) ? 924 "STF" : 925 (pktbuf_conf.cache_mode == 926 PKI_OPC_MODE_STF1_STT) ? 927 "STF1_STT" : "STF2_STT"); 928 929 if (nic->pki.hash_enable) { 930 pki_hash.tag_dlc = 1; 931 pki_hash.tag_slc = 1; 932 pki_hash.tag_dlf = 1; 933 pki_hash.tag_slf = 1; 934 pki_hash.tag_prt = 1; 935 octeontx_pki_port_hash_config(port, &pki_hash); 936 } 937 938 pool = (uintptr_t)mb_pool->pool_id; 939 940 /* Get the gaura Id */ 941 gaura = octeontx_fpa_bufpool_gaura(pool); 942 943 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 944 pki_qos.num_entry = 1; 945 pki_qos.drop_policy = 0; 946 pki_qos.tag_type = 0L; 947 pki_qos.qos_entry[0].port_add = 0; 948 pki_qos.qos_entry[0].gaura = gaura; 949 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 950 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 951 pki_qos.qos_entry[0].grptag_bad = 0; 952 pki_qos.qos_entry[0].grptag_ok = 0; 953 954 ret = octeontx_pki_port_create_qos(port, &pki_qos); 955 if (ret < 0) { 956 octeontx_log_err("failed to create QOS port=%d, q=%d", 957 port, qidx); 958 rte_free(rxq); 959 return ret; 960 } 961 nic->pki.initialized = true; 962 } 963 964 rxq->port_id = nic->port_id; 965 rxq->eth_dev = dev; 966 rxq->queue_id = qidx; 967 rxq->evdev = nic->evdev; 968 rxq->ev_queues = ev_queues; 969 rxq->ev_ports = ev_ports; 970 971 dev->data->rx_queues[qidx] = rxq; 972 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 973 return 0; 974 } 975 976 static void 977 octeontx_dev_rx_queue_release(void *rxq) 978 { 979 rte_free(rxq); 980 } 981 982 static const uint32_t * 983 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 984 { 985 static const uint32_t ptypes[] = { 986 RTE_PTYPE_L3_IPV4, 987 RTE_PTYPE_L3_IPV4_EXT, 988 RTE_PTYPE_L3_IPV6, 989 RTE_PTYPE_L3_IPV6_EXT, 990 RTE_PTYPE_L4_TCP, 991 RTE_PTYPE_L4_UDP, 992 RTE_PTYPE_L4_FRAG, 993 RTE_PTYPE_UNKNOWN 994 }; 995 996 if (dev->rx_pkt_burst == octeontx_recv_pkts) 997 return ptypes; 998 999 return NULL; 1000 } 1001 1002 static int 1003 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1004 { 1005 RTE_SET_USED(dev); 1006 1007 if (!strcmp(pool, "octeontx_fpavf")) 1008 return 0; 1009 1010 return -ENOTSUP; 1011 } 1012 1013 /* Initialize and register driver with DPDK Application */ 1014 static const struct eth_dev_ops octeontx_dev_ops = { 1015 .dev_configure = octeontx_dev_configure, 1016 .dev_infos_get = octeontx_dev_info, 1017 .dev_close = octeontx_dev_close, 1018 .dev_start = octeontx_dev_start, 1019 .dev_stop = octeontx_dev_stop, 1020 .promiscuous_enable = octeontx_dev_promisc_enable, 1021 .promiscuous_disable = octeontx_dev_promisc_disable, 1022 .link_update = octeontx_dev_link_update, 1023 .stats_get = octeontx_dev_stats_get, 1024 .stats_reset = octeontx_dev_stats_reset, 1025 .mac_addr_remove = octeontx_dev_mac_addr_del, 1026 .mac_addr_add = octeontx_dev_mac_addr_add, 1027 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1028 .tx_queue_start = octeontx_dev_tx_queue_start, 1029 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1030 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1031 .tx_queue_release = octeontx_dev_tx_queue_release, 1032 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1033 .rx_queue_release = octeontx_dev_rx_queue_release, 1034 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1035 .pool_ops_supported = octeontx_pool_ops, 1036 }; 1037 1038 /* Create Ethdev interface per BGX LMAC ports */ 1039 static int 1040 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1041 int socket_id) 1042 { 1043 int res; 1044 size_t pko_vfid; 1045 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1046 struct octeontx_nic *nic = NULL; 1047 struct rte_eth_dev *eth_dev = NULL; 1048 struct rte_eth_dev_data *data; 1049 const char *name = rte_vdev_device_name(dev); 1050 int max_entries; 1051 1052 PMD_INIT_FUNC_TRACE(); 1053 1054 sprintf(octtx_name, "%s_%d", name, port); 1055 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1056 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1057 if (eth_dev == NULL) 1058 return -ENODEV; 1059 1060 eth_dev->dev_ops = &octeontx_dev_ops; 1061 eth_dev->device = &dev->device; 1062 eth_dev->tx_pkt_burst = octeontx_xmit_pkts; 1063 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1064 rte_eth_dev_probing_finish(eth_dev); 1065 return 0; 1066 } 1067 1068 /* Reserve an ethdev entry */ 1069 eth_dev = rte_eth_dev_allocate(octtx_name); 1070 if (eth_dev == NULL) { 1071 octeontx_log_err("failed to allocate rte_eth_dev"); 1072 res = -ENOMEM; 1073 goto err; 1074 } 1075 data = eth_dev->data; 1076 1077 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1078 if (nic == NULL) { 1079 octeontx_log_err("failed to allocate nic structure"); 1080 res = -ENOMEM; 1081 goto err; 1082 } 1083 data->dev_private = nic; 1084 pko_vfid = octeontx_pko_get_vfid(); 1085 1086 if (pko_vfid == SIZE_MAX) { 1087 octeontx_log_err("failed to get pko vfid"); 1088 res = -ENODEV; 1089 goto err; 1090 } 1091 1092 nic->pko_vfid = pko_vfid; 1093 nic->port_id = port; 1094 nic->evdev = evdev; 1095 1096 res = octeontx_port_open(nic); 1097 if (res < 0) 1098 goto err; 1099 1100 /* Rx side port configuration */ 1101 res = octeontx_pki_port_open(port); 1102 if (res != 0) { 1103 octeontx_log_err("failed to open PKI port %d", port); 1104 res = -ENODEV; 1105 goto err; 1106 } 1107 1108 eth_dev->device = &dev->device; 1109 eth_dev->intr_handle = NULL; 1110 eth_dev->data->kdrv = RTE_KDRV_NONE; 1111 eth_dev->data->numa_node = dev->device.numa_node; 1112 1113 data->port_id = eth_dev->data->port_id; 1114 1115 nic->ev_queues = 1; 1116 nic->ev_ports = 1; 1117 1118 data->dev_link.link_status = ETH_LINK_DOWN; 1119 data->dev_started = 0; 1120 data->promiscuous = 0; 1121 data->all_multicast = 0; 1122 data->scattered_rx = 0; 1123 1124 /* Get maximum number of supported MAC entries */ 1125 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id); 1126 if (max_entries < 0) { 1127 octeontx_log_err("Failed to get max entries for mac addr"); 1128 res = -ENOTSUP; 1129 goto err; 1130 } 1131 1132 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries * 1133 RTE_ETHER_ADDR_LEN, 0, 1134 socket_id); 1135 if (data->mac_addrs == NULL) { 1136 octeontx_log_err("failed to allocate memory for mac_addrs"); 1137 res = -ENOMEM; 1138 goto err; 1139 } 1140 1141 eth_dev->dev_ops = &octeontx_dev_ops; 1142 1143 /* Finally save ethdev pointer to the NIC structure */ 1144 nic->dev = eth_dev; 1145 1146 if (nic->port_id != data->port_id) { 1147 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1148 data->port_id, nic->port_id); 1149 res = -EINVAL; 1150 goto free_mac_addrs; 1151 } 1152 1153 /* Update port_id mac to eth_dev */ 1154 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1155 1156 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1157 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1158 nic->port_id, nic->port_ena, 1159 nic->base_ochan, nic->num_ochans, 1160 nic->num_tx_queues); 1161 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); 1162 1163 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1164 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1165 1166 rte_eth_dev_probing_finish(eth_dev); 1167 return data->port_id; 1168 1169 free_mac_addrs: 1170 rte_free(data->mac_addrs); 1171 err: 1172 if (nic) 1173 octeontx_port_close(nic); 1174 1175 rte_eth_dev_release_port(eth_dev); 1176 1177 return res; 1178 } 1179 1180 /* Un initialize octeontx device */ 1181 static int 1182 octeontx_remove(struct rte_vdev_device *dev) 1183 { 1184 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1185 struct rte_eth_dev *eth_dev = NULL; 1186 struct octeontx_nic *nic = NULL; 1187 int i; 1188 1189 if (dev == NULL) 1190 return -EINVAL; 1191 1192 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1193 sprintf(octtx_name, "eth_octeontx_%d", i); 1194 1195 /* reserve an ethdev entry */ 1196 eth_dev = rte_eth_dev_allocated(octtx_name); 1197 if (eth_dev == NULL) 1198 return -ENODEV; 1199 1200 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1201 rte_eth_dev_release_port(eth_dev); 1202 continue; 1203 } 1204 1205 nic = octeontx_pmd_priv(eth_dev); 1206 rte_event_dev_stop(nic->evdev); 1207 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1208 1209 rte_eth_dev_release_port(eth_dev); 1210 rte_event_dev_close(nic->evdev); 1211 } 1212 1213 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1214 return 0; 1215 1216 /* Free FC resource */ 1217 octeontx_pko_fc_free(); 1218 1219 return 0; 1220 } 1221 1222 /* Initialize octeontx device */ 1223 static int 1224 octeontx_probe(struct rte_vdev_device *dev) 1225 { 1226 const char *dev_name; 1227 static int probe_once; 1228 uint8_t socket_id, qlist; 1229 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1230 struct rte_event_dev_config dev_conf; 1231 const char *eventdev_name = "event_octeontx"; 1232 struct rte_event_dev_info info; 1233 struct rte_eth_dev *eth_dev; 1234 1235 struct octeontx_vdev_init_params init_params = { 1236 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1237 }; 1238 1239 dev_name = rte_vdev_device_name(dev); 1240 1241 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1242 strlen(rte_vdev_device_args(dev)) == 0) { 1243 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1244 if (!eth_dev) { 1245 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1246 return -1; 1247 } 1248 /* TODO: request info from primary to set up Rx and Tx */ 1249 eth_dev->dev_ops = &octeontx_dev_ops; 1250 eth_dev->device = &dev->device; 1251 rte_eth_dev_probing_finish(eth_dev); 1252 return 0; 1253 } 1254 1255 res = octeontx_parse_vdev_init_params(&init_params, dev); 1256 if (res < 0) 1257 return -EINVAL; 1258 1259 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1260 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1261 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1262 return -ENOTSUP; 1263 } 1264 1265 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1266 1267 socket_id = rte_socket_id(); 1268 1269 tx_vfcnt = octeontx_pko_vf_count(); 1270 1271 if (tx_vfcnt < init_params.nr_port) { 1272 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1273 tx_vfcnt, init_params.nr_port); 1274 return -EINVAL; 1275 } 1276 evdev = rte_event_dev_get_dev_id(eventdev_name); 1277 if (evdev < 0) { 1278 octeontx_log_err("eventdev %s not found", eventdev_name); 1279 return -ENODEV; 1280 } 1281 1282 res = rte_event_dev_info_get(evdev, &info); 1283 if (res < 0) { 1284 octeontx_log_err("failed to eventdev info %d", res); 1285 return -EINVAL; 1286 } 1287 1288 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1289 info.max_event_queues, info.max_event_ports); 1290 1291 if (octeontx_pko_init_fc(tx_vfcnt)) 1292 return -ENOMEM; 1293 1294 devconf_set_default_sane_values(&dev_conf, &info); 1295 res = rte_event_dev_configure(evdev, &dev_conf); 1296 if (res < 0) 1297 goto parse_error; 1298 1299 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1300 (uint32_t *)&pnum); 1301 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1302 (uint32_t *)&qnum); 1303 if (pnum < qnum) { 1304 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1305 pnum, qnum); 1306 res = -EINVAL; 1307 goto parse_error; 1308 } 1309 1310 /* Enable all queues available */ 1311 for (i = 0; i < qnum; i++) { 1312 res = rte_event_queue_setup(evdev, i, NULL); 1313 if (res < 0) { 1314 octeontx_log_err("failed to setup event_q(%d): res %d", 1315 i, res); 1316 goto parse_error; 1317 } 1318 } 1319 1320 /* Enable all ports available */ 1321 for (i = 0; i < pnum; i++) { 1322 res = rte_event_port_setup(evdev, i, NULL); 1323 if (res < 0) { 1324 res = -ENODEV; 1325 octeontx_log_err("failed to setup ev port(%d) res=%d", 1326 i, res); 1327 goto parse_error; 1328 } 1329 } 1330 1331 /* 1332 * Do 1:1 links for ports & queues. All queues would be mapped to 1333 * one port. If there are more ports than queues, then some ports 1334 * won't be linked to any queue. 1335 */ 1336 for (i = 0; i < qnum; i++) { 1337 /* Link one queue to one event port */ 1338 qlist = i; 1339 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1340 if (res < 0) { 1341 res = -ENODEV; 1342 octeontx_log_err("failed to link port (%d): res=%d", 1343 i, res); 1344 goto parse_error; 1345 } 1346 } 1347 1348 /* Create ethdev interface */ 1349 for (i = 0; i < init_params.nr_port; i++) { 1350 port_id = octeontx_create(dev, i, evdev, socket_id); 1351 if (port_id < 0) { 1352 octeontx_log_err("failed to create device %s", 1353 dev_name); 1354 res = -ENODEV; 1355 goto parse_error; 1356 } 1357 1358 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1359 port_id); 1360 } 1361 1362 if (probe_once) { 1363 octeontx_log_err("interface %s not supported", dev_name); 1364 octeontx_remove(dev); 1365 res = -ENOTSUP; 1366 goto parse_error; 1367 } 1368 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1369 probe_once = 1; 1370 1371 return 0; 1372 1373 parse_error: 1374 octeontx_pko_fc_free(); 1375 return res; 1376 } 1377 1378 static struct rte_vdev_driver octeontx_pmd_drv = { 1379 .probe = octeontx_probe, 1380 .remove = octeontx_remove, 1381 }; 1382 1383 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1384 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1385 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1386