1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_bus_vdev.h> 15 #include <rte_cycles.h> 16 #include <rte_debug.h> 17 #include <rte_devargs.h> 18 #include <rte_dev.h> 19 #include <rte_kvargs.h> 20 #include <rte_malloc.h> 21 #include <rte_mbuf_pool_ops.h> 22 #include <rte_prefetch.h> 23 24 #include "octeontx_ethdev.h" 25 #include "octeontx_rxtx.h" 26 #include "octeontx_logs.h" 27 28 struct evdev_priv_data { 29 OFFLOAD_FLAGS; /*Sequence should not be changed */ 30 } __rte_cache_aligned; 31 32 struct octeontx_vdev_init_params { 33 uint8_t nr_port; 34 }; 35 36 uint16_t 37 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 38 39 enum octeontx_link_speed { 40 OCTEONTX_LINK_SPEED_SGMII, 41 OCTEONTX_LINK_SPEED_XAUI, 42 OCTEONTX_LINK_SPEED_RXAUI, 43 OCTEONTX_LINK_SPEED_10G_R, 44 OCTEONTX_LINK_SPEED_40G_R, 45 OCTEONTX_LINK_SPEED_RESERVE1, 46 OCTEONTX_LINK_SPEED_QSGMII, 47 OCTEONTX_LINK_SPEED_RESERVE2 48 }; 49 50 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_mbox, mbox, NOTICE); 51 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_init, init, NOTICE); 52 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_driver, driver, NOTICE); 53 54 /* Parse integer from integer argument */ 55 static int 56 parse_integer_arg(const char *key __rte_unused, 57 const char *value, void *extra_args) 58 { 59 int *i = (int *)extra_args; 60 61 *i = atoi(value); 62 if (*i < 0) { 63 octeontx_log_err("argument has to be positive."); 64 return -1; 65 } 66 67 return 0; 68 } 69 70 static int 71 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 72 struct rte_vdev_device *dev) 73 { 74 struct rte_kvargs *kvlist = NULL; 75 int ret = 0; 76 77 static const char * const octeontx_vdev_valid_params[] = { 78 OCTEONTX_VDEV_NR_PORT_ARG, 79 NULL 80 }; 81 82 const char *input_args = rte_vdev_device_args(dev); 83 if (params == NULL) 84 return -EINVAL; 85 86 87 if (input_args) { 88 kvlist = rte_kvargs_parse(input_args, 89 octeontx_vdev_valid_params); 90 if (kvlist == NULL) 91 return -1; 92 93 ret = rte_kvargs_process(kvlist, 94 OCTEONTX_VDEV_NR_PORT_ARG, 95 &parse_integer_arg, 96 ¶ms->nr_port); 97 if (ret < 0) 98 goto free_kvlist; 99 } 100 101 free_kvlist: 102 rte_kvargs_free(kvlist); 103 return ret; 104 } 105 106 static int 107 octeontx_port_open(struct octeontx_nic *nic) 108 { 109 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 110 octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg; 111 int res; 112 113 res = 0; 114 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 115 PMD_INIT_FUNC_TRACE(); 116 117 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 118 if (res < 0) { 119 octeontx_log_err("failed to open port %d", res); 120 return res; 121 } 122 123 nic->node = bgx_port_conf.node; 124 nic->port_ena = bgx_port_conf.enable; 125 nic->base_ichan = bgx_port_conf.base_chan; 126 nic->base_ochan = bgx_port_conf.base_chan; 127 nic->num_ichans = bgx_port_conf.num_chans; 128 nic->num_ochans = bgx_port_conf.num_chans; 129 nic->bgx_mtu = bgx_port_conf.mtu; 130 nic->bpen = bgx_port_conf.bpen; 131 nic->fcs_strip = bgx_port_conf.fcs_strip; 132 nic->bcast_mode = bgx_port_conf.bcast_mode; 133 nic->mcast_mode = bgx_port_conf.mcast_mode; 134 nic->speed = bgx_port_conf.mode; 135 136 memset(&fifo_cfg, 0x0, sizeof(fifo_cfg)); 137 138 res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg); 139 if (res < 0) { 140 octeontx_log_err("failed to get port %d fifo cfg", res); 141 return res; 142 } 143 144 nic->fc.rx_fifosz = fifo_cfg.rx_fifosz; 145 146 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 147 RTE_ETHER_ADDR_LEN); 148 149 octeontx_log_dbg("port opened %d", nic->port_id); 150 return res; 151 } 152 153 static void 154 octeontx_link_status_print(struct rte_eth_dev *eth_dev, 155 struct rte_eth_link *link) 156 { 157 if (link && link->link_status) 158 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s", 159 (eth_dev->data->port_id), 160 link->link_speed, 161 link->link_duplex == ETH_LINK_FULL_DUPLEX ? 162 "full-duplex" : "half-duplex"); 163 else 164 octeontx_log_info("Port %d: Link Down", 165 (int)(eth_dev->data->port_id)); 166 } 167 168 static void 169 octeontx_link_status_update(struct octeontx_nic *nic, 170 struct rte_eth_link *link) 171 { 172 memset(link, 0, sizeof(*link)); 173 174 link->link_status = nic->link_up ? ETH_LINK_UP : ETH_LINK_DOWN; 175 176 switch (nic->speed) { 177 case OCTEONTX_LINK_SPEED_SGMII: 178 link->link_speed = ETH_SPEED_NUM_1G; 179 break; 180 181 case OCTEONTX_LINK_SPEED_XAUI: 182 link->link_speed = ETH_SPEED_NUM_10G; 183 break; 184 185 case OCTEONTX_LINK_SPEED_RXAUI: 186 case OCTEONTX_LINK_SPEED_10G_R: 187 link->link_speed = ETH_SPEED_NUM_10G; 188 break; 189 case OCTEONTX_LINK_SPEED_QSGMII: 190 link->link_speed = ETH_SPEED_NUM_5G; 191 break; 192 case OCTEONTX_LINK_SPEED_40G_R: 193 link->link_speed = ETH_SPEED_NUM_40G; 194 break; 195 196 case OCTEONTX_LINK_SPEED_RESERVE1: 197 case OCTEONTX_LINK_SPEED_RESERVE2: 198 default: 199 link->link_speed = ETH_SPEED_NUM_NONE; 200 octeontx_log_err("incorrect link speed %d", nic->speed); 201 break; 202 } 203 204 link->link_duplex = ETH_LINK_FULL_DUPLEX; 205 link->link_autoneg = ETH_LINK_AUTONEG; 206 } 207 208 static void 209 octeontx_link_status_poll(void *arg) 210 { 211 struct octeontx_nic *nic = arg; 212 struct rte_eth_link link; 213 struct rte_eth_dev *dev; 214 int res; 215 216 PMD_INIT_FUNC_TRACE(); 217 218 dev = nic->dev; 219 220 res = octeontx_bgx_port_link_status(nic->port_id); 221 if (res < 0) { 222 octeontx_log_err("Failed to get port %d link status", 223 nic->port_id); 224 } else { 225 if (nic->link_up != (uint8_t)res) { 226 nic->link_up = (uint8_t)res; 227 octeontx_link_status_update(nic, &link); 228 octeontx_link_status_print(dev, &link); 229 rte_eth_linkstatus_set(dev, &link); 230 rte_eth_dev_callback_process(dev, 231 RTE_ETH_EVENT_INTR_LSC, 232 NULL); 233 } 234 } 235 236 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 237 octeontx_link_status_poll, nic); 238 if (res < 0) 239 octeontx_log_err("Failed to restart alarm for port %d, err: %d", 240 nic->port_id, res); 241 } 242 243 static void 244 octeontx_port_close(struct octeontx_nic *nic) 245 { 246 PMD_INIT_FUNC_TRACE(); 247 248 rte_eal_alarm_cancel(octeontx_link_status_poll, nic); 249 octeontx_bgx_port_close(nic->port_id); 250 octeontx_log_dbg("port closed %d", nic->port_id); 251 } 252 253 static int 254 octeontx_port_start(struct octeontx_nic *nic) 255 { 256 PMD_INIT_FUNC_TRACE(); 257 258 return octeontx_bgx_port_start(nic->port_id); 259 } 260 261 static int 262 octeontx_port_stop(struct octeontx_nic *nic) 263 { 264 PMD_INIT_FUNC_TRACE(); 265 266 return octeontx_bgx_port_stop(nic->port_id); 267 } 268 269 static int 270 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 271 { 272 struct rte_eth_dev *dev; 273 int res; 274 275 res = 0; 276 PMD_INIT_FUNC_TRACE(); 277 dev = nic->dev; 278 279 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 280 if (res < 0) { 281 octeontx_log_err("failed to set promiscuous mode %d", 282 nic->port_id); 283 return res; 284 } 285 286 /* Set proper flag for the mode */ 287 dev->data->promiscuous = (en != 0) ? 1 : 0; 288 289 octeontx_log_dbg("port %d : promiscuous mode %s", 290 nic->port_id, en ? "set" : "unset"); 291 292 return 0; 293 } 294 295 static int 296 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 297 { 298 octeontx_mbox_bgx_port_stats_t bgx_stats; 299 int res; 300 301 PMD_INIT_FUNC_TRACE(); 302 303 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 304 if (res < 0) { 305 octeontx_log_err("failed to get port stats %d", nic->port_id); 306 return res; 307 } 308 309 stats->ipackets = bgx_stats.rx_packets; 310 stats->ibytes = bgx_stats.rx_bytes; 311 stats->imissed = bgx_stats.rx_dropped; 312 stats->ierrors = bgx_stats.rx_errors; 313 stats->opackets = bgx_stats.tx_packets; 314 stats->obytes = bgx_stats.tx_bytes; 315 stats->oerrors = bgx_stats.tx_errors; 316 317 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 318 nic->port_id, stats->ipackets, stats->opackets); 319 320 return 0; 321 } 322 323 static int 324 octeontx_port_stats_clr(struct octeontx_nic *nic) 325 { 326 PMD_INIT_FUNC_TRACE(); 327 328 return octeontx_bgx_port_stats_clr(nic->port_id); 329 } 330 331 static inline void 332 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 333 struct rte_event_dev_info *info) 334 { 335 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 336 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 337 338 dev_conf->nb_event_ports = info->max_event_ports; 339 dev_conf->nb_event_queues = info->max_event_queues; 340 341 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 342 dev_conf->nb_event_port_dequeue_depth = 343 info->max_event_port_dequeue_depth; 344 dev_conf->nb_event_port_enqueue_depth = 345 info->max_event_port_enqueue_depth; 346 dev_conf->nb_event_port_enqueue_depth = 347 info->max_event_port_enqueue_depth; 348 dev_conf->nb_events_limit = 349 info->max_num_events; 350 } 351 352 static uint16_t 353 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev) 354 { 355 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 356 uint16_t flags = 0; 357 358 if (nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM || 359 nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM) 360 flags |= OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F; 361 362 if (nic->tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM || 363 nic->tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM || 364 nic->tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM || 365 nic->tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM) 366 flags |= OCCTX_TX_OFFLOAD_L3_L4_CSUM_F; 367 368 if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)) 369 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F; 370 371 if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS) 372 flags |= OCCTX_TX_MULTI_SEG_F; 373 374 return flags; 375 } 376 377 static uint16_t 378 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev) 379 { 380 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 381 uint16_t flags = 0; 382 383 if (nic->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM | 384 DEV_RX_OFFLOAD_UDP_CKSUM)) 385 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 386 387 if (nic->rx_offloads & (DEV_RX_OFFLOAD_IPV4_CKSUM | 388 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)) 389 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 390 391 if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) { 392 flags |= OCCTX_RX_MULTI_SEG_F; 393 eth_dev->data->scattered_rx = 1; 394 /* If scatter mode is enabled, TX should also be in multi 395 * seg mode, else memory leak will occur 396 */ 397 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS; 398 } 399 400 return flags; 401 } 402 403 static int 404 octeontx_dev_configure(struct rte_eth_dev *dev) 405 { 406 struct rte_eth_dev_data *data = dev->data; 407 struct rte_eth_conf *conf = &data->dev_conf; 408 struct rte_eth_rxmode *rxmode = &conf->rxmode; 409 struct rte_eth_txmode *txmode = &conf->txmode; 410 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 411 int ret; 412 413 PMD_INIT_FUNC_TRACE(); 414 RTE_SET_USED(conf); 415 416 if (!rte_eal_has_hugepages()) { 417 octeontx_log_err("huge page is not configured"); 418 return -EINVAL; 419 } 420 421 if (txmode->mq_mode) { 422 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 423 return -EINVAL; 424 } 425 426 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 427 rxmode->mq_mode != ETH_MQ_RX_RSS) { 428 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 429 return -EINVAL; 430 } 431 432 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 433 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 434 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 435 } 436 437 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 438 octeontx_log_err("setting link speed/duplex not supported"); 439 return -EINVAL; 440 } 441 442 if (conf->dcb_capability_en) { 443 octeontx_log_err("DCB enable not supported"); 444 return -EINVAL; 445 } 446 447 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 448 octeontx_log_err("flow director not supported"); 449 return -EINVAL; 450 } 451 452 nic->num_tx_queues = dev->data->nb_tx_queues; 453 454 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ, 455 nic->num_tx_queues, 456 nic->base_ochan); 457 if (ret) { 458 octeontx_log_err("failed to open channel %d no-of-txq %d", 459 nic->base_ochan, nic->num_tx_queues); 460 return -EFAULT; 461 } 462 463 ret = octeontx_dev_vlan_offload_init(dev); 464 if (ret) { 465 octeontx_log_err("failed to initialize vlan offload"); 466 return -EFAULT; 467 } 468 469 nic->pki.classifier_enable = false; 470 nic->pki.hash_enable = true; 471 nic->pki.initialized = false; 472 473 nic->rx_offloads |= rxmode->offloads; 474 nic->tx_offloads |= txmode->offloads; 475 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev); 476 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev); 477 478 return 0; 479 } 480 481 static int 482 octeontx_dev_close(struct rte_eth_dev *dev) 483 { 484 struct octeontx_txq *txq = NULL; 485 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 486 unsigned int i; 487 int ret; 488 489 PMD_INIT_FUNC_TRACE(); 490 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 491 return 0; 492 493 rte_event_dev_close(nic->evdev); 494 495 octeontx_dev_flow_ctrl_fini(dev); 496 497 octeontx_dev_vlan_offload_fini(dev); 498 499 ret = octeontx_pko_channel_close(nic->base_ochan); 500 if (ret < 0) { 501 octeontx_log_err("failed to close channel %d VF%d %d %d", 502 nic->base_ochan, nic->port_id, nic->num_tx_queues, 503 ret); 504 } 505 /* Free txq resources for this port */ 506 for (i = 0; i < nic->num_tx_queues; i++) { 507 txq = dev->data->tx_queues[i]; 508 if (!txq) 509 continue; 510 511 rte_free(txq); 512 } 513 514 octeontx_port_close(nic); 515 516 return 0; 517 } 518 519 static int 520 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 521 { 522 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD; 523 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 524 struct rte_eth_dev_data *data = eth_dev->data; 525 int rc = 0; 526 527 /* Check if MTU is within the allowed range */ 528 if (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS) 529 return -EINVAL; 530 531 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM; 532 533 /* Refuse MTU that requires the support of scattered packets 534 * when this feature has not been enabled before. 535 */ 536 if (data->dev_started && frame_size > buffsz && 537 !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) { 538 octeontx_log_err("Scatter mode is disabled"); 539 return -EINVAL; 540 } 541 542 /* Check <seg size> * <max_seg> >= max_frame */ 543 if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) && 544 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX)) 545 return -EINVAL; 546 547 rc = octeontx_pko_send_mtu(nic->port_id, frame_size); 548 if (rc) 549 return rc; 550 551 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size); 552 if (rc) 553 return rc; 554 555 if (mtu > RTE_ETHER_MTU) 556 nic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; 557 else 558 nic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME; 559 560 octeontx_log_info("Received pkt beyond maxlen %d will be dropped", 561 frame_size); 562 563 return rc; 564 } 565 566 static int 567 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq) 568 { 569 struct rte_eth_dev *eth_dev = rxq->eth_dev; 570 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 571 struct rte_eth_dev_data *data = eth_dev->data; 572 struct rte_pktmbuf_pool_private *mbp_priv; 573 struct evdev_priv_data *evdev_priv; 574 struct rte_eventdev *dev; 575 uint32_t buffsz; 576 577 /* Get rx buffer size */ 578 mbp_priv = rte_mempool_get_priv(rxq->pool); 579 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM; 580 581 /* Setup scatter mode if needed by jumbo */ 582 if (data->mtu > buffsz) { 583 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER; 584 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev); 585 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev); 586 } 587 588 /* Sharing offload flags via eventdev priv region */ 589 dev = &rte_eventdevs[rxq->evdev]; 590 evdev_priv = dev->data->dev_private; 591 evdev_priv->rx_offload_flags = nic->rx_offload_flags; 592 evdev_priv->tx_offload_flags = nic->tx_offload_flags; 593 594 /* Setup MTU */ 595 nic->mtu = data->mtu; 596 597 return 0; 598 } 599 600 static int 601 octeontx_dev_start(struct rte_eth_dev *dev) 602 { 603 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 604 struct octeontx_rxq *rxq; 605 int ret, i; 606 607 PMD_INIT_FUNC_TRACE(); 608 /* Rechecking if any new offload set to update 609 * rx/tx burst function pointer accordingly. 610 */ 611 for (i = 0; i < dev->data->nb_rx_queues; i++) { 612 rxq = dev->data->rx_queues[i]; 613 octeontx_recheck_rx_offloads(rxq); 614 } 615 616 /* Setting up the mtu */ 617 ret = octeontx_dev_mtu_set(dev, nic->mtu); 618 if (ret) { 619 octeontx_log_err("Failed to set default MTU size %d", ret); 620 goto error; 621 } 622 623 /* 624 * Tx start 625 */ 626 octeontx_set_tx_function(dev); 627 ret = octeontx_pko_channel_start(nic->base_ochan); 628 if (ret < 0) { 629 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 630 nic->port_id, nic->num_tx_queues, nic->base_ochan, 631 ret); 632 goto error; 633 } 634 635 /* 636 * Rx start 637 */ 638 dev->rx_pkt_burst = octeontx_recv_pkts; 639 ret = octeontx_pki_port_start(nic->port_id); 640 if (ret < 0) { 641 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 642 goto channel_stop_error; 643 } 644 645 /* 646 * Start port 647 */ 648 ret = octeontx_port_start(nic); 649 if (ret < 0) { 650 octeontx_log_err("failed start port %d", ret); 651 goto pki_port_stop_error; 652 } 653 654 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 655 nic->base_ochan, nic->num_tx_queues, nic->port_id); 656 657 ret = rte_event_dev_start(nic->evdev); 658 if (ret < 0) { 659 octeontx_log_err("failed to start evdev: ret (%d)", ret); 660 goto pki_port_stop_error; 661 } 662 663 /* Success */ 664 return ret; 665 666 pki_port_stop_error: 667 octeontx_pki_port_stop(nic->port_id); 668 channel_stop_error: 669 octeontx_pko_channel_stop(nic->base_ochan); 670 error: 671 return ret; 672 } 673 674 static int 675 octeontx_dev_stop(struct rte_eth_dev *dev) 676 { 677 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 678 int ret; 679 680 PMD_INIT_FUNC_TRACE(); 681 682 rte_event_dev_stop(nic->evdev); 683 684 ret = octeontx_port_stop(nic); 685 if (ret < 0) { 686 octeontx_log_err("failed to req stop port %d res=%d", 687 nic->port_id, ret); 688 return ret; 689 } 690 691 ret = octeontx_pki_port_stop(nic->port_id); 692 if (ret < 0) { 693 octeontx_log_err("failed to stop pki port %d res=%d", 694 nic->port_id, ret); 695 return ret; 696 } 697 698 ret = octeontx_pko_channel_stop(nic->base_ochan); 699 if (ret < 0) { 700 octeontx_log_err("failed to stop channel %d VF%d %d %d", 701 nic->base_ochan, nic->port_id, nic->num_tx_queues, 702 ret); 703 return ret; 704 } 705 706 return 0; 707 } 708 709 static int 710 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 711 { 712 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 713 714 PMD_INIT_FUNC_TRACE(); 715 return octeontx_port_promisc_set(nic, 1); 716 } 717 718 static int 719 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 720 { 721 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 722 723 PMD_INIT_FUNC_TRACE(); 724 return octeontx_port_promisc_set(nic, 0); 725 } 726 727 static int 728 octeontx_port_link_status(struct octeontx_nic *nic) 729 { 730 int res; 731 732 PMD_INIT_FUNC_TRACE(); 733 res = octeontx_bgx_port_link_status(nic->port_id); 734 if (res < 0) { 735 octeontx_log_err("failed to get port %d link status", 736 nic->port_id); 737 return res; 738 } 739 740 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) { 741 nic->link_up = (uint8_t)res; 742 nic->print_flag = 1; 743 } 744 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 745 746 return res; 747 } 748 749 /* 750 * Return 0 means link status changed, -1 means not changed 751 */ 752 static int 753 octeontx_dev_link_update(struct rte_eth_dev *dev, 754 int wait_to_complete __rte_unused) 755 { 756 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 757 struct rte_eth_link link; 758 int res; 759 760 PMD_INIT_FUNC_TRACE(); 761 762 res = octeontx_port_link_status(nic); 763 if (res < 0) { 764 octeontx_log_err("failed to request link status %d", res); 765 return res; 766 } 767 768 octeontx_link_status_update(nic, &link); 769 if (nic->print_flag) { 770 octeontx_link_status_print(nic->dev, &link); 771 nic->print_flag = 0; 772 } 773 774 return rte_eth_linkstatus_set(dev, &link); 775 } 776 777 static int 778 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 779 { 780 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 781 782 PMD_INIT_FUNC_TRACE(); 783 return octeontx_port_stats(nic, stats); 784 } 785 786 static int 787 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 788 { 789 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 790 791 PMD_INIT_FUNC_TRACE(); 792 return octeontx_port_stats_clr(nic); 793 } 794 795 static void 796 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index) 797 { 798 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 799 int ret; 800 801 ret = octeontx_bgx_port_mac_del(nic->port_id, index); 802 if (ret != 0) 803 octeontx_log_err("failed to del MAC address filter on port %d", 804 nic->port_id); 805 } 806 807 static int 808 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev, 809 struct rte_ether_addr *mac_addr, 810 uint32_t index, 811 __rte_unused uint32_t vmdq) 812 { 813 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 814 int ret; 815 816 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes, 817 index); 818 if (ret < 0) { 819 octeontx_log_err("failed to add MAC address filter on port %d", 820 nic->port_id); 821 return ret; 822 } 823 824 return 0; 825 } 826 827 static int 828 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 829 struct rte_ether_addr *addr) 830 { 831 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 832 int ret; 833 834 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 835 if (ret == 0) { 836 /* Update same mac address to BGX CAM table */ 837 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes, 838 0); 839 } 840 if (ret < 0) { 841 octeontx_log_err("failed to set MAC address on port %d", 842 nic->port_id); 843 } 844 845 return ret; 846 } 847 848 static int 849 octeontx_dev_info(struct rte_eth_dev *dev, 850 struct rte_eth_dev_info *dev_info) 851 { 852 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 853 854 /* Autonegotiation may be disabled */ 855 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 856 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 857 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 858 ETH_LINK_SPEED_40G; 859 860 /* Min/Max MTU supported */ 861 dev_info->min_rx_bufsize = OCCTX_MIN_FRS; 862 dev_info->max_rx_pktlen = OCCTX_MAX_FRS; 863 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD; 864 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD; 865 866 dev_info->max_mac_addrs = 867 octeontx_bgx_port_mac_entries_get(nic->port_id); 868 dev_info->max_rx_queues = 1; 869 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 870 dev_info->min_rx_bufsize = 0; 871 872 dev_info->default_rxconf = (struct rte_eth_rxconf) { 873 .rx_free_thresh = 0, 874 .rx_drop_en = 0, 875 .offloads = OCTEONTX_RX_OFFLOADS, 876 }; 877 878 dev_info->default_txconf = (struct rte_eth_txconf) { 879 .tx_free_thresh = 0, 880 .offloads = OCTEONTX_TX_OFFLOADS, 881 }; 882 883 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 884 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 885 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS; 886 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS; 887 888 return 0; 889 } 890 891 static void 892 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 893 { 894 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 895 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 896 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 897 } 898 899 static int 900 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 901 uint16_t qidx) 902 { 903 struct octeontx_txq *txq; 904 int res; 905 906 PMD_INIT_FUNC_TRACE(); 907 908 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 909 return 0; 910 911 txq = dev->data->tx_queues[qidx]; 912 913 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 914 &txq->dq, 915 sizeof(octeontx_dq_t), 916 txq->queue_id, 917 octeontx_dq_info_getter); 918 if (res < 0) { 919 res = -EFAULT; 920 goto close_port; 921 } 922 923 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 924 return res; 925 926 close_port: 927 (void)octeontx_port_stop(nic); 928 octeontx_pko_channel_stop(nic->base_ochan); 929 octeontx_pko_channel_close(nic->base_ochan); 930 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 931 return res; 932 } 933 934 int 935 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 936 { 937 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 938 939 PMD_INIT_FUNC_TRACE(); 940 qidx = qidx % PKO_VF_NUM_DQ; 941 return octeontx_vf_start_tx_queue(dev, nic, qidx); 942 } 943 944 static inline int 945 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 946 uint16_t qidx) 947 { 948 int ret = 0; 949 950 RTE_SET_USED(nic); 951 PMD_INIT_FUNC_TRACE(); 952 953 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 954 return 0; 955 956 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 957 return ret; 958 } 959 960 int 961 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 962 { 963 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 964 965 PMD_INIT_FUNC_TRACE(); 966 qidx = qidx % PKO_VF_NUM_DQ; 967 968 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 969 } 970 971 static void 972 octeontx_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 973 { 974 int res; 975 976 PMD_INIT_FUNC_TRACE(); 977 978 if (dev->data->tx_queues[qid]) { 979 res = octeontx_dev_tx_queue_stop(dev, qid); 980 if (res < 0) 981 octeontx_log_err("failed stop tx_queue(%d)\n", qid); 982 983 rte_free(dev->data->tx_queues[qid]); 984 } 985 } 986 987 static int 988 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 989 uint16_t nb_desc, unsigned int socket_id, 990 const struct rte_eth_txconf *tx_conf __rte_unused) 991 { 992 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 993 struct octeontx_txq *txq = NULL; 994 uint16_t dq_num; 995 int res = 0; 996 997 RTE_SET_USED(nb_desc); 998 RTE_SET_USED(socket_id); 999 1000 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx; 1001 1002 /* Socket id check */ 1003 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1004 socket_id != (unsigned int)nic->node) 1005 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 1006 socket_id, nic->node); 1007 1008 /* Free memory prior to re-allocation if needed. */ 1009 if (dev->data->tx_queues[qidx] != NULL) { 1010 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 1011 qidx); 1012 octeontx_dev_tx_queue_release(dev, qidx); 1013 dev->data->tx_queues[qidx] = NULL; 1014 } 1015 1016 /* Allocating tx queue data structure */ 1017 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 1018 RTE_CACHE_LINE_SIZE, nic->node); 1019 if (txq == NULL) { 1020 octeontx_log_err("failed to allocate txq=%d", qidx); 1021 res = -ENOMEM; 1022 goto err; 1023 } 1024 1025 txq->eth_dev = dev; 1026 txq->queue_id = dq_num; 1027 dev->data->tx_queues[qidx] = txq; 1028 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1029 1030 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 1031 &txq->dq, 1032 sizeof(octeontx_dq_t), 1033 txq->queue_id, 1034 octeontx_dq_info_getter); 1035 if (res < 0) { 1036 res = -EFAULT; 1037 goto err; 1038 } 1039 1040 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 1041 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 1042 txq->dq.ioreg_va, 1043 txq->dq.fc_status_va); 1044 1045 return res; 1046 1047 err: 1048 if (txq) 1049 rte_free(txq); 1050 1051 return res; 1052 } 1053 1054 static int 1055 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 1056 uint16_t nb_desc, unsigned int socket_id, 1057 const struct rte_eth_rxconf *rx_conf, 1058 struct rte_mempool *mb_pool) 1059 { 1060 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1061 struct rte_mempool_ops *mp_ops = NULL; 1062 struct octeontx_rxq *rxq = NULL; 1063 pki_pktbuf_cfg_t pktbuf_conf; 1064 pki_hash_cfg_t pki_hash; 1065 pki_qos_cfg_t pki_qos; 1066 uintptr_t pool; 1067 int ret, port; 1068 uint16_t gaura; 1069 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 1070 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 1071 1072 RTE_SET_USED(nb_desc); 1073 1074 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 1075 memset(&pki_hash, 0, sizeof(pki_hash)); 1076 memset(&pki_qos, 0, sizeof(pki_qos)); 1077 1078 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 1079 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 1080 octeontx_log_err("failed to find octeontx_fpavf mempool"); 1081 return -ENOTSUP; 1082 } 1083 1084 /* Handle forbidden configurations */ 1085 if (nic->pki.classifier_enable) { 1086 octeontx_log_err("cannot setup queue %d. " 1087 "Classifier option unsupported", qidx); 1088 return -EINVAL; 1089 } 1090 1091 port = nic->port_id; 1092 1093 /* Rx deferred start is not supported */ 1094 if (rx_conf->rx_deferred_start) { 1095 octeontx_log_err("rx deferred start not supported"); 1096 return -EINVAL; 1097 } 1098 1099 /* Verify queue index */ 1100 if (qidx >= dev->data->nb_rx_queues) { 1101 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 1102 qidx, (dev->data->nb_rx_queues - 1)); 1103 return -ENOTSUP; 1104 } 1105 1106 /* Socket id check */ 1107 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1108 socket_id != (unsigned int)nic->node) 1109 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 1110 socket_id, nic->node); 1111 1112 /* Allocating rx queue data structure */ 1113 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 1114 RTE_CACHE_LINE_SIZE, nic->node); 1115 if (rxq == NULL) { 1116 octeontx_log_err("failed to allocate rxq=%d", qidx); 1117 return -ENOMEM; 1118 } 1119 1120 if (!nic->pki.initialized) { 1121 pktbuf_conf.port_type = 0; 1122 pki_hash.port_type = 0; 1123 pki_qos.port_type = 0; 1124 1125 pktbuf_conf.mmask.f_wqe_skip = 1; 1126 pktbuf_conf.mmask.f_first_skip = 1; 1127 pktbuf_conf.mmask.f_later_skip = 1; 1128 pktbuf_conf.mmask.f_mbuff_size = 1; 1129 pktbuf_conf.mmask.f_cache_mode = 1; 1130 1131 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 1132 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 1133 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 1134 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 1135 RTE_PKTMBUF_HEADROOM - 1136 rte_pktmbuf_priv_size(mb_pool) - 1137 sizeof(struct rte_mbuf)); 1138 1139 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 1140 1141 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 1142 if (ret != 0) { 1143 octeontx_log_err("fail to configure pktbuf for port %d", 1144 port); 1145 rte_free(rxq); 1146 return ret; 1147 } 1148 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 1149 "\tmbuf_size:\t0x%0x\n" 1150 "\twqe_skip:\t0x%0x\n" 1151 "\tfirst_skip:\t0x%0x\n" 1152 "\tlater_skip:\t0x%0x\n" 1153 "\tcache_mode:\t%s\n", 1154 port, 1155 pktbuf_conf.mbuff_size, 1156 pktbuf_conf.wqe_skip, 1157 pktbuf_conf.first_skip, 1158 pktbuf_conf.later_skip, 1159 (pktbuf_conf.cache_mode == 1160 PKI_OPC_MODE_STT) ? 1161 "STT" : 1162 (pktbuf_conf.cache_mode == 1163 PKI_OPC_MODE_STF) ? 1164 "STF" : 1165 (pktbuf_conf.cache_mode == 1166 PKI_OPC_MODE_STF1_STT) ? 1167 "STF1_STT" : "STF2_STT"); 1168 1169 if (nic->pki.hash_enable) { 1170 pki_hash.tag_dlc = 1; 1171 pki_hash.tag_slc = 1; 1172 pki_hash.tag_dlf = 1; 1173 pki_hash.tag_slf = 1; 1174 pki_hash.tag_prt = 1; 1175 octeontx_pki_port_hash_config(port, &pki_hash); 1176 } 1177 1178 pool = (uintptr_t)mb_pool->pool_id; 1179 1180 /* Get the gaura Id */ 1181 gaura = octeontx_fpa_bufpool_gaura(pool); 1182 1183 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 1184 pki_qos.num_entry = 1; 1185 pki_qos.drop_policy = 0; 1186 pki_qos.tag_type = 0L; 1187 pki_qos.qos_entry[0].port_add = 0; 1188 pki_qos.qos_entry[0].gaura = gaura; 1189 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 1190 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 1191 pki_qos.qos_entry[0].grptag_bad = 0; 1192 pki_qos.qos_entry[0].grptag_ok = 0; 1193 1194 ret = octeontx_pki_port_create_qos(port, &pki_qos); 1195 if (ret < 0) { 1196 octeontx_log_err("failed to create QOS port=%d, q=%d", 1197 port, qidx); 1198 rte_free(rxq); 1199 return ret; 1200 } 1201 nic->pki.initialized = true; 1202 } 1203 1204 rxq->port_id = nic->port_id; 1205 rxq->eth_dev = dev; 1206 rxq->queue_id = qidx; 1207 rxq->evdev = nic->evdev; 1208 rxq->ev_queues = ev_queues; 1209 rxq->ev_ports = ev_ports; 1210 rxq->pool = mb_pool; 1211 1212 octeontx_recheck_rx_offloads(rxq); 1213 dev->data->rx_queues[qidx] = rxq; 1214 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1215 1216 return 0; 1217 } 1218 1219 static void 1220 octeontx_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 1221 { 1222 rte_free(dev->data->rx_queues[qid]); 1223 } 1224 1225 static const uint32_t * 1226 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 1227 { 1228 static const uint32_t ptypes[] = { 1229 RTE_PTYPE_L3_IPV4, 1230 RTE_PTYPE_L3_IPV4_EXT, 1231 RTE_PTYPE_L3_IPV6, 1232 RTE_PTYPE_L3_IPV6_EXT, 1233 RTE_PTYPE_L4_TCP, 1234 RTE_PTYPE_L4_UDP, 1235 RTE_PTYPE_L4_FRAG, 1236 RTE_PTYPE_UNKNOWN 1237 }; 1238 1239 if (dev->rx_pkt_burst == octeontx_recv_pkts) 1240 return ptypes; 1241 1242 return NULL; 1243 } 1244 1245 static int 1246 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1247 { 1248 RTE_SET_USED(dev); 1249 1250 if (!strcmp(pool, "octeontx_fpavf")) 1251 return 0; 1252 1253 return -ENOTSUP; 1254 } 1255 1256 /* Initialize and register driver with DPDK Application */ 1257 static const struct eth_dev_ops octeontx_dev_ops = { 1258 .dev_configure = octeontx_dev_configure, 1259 .dev_infos_get = octeontx_dev_info, 1260 .dev_close = octeontx_dev_close, 1261 .dev_start = octeontx_dev_start, 1262 .dev_stop = octeontx_dev_stop, 1263 .promiscuous_enable = octeontx_dev_promisc_enable, 1264 .promiscuous_disable = octeontx_dev_promisc_disable, 1265 .link_update = octeontx_dev_link_update, 1266 .stats_get = octeontx_dev_stats_get, 1267 .stats_reset = octeontx_dev_stats_reset, 1268 .mac_addr_remove = octeontx_dev_mac_addr_del, 1269 .mac_addr_add = octeontx_dev_mac_addr_add, 1270 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1271 .vlan_offload_set = octeontx_dev_vlan_offload_set, 1272 .vlan_filter_set = octeontx_dev_vlan_filter_set, 1273 .tx_queue_start = octeontx_dev_tx_queue_start, 1274 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1275 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1276 .tx_queue_release = octeontx_dev_tx_queue_release, 1277 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1278 .rx_queue_release = octeontx_dev_rx_queue_release, 1279 .dev_set_link_up = octeontx_dev_set_link_up, 1280 .dev_set_link_down = octeontx_dev_set_link_down, 1281 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1282 .mtu_set = octeontx_dev_mtu_set, 1283 .pool_ops_supported = octeontx_pool_ops, 1284 .flow_ctrl_get = octeontx_dev_flow_ctrl_get, 1285 .flow_ctrl_set = octeontx_dev_flow_ctrl_set, 1286 }; 1287 1288 /* Create Ethdev interface per BGX LMAC ports */ 1289 static int 1290 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1291 int socket_id) 1292 { 1293 int res; 1294 size_t pko_vfid; 1295 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1296 struct octeontx_nic *nic = NULL; 1297 struct rte_eth_dev *eth_dev = NULL; 1298 struct rte_eth_dev_data *data; 1299 const char *name = rte_vdev_device_name(dev); 1300 int max_entries; 1301 1302 PMD_INIT_FUNC_TRACE(); 1303 1304 sprintf(octtx_name, "%s_%d", name, port); 1305 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1306 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1307 if (eth_dev == NULL) 1308 return -ENODEV; 1309 1310 eth_dev->dev_ops = &octeontx_dev_ops; 1311 eth_dev->device = &dev->device; 1312 octeontx_set_tx_function(eth_dev); 1313 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1314 rte_eth_dev_probing_finish(eth_dev); 1315 return 0; 1316 } 1317 1318 /* Reserve an ethdev entry */ 1319 eth_dev = rte_eth_dev_allocate(octtx_name); 1320 if (eth_dev == NULL) { 1321 octeontx_log_err("failed to allocate rte_eth_dev"); 1322 res = -ENOMEM; 1323 goto err; 1324 } 1325 data = eth_dev->data; 1326 1327 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1328 if (nic == NULL) { 1329 octeontx_log_err("failed to allocate nic structure"); 1330 res = -ENOMEM; 1331 goto err; 1332 } 1333 data->dev_private = nic; 1334 pko_vfid = octeontx_pko_get_vfid(); 1335 1336 if (pko_vfid == SIZE_MAX) { 1337 octeontx_log_err("failed to get pko vfid"); 1338 res = -ENODEV; 1339 goto err; 1340 } 1341 1342 nic->pko_vfid = pko_vfid; 1343 nic->port_id = port; 1344 nic->evdev = evdev; 1345 1346 res = octeontx_port_open(nic); 1347 if (res < 0) 1348 goto err; 1349 1350 /* Rx side port configuration */ 1351 res = octeontx_pki_port_open(port); 1352 if (res != 0) { 1353 octeontx_log_err("failed to open PKI port %d", port); 1354 res = -ENODEV; 1355 goto err; 1356 } 1357 1358 eth_dev->device = &dev->device; 1359 eth_dev->intr_handle = NULL; 1360 eth_dev->data->numa_node = dev->device.numa_node; 1361 1362 data->port_id = eth_dev->data->port_id; 1363 1364 nic->ev_queues = 1; 1365 nic->ev_ports = 1; 1366 nic->print_flag = -1; 1367 1368 data->dev_link.link_status = ETH_LINK_DOWN; 1369 data->dev_started = 0; 1370 data->promiscuous = 0; 1371 data->all_multicast = 0; 1372 data->scattered_rx = 0; 1373 1374 /* Get maximum number of supported MAC entries */ 1375 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id); 1376 if (max_entries < 0) { 1377 octeontx_log_err("Failed to get max entries for mac addr"); 1378 res = -ENOTSUP; 1379 goto err; 1380 } 1381 1382 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries * 1383 RTE_ETHER_ADDR_LEN, 0, 1384 socket_id); 1385 if (data->mac_addrs == NULL) { 1386 octeontx_log_err("failed to allocate memory for mac_addrs"); 1387 res = -ENOMEM; 1388 goto err; 1389 } 1390 1391 eth_dev->dev_ops = &octeontx_dev_ops; 1392 1393 /* Finally save ethdev pointer to the NIC structure */ 1394 nic->dev = eth_dev; 1395 1396 if (nic->port_id != data->port_id) { 1397 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1398 data->port_id, nic->port_id); 1399 res = -EINVAL; 1400 goto free_mac_addrs; 1401 } 1402 1403 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 1404 octeontx_link_status_poll, nic); 1405 if (res) { 1406 octeontx_log_err("Failed to start link polling alarm"); 1407 goto err; 1408 } 1409 1410 /* Update port_id mac to eth_dev */ 1411 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1412 1413 /* Update same mac address to BGX CAM table at index 0 */ 1414 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0); 1415 1416 res = octeontx_dev_flow_ctrl_init(eth_dev); 1417 if (res < 0) 1418 goto err; 1419 1420 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1421 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1422 nic->port_id, nic->port_ena, 1423 nic->base_ochan, nic->num_ochans, 1424 nic->num_tx_queues); 1425 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu); 1426 1427 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1428 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1429 1430 rte_eth_dev_probing_finish(eth_dev); 1431 return data->port_id; 1432 1433 free_mac_addrs: 1434 rte_free(data->mac_addrs); 1435 data->mac_addrs = NULL; 1436 err: 1437 if (nic) 1438 octeontx_port_close(nic); 1439 1440 rte_eth_dev_release_port(eth_dev); 1441 1442 return res; 1443 } 1444 1445 /* Un initialize octeontx device */ 1446 static int 1447 octeontx_remove(struct rte_vdev_device *dev) 1448 { 1449 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1450 struct rte_eth_dev *eth_dev = NULL; 1451 struct octeontx_nic *nic = NULL; 1452 int i; 1453 1454 if (dev == NULL) 1455 return -EINVAL; 1456 1457 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1458 sprintf(octtx_name, "eth_octeontx_%d", i); 1459 1460 eth_dev = rte_eth_dev_allocated(octtx_name); 1461 if (eth_dev == NULL) 1462 continue; /* port already released */ 1463 1464 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1465 rte_eth_dev_release_port(eth_dev); 1466 continue; 1467 } 1468 1469 nic = octeontx_pmd_priv(eth_dev); 1470 rte_event_dev_stop(nic->evdev); 1471 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1472 octeontx_dev_close(eth_dev); 1473 rte_eth_dev_release_port(eth_dev); 1474 } 1475 1476 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1477 return 0; 1478 1479 /* Free FC resource */ 1480 octeontx_pko_fc_free(); 1481 1482 return 0; 1483 } 1484 1485 /* Initialize octeontx device */ 1486 static int 1487 octeontx_probe(struct rte_vdev_device *dev) 1488 { 1489 const char *dev_name; 1490 static int probe_once; 1491 uint8_t socket_id, qlist; 1492 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1493 struct rte_event_dev_config dev_conf; 1494 const char *eventdev_name = "event_octeontx"; 1495 struct rte_event_dev_info info; 1496 struct rte_eth_dev *eth_dev; 1497 1498 struct octeontx_vdev_init_params init_params = { 1499 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1500 }; 1501 1502 dev_name = rte_vdev_device_name(dev); 1503 1504 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1505 strlen(rte_vdev_device_args(dev)) == 0) { 1506 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1507 if (!eth_dev) { 1508 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1509 return -1; 1510 } 1511 /* TODO: request info from primary to set up Rx and Tx */ 1512 eth_dev->dev_ops = &octeontx_dev_ops; 1513 eth_dev->device = &dev->device; 1514 rte_eth_dev_probing_finish(eth_dev); 1515 return 0; 1516 } 1517 1518 res = octeontx_parse_vdev_init_params(&init_params, dev); 1519 if (res < 0) 1520 return -EINVAL; 1521 1522 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1523 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1524 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1525 return -ENOTSUP; 1526 } 1527 1528 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1529 1530 socket_id = rte_socket_id(); 1531 1532 tx_vfcnt = octeontx_pko_vf_count(); 1533 1534 if (tx_vfcnt < init_params.nr_port) { 1535 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1536 tx_vfcnt, init_params.nr_port); 1537 return -EINVAL; 1538 } 1539 evdev = rte_event_dev_get_dev_id(eventdev_name); 1540 if (evdev < 0) { 1541 octeontx_log_err("eventdev %s not found", eventdev_name); 1542 return -ENODEV; 1543 } 1544 1545 res = rte_event_dev_info_get(evdev, &info); 1546 if (res < 0) { 1547 octeontx_log_err("failed to eventdev info %d", res); 1548 return -EINVAL; 1549 } 1550 1551 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1552 info.max_event_queues, info.max_event_ports); 1553 1554 if (octeontx_pko_init_fc(tx_vfcnt)) 1555 return -ENOMEM; 1556 1557 devconf_set_default_sane_values(&dev_conf, &info); 1558 res = rte_event_dev_configure(evdev, &dev_conf); 1559 if (res < 0) 1560 goto parse_error; 1561 1562 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1563 (uint32_t *)&pnum); 1564 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1565 (uint32_t *)&qnum); 1566 if (pnum < qnum) { 1567 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1568 pnum, qnum); 1569 res = -EINVAL; 1570 goto parse_error; 1571 } 1572 1573 /* Enable all queues available */ 1574 for (i = 0; i < qnum; i++) { 1575 res = rte_event_queue_setup(evdev, i, NULL); 1576 if (res < 0) { 1577 octeontx_log_err("failed to setup event_q(%d): res %d", 1578 i, res); 1579 goto parse_error; 1580 } 1581 } 1582 1583 /* Enable all ports available */ 1584 for (i = 0; i < pnum; i++) { 1585 res = rte_event_port_setup(evdev, i, NULL); 1586 if (res < 0) { 1587 res = -ENODEV; 1588 octeontx_log_err("failed to setup ev port(%d) res=%d", 1589 i, res); 1590 goto parse_error; 1591 } 1592 } 1593 1594 /* 1595 * Do 1:1 links for ports & queues. All queues would be mapped to 1596 * one port. If there are more ports than queues, then some ports 1597 * won't be linked to any queue. 1598 */ 1599 for (i = 0; i < qnum; i++) { 1600 /* Link one queue to one event port */ 1601 qlist = i; 1602 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1603 if (res < 0) { 1604 res = -ENODEV; 1605 octeontx_log_err("failed to link port (%d): res=%d", 1606 i, res); 1607 goto parse_error; 1608 } 1609 } 1610 1611 /* Create ethdev interface */ 1612 for (i = 0; i < init_params.nr_port; i++) { 1613 port_id = octeontx_create(dev, i, evdev, socket_id); 1614 if (port_id < 0) { 1615 octeontx_log_err("failed to create device %s", 1616 dev_name); 1617 res = -ENODEV; 1618 goto parse_error; 1619 } 1620 1621 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1622 port_id); 1623 } 1624 1625 if (probe_once) { 1626 octeontx_log_err("interface %s not supported", dev_name); 1627 octeontx_remove(dev); 1628 res = -ENOTSUP; 1629 goto parse_error; 1630 } 1631 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1632 probe_once = 1; 1633 1634 return 0; 1635 1636 parse_error: 1637 octeontx_pko_fc_free(); 1638 return res; 1639 } 1640 1641 static struct rte_vdev_driver octeontx_pmd_drv = { 1642 .probe = octeontx_probe, 1643 .remove = octeontx_remove, 1644 }; 1645 1646 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1647 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1648 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1649