1*b4dd7bcbSErez Shitrit /* SPDX-License-Identifier: BSD-3-Clause 2*b4dd7bcbSErez Shitrit * Copyright (c) 2022 NVIDIA Corporation & Affiliates 3*b4dd7bcbSErez Shitrit */ 4*b4dd7bcbSErez Shitrit 5*b4dd7bcbSErez Shitrit #ifndef MLX5DR_BUDDY_H_ 6*b4dd7bcbSErez Shitrit #define MLX5DR_BUDDY_H_ 7*b4dd7bcbSErez Shitrit 8*b4dd7bcbSErez Shitrit struct mlx5dr_buddy_mem { 9*b4dd7bcbSErez Shitrit struct rte_bitmap **bits; 10*b4dd7bcbSErez Shitrit unsigned int *num_free; 11*b4dd7bcbSErez Shitrit uint32_t max_order; 12*b4dd7bcbSErez Shitrit }; 13*b4dd7bcbSErez Shitrit 14*b4dd7bcbSErez Shitrit struct mlx5dr_buddy_mem *mlx5dr_buddy_create(uint32_t max_order); 15*b4dd7bcbSErez Shitrit 16*b4dd7bcbSErez Shitrit void mlx5dr_buddy_cleanup(struct mlx5dr_buddy_mem *buddy); 17*b4dd7bcbSErez Shitrit 18*b4dd7bcbSErez Shitrit int mlx5dr_buddy_alloc_mem(struct mlx5dr_buddy_mem *buddy, int order); 19*b4dd7bcbSErez Shitrit 20*b4dd7bcbSErez Shitrit void mlx5dr_buddy_free_mem(struct mlx5dr_buddy_mem *buddy, uint32_t seg, int order); 21*b4dd7bcbSErez Shitrit 22*b4dd7bcbSErez Shitrit #endif /* MLX5DR_BUDDY_H_ */ 23