xref: /dpdk/drivers/net/dpaa2/mc/fsl_dpni_cmd.h (revision 591200ef6f32b56adc367ebe3647cc3dbe9362db)
1131a75b6SHemant Agrawal /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
2e6b82573SHemant Agrawal  *
3e6b82573SHemant Agrawal  * Copyright 2013-2016 Freescale Semiconductor Inc.
4*591200efSGagandeep Singh  * Copyright 2016-2023 NXP
5e6b82573SHemant Agrawal  *
6e6b82573SHemant Agrawal  */
7e6b82573SHemant Agrawal #ifndef _FSL_DPNI_CMD_H
8e6b82573SHemant Agrawal #define _FSL_DPNI_CMD_H
9e6b82573SHemant Agrawal 
10e6b82573SHemant Agrawal /* DPNI Version */
11f48cd6c6SNipun Gupta #define DPNI_VER_MAJOR				8
12*591200efSGagandeep Singh #define DPNI_VER_MINOR				4
1316bbc98aSShreyansh Jain 
1416bbc98aSShreyansh Jain #define DPNI_CMD_BASE_VERSION			1
1516bbc98aSShreyansh Jain #define DPNI_CMD_VERSION_2			2
1625fea082SHemant Agrawal #define DPNI_CMD_VERSION_3			3
172cb2abf3SHemant Agrawal #define DPNI_CMD_VERSION_4			4
182cb2abf3SHemant Agrawal #define DPNI_CMD_VERSION_5			5
19f48cd6c6SNipun Gupta #define DPNI_CMD_VERSION_6			6
2001690f8fSRohit Raj #define DPNI_CMD_VERSION_7			7
2116bbc98aSShreyansh Jain #define DPNI_CMD_ID_OFFSET			4
2216bbc98aSShreyansh Jain 
2316bbc98aSShreyansh Jain #define DPNI_CMD(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
2416bbc98aSShreyansh Jain #define DPNI_CMD_V2(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_2)
2525fea082SHemant Agrawal #define DPNI_CMD_V3(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_3)
262cb2abf3SHemant Agrawal #define DPNI_CMD_V4(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_4)
272cb2abf3SHemant Agrawal #define DPNI_CMD_V5(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_5)
28f48cd6c6SNipun Gupta #define DPNI_CMD_V6(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_6)
2901690f8fSRohit Raj #define DPNI_CMD_V7(id)	(((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_7)
30e6b82573SHemant Agrawal 
31e6b82573SHemant Agrawal /* Command IDs */
3216bbc98aSShreyansh Jain #define DPNI_CMDID_OPEN				DPNI_CMD(0x801)
3316bbc98aSShreyansh Jain #define DPNI_CMDID_CLOSE			DPNI_CMD(0x800)
3401690f8fSRohit Raj #define DPNI_CMDID_CREATE			DPNI_CMD_V7(0x901)
3516bbc98aSShreyansh Jain #define DPNI_CMDID_DESTROY			DPNI_CMD(0x981)
3616bbc98aSShreyansh Jain #define DPNI_CMDID_GET_API_VERSION		DPNI_CMD(0xa01)
37e6b82573SHemant Agrawal 
3816bbc98aSShreyansh Jain #define DPNI_CMDID_ENABLE			DPNI_CMD(0x002)
3916bbc98aSShreyansh Jain #define DPNI_CMDID_DISABLE			DPNI_CMD(0x003)
4001690f8fSRohit Raj #define DPNI_CMDID_GET_ATTR			DPNI_CMD_V6(0x004)
4116bbc98aSShreyansh Jain #define DPNI_CMDID_RESET			DPNI_CMD(0x005)
4216bbc98aSShreyansh Jain #define DPNI_CMDID_IS_ENABLED			DPNI_CMD(0x006)
43e6b82573SHemant Agrawal 
44c5acbb5eSHemant Agrawal #define DPNI_CMDID_SET_IRQ_ENABLE		DPNI_CMD(0x012)
45c5acbb5eSHemant Agrawal #define DPNI_CMDID_GET_IRQ_ENABLE		DPNI_CMD(0x013)
46c5acbb5eSHemant Agrawal #define DPNI_CMDID_SET_IRQ_MASK			DPNI_CMD(0x014)
47c5acbb5eSHemant Agrawal #define DPNI_CMDID_GET_IRQ_MASK			DPNI_CMD(0x015)
48c5acbb5eSHemant Agrawal #define DPNI_CMDID_GET_IRQ_STATUS		DPNI_CMD(0x016)
49c5acbb5eSHemant Agrawal #define DPNI_CMDID_CLEAR_IRQ_STATUS		DPNI_CMD(0x017)
50c5acbb5eSHemant Agrawal 
5196f7bfe8SSachin Saxena #define DPNI_CMDID_SET_POOLS			DPNI_CMD_V3(0x200)
5216bbc98aSShreyansh Jain #define DPNI_CMDID_SET_ERRORS_BEHAVIOR		DPNI_CMD(0x20B)
53e6b82573SHemant Agrawal 
5416bbc98aSShreyansh Jain #define DPNI_CMDID_GET_QDID			DPNI_CMD(0x210)
5516bbc98aSShreyansh Jain #define DPNI_CMDID_GET_SP_INFO			DPNI_CMD(0x211)
5616bbc98aSShreyansh Jain #define DPNI_CMDID_GET_TX_DATA_OFFSET		DPNI_CMD(0x212)
5725fea082SHemant Agrawal #define DPNI_CMDID_GET_LINK_STATE		DPNI_CMD_V2(0x215)
5816bbc98aSShreyansh Jain #define DPNI_CMDID_SET_MAX_FRAME_LENGTH		DPNI_CMD(0x216)
5916bbc98aSShreyansh Jain #define DPNI_CMDID_GET_MAX_FRAME_LENGTH		DPNI_CMD(0x217)
6025fea082SHemant Agrawal #define DPNI_CMDID_SET_LINK_CFG			DPNI_CMD_V2(0x21A)
61f48cd6c6SNipun Gupta #define DPNI_CMDID_SET_TX_SHAPING		DPNI_CMD_V3(0x21B)
62e6b82573SHemant Agrawal 
6316bbc98aSShreyansh Jain #define DPNI_CMDID_SET_MCAST_PROMISC		DPNI_CMD(0x220)
6416bbc98aSShreyansh Jain #define DPNI_CMDID_GET_MCAST_PROMISC		DPNI_CMD(0x221)
6516bbc98aSShreyansh Jain #define DPNI_CMDID_SET_UNICAST_PROMISC		DPNI_CMD(0x222)
6616bbc98aSShreyansh Jain #define DPNI_CMDID_GET_UNICAST_PROMISC		DPNI_CMD(0x223)
6716bbc98aSShreyansh Jain #define DPNI_CMDID_SET_PRIM_MAC			DPNI_CMD(0x224)
6816bbc98aSShreyansh Jain #define DPNI_CMDID_GET_PRIM_MAC			DPNI_CMD(0x225)
6996f7bfe8SSachin Saxena #define DPNI_CMDID_ADD_MAC_ADDR			DPNI_CMD_V2(0x226)
7016bbc98aSShreyansh Jain #define DPNI_CMDID_REMOVE_MAC_ADDR		DPNI_CMD(0x227)
7116bbc98aSShreyansh Jain #define DPNI_CMDID_CLR_MAC_FILTERS		DPNI_CMD(0x228)
72e6b82573SHemant Agrawal 
7316bbc98aSShreyansh Jain #define DPNI_CMDID_ENABLE_VLAN_FILTER		DPNI_CMD(0x230)
7496f7bfe8SSachin Saxena #define DPNI_CMDID_ADD_VLAN_ID			DPNI_CMD_V2(0x231)
7516bbc98aSShreyansh Jain #define DPNI_CMDID_REMOVE_VLAN_ID		DPNI_CMD(0x232)
7616bbc98aSShreyansh Jain #define DPNI_CMDID_CLR_VLAN_FILTERS		DPNI_CMD(0x233)
773ce294f2SHemant Agrawal 
782cb2abf3SHemant Agrawal #define DPNI_CMDID_SET_RX_TC_DIST		DPNI_CMD_V4(0x235)
79e6b82573SHemant Agrawal 
80ac624068SGagandeep Singh #define DPNI_CMDID_SET_RX_TC_POLICING		DPNI_CMD(0x23E)
81ac624068SGagandeep Singh 
82fe2b986aSSunil Kumar Kori #define DPNI_CMDID_SET_QOS_TBL			DPNI_CMD_V2(0x240)
8396f7bfe8SSachin Saxena #define DPNI_CMDID_ADD_QOS_ENT			DPNI_CMD_V2(0x241)
84fe2b986aSSunil Kumar Kori #define DPNI_CMDID_REMOVE_QOS_ENT		DPNI_CMD(0x242)
85fe2b986aSSunil Kumar Kori #define DPNI_CMDID_CLR_QOS_TBL			DPNI_CMD(0x243)
862cb2abf3SHemant Agrawal #define DPNI_CMDID_ADD_FS_ENT			DPNI_CMD_V2(0x244)
87fe2b986aSSunil Kumar Kori #define DPNI_CMDID_REMOVE_FS_ENT		DPNI_CMD(0x245)
88fe2b986aSSunil Kumar Kori #define DPNI_CMDID_CLR_FS_ENT			DPNI_CMD(0x246)
89fe2b986aSSunil Kumar Kori 
90f48cd6c6SNipun Gupta #define DPNI_CMDID_SET_TX_PRIORITIES		DPNI_CMD_V3(0x250)
91ac624068SGagandeep Singh #define DPNI_CMDID_GET_RX_TC_POLICING		DPNI_CMD(0x251)
92ac624068SGagandeep Singh 
93f48cd6c6SNipun Gupta #define DPNI_CMDID_GET_STATISTICS		DPNI_CMD_V4(0x25D)
9416bbc98aSShreyansh Jain #define DPNI_CMDID_RESET_STATISTICS		DPNI_CMD(0x25E)
95f48cd6c6SNipun Gupta #define DPNI_CMDID_GET_QUEUE			DPNI_CMD_V3(0x25F)
96f48cd6c6SNipun Gupta #define DPNI_CMDID_SET_QUEUE			DPNI_CMD_V3(0x260)
9716bbc98aSShreyansh Jain #define DPNI_CMDID_GET_TAILDROP			DPNI_CMD_V2(0x261)
98f48cd6c6SNipun Gupta #define DPNI_CMDID_SET_TAILDROP			DPNI_CMD_V3(0x262)
99e6b82573SHemant Agrawal 
10016bbc98aSShreyansh Jain #define DPNI_CMDID_GET_PORT_MAC_ADDR		DPNI_CMD(0x263)
101e6b82573SHemant Agrawal 
10225fea082SHemant Agrawal #define DPNI_CMDID_GET_BUFFER_LAYOUT		DPNI_CMD_V2(0x264)
10325fea082SHemant Agrawal #define DPNI_CMDID_SET_BUFFER_LAYOUT		DPNI_CMD_V2(0x265)
104e6b82573SHemant Agrawal 
105f48cd6c6SNipun Gupta #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION	DPNI_CMD_V3(0x267)
106f48cd6c6SNipun Gupta #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION	DPNI_CMD_V3(0x268)
107f48cd6c6SNipun Gupta #define DPNI_CMDID_SET_EARLY_DROP		DPNI_CMD_V3(0x269)
108f48cd6c6SNipun Gupta #define DPNI_CMDID_GET_EARLY_DROP		DPNI_CMD_V3(0x26A)
10901690f8fSRohit Raj #define DPNI_CMDID_GET_OFFLOAD			DPNI_CMD_V2(0x26B)
11001690f8fSRohit Raj #define DPNI_CMDID_SET_OFFLOAD			DPNI_CMD_V2(0x26C)
111*591200efSGagandeep Singh #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE	DPNI_CMD_V2(0x266)
112*591200efSGagandeep Singh #define DPNI_CMDID_GET_TX_CONFIRMATION_MODE	DPNI_CMD_V2(0x26D)
11301690f8fSRohit Raj #define DPNI_CMDID_SET_OPR			DPNI_CMD_V2(0x26e)
11401690f8fSRohit Raj #define DPNI_CMDID_GET_OPR			DPNI_CMD_V2(0x26f)
115a712067dSSunil Kumar Kori #define DPNI_CMDID_LOAD_SW_SEQUENCE		DPNI_CMD(0x270)
116a712067dSSunil Kumar Kori #define DPNI_CMDID_ENABLE_SW_SEQUENCE		DPNI_CMD(0x271)
117a712067dSSunil Kumar Kori #define DPNI_CMDID_GET_SW_SEQUENCE_LAYOUT	DPNI_CMD(0x272)
11801690f8fSRohit Raj #define DPNI_CMDID_SET_RX_FS_DIST		DPNI_CMD_V2(0x273)
11901690f8fSRohit Raj #define DPNI_CMDID_SET_RX_HASH_DIST		DPNI_CMD_V2(0x274)
120e59b75ffSHemant Agrawal #define DPNI_CMDID_ADD_CUSTOM_TPID		DPNI_CMD(0x275)
121e59b75ffSHemant Agrawal #define DPNI_CMDID_REMOVE_CUSTOM_TPID		DPNI_CMD(0x276)
122e59b75ffSHemant Agrawal #define DPNI_CMDID_GET_CUSTOM_TPID		DPNI_CMD(0x277)
12372100f0dSGagandeep Singh #define DPNI_CMDID_GET_LINK_CFG			DPNI_CMD(0x278)
124*591200efSGagandeep Singh #define DPNI_CMDID_SET_SINGLE_STEP_CFG			DPNI_CMD(0x279)
125*591200efSGagandeep Singh #define DPNI_CMDID_GET_SINGLE_STEP_CFG		DPNI_CMD_V2(0x27a)
126f023d059SJun Yang #define DPNI_CMDID_SET_PORT_CFG			DPNI_CMD(0x27B)
127*591200efSGagandeep Singh #define DPNI_CMDID_GET_PORT_CFG			DPNI_CMD(0x27C)
128*591200efSGagandeep Singh #define DPNI_CMDID_DUMP_TABLE           DPNI_CMD(0x27D)
129*591200efSGagandeep Singh #define DPNI_CMDID_SET_SP_PROFILE		DPNI_CMD(0x27E)
130*591200efSGagandeep Singh #define DPNI_CMDID_GET_QDID_EX			DPNI_CMD(0x27F)
131*591200efSGagandeep Singh #define DPNI_CMDID_SP_ENABLE		    DPNI_CMD(0x280)
132*591200efSGagandeep Singh #define DPNI_CMDID_SET_QUEUE_TX_CONFIRMATION_MODE	DPNI_CMD(0x281)
133*591200efSGagandeep Singh #define DPNI_CMDID_GET_QUEUE_TX_CONFIRMATION_MODE	DPNI_CMD(0x282)
134e6b82573SHemant Agrawal 
13516bbc98aSShreyansh Jain /* Macros for accessing command fields smaller than 1byte */
13616bbc98aSShreyansh Jain #define DPNI_MASK(field)	\
13716bbc98aSShreyansh Jain 	GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
13816bbc98aSShreyansh Jain 		DPNI_##field##_SHIFT)
13916bbc98aSShreyansh Jain #define dpni_set_field(var, field, val)	\
14016bbc98aSShreyansh Jain 	((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
14116bbc98aSShreyansh Jain #define dpni_get_field(var, field)	\
14216bbc98aSShreyansh Jain 	(((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
143e6b82573SHemant Agrawal 
14416bbc98aSShreyansh Jain #pragma pack(push, 1)
14516bbc98aSShreyansh Jain struct dpni_cmd_open {
14616bbc98aSShreyansh Jain 	uint32_t dpni_id;
14716bbc98aSShreyansh Jain };
148e6b82573SHemant Agrawal 
14916bbc98aSShreyansh Jain struct dpni_cmd_create {
15016bbc98aSShreyansh Jain 	uint32_t options;
15116bbc98aSShreyansh Jain 	uint8_t num_queues;
15216bbc98aSShreyansh Jain 	uint8_t num_tcs;
15316bbc98aSShreyansh Jain 	uint8_t mac_filter_entries;
154f48cd6c6SNipun Gupta 	uint8_t num_channels;
15516bbc98aSShreyansh Jain 	uint8_t vlan_filter_entries;
15616bbc98aSShreyansh Jain 	uint8_t pad2;
15716bbc98aSShreyansh Jain 	uint8_t qos_entries;
15816bbc98aSShreyansh Jain 	uint8_t pad3;
15916bbc98aSShreyansh Jain 	uint16_t fs_entries;
16025fea082SHemant Agrawal 	uint8_t num_rx_tcs;
16155984a9bSShreyansh Jain 	uint8_t pad4;
16255984a9bSShreyansh Jain 	uint8_t  num_cgs;
1632cb2abf3SHemant Agrawal 	uint16_t num_opr;
1642cb2abf3SHemant Agrawal 	uint8_t dist_key_size;
16516bbc98aSShreyansh Jain };
166e6b82573SHemant Agrawal 
16716bbc98aSShreyansh Jain struct dpni_cmd_destroy {
16816bbc98aSShreyansh Jain 	uint32_t dpsw_id;
16916bbc98aSShreyansh Jain };
170e6b82573SHemant Agrawal 
17116bbc98aSShreyansh Jain #define DPNI_BACKUP_POOL(val, order)	(((val) & 0x1) << (order))
172e6b82573SHemant Agrawal 
17316bbc98aSShreyansh Jain struct dpni_cmd_pool {
17416bbc98aSShreyansh Jain 	uint16_t dpbp_id;
17516bbc98aSShreyansh Jain 	uint8_t priority_mask;
17616bbc98aSShreyansh Jain 	uint8_t pad;
17716bbc98aSShreyansh Jain };
178e6b82573SHemant Agrawal 
17916bbc98aSShreyansh Jain struct dpni_cmd_set_pools {
18016bbc98aSShreyansh Jain 	uint8_t num_dpbp;
18116bbc98aSShreyansh Jain 	uint8_t backup_pool_mask;
18296f7bfe8SSachin Saxena 	uint8_t pad;
18396f7bfe8SSachin Saxena 	uint8_t pool_options;
18416bbc98aSShreyansh Jain 	struct dpni_cmd_pool pool[8];
18516bbc98aSShreyansh Jain 	uint16_t buffer_size[8];
18616bbc98aSShreyansh Jain };
187e6b82573SHemant Agrawal 
18816bbc98aSShreyansh Jain /* The enable indication is always the least significant bit */
18916bbc98aSShreyansh Jain #define DPNI_ENABLE_SHIFT		0
19016bbc98aSShreyansh Jain #define DPNI_ENABLE_SIZE		1
191e6b82573SHemant Agrawal 
19216bbc98aSShreyansh Jain struct dpni_rsp_is_enabled {
19316bbc98aSShreyansh Jain 	uint8_t enabled;
19416bbc98aSShreyansh Jain };
195e6b82573SHemant Agrawal 
196c5acbb5eSHemant Agrawal struct dpni_cmd_set_irq_enable {
197c5acbb5eSHemant Agrawal 	uint8_t enable;
198c5acbb5eSHemant Agrawal 	uint8_t pad[3];
199c5acbb5eSHemant Agrawal 	uint8_t irq_index;
200c5acbb5eSHemant Agrawal };
201c5acbb5eSHemant Agrawal 
202c5acbb5eSHemant Agrawal struct dpni_cmd_get_irq_enable {
203c5acbb5eSHemant Agrawal 	uint32_t pad;
204c5acbb5eSHemant Agrawal 	uint8_t irq_index;
205c5acbb5eSHemant Agrawal };
206c5acbb5eSHemant Agrawal 
207c5acbb5eSHemant Agrawal struct dpni_rsp_get_irq_enable {
208c5acbb5eSHemant Agrawal 	uint8_t enabled;
209c5acbb5eSHemant Agrawal };
210c5acbb5eSHemant Agrawal 
211c5acbb5eSHemant Agrawal struct dpni_cmd_set_irq_mask {
212c5acbb5eSHemant Agrawal 	uint32_t mask;
213c5acbb5eSHemant Agrawal 	uint8_t irq_index;
214c5acbb5eSHemant Agrawal };
215c5acbb5eSHemant Agrawal 
216c5acbb5eSHemant Agrawal struct dpni_cmd_get_irq_mask {
217c5acbb5eSHemant Agrawal 	uint32_t pad;
218c5acbb5eSHemant Agrawal 	uint8_t irq_index;
219c5acbb5eSHemant Agrawal };
220c5acbb5eSHemant Agrawal 
221c5acbb5eSHemant Agrawal struct dpni_rsp_get_irq_mask {
222c5acbb5eSHemant Agrawal 	uint32_t mask;
223c5acbb5eSHemant Agrawal };
224c5acbb5eSHemant Agrawal 
225c5acbb5eSHemant Agrawal struct dpni_cmd_get_irq_status {
226c5acbb5eSHemant Agrawal 	uint32_t status;
227c5acbb5eSHemant Agrawal 	uint8_t irq_index;
228c5acbb5eSHemant Agrawal };
229c5acbb5eSHemant Agrawal 
230c5acbb5eSHemant Agrawal struct dpni_rsp_get_irq_status {
231c5acbb5eSHemant Agrawal 	uint32_t status;
232c5acbb5eSHemant Agrawal };
233c5acbb5eSHemant Agrawal 
234c5acbb5eSHemant Agrawal struct dpni_cmd_clear_irq_status {
235c5acbb5eSHemant Agrawal 	uint32_t status;
236c5acbb5eSHemant Agrawal 	uint8_t irq_index;
237c5acbb5eSHemant Agrawal };
238c5acbb5eSHemant Agrawal 
23916bbc98aSShreyansh Jain struct dpni_rsp_get_attr {
24016bbc98aSShreyansh Jain 	/* response word 0 */
24116bbc98aSShreyansh Jain 	uint32_t options;
24216bbc98aSShreyansh Jain 	uint8_t num_queues;
24316bbc98aSShreyansh Jain 	uint8_t num_rx_tcs;
24416bbc98aSShreyansh Jain 	uint8_t mac_filter_entries;
24516bbc98aSShreyansh Jain 	uint8_t num_tx_tcs;
24616bbc98aSShreyansh Jain 	/* response word 1 */
24716bbc98aSShreyansh Jain 	uint8_t vlan_filter_entries;
248f48cd6c6SNipun Gupta 	uint8_t num_channels;
24916bbc98aSShreyansh Jain 	uint8_t qos_entries;
25016bbc98aSShreyansh Jain 	uint8_t pad2;
25116bbc98aSShreyansh Jain 	uint16_t fs_entries;
25201690f8fSRohit Raj 	uint16_t num_opr;
25316bbc98aSShreyansh Jain 	/* response word 2 */
25416bbc98aSShreyansh Jain 	uint8_t qos_key_size;
25516bbc98aSShreyansh Jain 	uint8_t fs_key_size;
25616bbc98aSShreyansh Jain 	uint16_t wriop_version;
25755984a9bSShreyansh Jain 	uint8_t num_cgs;
25816bbc98aSShreyansh Jain };
259e6b82573SHemant Agrawal 
26016bbc98aSShreyansh Jain #define DPNI_ERROR_ACTION_SHIFT		0
26116bbc98aSShreyansh Jain #define DPNI_ERROR_ACTION_SIZE		4
26216bbc98aSShreyansh Jain #define DPNI_FRAME_ANN_SHIFT		4
26316bbc98aSShreyansh Jain #define DPNI_FRAME_ANN_SIZE		1
264e6b82573SHemant Agrawal 
26516bbc98aSShreyansh Jain struct dpni_cmd_set_errors_behavior {
26616bbc98aSShreyansh Jain 	uint32_t errors;
26716bbc98aSShreyansh Jain 	/* from least significant bit: error_action:4, set_frame_annotation:1 */
26816bbc98aSShreyansh Jain 	uint8_t flags;
26916bbc98aSShreyansh Jain };
270e6b82573SHemant Agrawal 
27116bbc98aSShreyansh Jain /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
27216bbc98aSShreyansh Jain  * buffer layouts, but they all share the same parameters.
27316bbc98aSShreyansh Jain  * If one of the functions changes, below structure needs to be split.
27416bbc98aSShreyansh Jain  */
275e6b82573SHemant Agrawal 
27616bbc98aSShreyansh Jain #define DPNI_PASS_TS_SHIFT		0
27716bbc98aSShreyansh Jain #define DPNI_PASS_TS_SIZE		1
27816bbc98aSShreyansh Jain #define DPNI_PASS_PR_SHIFT		1
27916bbc98aSShreyansh Jain #define DPNI_PASS_PR_SIZE		1
28016bbc98aSShreyansh Jain #define DPNI_PASS_FS_SHIFT		2
28116bbc98aSShreyansh Jain #define DPNI_PASS_FS_SIZE		1
28225fea082SHemant Agrawal #define DPNI_PASS_SWO_SHIFT		3
28325fea082SHemant Agrawal #define DPNI_PASS_SWO_SIZE		1
284e6b82573SHemant Agrawal 
28516bbc98aSShreyansh Jain struct dpni_cmd_get_buffer_layout {
28616bbc98aSShreyansh Jain 	uint8_t qtype;
28716bbc98aSShreyansh Jain };
288e6b82573SHemant Agrawal 
28916bbc98aSShreyansh Jain struct dpni_rsp_get_buffer_layout {
29016bbc98aSShreyansh Jain 	/* response word 0 */
29116bbc98aSShreyansh Jain 	uint8_t pad0[6];
29216bbc98aSShreyansh Jain 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
29316bbc98aSShreyansh Jain 	uint8_t flags;
29416bbc98aSShreyansh Jain 	uint8_t pad1;
29516bbc98aSShreyansh Jain 	/* response word 1 */
29616bbc98aSShreyansh Jain 	uint16_t private_data_size;
29716bbc98aSShreyansh Jain 	uint16_t data_align;
29816bbc98aSShreyansh Jain 	uint16_t head_room;
29916bbc98aSShreyansh Jain 	uint16_t tail_room;
30016bbc98aSShreyansh Jain };
301e6b82573SHemant Agrawal 
30216bbc98aSShreyansh Jain struct dpni_cmd_set_buffer_layout {
30316bbc98aSShreyansh Jain 	/* cmd word 0 */
30416bbc98aSShreyansh Jain 	uint8_t qtype;
30516bbc98aSShreyansh Jain 	uint8_t pad0[3];
30616bbc98aSShreyansh Jain 	uint16_t options;
30716bbc98aSShreyansh Jain 	/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
30816bbc98aSShreyansh Jain 	uint8_t flags;
30916bbc98aSShreyansh Jain 	uint8_t pad1;
31016bbc98aSShreyansh Jain 	/* cmd word 1 */
31116bbc98aSShreyansh Jain 	uint16_t private_data_size;
31216bbc98aSShreyansh Jain 	uint16_t data_align;
31316bbc98aSShreyansh Jain 	uint16_t head_room;
31416bbc98aSShreyansh Jain 	uint16_t tail_room;
31516bbc98aSShreyansh Jain };
316e6b82573SHemant Agrawal 
31716bbc98aSShreyansh Jain struct dpni_cmd_set_offload {
31816bbc98aSShreyansh Jain 	uint8_t pad[3];
31916bbc98aSShreyansh Jain 	uint8_t dpni_offload;
32016bbc98aSShreyansh Jain 	uint32_t config;
32116bbc98aSShreyansh Jain };
322e6b82573SHemant Agrawal 
32316bbc98aSShreyansh Jain struct dpni_cmd_get_offload {
32416bbc98aSShreyansh Jain 	uint8_t pad[3];
32516bbc98aSShreyansh Jain 	uint8_t dpni_offload;
32616bbc98aSShreyansh Jain };
327977d0006SHemant Agrawal 
32816bbc98aSShreyansh Jain struct dpni_rsp_get_offload {
32916bbc98aSShreyansh Jain 	uint32_t pad;
33016bbc98aSShreyansh Jain 	uint32_t config;
33116bbc98aSShreyansh Jain };
332e6b82573SHemant Agrawal 
33316bbc98aSShreyansh Jain struct dpni_cmd_get_qdid {
33416bbc98aSShreyansh Jain 	uint8_t qtype;
33516bbc98aSShreyansh Jain };
336e6b82573SHemant Agrawal 
33716bbc98aSShreyansh Jain struct dpni_rsp_get_qdid {
33816bbc98aSShreyansh Jain 	uint16_t qdid;
33916bbc98aSShreyansh Jain };
340e6b82573SHemant Agrawal 
341*591200efSGagandeep Singh struct dpni_rsp_get_qdid_ex {
342*591200efSGagandeep Singh 	uint16_t qdid[16];
343*591200efSGagandeep Singh };
344*591200efSGagandeep Singh 
34516bbc98aSShreyansh Jain struct dpni_rsp_get_sp_info {
34616bbc98aSShreyansh Jain 	uint16_t spids[2];
34716bbc98aSShreyansh Jain };
3485d5aeeedSHemant Agrawal 
34916bbc98aSShreyansh Jain struct dpni_rsp_get_tx_data_offset {
35016bbc98aSShreyansh Jain 	uint16_t data_offset;
35116bbc98aSShreyansh Jain };
3525d5aeeedSHemant Agrawal 
35316bbc98aSShreyansh Jain struct dpni_cmd_get_statistics {
35416bbc98aSShreyansh Jain 	uint8_t page_number;
35555984a9bSShreyansh Jain 	uint16_t param;
35616bbc98aSShreyansh Jain };
357e6b82573SHemant Agrawal 
35816bbc98aSShreyansh Jain struct dpni_rsp_get_statistics {
35916bbc98aSShreyansh Jain 	uint64_t counter[7];
36016bbc98aSShreyansh Jain };
361e6b82573SHemant Agrawal 
36216bbc98aSShreyansh Jain struct dpni_cmd_set_link_cfg {
36316bbc98aSShreyansh Jain 	uint64_t pad0;
36416bbc98aSShreyansh Jain 	uint32_t rate;
36516bbc98aSShreyansh Jain 	uint32_t pad1;
36616bbc98aSShreyansh Jain 	uint64_t options;
36725fea082SHemant Agrawal 	uint64_t advertising;
36816bbc98aSShreyansh Jain };
369e6b82573SHemant Agrawal 
37016bbc98aSShreyansh Jain #define DPNI_LINK_STATE_SHIFT		0
37116bbc98aSShreyansh Jain #define DPNI_LINK_STATE_SIZE		1
37225fea082SHemant Agrawal #define DPNI_STATE_VALID_SHIFT		1
37325fea082SHemant Agrawal #define DPNI_STATE_VALID_SIZE		1
374e6b82573SHemant Agrawal 
37516bbc98aSShreyansh Jain struct dpni_rsp_get_link_state {
37616bbc98aSShreyansh Jain 	uint32_t pad0;
37716bbc98aSShreyansh Jain 	/* from LSB: up:1 */
37816bbc98aSShreyansh Jain 	uint8_t flags;
37916bbc98aSShreyansh Jain 	uint8_t pad1[3];
38016bbc98aSShreyansh Jain 	uint32_t rate;
38116bbc98aSShreyansh Jain 	uint32_t pad2;
38216bbc98aSShreyansh Jain 	uint64_t options;
38325fea082SHemant Agrawal 	uint64_t supported;
38425fea082SHemant Agrawal 	uint64_t advertising;
38516bbc98aSShreyansh Jain };
386b4d97b7dSHemant Agrawal 
387ac624068SGagandeep Singh #define DPNI_COUPLED_SHIFT	0
388ac624068SGagandeep Singh #define DPNI_COUPLED_SIZE	1
389f48cd6c6SNipun Gupta #define DPNI_LNI_SHAPER_SHIFT	1
390f48cd6c6SNipun Gupta #define DPNI_LNI_SHAPER_SIZE	1
391ac624068SGagandeep Singh 
392ac624068SGagandeep Singh struct dpni_cmd_set_tx_shaping {
393ac624068SGagandeep Singh 	uint16_t tx_cr_max_burst_size;
394ac624068SGagandeep Singh 	uint16_t tx_er_max_burst_size;
395ac624068SGagandeep Singh 	uint32_t pad;
396ac624068SGagandeep Singh 	uint32_t tx_cr_rate_limit;
397ac624068SGagandeep Singh 	uint32_t tx_er_rate_limit;
398f48cd6c6SNipun Gupta 	/* from LSB: coupled:1, lni_shaper: 1*/
399f48cd6c6SNipun Gupta 	uint8_t options;
400f48cd6c6SNipun Gupta 	uint8_t channel_id;
401f48cd6c6SNipun Gupta 	uint16_t oal;
402ac624068SGagandeep Singh };
403ac624068SGagandeep Singh 
40416bbc98aSShreyansh Jain struct dpni_cmd_set_max_frame_length {
40516bbc98aSShreyansh Jain 	uint16_t max_frame_length;
40616bbc98aSShreyansh Jain };
407b4d97b7dSHemant Agrawal 
40816bbc98aSShreyansh Jain struct dpni_rsp_get_max_frame_length {
40916bbc98aSShreyansh Jain 	uint16_t max_frame_length;
41016bbc98aSShreyansh Jain };
411b4d97b7dSHemant Agrawal 
41216bbc98aSShreyansh Jain struct dpni_cmd_set_multicast_promisc {
41316bbc98aSShreyansh Jain 	uint8_t enable;
41416bbc98aSShreyansh Jain };
415b4d97b7dSHemant Agrawal 
41616bbc98aSShreyansh Jain struct dpni_rsp_get_multicast_promisc {
41716bbc98aSShreyansh Jain 	uint8_t enabled;
41816bbc98aSShreyansh Jain };
4193ce294f2SHemant Agrawal 
42016bbc98aSShreyansh Jain struct dpni_cmd_set_unicast_promisc {
42116bbc98aSShreyansh Jain 	uint8_t enable;
42216bbc98aSShreyansh Jain };
4233ce294f2SHemant Agrawal 
42416bbc98aSShreyansh Jain struct dpni_rsp_get_unicast_promisc {
42516bbc98aSShreyansh Jain 	uint8_t enabled;
42616bbc98aSShreyansh Jain };
4273ce294f2SHemant Agrawal 
42816bbc98aSShreyansh Jain struct dpni_cmd_set_primary_mac_addr {
42916bbc98aSShreyansh Jain 	uint16_t pad;
43016bbc98aSShreyansh Jain 	uint8_t mac_addr[6];
43116bbc98aSShreyansh Jain };
432e6b82573SHemant Agrawal 
43316bbc98aSShreyansh Jain struct dpni_rsp_get_primary_mac_addr {
43416bbc98aSShreyansh Jain 	uint16_t pad;
43516bbc98aSShreyansh Jain 	uint8_t mac_addr[6];
43616bbc98aSShreyansh Jain };
437e6b82573SHemant Agrawal 
43816bbc98aSShreyansh Jain struct dpni_rsp_get_port_mac_addr {
43916bbc98aSShreyansh Jain 	uint16_t pad;
44016bbc98aSShreyansh Jain 	uint8_t mac_addr[6];
44116bbc98aSShreyansh Jain };
442e6b82573SHemant Agrawal 
44316bbc98aSShreyansh Jain struct dpni_cmd_add_mac_addr {
44496f7bfe8SSachin Saxena 	uint8_t flags;
44596f7bfe8SSachin Saxena 	uint8_t pad;
44616bbc98aSShreyansh Jain 	uint8_t mac_addr[6];
44796f7bfe8SSachin Saxena 	uint8_t tc_id;
44896f7bfe8SSachin Saxena 	uint8_t fq_id;
44916bbc98aSShreyansh Jain };
450e6b82573SHemant Agrawal 
45116bbc98aSShreyansh Jain struct dpni_cmd_remove_mac_addr {
45216bbc98aSShreyansh Jain 	uint16_t pad;
45316bbc98aSShreyansh Jain 	uint8_t mac_addr[6];
45416bbc98aSShreyansh Jain };
455e6b82573SHemant Agrawal 
45616bbc98aSShreyansh Jain #define DPNI_UNICAST_FILTERS_SHIFT	0
45716bbc98aSShreyansh Jain #define DPNI_UNICAST_FILTERS_SIZE	1
45816bbc98aSShreyansh Jain #define DPNI_MULTICAST_FILTERS_SHIFT	1
45916bbc98aSShreyansh Jain #define DPNI_MULTICAST_FILTERS_SIZE	1
460e6b82573SHemant Agrawal 
46116bbc98aSShreyansh Jain struct dpni_cmd_clear_mac_filters {
46216bbc98aSShreyansh Jain 	/* from LSB: unicast:1, multicast:1 */
46316bbc98aSShreyansh Jain 	uint8_t flags;
46416bbc98aSShreyansh Jain };
46523d6a87eSHemant Agrawal 
46616bbc98aSShreyansh Jain struct dpni_cmd_enable_vlan_filter {
46716bbc98aSShreyansh Jain 	/* only the LSB */
46816bbc98aSShreyansh Jain 	uint8_t en;
46916bbc98aSShreyansh Jain };
47023d6a87eSHemant Agrawal 
47116bbc98aSShreyansh Jain struct dpni_cmd_vlan_id {
47296f7bfe8SSachin Saxena 	uint8_t flags;
47396f7bfe8SSachin Saxena 	uint8_t tc_id;
47496f7bfe8SSachin Saxena 	uint8_t flow_id;
47596f7bfe8SSachin Saxena 	uint8_t pad;
47616bbc98aSShreyansh Jain 	uint16_t vlan_id;
47716bbc98aSShreyansh Jain };
478e6b82573SHemant Agrawal 
47916bbc98aSShreyansh Jain #define DPNI_SEPARATE_GRP_SHIFT 0
48016bbc98aSShreyansh Jain #define DPNI_SEPARATE_GRP_SIZE  1
48116bbc98aSShreyansh Jain #define DPNI_MODE_1_SHIFT		0
48216bbc98aSShreyansh Jain #define DPNI_MODE_1_SIZE		4
48316bbc98aSShreyansh Jain #define DPNI_MODE_2_SHIFT		4
48416bbc98aSShreyansh Jain #define DPNI_MODE_2_SIZE		4
485e6b82573SHemant Agrawal 
48616bbc98aSShreyansh Jain struct dpni_cmd_set_tx_priorities {
48716bbc98aSShreyansh Jain 	uint16_t flags;
48816bbc98aSShreyansh Jain 	uint8_t prio_group_A;
48916bbc98aSShreyansh Jain 	uint8_t prio_group_B;
490f48cd6c6SNipun Gupta 	uint8_t channel_idx;
491f48cd6c6SNipun Gupta 	uint8_t pad0[3];
49216bbc98aSShreyansh Jain 	uint8_t modes[4];
49316bbc98aSShreyansh Jain 	uint32_t pad1;
49416bbc98aSShreyansh Jain 	uint64_t pad2;
49516bbc98aSShreyansh Jain 	uint16_t delta_bandwidth[8];
49616bbc98aSShreyansh Jain };
497e6b82573SHemant Agrawal 
49816bbc98aSShreyansh Jain #define DPNI_DIST_MODE_SHIFT		0
49916bbc98aSShreyansh Jain #define DPNI_DIST_MODE_SIZE		4
50016bbc98aSShreyansh Jain #define DPNI_MISS_ACTION_SHIFT		4
50116bbc98aSShreyansh Jain #define DPNI_MISS_ACTION_SIZE		4
50216bbc98aSShreyansh Jain #define DPNI_KEEP_HASH_KEY_SHIFT	7
50316bbc98aSShreyansh Jain #define DPNI_KEEP_HASH_KEY_SIZE		1
50425fea082SHemant Agrawal #define DPNI_KEEP_ENTRIES_SHIFT		6
50525fea082SHemant Agrawal #define DPNI_KEEP_ENTRIES_SIZE		1
5067ae777d0SHemant Agrawal 
50716bbc98aSShreyansh Jain struct dpni_cmd_set_rx_tc_dist {
50816bbc98aSShreyansh Jain 	uint16_t dist_size;
50916bbc98aSShreyansh Jain 	uint8_t tc_id;
51016bbc98aSShreyansh Jain 	/* from LSB: dist_mode:4, miss_action:4 */
51116bbc98aSShreyansh Jain 	uint8_t flags;
51216bbc98aSShreyansh Jain 	uint8_t pad0;
51316bbc98aSShreyansh Jain 	/* only the LSB */
51416bbc98aSShreyansh Jain 	uint8_t keep_hash_key;
51516bbc98aSShreyansh Jain 	uint16_t default_flow_id;
51616bbc98aSShreyansh Jain 	uint64_t pad1[5];
51716bbc98aSShreyansh Jain 	uint64_t key_cfg_iova;
51816bbc98aSShreyansh Jain };
5197ae777d0SHemant Agrawal 
52016bbc98aSShreyansh Jain struct dpni_cmd_get_queue {
52116bbc98aSShreyansh Jain 	uint8_t qtype;
52216bbc98aSShreyansh Jain 	uint8_t tc;
52316bbc98aSShreyansh Jain 	uint8_t index;
524f48cd6c6SNipun Gupta 	uint8_t channel_id;
52516bbc98aSShreyansh Jain };
5267ae777d0SHemant Agrawal 
52716bbc98aSShreyansh Jain #define DPNI_DEST_TYPE_SHIFT		0
52816bbc98aSShreyansh Jain #define DPNI_DEST_TYPE_SIZE		4
52955984a9bSShreyansh Jain #define DPNI_CGID_VALID_SHIFT		5
53055984a9bSShreyansh Jain #define DPNI_CGID_VALID_SIZE		1
53116bbc98aSShreyansh Jain #define DPNI_STASH_CTRL_SHIFT		6
53216bbc98aSShreyansh Jain #define DPNI_STASH_CTRL_SIZE		1
53316bbc98aSShreyansh Jain #define DPNI_HOLD_ACTIVE_SHIFT		7
53416bbc98aSShreyansh Jain #define DPNI_HOLD_ACTIVE_SIZE		1
53516bbc98aSShreyansh Jain 
53616bbc98aSShreyansh Jain struct dpni_rsp_get_queue {
53716bbc98aSShreyansh Jain 	/* response word 0 */
53816bbc98aSShreyansh Jain 	uint64_t pad0;
53916bbc98aSShreyansh Jain 	/* response word 1 */
54016bbc98aSShreyansh Jain 	uint32_t dest_id;
54116bbc98aSShreyansh Jain 	uint16_t pad1;
54216bbc98aSShreyansh Jain 	uint8_t dest_prio;
54355984a9bSShreyansh Jain 	/* From LSB:
54455984a9bSShreyansh Jain 	 * dest_type:4, pad:1, cgid_valid:1, flc_stash_ctrl:1, hold_active:1
54555984a9bSShreyansh Jain 	 */
54616bbc98aSShreyansh Jain 	uint8_t flags;
54716bbc98aSShreyansh Jain 	/* response word 2 */
54816bbc98aSShreyansh Jain 	uint64_t flc;
54916bbc98aSShreyansh Jain 	/* response word 3 */
55016bbc98aSShreyansh Jain 	uint64_t user_context;
55116bbc98aSShreyansh Jain 	/* response word 4 */
55216bbc98aSShreyansh Jain 	uint32_t fqid;
55316bbc98aSShreyansh Jain 	uint16_t qdbin;
55455984a9bSShreyansh Jain 	uint16_t pad2;
55555984a9bSShreyansh Jain 	/* response word 5*/
55655984a9bSShreyansh Jain 	uint8_t cgid;
55716bbc98aSShreyansh Jain };
55816bbc98aSShreyansh Jain 
55916bbc98aSShreyansh Jain struct dpni_cmd_set_queue {
56016bbc98aSShreyansh Jain 	/* cmd word 0 */
56116bbc98aSShreyansh Jain 	uint8_t qtype;
56216bbc98aSShreyansh Jain 	uint8_t tc;
56316bbc98aSShreyansh Jain 	uint8_t index;
56416bbc98aSShreyansh Jain 	uint8_t options;
56516bbc98aSShreyansh Jain 	uint32_t pad0;
56616bbc98aSShreyansh Jain 	/* cmd word 1 */
56716bbc98aSShreyansh Jain 	uint32_t dest_id;
56816bbc98aSShreyansh Jain 	uint16_t pad1;
56916bbc98aSShreyansh Jain 	uint8_t dest_prio;
57016bbc98aSShreyansh Jain 	uint8_t flags;
57116bbc98aSShreyansh Jain 	/* cmd word 2 */
57216bbc98aSShreyansh Jain 	uint64_t flc;
57316bbc98aSShreyansh Jain 	/* cmd word 3 */
57416bbc98aSShreyansh Jain 	uint64_t user_context;
57555984a9bSShreyansh Jain 	/* cmd word 4 */
57655984a9bSShreyansh Jain 	uint8_t cgid;
577f48cd6c6SNipun Gupta 	uint8_t channel_id;
57816bbc98aSShreyansh Jain };
57916bbc98aSShreyansh Jain 
580fe2b986aSSunil Kumar Kori #define DPNI_DISCARD_ON_MISS_SHIFT	0
581fe2b986aSSunil Kumar Kori #define DPNI_DISCARD_ON_MISS_SIZE	1
582fe2b986aSSunil Kumar Kori #define DPNI_KEEP_QOS_ENTRIES_SHIFT		1
583fe2b986aSSunil Kumar Kori #define DPNI_KEEP_QOS_ENTRIES_SIZE		1
584fe2b986aSSunil Kumar Kori 
585fe2b986aSSunil Kumar Kori struct dpni_cmd_set_qos_table {
586fe2b986aSSunil Kumar Kori 	uint32_t pad;
587fe2b986aSSunil Kumar Kori 	uint8_t default_tc;
588fe2b986aSSunil Kumar Kori 	/* only the LSB */
589fe2b986aSSunil Kumar Kori 	uint8_t discard_on_miss;
590fe2b986aSSunil Kumar Kori 	uint16_t pad1[21];
591fe2b986aSSunil Kumar Kori 	uint64_t key_cfg_iova;
592fe2b986aSSunil Kumar Kori };
593fe2b986aSSunil Kumar Kori 
59496f7bfe8SSachin Saxena #define DPNI_QOS_OPT_SET_TC_ONLY 0x0
59596f7bfe8SSachin Saxena #define DPNI_QOS_OPT_SET_FLOW_ID 0x1
59696f7bfe8SSachin Saxena 
597fe2b986aSSunil Kumar Kori struct dpni_cmd_add_qos_entry {
59896f7bfe8SSachin Saxena 	uint8_t flags;
59996f7bfe8SSachin Saxena 	uint8_t flow_id;
600fe2b986aSSunil Kumar Kori 	uint8_t tc_id;
601fe2b986aSSunil Kumar Kori 	uint8_t key_size;
602fe2b986aSSunil Kumar Kori 	uint16_t index;
603fe2b986aSSunil Kumar Kori 	uint16_t pad2;
604fe2b986aSSunil Kumar Kori 	uint64_t key_iova;
605fe2b986aSSunil Kumar Kori 	uint64_t mask_iova;
606fe2b986aSSunil Kumar Kori };
607fe2b986aSSunil Kumar Kori 
608fe2b986aSSunil Kumar Kori struct dpni_cmd_remove_qos_entry {
609fe2b986aSSunil Kumar Kori 	uint8_t pad1[3];
610fe2b986aSSunil Kumar Kori 	uint8_t key_size;
611fe2b986aSSunil Kumar Kori 	uint32_t pad2;
612fe2b986aSSunil Kumar Kori 	uint64_t key_iova;
613fe2b986aSSunil Kumar Kori 	uint64_t mask_iova;
614fe2b986aSSunil Kumar Kori };
615fe2b986aSSunil Kumar Kori 
616fe2b986aSSunil Kumar Kori struct dpni_cmd_add_fs_entry {
617fe2b986aSSunil Kumar Kori 	uint16_t options;
618fe2b986aSSunil Kumar Kori 	uint8_t tc_id;
619fe2b986aSSunil Kumar Kori 	uint8_t key_size;
620fe2b986aSSunil Kumar Kori 	uint16_t index;
621fe2b986aSSunil Kumar Kori 	uint16_t flow_id;
622fe2b986aSSunil Kumar Kori 	uint64_t key_iova;
623fe2b986aSSunil Kumar Kori 	uint64_t mask_iova;
624fe2b986aSSunil Kumar Kori 	uint64_t flc;
6252cb2abf3SHemant Agrawal 	uint16_t redir_token;
626fe2b986aSSunil Kumar Kori };
627fe2b986aSSunil Kumar Kori 
628fe2b986aSSunil Kumar Kori struct dpni_cmd_remove_fs_entry {
629fe2b986aSSunil Kumar Kori 	uint16_t pad1;
630fe2b986aSSunil Kumar Kori 	uint8_t tc_id;
631fe2b986aSSunil Kumar Kori 	uint8_t key_size;
632fe2b986aSSunil Kumar Kori 	uint32_t pad2;
633fe2b986aSSunil Kumar Kori 	uint64_t key_iova;
634fe2b986aSSunil Kumar Kori 	uint64_t mask_iova;
635fe2b986aSSunil Kumar Kori };
636fe2b986aSSunil Kumar Kori 
637fe2b986aSSunil Kumar Kori struct dpni_cmd_clear_fs_entries {
638fe2b986aSSunil Kumar Kori 	uint16_t pad;
639fe2b986aSSunil Kumar Kori 	uint8_t tc_id;
640fe2b986aSSunil Kumar Kori };
641fe2b986aSSunil Kumar Kori 
642ac624068SGagandeep Singh #define DPNI_MODE_SHIFT		0
643ac624068SGagandeep Singh #define DPNI_MODE_SIZE		4
644ac624068SGagandeep Singh #define DPNI_COLOR_SHIFT	4
645ac624068SGagandeep Singh #define DPNI_COLOR_SIZE		4
646ac624068SGagandeep Singh #define DPNI_UNITS_SHIFT	0
647ac624068SGagandeep Singh #define DPNI_UNITS_SIZE		4
648ac624068SGagandeep Singh 
649ac624068SGagandeep Singh struct dpni_cmd_set_rx_tc_policing {
650ac624068SGagandeep Singh 	/* from LSB: mode:4 color:4 */
651ac624068SGagandeep Singh 	uint8_t mode_color;
652ac624068SGagandeep Singh 	/* from LSB: units: 4 */
653ac624068SGagandeep Singh 	uint8_t units;
654ac624068SGagandeep Singh 	uint8_t tc_id;
655ac624068SGagandeep Singh 	uint8_t pad;
656ac624068SGagandeep Singh 	uint32_t options;
657ac624068SGagandeep Singh 	uint32_t cir;
658ac624068SGagandeep Singh 	uint32_t cbs;
659ac624068SGagandeep Singh 	uint32_t eir;
660ac624068SGagandeep Singh 	uint32_t ebs;
661ac624068SGagandeep Singh };
662ac624068SGagandeep Singh 
663ac624068SGagandeep Singh struct dpni_cmd_get_rx_tc_policing {
664ac624068SGagandeep Singh 	uint16_t pad;
665ac624068SGagandeep Singh 	uint8_t tc_id;
666ac624068SGagandeep Singh };
667ac624068SGagandeep Singh 
668ac624068SGagandeep Singh struct dpni_rsp_get_rx_tc_policing {
669ac624068SGagandeep Singh 	/* from LSB: mode:4 color:4 */
670ac624068SGagandeep Singh 	uint8_t mode_color;
671ac624068SGagandeep Singh 	/* from LSB: units: 4 */
672ac624068SGagandeep Singh 	uint8_t units;
673ac624068SGagandeep Singh 	uint16_t pad;
674ac624068SGagandeep Singh 	uint32_t options;
675ac624068SGagandeep Singh 	uint32_t cir;
676ac624068SGagandeep Singh 	uint32_t cbs;
677ac624068SGagandeep Singh 	uint32_t eir;
678ac624068SGagandeep Singh 	uint32_t ebs;
679ac624068SGagandeep Singh };
680ac624068SGagandeep Singh 
68116bbc98aSShreyansh Jain #define DPNI_DROP_ENABLE_SHIFT	0
68216bbc98aSShreyansh Jain #define DPNI_DROP_ENABLE_SIZE	1
68316bbc98aSShreyansh Jain #define DPNI_DROP_UNITS_SHIFT	2
68416bbc98aSShreyansh Jain #define DPNI_DROP_UNITS_SIZE	2
68516bbc98aSShreyansh Jain 
68616bbc98aSShreyansh Jain struct dpni_early_drop {
68716bbc98aSShreyansh Jain 	/* from LSB: enable:1 units:2 */
68816bbc98aSShreyansh Jain 	uint8_t flags;
68916bbc98aSShreyansh Jain 	uint8_t pad0[3];
69016bbc98aSShreyansh Jain 	uint32_t pad1;
69116bbc98aSShreyansh Jain 	uint8_t green_drop_probability;
69216bbc98aSShreyansh Jain 	uint8_t pad2[7];
69316bbc98aSShreyansh Jain 	uint64_t green_max_threshold;
69416bbc98aSShreyansh Jain 	uint64_t green_min_threshold;
69516bbc98aSShreyansh Jain 	uint64_t pad3;
69616bbc98aSShreyansh Jain 	uint8_t yellow_drop_probability;
69716bbc98aSShreyansh Jain 	uint8_t pad4[7];
69816bbc98aSShreyansh Jain 	uint64_t yellow_max_threshold;
69916bbc98aSShreyansh Jain 	uint64_t yellow_min_threshold;
70016bbc98aSShreyansh Jain 	uint64_t pad5;
70116bbc98aSShreyansh Jain 	uint8_t red_drop_probability;
70216bbc98aSShreyansh Jain 	uint8_t pad6[7];
70316bbc98aSShreyansh Jain 	uint64_t red_max_threshold;
70416bbc98aSShreyansh Jain 	uint64_t red_min_threshold;
70516bbc98aSShreyansh Jain };
70616bbc98aSShreyansh Jain 
70716bbc98aSShreyansh Jain struct dpni_cmd_early_drop {
70816bbc98aSShreyansh Jain 	uint8_t qtype;
70916bbc98aSShreyansh Jain 	uint8_t tc;
710f48cd6c6SNipun Gupta 	uint8_t channel_id;
711f48cd6c6SNipun Gupta 	uint8_t pad[5];
71216bbc98aSShreyansh Jain 	uint64_t early_drop_iova;
71316bbc98aSShreyansh Jain };
71416bbc98aSShreyansh Jain 
71516bbc98aSShreyansh Jain struct dpni_rsp_get_api_version {
71616bbc98aSShreyansh Jain 	uint16_t major;
71716bbc98aSShreyansh Jain 	uint16_t minor;
71816bbc98aSShreyansh Jain };
71916bbc98aSShreyansh Jain 
72016bbc98aSShreyansh Jain struct dpni_cmd_get_taildrop {
72116bbc98aSShreyansh Jain 	uint8_t congestion_point;
72216bbc98aSShreyansh Jain 	uint8_t qtype;
72316bbc98aSShreyansh Jain 	uint8_t tc;
72416bbc98aSShreyansh Jain 	uint8_t index;
72516bbc98aSShreyansh Jain };
72616bbc98aSShreyansh Jain 
72716bbc98aSShreyansh Jain struct dpni_rsp_get_taildrop {
72816bbc98aSShreyansh Jain 	/* cmd word 0 */
72916bbc98aSShreyansh Jain 	uint64_t pad0;
73016bbc98aSShreyansh Jain 	/* cmd word 1 */
73116bbc98aSShreyansh Jain 	/* from LSB: enable:1 oal_lo:7 */
73216bbc98aSShreyansh Jain 	uint8_t enable_oal_lo;
73316bbc98aSShreyansh Jain 	/* from LSB: oal_hi:5 */
73416bbc98aSShreyansh Jain 	uint8_t oal_hi;
73516bbc98aSShreyansh Jain 	uint8_t units;
73616bbc98aSShreyansh Jain 	uint8_t pad2;
73716bbc98aSShreyansh Jain 	uint32_t threshold;
73816bbc98aSShreyansh Jain };
73916bbc98aSShreyansh Jain 
74016bbc98aSShreyansh Jain #define DPNI_OAL_LO_SHIFT	1
74116bbc98aSShreyansh Jain #define DPNI_OAL_LO_SIZE	7
74216bbc98aSShreyansh Jain #define DPNI_OAL_HI_SHIFT	0
74316bbc98aSShreyansh Jain #define DPNI_OAL_HI_SIZE	5
74416bbc98aSShreyansh Jain 
74516bbc98aSShreyansh Jain struct dpni_cmd_set_taildrop {
74616bbc98aSShreyansh Jain 	/* cmd word 0 */
74716bbc98aSShreyansh Jain 	uint8_t congestion_point;
74816bbc98aSShreyansh Jain 	uint8_t qtype;
74916bbc98aSShreyansh Jain 	uint8_t tc;
75016bbc98aSShreyansh Jain 	uint8_t index;
751f48cd6c6SNipun Gupta 	uint8_t channel_id;
752f48cd6c6SNipun Gupta 	uint8_t pad0[3];
75316bbc98aSShreyansh Jain 	/* cmd word 1 */
75416bbc98aSShreyansh Jain 	/* from LSB: enable:1 oal_lo:7 */
75516bbc98aSShreyansh Jain 	uint8_t enable_oal_lo;
75616bbc98aSShreyansh Jain 	/* from LSB: oal_hi:5 */
75716bbc98aSShreyansh Jain 	uint8_t oal_hi;
75816bbc98aSShreyansh Jain 	uint8_t units;
75916bbc98aSShreyansh Jain 	uint8_t pad2;
76016bbc98aSShreyansh Jain 	uint32_t threshold;
76116bbc98aSShreyansh Jain };
76216bbc98aSShreyansh Jain 
76316bbc98aSShreyansh Jain struct dpni_tx_confirmation_mode {
764*591200efSGagandeep Singh 	uint8_t ceetm_ch_idx;
765*591200efSGagandeep Singh 	uint8_t pad1;
766*591200efSGagandeep Singh 	uint16_t pad2;
767*591200efSGagandeep Singh 	uint8_t confirmation_mode;
768*591200efSGagandeep Singh };
769*591200efSGagandeep Singh 
770*591200efSGagandeep Singh struct dpni_queue_tx_confirmation_mode {
771*591200efSGagandeep Singh 	uint8_t ceetm_ch_idx;
772*591200efSGagandeep Singh 	uint8_t index;
773*591200efSGagandeep Singh 	uint16_t pad;
77416bbc98aSShreyansh Jain 	uint8_t confirmation_mode;
77516bbc98aSShreyansh Jain };
77616bbc98aSShreyansh Jain 
77716bbc98aSShreyansh Jain #define DPNI_DEST_TYPE_SHIFT		0
77816bbc98aSShreyansh Jain #define DPNI_DEST_TYPE_SIZE		4
77916bbc98aSShreyansh Jain #define DPNI_CONG_UNITS_SHIFT		4
78016bbc98aSShreyansh Jain #define DPNI_CONG_UNITS_SIZE		2
78116bbc98aSShreyansh Jain 
78216bbc98aSShreyansh Jain struct dpni_cmd_set_congestion_notification {
78316bbc98aSShreyansh Jain 	uint8_t qtype;
78416bbc98aSShreyansh Jain 	uint8_t tc;
785f48cd6c6SNipun Gupta 	uint8_t channel_id;
78655984a9bSShreyansh Jain 	uint8_t congestion_point;
78755984a9bSShreyansh Jain 	uint8_t cgid;
78855984a9bSShreyansh Jain 	uint8_t pad2[3];
78916bbc98aSShreyansh Jain 	uint32_t dest_id;
79016bbc98aSShreyansh Jain 	uint16_t notification_mode;
79116bbc98aSShreyansh Jain 	uint8_t dest_priority;
79216bbc98aSShreyansh Jain 	/* from LSB: dest_type: 4 units:2 */
79316bbc98aSShreyansh Jain 	uint8_t type_units;
79416bbc98aSShreyansh Jain 	uint64_t message_iova;
79516bbc98aSShreyansh Jain 	uint64_t message_ctx;
79616bbc98aSShreyansh Jain 	uint32_t threshold_entry;
79716bbc98aSShreyansh Jain 	uint32_t threshold_exit;
79816bbc98aSShreyansh Jain };
79916bbc98aSShreyansh Jain 
80016bbc98aSShreyansh Jain struct dpni_cmd_get_congestion_notification {
80116bbc98aSShreyansh Jain 	uint8_t qtype;
80216bbc98aSShreyansh Jain 	uint8_t tc;
803f48cd6c6SNipun Gupta 	uint8_t channel_id;
80455984a9bSShreyansh Jain 	uint8_t congestion_point;
80555984a9bSShreyansh Jain 	uint8_t cgid;
80616bbc98aSShreyansh Jain };
80716bbc98aSShreyansh Jain 
80816bbc98aSShreyansh Jain struct dpni_rsp_get_congestion_notification {
80916bbc98aSShreyansh Jain 	uint64_t pad;
81016bbc98aSShreyansh Jain 	uint32_t dest_id;
81116bbc98aSShreyansh Jain 	uint16_t notification_mode;
81216bbc98aSShreyansh Jain 	uint8_t dest_priority;
81316bbc98aSShreyansh Jain 	/* from LSB: dest_type: 4 units:2 */
81416bbc98aSShreyansh Jain 	uint8_t type_units;
81516bbc98aSShreyansh Jain 	uint64_t message_iova;
81616bbc98aSShreyansh Jain 	uint64_t message_ctx;
81716bbc98aSShreyansh Jain 	uint32_t threshold_entry;
81816bbc98aSShreyansh Jain 	uint32_t threshold_exit;
81916bbc98aSShreyansh Jain };
82016bbc98aSShreyansh Jain 
82125fea082SHemant Agrawal struct dpni_cmd_set_opr {
8222cb2abf3SHemant Agrawal 	uint8_t opr_id;
82325fea082SHemant Agrawal 	uint8_t tc_id;
82425fea082SHemant Agrawal 	uint8_t index;
82525fea082SHemant Agrawal 	uint8_t options;
82625fea082SHemant Agrawal 	uint8_t pad1[7];
82725fea082SHemant Agrawal 	uint8_t oloe;
82825fea082SHemant Agrawal 	uint8_t oeane;
82925fea082SHemant Agrawal 	uint8_t olws;
83025fea082SHemant Agrawal 	uint8_t oa;
83125fea082SHemant Agrawal 	uint8_t oprrws;
83225fea082SHemant Agrawal };
83325fea082SHemant Agrawal 
83425fea082SHemant Agrawal struct dpni_cmd_get_opr {
8352cb2abf3SHemant Agrawal 	uint8_t flags;
83625fea082SHemant Agrawal 	uint8_t tc_id;
83725fea082SHemant Agrawal 	uint8_t index;
8382cb2abf3SHemant Agrawal 	uint8_t opr_id;
83925fea082SHemant Agrawal };
84025fea082SHemant Agrawal 
84125fea082SHemant Agrawal #define DPNI_RIP_SHIFT	0
84225fea082SHemant Agrawal #define DPNI_RIP_SIZE		1
84325fea082SHemant Agrawal #define DPNI_OPR_ENABLE_SHIFT	1
84425fea082SHemant Agrawal #define DPNI_OPR_ENABLE_SIZE	1
84525fea082SHemant Agrawal #define DPNI_TSEQ_NLIS_SHIFT	0
84625fea082SHemant Agrawal #define DPNI_TSEQ_NLIS_SIZE	1
84725fea082SHemant Agrawal #define DPNI_HSEQ_NLIS_SHIFT	0
84825fea082SHemant Agrawal #define DPNI_HSEQ_NLIS_SIZE	1
84925fea082SHemant Agrawal 
85025fea082SHemant Agrawal struct dpni_rsp_get_opr {
85125fea082SHemant Agrawal 	uint64_t pad0;
85225fea082SHemant Agrawal 	/* from LSB: rip:1 enable:1 */
85325fea082SHemant Agrawal 	uint8_t flags;
85425fea082SHemant Agrawal 	uint16_t pad1;
85525fea082SHemant Agrawal 	uint8_t oloe;
85625fea082SHemant Agrawal 	uint8_t oeane;
85725fea082SHemant Agrawal 	uint8_t olws;
85825fea082SHemant Agrawal 	uint8_t oa;
85925fea082SHemant Agrawal 	uint8_t oprrws;
86025fea082SHemant Agrawal 	uint16_t nesn;
86125fea082SHemant Agrawal 	uint16_t pad8;
86225fea082SHemant Agrawal 	uint16_t ndsn;
86325fea082SHemant Agrawal 	uint16_t pad2;
86425fea082SHemant Agrawal 	uint16_t ea_tseq;
86525fea082SHemant Agrawal 	/* only the LSB */
86625fea082SHemant Agrawal 	uint8_t tseq_nlis;
86725fea082SHemant Agrawal 	uint8_t pad3;
86825fea082SHemant Agrawal 	uint16_t ea_hseq;
86925fea082SHemant Agrawal 	/* only the LSB */
87025fea082SHemant Agrawal 	uint8_t hseq_nlis;
87125fea082SHemant Agrawal 	uint8_t pad4;
87225fea082SHemant Agrawal 	uint16_t ea_hptr;
87325fea082SHemant Agrawal 	uint16_t pad5;
87425fea082SHemant Agrawal 	uint16_t ea_tptr;
87525fea082SHemant Agrawal 	uint16_t pad6;
87625fea082SHemant Agrawal 	uint16_t opr_vid;
87725fea082SHemant Agrawal 	uint16_t pad7;
87825fea082SHemant Agrawal 	uint16_t opr_id;
87925fea082SHemant Agrawal };
88025fea082SHemant Agrawal 
881a712067dSSunil Kumar Kori struct dpni_load_sw_sequence {
882a712067dSSunil Kumar Kori 	uint8_t dest;
883a712067dSSunil Kumar Kori 	uint8_t pad0[7];
884a712067dSSunil Kumar Kori 	uint16_t ss_offset;
885a712067dSSunil Kumar Kori 	uint16_t pad1;
886a712067dSSunil Kumar Kori 	uint16_t ss_size;
887a712067dSSunil Kumar Kori 	uint16_t pad2;
888a712067dSSunil Kumar Kori 	uint64_t ss_iova;
889a712067dSSunil Kumar Kori };
890a712067dSSunil Kumar Kori 
891a712067dSSunil Kumar Kori struct dpni_enable_sw_sequence {
892a712067dSSunil Kumar Kori 	uint8_t dest;
893a712067dSSunil Kumar Kori 	uint8_t pad0[7];
894a712067dSSunil Kumar Kori 	uint16_t ss_offset;
895a712067dSSunil Kumar Kori 	uint16_t hxs;
896a712067dSSunil Kumar Kori 	uint8_t set_start;
897a712067dSSunil Kumar Kori 	uint8_t pad1[3];
898a712067dSSunil Kumar Kori 	uint8_t param_offset;
899a712067dSSunil Kumar Kori 	uint8_t pad2[3];
900a712067dSSunil Kumar Kori 	uint8_t param_size;
901a712067dSSunil Kumar Kori 	uint8_t pad3[3];
902a712067dSSunil Kumar Kori 	uint64_t param_iova;
903a712067dSSunil Kumar Kori };
904a712067dSSunil Kumar Kori 
905a712067dSSunil Kumar Kori struct dpni_get_sw_sequence_layout {
906a712067dSSunil Kumar Kori 	uint8_t src;
907a712067dSSunil Kumar Kori 	uint8_t pad0[7];
908a712067dSSunil Kumar Kori 	uint64_t layout_iova;
909a712067dSSunil Kumar Kori };
910a712067dSSunil Kumar Kori 
911a712067dSSunil Kumar Kori struct dpni_sw_sequence_layout_entry {
912a712067dSSunil Kumar Kori 	uint16_t ss_offset;
913a712067dSSunil Kumar Kori 	uint16_t ss_size;
914a712067dSSunil Kumar Kori 	uint8_t param_offset;
915a712067dSSunil Kumar Kori 	uint8_t param_size;
916a712067dSSunil Kumar Kori 	uint16_t pad;
917a712067dSSunil Kumar Kori };
918a712067dSSunil Kumar Kori 
91972100f0dSGagandeep Singh #define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
92072100f0dSGagandeep Singh #define DPNI_RX_FS_DIST_ENABLE_SIZE		1
92172100f0dSGagandeep Singh struct dpni_cmd_set_rx_fs_dist {
92272100f0dSGagandeep Singh 	uint16_t	dist_size;
92372100f0dSGagandeep Singh 	uint8_t		enable;
92472100f0dSGagandeep Singh 	uint8_t		tc;
92572100f0dSGagandeep Singh 	uint16_t	miss_flow_id;
92672100f0dSGagandeep Singh 	uint16_t	pad1;
92772100f0dSGagandeep Singh 	uint64_t	key_cfg_iova;
92872100f0dSGagandeep Singh };
92972100f0dSGagandeep Singh 
93072100f0dSGagandeep Singh #define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
93172100f0dSGagandeep Singh #define DPNI_RX_HASH_DIST_ENABLE_SIZE		1
93272100f0dSGagandeep Singh struct dpni_cmd_set_rx_hash_dist {
93372100f0dSGagandeep Singh 	uint16_t	dist_size;
93472100f0dSGagandeep Singh 	uint8_t		enable;
93572100f0dSGagandeep Singh 	uint8_t		tc_id;
93672100f0dSGagandeep Singh 	uint32_t	pad;
93772100f0dSGagandeep Singh 	uint64_t	key_cfg_iova;
93872100f0dSGagandeep Singh };
93972100f0dSGagandeep Singh 
94072100f0dSGagandeep Singh struct dpni_cmd_add_custom_tpid {
94172100f0dSGagandeep Singh 	uint16_t	pad;
94272100f0dSGagandeep Singh 	uint16_t	tpid;
94372100f0dSGagandeep Singh };
94472100f0dSGagandeep Singh 
94572100f0dSGagandeep Singh struct dpni_cmd_remove_custom_tpid {
94672100f0dSGagandeep Singh 	uint16_t	pad;
94772100f0dSGagandeep Singh 	uint16_t	tpid;
94872100f0dSGagandeep Singh };
94972100f0dSGagandeep Singh 
95072100f0dSGagandeep Singh struct dpni_rsp_get_custom_tpid {
95172100f0dSGagandeep Singh 	uint16_t	tpid1;
95272100f0dSGagandeep Singh 	uint16_t	tpid2;
95372100f0dSGagandeep Singh };
95472100f0dSGagandeep Singh 
955*591200efSGagandeep Singh #define DPNI_PTP_ENABLE_SHIFT			0
956*591200efSGagandeep Singh #define DPNI_PTP_ENABLE_SIZE			1
957*591200efSGagandeep Singh #define DPNI_PTP_CH_UPDATE_SHIFT		1
958*591200efSGagandeep Singh #define DPNI_PTP_CH_UPDATE_SIZE			1
959*591200efSGagandeep Singh struct dpni_cmd_single_step_cfg {
960*591200efSGagandeep Singh 	uint16_t	flags;
961*591200efSGagandeep Singh 	uint16_t	offset;
962*591200efSGagandeep Singh 	uint32_t	peer_delay;
963*591200efSGagandeep Singh };
964*591200efSGagandeep Singh 
965*591200efSGagandeep Singh struct dpni_rsp_single_step_cfg {
966*591200efSGagandeep Singh 	uint16_t	flags;
967*591200efSGagandeep Singh 	uint16_t	offset;
968*591200efSGagandeep Singh 	uint32_t	peer_delay;
969*591200efSGagandeep Singh 	uint32_t	ptp_onestep_reg_base;
970*591200efSGagandeep Singh 	uint32_t	pad0;
971*591200efSGagandeep Singh };
972*591200efSGagandeep Singh 
973*591200efSGagandeep Singh #define DPNI_PORT_LOOPBACK_EN_SHIFT	0
974*591200efSGagandeep Singh #define DPNI_PORT_LOOPBACK_EN_SIZE	1
975*591200efSGagandeep Singh 
976*591200efSGagandeep Singh struct dpni_cmd_set_port_cfg {
977*591200efSGagandeep Singh 	uint32_t	flags;
978*591200efSGagandeep Singh 	uint32_t	bit_params;
979*591200efSGagandeep Singh };
980*591200efSGagandeep Singh 
981*591200efSGagandeep Singh struct dpni_rsp_get_port_cfg {
982*591200efSGagandeep Singh 	uint32_t	flags;
983*591200efSGagandeep Singh 	uint32_t	bit_params;
984*591200efSGagandeep Singh };
985*591200efSGagandeep Singh 
986*591200efSGagandeep Singh struct dpni_cmd_dump_table {
987*591200efSGagandeep Singh 	uint16_t table_type;
988*591200efSGagandeep Singh 	uint16_t table_index;
989*591200efSGagandeep Singh 	uint32_t pad0;
990*591200efSGagandeep Singh 	uint64_t iova_addr;
991*591200efSGagandeep Singh 	uint32_t iova_size;
992*591200efSGagandeep Singh };
993*591200efSGagandeep Singh 
994*591200efSGagandeep Singh struct dpni_rsp_dump_table {
995*591200efSGagandeep Singh 	uint16_t num_entries;
996*591200efSGagandeep Singh };
997*591200efSGagandeep Singh 
998*591200efSGagandeep Singh struct dump_table_header {
999*591200efSGagandeep Singh 	uint16_t table_type;
1000*591200efSGagandeep Singh 	uint16_t table_num_entries;
1001*591200efSGagandeep Singh 	uint16_t table_max_entries;
1002*591200efSGagandeep Singh 	uint8_t default_action;
1003*591200efSGagandeep Singh 	uint8_t match_type;
1004*591200efSGagandeep Singh 	uint8_t reserved[24];
1005*591200efSGagandeep Singh };
1006*591200efSGagandeep Singh 
1007*591200efSGagandeep Singh struct dump_table_entry {
1008*591200efSGagandeep Singh 	uint8_t key[DPNI_MAX_KEY_SIZE];
1009*591200efSGagandeep Singh 	uint8_t mask[DPNI_MAX_KEY_SIZE];
1010*591200efSGagandeep Singh 	uint8_t key_action;
1011*591200efSGagandeep Singh 	uint16_t result[3];
1012*591200efSGagandeep Singh 	uint8_t reserved[21];
1013*591200efSGagandeep Singh };
1014*591200efSGagandeep Singh 
1015*591200efSGagandeep Singh #define MAX_SP_PROFILE_ID_SIZE	8
1016*591200efSGagandeep Singh 
1017*591200efSGagandeep Singh struct dpni_cmd_set_sp_profile {
1018*591200efSGagandeep Singh 	uint8_t sp_profile[MAX_SP_PROFILE_ID_SIZE];
1019*591200efSGagandeep Singh 	uint8_t type;
1020*591200efSGagandeep Singh };
1021*591200efSGagandeep Singh 
1022*591200efSGagandeep Singh struct dpni_cmd_sp_enable {
1023*591200efSGagandeep Singh 	uint8_t type;
1024*591200efSGagandeep Singh 	uint8_t en;
1025*591200efSGagandeep Singh };
1026*591200efSGagandeep Singh 
102716bbc98aSShreyansh Jain #pragma pack(pop)
1028e6b82573SHemant Agrawal #endif /* _FSL_DPNI_CMD_H */
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