xref: /dpdk/drivers/net/dpaa2/dpaa2_parse_dump.h (revision 25e5845b5272764d8c2cbf64a9fc5989b34a932c)
193e41cb3SJun Yang /* SPDX-License-Identifier: BSD-3-Clause
293e41cb3SJun Yang  *
393e41cb3SJun Yang  *   Copyright 2022 NXP
493e41cb3SJun Yang  *
593e41cb3SJun Yang  */
693e41cb3SJun Yang 
793e41cb3SJun Yang #ifndef _DPAA2_PARSE_DUMP_H
893e41cb3SJun Yang #define _DPAA2_PARSE_DUMP_H
993e41cb3SJun Yang 
1093e41cb3SJun Yang #include <rte_event_eth_rx_adapter.h>
1193e41cb3SJun Yang #include <rte_pmd_dpaa2.h>
1293e41cb3SJun Yang 
1393e41cb3SJun Yang #include <dpaa2_hw_pvt.h>
1493e41cb3SJun Yang #include "dpaa2_tm.h"
1593e41cb3SJun Yang 
1693e41cb3SJun Yang #include <mc/fsl_dpni.h>
1793e41cb3SJun Yang #include <mc/fsl_mc_sys.h>
1893e41cb3SJun Yang 
1993e41cb3SJun Yang #include "base/dpaa2_hw_dpni_annot.h"
2093e41cb3SJun Yang 
2193e41cb3SJun Yang #define DPAA2_PR_PRINT printf
2293e41cb3SJun Yang 
2393e41cb3SJun Yang struct dpaa2_faf_bit_info {
2493e41cb3SJun Yang 	const char *name;
2593e41cb3SJun Yang 	int position;
2693e41cb3SJun Yang };
2793e41cb3SJun Yang 
2893e41cb3SJun Yang struct dpaa2_fapr_field_info {
2993e41cb3SJun Yang 	const char *name;
3093e41cb3SJun Yang 	uint16_t value;
3193e41cb3SJun Yang };
3293e41cb3SJun Yang 
3393e41cb3SJun Yang struct dpaa2_fapr_array {
3493e41cb3SJun Yang 	union {
3593e41cb3SJun Yang 		uint64_t pr_64[DPAA2_FAPR_SIZE / 8];
3693e41cb3SJun Yang 		uint8_t pr[DPAA2_FAPR_SIZE];
3793e41cb3SJun Yang 	};
3893e41cb3SJun Yang };
3993e41cb3SJun Yang 
4093e41cb3SJun Yang #define NEXT_HEADER_NAME "Next Header"
4193e41cb3SJun Yang #define ETH_OFF_NAME "ETH OFFSET"
4293e41cb3SJun Yang #define VLAN_TCI_OFF_NAME "VLAN TCI OFFSET"
4393e41cb3SJun Yang #define LAST_ENTRY_OFF_NAME "LAST ETYPE Offset"
4493e41cb3SJun Yang #define L3_OFF_NAME "L3 Offset"
4593e41cb3SJun Yang #define L4_OFF_NAME "L4 Offset"
4693e41cb3SJun Yang #define L5_OFF_NAME "L5 Offset"
4793e41cb3SJun Yang #define NEXT_HEADER_OFF_NAME "Next Header Offset"
4893e41cb3SJun Yang 
4993e41cb3SJun Yang static const
5093e41cb3SJun Yang struct dpaa2_fapr_field_info support_dump_fields[] = {
5193e41cb3SJun Yang 	{
5293e41cb3SJun Yang 		.name = NEXT_HEADER_NAME,
5393e41cb3SJun Yang 	},
5493e41cb3SJun Yang 	{
5593e41cb3SJun Yang 		.name = ETH_OFF_NAME,
5693e41cb3SJun Yang 	},
5793e41cb3SJun Yang 	{
5893e41cb3SJun Yang 		.name = VLAN_TCI_OFF_NAME,
5993e41cb3SJun Yang 	},
6093e41cb3SJun Yang 	{
6193e41cb3SJun Yang 		.name = LAST_ENTRY_OFF_NAME,
6293e41cb3SJun Yang 	},
6393e41cb3SJun Yang 	{
6493e41cb3SJun Yang 		.name = L3_OFF_NAME,
6593e41cb3SJun Yang 	},
6693e41cb3SJun Yang 	{
6793e41cb3SJun Yang 		.name = L4_OFF_NAME,
6893e41cb3SJun Yang 	},
6993e41cb3SJun Yang 	{
7093e41cb3SJun Yang 		.name = L5_OFF_NAME,
7193e41cb3SJun Yang 	},
7293e41cb3SJun Yang 	{
7393e41cb3SJun Yang 		.name = NEXT_HEADER_OFF_NAME,
7493e41cb3SJun Yang 	}
7593e41cb3SJun Yang };
7693e41cb3SJun Yang 
7793e41cb3SJun Yang static inline void
7893e41cb3SJun Yang dpaa2_print_faf(struct dpaa2_fapr_array *fapr)
7993e41cb3SJun Yang {
8093e41cb3SJun Yang 	const int faf_bit_len = DPAA2_FAF_TOTAL_SIZE * 8;
8193e41cb3SJun Yang 	struct dpaa2_faf_bit_info faf_bits[faf_bit_len];
8293e41cb3SJun Yang 	int i, byte_pos, bit_pos, vxlan = 0, vxlan_vlan = 0;
8393e41cb3SJun Yang 	struct rte_ether_hdr vxlan_in_eth;
8493e41cb3SJun Yang 	uint16_t vxlan_vlan_tci;
8593e41cb3SJun Yang 
8693e41cb3SJun Yang 	for (i = 0; i < faf_bit_len; i++) {
8793e41cb3SJun Yang 		faf_bits[i].position = i;
8893e41cb3SJun Yang 		if (i == FAFE_VXLAN_IN_VLAN_FRAM)
8993e41cb3SJun Yang 			faf_bits[i].name = "VXLAN VLAN Present";
9093e41cb3SJun Yang 		else if (i == FAFE_VXLAN_IN_IPV4_FRAM)
9193e41cb3SJun Yang 			faf_bits[i].name = "VXLAN IPV4 Present";
9293e41cb3SJun Yang 		else if (i == FAFE_VXLAN_IN_IPV6_FRAM)
9393e41cb3SJun Yang 			faf_bits[i].name = "VXLAN IPV6 Present";
9493e41cb3SJun Yang 		else if (i == FAFE_VXLAN_IN_UDP_FRAM)
9593e41cb3SJun Yang 			faf_bits[i].name = "VXLAN UDP Present";
9693e41cb3SJun Yang 		else if (i == FAFE_VXLAN_IN_TCP_FRAM)
9793e41cb3SJun Yang 			faf_bits[i].name = "VXLAN TCP Present";
9893e41cb3SJun Yang 		else if (i == FAF_VXLAN_FRAM)
9993e41cb3SJun Yang 			faf_bits[i].name = "VXLAN Present";
10093e41cb3SJun Yang 		else if (i == FAF_ETH_FRAM)
10193e41cb3SJun Yang 			faf_bits[i].name = "Ethernet MAC Present";
10293e41cb3SJun Yang 		else if (i == FAF_VLAN_FRAM)
10393e41cb3SJun Yang 			faf_bits[i].name = "VLAN 1 Present";
10493e41cb3SJun Yang 		else if (i == FAF_IPV4_FRAM)
10593e41cb3SJun Yang 			faf_bits[i].name = "IPv4 1 Present";
10693e41cb3SJun Yang 		else if (i == FAF_IPV6_FRAM)
10793e41cb3SJun Yang 			faf_bits[i].name = "IPv6 1 Present";
108*25e5845bSJun Yang 		else if (i == FAF_IP_FRAG_FRAM)
109*25e5845bSJun Yang 			faf_bits[i].name = "IP fragment Present";
11093e41cb3SJun Yang 		else if (i == FAF_UDP_FRAM)
11193e41cb3SJun Yang 			faf_bits[i].name = "UDP Present";
11293e41cb3SJun Yang 		else if (i == FAF_TCP_FRAM)
11393e41cb3SJun Yang 			faf_bits[i].name = "TCP Present";
11493e41cb3SJun Yang 		else
11593e41cb3SJun Yang 			faf_bits[i].name = "Check RM for this unusual frame";
11693e41cb3SJun Yang 	}
11793e41cb3SJun Yang 
11893e41cb3SJun Yang 	DPAA2_PR_PRINT("Frame Annotation Flags:\r\n");
11993e41cb3SJun Yang 	for (i = 0; i < faf_bit_len; i++) {
12093e41cb3SJun Yang 		byte_pos = i / 8 + DPAA2_FAFE_PSR_OFFSET;
12193e41cb3SJun Yang 		bit_pos = i % 8;
12293e41cb3SJun Yang 		if (fapr->pr[byte_pos] & (1 << (7 - bit_pos))) {
12393e41cb3SJun Yang 			DPAA2_PR_PRINT("FAF bit %d : %s\r\n",
12493e41cb3SJun Yang 				faf_bits[i].position, faf_bits[i].name);
12593e41cb3SJun Yang 			if (i == FAF_VXLAN_FRAM)
12693e41cb3SJun Yang 				vxlan = 1;
12793e41cb3SJun Yang 		}
12893e41cb3SJun Yang 	}
12993e41cb3SJun Yang 
13093e41cb3SJun Yang 	if (vxlan) {
13193e41cb3SJun Yang 		vxlan_in_eth.dst_addr.addr_bytes[0] =
13293e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_DADDR0_OFFSET];
13393e41cb3SJun Yang 		vxlan_in_eth.dst_addr.addr_bytes[1] =
13493e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_DADDR1_OFFSET];
13593e41cb3SJun Yang 		vxlan_in_eth.dst_addr.addr_bytes[2] =
13693e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_DADDR2_OFFSET];
13793e41cb3SJun Yang 		vxlan_in_eth.dst_addr.addr_bytes[3] =
13893e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_DADDR3_OFFSET];
13993e41cb3SJun Yang 		vxlan_in_eth.dst_addr.addr_bytes[4] =
14093e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_DADDR4_OFFSET];
14193e41cb3SJun Yang 		vxlan_in_eth.dst_addr.addr_bytes[5] =
14293e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_DADDR5_OFFSET];
14393e41cb3SJun Yang 
14493e41cb3SJun Yang 		vxlan_in_eth.src_addr.addr_bytes[0] =
14593e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_SADDR0_OFFSET];
14693e41cb3SJun Yang 		vxlan_in_eth.src_addr.addr_bytes[1] =
14793e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_SADDR1_OFFSET];
14893e41cb3SJun Yang 		vxlan_in_eth.src_addr.addr_bytes[2] =
14993e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_SADDR2_OFFSET];
15093e41cb3SJun Yang 		vxlan_in_eth.src_addr.addr_bytes[3] =
15193e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_SADDR3_OFFSET];
15293e41cb3SJun Yang 		vxlan_in_eth.src_addr.addr_bytes[4] =
15393e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_SADDR4_OFFSET];
15493e41cb3SJun Yang 		vxlan_in_eth.src_addr.addr_bytes[5] =
15593e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_SADDR5_OFFSET];
15693e41cb3SJun Yang 
15793e41cb3SJun Yang 		vxlan_in_eth.ether_type =
15893e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_TYPE_OFFSET];
15993e41cb3SJun Yang 		vxlan_in_eth.ether_type =
16093e41cb3SJun Yang 			vxlan_in_eth.ether_type << 8;
16193e41cb3SJun Yang 		vxlan_in_eth.ether_type |=
16293e41cb3SJun Yang 			fapr->pr[DPAA2_VXLAN_IN_TYPE_OFFSET + 1];
16393e41cb3SJun Yang 
16493e41cb3SJun Yang 		if (vxlan_in_eth.ether_type == RTE_ETHER_TYPE_VLAN)
16593e41cb3SJun Yang 			vxlan_vlan = 1;
16693e41cb3SJun Yang 		DPAA2_PR_PRINT("VXLAN inner eth:\r\n");
16793e41cb3SJun Yang 		DPAA2_PR_PRINT("dst addr: ");
16893e41cb3SJun Yang 		for (i = 0; i < RTE_ETHER_ADDR_LEN; i++) {
16993e41cb3SJun Yang 			if (i != 0)
17093e41cb3SJun Yang 				DPAA2_PR_PRINT(":");
17193e41cb3SJun Yang 			DPAA2_PR_PRINT("%02x",
17293e41cb3SJun Yang 				vxlan_in_eth.dst_addr.addr_bytes[i]);
17393e41cb3SJun Yang 		}
17493e41cb3SJun Yang 		DPAA2_PR_PRINT("\r\n");
17593e41cb3SJun Yang 		DPAA2_PR_PRINT("src addr: ");
17693e41cb3SJun Yang 		for (i = 0; i < RTE_ETHER_ADDR_LEN; i++) {
17793e41cb3SJun Yang 			if (i != 0)
17893e41cb3SJun Yang 				DPAA2_PR_PRINT(":");
17993e41cb3SJun Yang 			DPAA2_PR_PRINT("%02x",
18093e41cb3SJun Yang 				vxlan_in_eth.src_addr.addr_bytes[i]);
18193e41cb3SJun Yang 		}
18293e41cb3SJun Yang 		DPAA2_PR_PRINT("\r\n");
18393e41cb3SJun Yang 		DPAA2_PR_PRINT("type: 0x%04x\r\n",
18493e41cb3SJun Yang 			vxlan_in_eth.ether_type);
18593e41cb3SJun Yang 		if (vxlan_vlan) {
18693e41cb3SJun Yang 			vxlan_vlan_tci = fapr->pr[DPAA2_VXLAN_IN_TCI_OFFSET];
18793e41cb3SJun Yang 			vxlan_vlan_tci = vxlan_vlan_tci << 8;
18893e41cb3SJun Yang 			vxlan_vlan_tci |=
18993e41cb3SJun Yang 				fapr->pr[DPAA2_VXLAN_IN_TCI_OFFSET + 1];
19093e41cb3SJun Yang 
19193e41cb3SJun Yang 			DPAA2_PR_PRINT("vlan tci: 0x%04x\r\n",
19293e41cb3SJun Yang 				vxlan_vlan_tci);
19393e41cb3SJun Yang 		}
19493e41cb3SJun Yang 	}
19593e41cb3SJun Yang }
19693e41cb3SJun Yang 
19793e41cb3SJun Yang static inline void
19893e41cb3SJun Yang dpaa2_print_parse_result(struct dpaa2_annot_hdr *annotation)
19993e41cb3SJun Yang {
20093e41cb3SJun Yang 	struct dpaa2_fapr_array fapr;
20193e41cb3SJun Yang 	struct dpaa2_fapr_field_info
20293e41cb3SJun Yang 		fapr_fields[sizeof(support_dump_fields) /
20393e41cb3SJun Yang 		sizeof(struct dpaa2_fapr_field_info)];
20493e41cb3SJun Yang 	uint64_t len, i;
20593e41cb3SJun Yang 
20693e41cb3SJun Yang 	memcpy(&fapr, &annotation->word3, DPAA2_FAPR_SIZE);
20793e41cb3SJun Yang 	for (i = 0; i < (DPAA2_FAPR_SIZE / 8); i++)
20893e41cb3SJun Yang 		fapr.pr_64[i] = rte_cpu_to_be_64(fapr.pr_64[i]);
20993e41cb3SJun Yang 
21093e41cb3SJun Yang 	memcpy(fapr_fields, support_dump_fields,
21193e41cb3SJun Yang 		sizeof(support_dump_fields));
21293e41cb3SJun Yang 
21393e41cb3SJun Yang 	for (i = 0;
21493e41cb3SJun Yang 		i < sizeof(fapr_fields) /
21593e41cb3SJun Yang 		sizeof(struct dpaa2_fapr_field_info);
21693e41cb3SJun Yang 		i++) {
21793e41cb3SJun Yang 		if (!strcmp(fapr_fields[i].name, NEXT_HEADER_NAME)) {
21893e41cb3SJun Yang 			fapr_fields[i].value = fapr.pr[DPAA2_PR_NXTHDR_OFFSET];
21993e41cb3SJun Yang 			fapr_fields[i].value = fapr_fields[i].value << 8;
22093e41cb3SJun Yang 			fapr_fields[i].value |=
22193e41cb3SJun Yang 				fapr.pr[DPAA2_PR_NXTHDR_OFFSET + 1];
22293e41cb3SJun Yang 		} else if (!strcmp(fapr_fields[i].name, ETH_OFF_NAME)) {
22393e41cb3SJun Yang 			fapr_fields[i].value = fapr.pr[DPAA2_PR_ETH_OFF_OFFSET];
22493e41cb3SJun Yang 		} else if (!strcmp(fapr_fields[i].name, VLAN_TCI_OFF_NAME)) {
22593e41cb3SJun Yang 			fapr_fields[i].value = fapr.pr[DPAA2_PR_TCI_OFF_OFFSET];
22693e41cb3SJun Yang 		} else if (!strcmp(fapr_fields[i].name, LAST_ENTRY_OFF_NAME)) {
22793e41cb3SJun Yang 			fapr_fields[i].value =
22893e41cb3SJun Yang 				fapr.pr[DPAA2_PR_LAST_ETYPE_OFFSET];
22993e41cb3SJun Yang 		} else if (!strcmp(fapr_fields[i].name, L3_OFF_NAME)) {
23093e41cb3SJun Yang 			fapr_fields[i].value = fapr.pr[DPAA2_PR_L3_OFF_OFFSET];
23193e41cb3SJun Yang 		} else if (!strcmp(fapr_fields[i].name, L4_OFF_NAME)) {
23293e41cb3SJun Yang 			fapr_fields[i].value = fapr.pr[DPAA2_PR_L4_OFF_OFFSET];
23393e41cb3SJun Yang 		} else if (!strcmp(fapr_fields[i].name, L5_OFF_NAME)) {
23493e41cb3SJun Yang 			fapr_fields[i].value = fapr.pr[DPAA2_PR_L5_OFF_OFFSET];
23593e41cb3SJun Yang 		} else if (!strcmp(fapr_fields[i].name, NEXT_HEADER_OFF_NAME)) {
23693e41cb3SJun Yang 			fapr_fields[i].value =
23793e41cb3SJun Yang 				fapr.pr[DPAA2_PR_NXTHDR_OFF_OFFSET];
23893e41cb3SJun Yang 		}
23993e41cb3SJun Yang 	}
24093e41cb3SJun Yang 
24193e41cb3SJun Yang 	len = sizeof(fapr_fields) / sizeof(struct dpaa2_fapr_field_info);
24293e41cb3SJun Yang 	DPAA2_PR_PRINT("Parse Result:\r\n");
24393e41cb3SJun Yang 	for (i = 0; i < len; i++) {
24493e41cb3SJun Yang 		DPAA2_PR_PRINT("%21s : 0x%02x\r\n",
24593e41cb3SJun Yang 			fapr_fields[i].name, fapr_fields[i].value);
24693e41cb3SJun Yang 	}
24793e41cb3SJun Yang 	dpaa2_print_faf(&fapr);
24893e41cb3SJun Yang }
24993e41cb3SJun Yang 
25093e41cb3SJun Yang #endif
251