139835834SLance Richardson /* SPDX-License-Identifier: BSD-3-Clause
2e6e8f03eSRandy Schacher * Copyright(c) 2020-2023 Broadcom
339835834SLance Richardson * All rights reserved.
439835834SLance Richardson */
539835834SLance Richardson
639835834SLance Richardson #ifndef _BNXT_RXTX_VEC_COMMON_H_
739835834SLance Richardson #define _BNXT_RXTX_VEC_COMMON_H_
8cec43bbfSLance Richardson #include "hsi_struct_def_dpdk.h"
9cec43bbfSLance Richardson #include "bnxt_rxq.h"
10cec43bbfSLance Richardson #include "bnxt_rxr.h"
1139835834SLance Richardson
1239835834SLance Richardson #define TX_BD_FLAGS_CMPL ((1 << TX_BD_LONG_FLAGS_BD_CNT_SFT) | \
1339835834SLance Richardson TX_BD_SHORT_FLAGS_COAL_NOW | \
1439835834SLance Richardson TX_BD_SHORT_TYPE_TX_BD_SHORT | \
1539835834SLance Richardson TX_BD_LONG_FLAGS_PACKET_END)
1639835834SLance Richardson
1739835834SLance Richardson #define TX_BD_FLAGS_NOCMPL (TX_BD_FLAGS_CMPL | TX_BD_LONG_FLAGS_NO_CMPL)
1839835834SLance Richardson
1939835834SLance Richardson static inline uint32_t
bnxt_xmit_flags_len(uint16_t len,uint16_t flags)2039835834SLance Richardson bnxt_xmit_flags_len(uint16_t len, uint16_t flags)
2139835834SLance Richardson {
2239835834SLance Richardson switch (len >> 9) {
2339835834SLance Richardson case 0:
2439835834SLance Richardson return flags | TX_BD_LONG_FLAGS_LHINT_LT512;
2539835834SLance Richardson case 1:
2639835834SLance Richardson return flags | TX_BD_LONG_FLAGS_LHINT_LT1K;
2739835834SLance Richardson case 2:
2839835834SLance Richardson return flags | TX_BD_LONG_FLAGS_LHINT_LT2K;
2939835834SLance Richardson case 3:
3039835834SLance Richardson return flags | TX_BD_LONG_FLAGS_LHINT_LT2K;
3139835834SLance Richardson default:
3239835834SLance Richardson return flags | TX_BD_LONG_FLAGS_LHINT_GTE2K;
3339835834SLance Richardson }
3439835834SLance Richardson }
3539835834SLance Richardson
3639835834SLance Richardson static inline int
bnxt_rxq_vec_setup_common(struct bnxt_rx_queue * rxq)3739835834SLance Richardson bnxt_rxq_vec_setup_common(struct bnxt_rx_queue *rxq)
3839835834SLance Richardson {
3939835834SLance Richardson uintptr_t p;
4039835834SLance Richardson struct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */
4139835834SLance Richardson
4239835834SLance Richardson mb_def.nb_segs = 1;
4339835834SLance Richardson mb_def.data_off = RTE_PKTMBUF_HEADROOM;
4439835834SLance Richardson mb_def.port = rxq->port_id;
4539835834SLance Richardson rte_mbuf_refcnt_set(&mb_def, 1);
4639835834SLance Richardson
4739835834SLance Richardson /* prevent compiler reordering: rearm_data covers previous fields */
4839835834SLance Richardson rte_compiler_barrier();
4939835834SLance Richardson p = (uintptr_t)&mb_def.rearm_data;
5039835834SLance Richardson rxq->mbuf_initializer = *(uint64_t *)p;
5139835834SLance Richardson rxq->rxrearm_nb = 0;
5239835834SLance Richardson rxq->rxrearm_start = 0;
5339835834SLance Richardson return 0;
5439835834SLance Richardson }
55efc60c0fSLance Richardson
56efc60c0fSLance Richardson static inline void
bnxt_rxq_rearm(struct bnxt_rx_queue * rxq,struct bnxt_rx_ring_info * rxr)57efc60c0fSLance Richardson bnxt_rxq_rearm(struct bnxt_rx_queue *rxq, struct bnxt_rx_ring_info *rxr)
58efc60c0fSLance Richardson {
59efc60c0fSLance Richardson struct rx_prod_pkt_bd *rxbds = &rxr->rx_desc_ring[rxq->rxrearm_start];
60efc60c0fSLance Richardson struct rte_mbuf **rx_bufs = &rxr->rx_buf_ring[rxq->rxrearm_start];
61efc60c0fSLance Richardson int nb, i;
62efc60c0fSLance Richardson
63efc60c0fSLance Richardson /*
64efc60c0fSLance Richardson * Number of mbufs to allocate must be a multiple of four. The
65efc60c0fSLance Richardson * allocation must not go past the end of the ring.
66efc60c0fSLance Richardson */
67efc60c0fSLance Richardson nb = RTE_MIN(rxq->rxrearm_nb & ~0x3,
68efc60c0fSLance Richardson rxq->nb_rx_desc - rxq->rxrearm_start);
69efc60c0fSLance Richardson
70efc60c0fSLance Richardson /* Allocate new mbufs into the software ring. */
71efc60c0fSLance Richardson if (rte_mempool_get_bulk(rxq->mb_pool, (void *)rx_bufs, nb) < 0) {
72efc60c0fSLance Richardson rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed += nb;
73efc60c0fSLance Richardson
74deae8514SLance Richardson for (i = 0; i < nb; i++)
75deae8514SLance Richardson rx_bufs[i] = &rxq->fake_mbuf;
76efc60c0fSLance Richardson return;
77efc60c0fSLance Richardson }
78efc60c0fSLance Richardson
79efc60c0fSLance Richardson /* Initialize the mbufs in vector, process 4 mbufs per loop. */
80efc60c0fSLance Richardson for (i = 0; i < nb; i += 4) {
81efc60c0fSLance Richardson rxbds[0].address = rte_mbuf_data_iova_default(rx_bufs[0]);
82efc60c0fSLance Richardson rxbds[1].address = rte_mbuf_data_iova_default(rx_bufs[1]);
83efc60c0fSLance Richardson rxbds[2].address = rte_mbuf_data_iova_default(rx_bufs[2]);
84efc60c0fSLance Richardson rxbds[3].address = rte_mbuf_data_iova_default(rx_bufs[3]);
85efc60c0fSLance Richardson
86efc60c0fSLance Richardson rxbds += 4;
87efc60c0fSLance Richardson rx_bufs += 4;
88efc60c0fSLance Richardson }
89efc60c0fSLance Richardson
90efc60c0fSLance Richardson rxq->rxrearm_start += nb;
91*32767b9dSAjit Khaparde /*
92*32767b9dSAjit Khaparde * We can pass rxq->rxrearm_star - 1 as well, but then the epoch
93*32767b9dSAjit Khaparde * bit calculation is messed up.
94*32767b9dSAjit Khaparde */
95*32767b9dSAjit Khaparde bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
96efc60c0fSLance Richardson if (rxq->rxrearm_start >= rxq->nb_rx_desc)
97efc60c0fSLance Richardson rxq->rxrearm_start = 0;
98efc60c0fSLance Richardson
99efc60c0fSLance Richardson rxq->rxrearm_nb -= nb;
100efc60c0fSLance Richardson }
101369f6077SLance Richardson
102fc544b54SLance Richardson /*
103295968d1SFerruh Yigit * Transmit completion function for use when RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE
104fc544b54SLance Richardson * is enabled.
105fc544b54SLance Richardson */
106fc544b54SLance Richardson static inline void
bnxt_tx_cmp_vec_fast(struct bnxt_tx_queue * txq,uint32_t nr_pkts)107527b1008SLance Richardson bnxt_tx_cmp_vec_fast(struct bnxt_tx_queue *txq, uint32_t nr_pkts)
108fc544b54SLance Richardson {
109fc544b54SLance Richardson struct bnxt_tx_ring_info *txr = txq->tx_ring;
110c7de4195SAjit Khaparde uint16_t cons, raw_cons = txr->tx_raw_cons;
111527b1008SLance Richardson uint32_t ring_mask, ring_size, num;
112527b1008SLance Richardson struct rte_mempool *pool;
113fc544b54SLance Richardson
114527b1008SLance Richardson ring_mask = txr->tx_ring_struct->ring_mask;
115527b1008SLance Richardson ring_size = txr->tx_ring_struct->ring_size;
116fc544b54SLance Richardson
117527b1008SLance Richardson cons = raw_cons & ring_mask;
118527b1008SLance Richardson num = RTE_MIN(nr_pkts, ring_size - cons);
119527b1008SLance Richardson pool = txr->tx_buf_ring[cons]->pool;
120527b1008SLance Richardson
121527b1008SLance Richardson rte_mempool_put_bulk(pool, (void **)&txr->tx_buf_ring[cons], num);
122527b1008SLance Richardson memset(&txr->tx_buf_ring[cons], 0, num * sizeof(struct rte_mbuf *));
123527b1008SLance Richardson raw_cons += num;
124527b1008SLance Richardson num = nr_pkts - num;
125527b1008SLance Richardson if (num) {
126527b1008SLance Richardson cons = raw_cons & ring_mask;
127527b1008SLance Richardson rte_mempool_put_bulk(pool, (void **)&txr->tx_buf_ring[cons],
128527b1008SLance Richardson num);
129527b1008SLance Richardson memset(&txr->tx_buf_ring[cons], 0,
130527b1008SLance Richardson num * sizeof(struct rte_mbuf *));
131527b1008SLance Richardson raw_cons += num;
132fc544b54SLance Richardson }
133fc544b54SLance Richardson
134c7de4195SAjit Khaparde txr->tx_raw_cons = raw_cons;
135fc544b54SLance Richardson }
136fc544b54SLance Richardson
137369f6077SLance Richardson static inline void
bnxt_tx_cmp_vec(struct bnxt_tx_queue * txq,uint32_t nr_pkts)138527b1008SLance Richardson bnxt_tx_cmp_vec(struct bnxt_tx_queue *txq, uint32_t nr_pkts)
139369f6077SLance Richardson {
140369f6077SLance Richardson struct bnxt_tx_ring_info *txr = txq->tx_ring;
141c7de4195SAjit Khaparde uint16_t cons, raw_cons = txr->tx_raw_cons;
142527b1008SLance Richardson uint32_t ring_mask, ring_size, num, blk;
143527b1008SLance Richardson struct rte_mempool *pool;
144369f6077SLance Richardson
145527b1008SLance Richardson ring_mask = txr->tx_ring_struct->ring_mask;
146527b1008SLance Richardson ring_size = txr->tx_ring_struct->ring_size;
147527b1008SLance Richardson
148527b1008SLance Richardson while (nr_pkts) {
149369f6077SLance Richardson struct rte_mbuf *mbuf;
150369f6077SLance Richardson
151527b1008SLance Richardson cons = raw_cons & ring_mask;
152527b1008SLance Richardson num = RTE_MIN(nr_pkts, ring_size - cons);
153527b1008SLance Richardson pool = txr->tx_buf_ring[cons]->pool;
154369f6077SLance Richardson
155369f6077SLance Richardson blk = 0;
156527b1008SLance Richardson do {
157527b1008SLance Richardson mbuf = txr->tx_buf_ring[cons + blk];
158527b1008SLance Richardson mbuf = rte_pktmbuf_prefree_seg(mbuf);
159527b1008SLance Richardson if (!mbuf || mbuf->pool != pool)
160527b1008SLance Richardson break;
161527b1008SLance Richardson blk++;
162527b1008SLance Richardson } while (blk < num);
163369f6077SLance Richardson
164527b1008SLance Richardson if (blk) {
165527b1008SLance Richardson rte_mempool_put_bulk(pool,
166527b1008SLance Richardson (void **)&txr->tx_buf_ring[cons],
167527b1008SLance Richardson blk);
168527b1008SLance Richardson memset(&txr->tx_buf_ring[cons], 0,
169527b1008SLance Richardson blk * sizeof(struct rte_mbuf *));
170527b1008SLance Richardson raw_cons += blk;
171527b1008SLance Richardson nr_pkts -= blk;
172527b1008SLance Richardson }
173527b1008SLance Richardson if (!mbuf) {
174527b1008SLance Richardson /* Skip freeing mbufs with non-zero reference count. */
175527b1008SLance Richardson raw_cons++;
176527b1008SLance Richardson nr_pkts--;
177527b1008SLance Richardson }
178527b1008SLance Richardson }
179c7de4195SAjit Khaparde txr->tx_raw_cons = raw_cons;
180369f6077SLance Richardson }
18139835834SLance Richardson #endif /* _BNXT_RXTX_VEC_COMMON_H_ */
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