1540914bcSEd Czeck /* SPDX-License-Identifier: BSD-3-Clause
2540914bcSEd Czeck * Copyright (c) 2015-2018 Atomic Rules LLC
3b33ccdb1SEd Czeck */
4b33ccdb1SEd Czeck
5b33ccdb1SEd Czeck #ifndef _ARK_MPU_H_
6b33ccdb1SEd Czeck #define _ARK_MPU_H_
7b33ccdb1SEd Czeck
8b33ccdb1SEd Czeck #include <stdint.h>
9b33ccdb1SEd Czeck
10b33ccdb1SEd Czeck #include <rte_memory.h>
11b33ccdb1SEd Czeck
12b33ccdb1SEd Czeck /* The MPU or Memory Prefetch Unit is an internal Arkville hardware
13b33ccdb1SEd Czeck * module for moving data between host memory and the hardware FPGA.
14b33ccdb1SEd Czeck * This module is *not* intended for end-user manipulation, hence
15b33ccdb1SEd Czeck * there is minimal documentation.
16b33ccdb1SEd Czeck */
17b33ccdb1SEd Czeck
18c8eaa414SEd Czeck #define ARK_MPU_MODID 0x2055504d
19c8eaa414SEd Czeck #define ARK_MPU_MODVER 0x37313232
20b33ccdb1SEd Czeck /*
21b33ccdb1SEd Czeck * MPU hardware structures
22b33ccdb1SEd Czeck * These are overlay structures to a memory mapped FPGA device. These
23b33ccdb1SEd Czeck * structs will never be instantiated in ram memory
24b33ccdb1SEd Czeck */
25b33ccdb1SEd Czeck
26b33ccdb1SEd Czeck #define ARK_MPU_ID 0x00
27b33ccdb1SEd Czeck struct ark_mpu_id_t {
28b33ccdb1SEd Czeck union {
29b33ccdb1SEd Czeck char id[4];
30b33ccdb1SEd Czeck uint32_t idnum;
31b33ccdb1SEd Czeck };
32b33ccdb1SEd Czeck union {
33b33ccdb1SEd Czeck char ver[4];
34b33ccdb1SEd Czeck uint32_t vernum;
35b33ccdb1SEd Czeck };
36b33ccdb1SEd Czeck uint32_t phys_id;
37b33ccdb1SEd Czeck uint32_t mrr_code;
38b33ccdb1SEd Czeck };
39b33ccdb1SEd Czeck
40b33ccdb1SEd Czeck #define ARK_MPU_HW 0x010
41b33ccdb1SEd Czeck struct ark_mpu_hw_t {
42*6d8c0545SEd Czeck uint32_t num_queues;
43b33ccdb1SEd Czeck uint32_t hw_depth;
44b33ccdb1SEd Czeck uint32_t obj_size;
45b33ccdb1SEd Czeck uint32_t obj_per_mrr;
46b33ccdb1SEd Czeck };
47b33ccdb1SEd Czeck
48b33ccdb1SEd Czeck #define ARK_MPU_CFG 0x040
49b33ccdb1SEd Czeck struct ark_mpu_cfg_t {
50df6e0a06SSantosh Shukla rte_iova_t ring_base; /* rte_iova_t is a uint64_t */
51b33ccdb1SEd Czeck uint32_t ring_size;
52b33ccdb1SEd Czeck uint32_t ring_mask;
53b33ccdb1SEd Czeck uint32_t min_host_move;
54b33ccdb1SEd Czeck uint32_t min_hw_move;
55b33ccdb1SEd Czeck volatile uint32_t sw_prod_index;
56b33ccdb1SEd Czeck volatile uint32_t hw_cons_index;
57b33ccdb1SEd Czeck volatile uint32_t command;
58b33ccdb1SEd Czeck };
59b33ccdb1SEd Czeck enum ARK_MPU_COMMAND {
60b33ccdb1SEd Czeck MPU_CMD_IDLE = 1,
61b33ccdb1SEd Czeck MPU_CMD_RUN = 2,
62b33ccdb1SEd Czeck MPU_CMD_STOP = 4,
63b33ccdb1SEd Czeck MPU_CMD_RESET = 8,
64b33ccdb1SEd Czeck MPU_CMD_FORCE_RESET = 16,
65b33ccdb1SEd Czeck MPU_COMMAND_LIMIT = 0xfFFFFFFF
66b33ccdb1SEd Czeck };
67b33ccdb1SEd Czeck
68b33ccdb1SEd Czeck /* Consolidated structure */
69b33ccdb1SEd Czeck struct ark_mpu_t {
70b33ccdb1SEd Czeck struct ark_mpu_id_t id;
71b33ccdb1SEd Czeck uint8_t reserved0[(ARK_MPU_HW - ARK_MPU_ID)
72b33ccdb1SEd Czeck - sizeof(struct ark_mpu_id_t)];
73b33ccdb1SEd Czeck struct ark_mpu_hw_t hw;
74b33ccdb1SEd Czeck uint8_t reserved1[(ARK_MPU_CFG - ARK_MPU_HW) -
75b33ccdb1SEd Czeck sizeof(struct ark_mpu_hw_t)];
76b33ccdb1SEd Czeck struct ark_mpu_cfg_t cfg;
77b33ccdb1SEd Czeck };
78b33ccdb1SEd Czeck
79b33ccdb1SEd Czeck uint16_t ark_api_num_queues(struct ark_mpu_t *mpu);
80b33ccdb1SEd Czeck uint16_t ark_api_num_queues_per_port(struct ark_mpu_t *mpu,
81b33ccdb1SEd Czeck uint16_t ark_ports);
82b33ccdb1SEd Czeck int ark_mpu_verify(struct ark_mpu_t *mpu, uint32_t obj_size);
83b33ccdb1SEd Czeck void ark_mpu_stop(struct ark_mpu_t *mpu);
84b33ccdb1SEd Czeck void ark_mpu_start(struct ark_mpu_t *mpu);
85b33ccdb1SEd Czeck int ark_mpu_reset(struct ark_mpu_t *mpu);
86df6e0a06SSantosh Shukla int ark_mpu_configure(struct ark_mpu_t *mpu, rte_iova_t ring,
87b33ccdb1SEd Czeck uint32_t ring_size, int is_tx);
88b33ccdb1SEd Czeck
89b33ccdb1SEd Czeck void ark_mpu_dump(struct ark_mpu_t *mpu, const char *msg, uint16_t idx);
90b33ccdb1SEd Czeck void ark_mpu_dump_setup(struct ark_mpu_t *mpu, uint16_t qid);
91b33ccdb1SEd Czeck
92b33ccdb1SEd Czeck /* this action is in a performance critical path */
93b33ccdb1SEd Czeck static inline void
ark_mpu_set_producer(struct ark_mpu_t * mpu,uint32_t idx)94b33ccdb1SEd Czeck ark_mpu_set_producer(struct ark_mpu_t *mpu, uint32_t idx)
95b33ccdb1SEd Czeck {
96b33ccdb1SEd Czeck mpu->cfg.sw_prod_index = idx;
97b33ccdb1SEd Czeck }
98b33ccdb1SEd Czeck
99b33ccdb1SEd Czeck #endif
100