xref: /dpdk/drivers/event/dpaa2/dpaa2_eventdev_selftest.c (revision a247fcd94598398d5478897a45537880d3051c28)
1653242c3SHemant Agrawal /* SPDX-License-Identifier: BSD-3-Clause
2653242c3SHemant Agrawal  * Copyright 2018-2019 NXP
3653242c3SHemant Agrawal  */
4653242c3SHemant Agrawal 
5653242c3SHemant Agrawal #include <rte_atomic.h>
6653242c3SHemant Agrawal #include <rte_common.h>
7653242c3SHemant Agrawal #include <rte_cycles.h>
8653242c3SHemant Agrawal #include <rte_debug.h>
9653242c3SHemant Agrawal #include <rte_eal.h>
10653242c3SHemant Agrawal #include <rte_ethdev.h>
11653242c3SHemant Agrawal #include <rte_eventdev.h>
12653242c3SHemant Agrawal #include <rte_hexdump.h>
13653242c3SHemant Agrawal #include <rte_mbuf.h>
14653242c3SHemant Agrawal #include <rte_malloc.h>
15653242c3SHemant Agrawal #include <rte_memcpy.h>
16653242c3SHemant Agrawal #include <rte_launch.h>
17653242c3SHemant Agrawal #include <rte_lcore.h>
18653242c3SHemant Agrawal #include <rte_per_lcore.h>
19653242c3SHemant Agrawal #include <rte_random.h>
204851ef2bSDavid Marchand #include <bus_vdev_driver.h>
21653242c3SHemant Agrawal #include <rte_test.h>
22b4f22ca5SDavid Marchand #include <bus_fslmc_driver.h>
23653242c3SHemant Agrawal 
24653242c3SHemant Agrawal #include "dpaa2_eventdev.h"
25653242c3SHemant Agrawal #include "dpaa2_eventdev_logs.h"
26653242c3SHemant Agrawal 
27653242c3SHemant Agrawal #define MAX_PORTS 4
28653242c3SHemant Agrawal #define NUM_PACKETS (1 << 18)
29653242c3SHemant Agrawal #define MAX_EVENTS  8
30653242c3SHemant Agrawal #define DPAA2_TEST_RUN(setup, teardown, test) \
31653242c3SHemant Agrawal 	dpaa2_test_run(setup, teardown, test, #test)
32653242c3SHemant Agrawal 
33653242c3SHemant Agrawal static int total;
34653242c3SHemant Agrawal static int passed;
35653242c3SHemant Agrawal static int failed;
36653242c3SHemant Agrawal static int unsupported;
37653242c3SHemant Agrawal 
38653242c3SHemant Agrawal static int evdev;
39653242c3SHemant Agrawal static struct rte_mempool *eventdev_test_mempool;
40653242c3SHemant Agrawal 
41653242c3SHemant Agrawal struct event_attr {
42653242c3SHemant Agrawal 	uint32_t flow_id;
43653242c3SHemant Agrawal 	uint8_t event_type;
44653242c3SHemant Agrawal 	uint8_t sub_event_type;
45653242c3SHemant Agrawal 	uint8_t sched_type;
46653242c3SHemant Agrawal 	uint8_t queue;
47653242c3SHemant Agrawal 	uint8_t port;
48653242c3SHemant Agrawal 	uint8_t seq;
49653242c3SHemant Agrawal };
50653242c3SHemant Agrawal 
51653242c3SHemant Agrawal struct test_core_param {
52653242c3SHemant Agrawal 	rte_atomic32_t *total_events;
53653242c3SHemant Agrawal 	uint64_t dequeue_tmo_ticks;
54653242c3SHemant Agrawal 	uint8_t port;
55653242c3SHemant Agrawal 	uint8_t sched_type;
56653242c3SHemant Agrawal };
57653242c3SHemant Agrawal 
58653242c3SHemant Agrawal static int
testsuite_setup(void)59653242c3SHemant Agrawal testsuite_setup(void)
60653242c3SHemant Agrawal {
61653242c3SHemant Agrawal 	const char *eventdev_name = "event_dpaa2";
62653242c3SHemant Agrawal 
63653242c3SHemant Agrawal 	evdev = rte_event_dev_get_dev_id(eventdev_name);
64653242c3SHemant Agrawal 	if (evdev < 0) {
65653242c3SHemant Agrawal 		dpaa2_evdev_dbg("%d: Eventdev %s not found - creating.",
66653242c3SHemant Agrawal 				__LINE__, eventdev_name);
67653242c3SHemant Agrawal 		if (rte_vdev_init(eventdev_name, NULL) < 0) {
68653242c3SHemant Agrawal 			dpaa2_evdev_err("Error creating eventdev %s",
69653242c3SHemant Agrawal 					eventdev_name);
70653242c3SHemant Agrawal 			return -1;
71653242c3SHemant Agrawal 		}
72653242c3SHemant Agrawal 		evdev = rte_event_dev_get_dev_id(eventdev_name);
73653242c3SHemant Agrawal 		if (evdev < 0) {
74653242c3SHemant Agrawal 			dpaa2_evdev_err("Error finding newly created eventdev");
75653242c3SHemant Agrawal 			return -1;
76653242c3SHemant Agrawal 		}
77653242c3SHemant Agrawal 	}
78653242c3SHemant Agrawal 
79653242c3SHemant Agrawal 	return 0;
80653242c3SHemant Agrawal }
81653242c3SHemant Agrawal 
82653242c3SHemant Agrawal static void
testsuite_teardown(void)83653242c3SHemant Agrawal testsuite_teardown(void)
84653242c3SHemant Agrawal {
85653242c3SHemant Agrawal 	rte_event_dev_close(evdev);
86653242c3SHemant Agrawal }
87653242c3SHemant Agrawal 
88653242c3SHemant Agrawal static void
devconf_set_default_sane_values(struct rte_event_dev_config * dev_conf,struct rte_event_dev_info * info)89653242c3SHemant Agrawal devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
90653242c3SHemant Agrawal 			struct rte_event_dev_info *info)
91653242c3SHemant Agrawal {
92653242c3SHemant Agrawal 	memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
93653242c3SHemant Agrawal 	dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
94653242c3SHemant Agrawal 	dev_conf->nb_event_ports = info->max_event_ports;
95653242c3SHemant Agrawal 	dev_conf->nb_event_queues = info->max_event_queues;
96653242c3SHemant Agrawal 	dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
97653242c3SHemant Agrawal 	dev_conf->nb_event_port_dequeue_depth =
98653242c3SHemant Agrawal 			info->max_event_port_dequeue_depth;
99653242c3SHemant Agrawal 	dev_conf->nb_event_port_enqueue_depth =
100653242c3SHemant Agrawal 			info->max_event_port_enqueue_depth;
101653242c3SHemant Agrawal 	dev_conf->nb_event_port_enqueue_depth =
102653242c3SHemant Agrawal 			info->max_event_port_enqueue_depth;
103653242c3SHemant Agrawal 	dev_conf->nb_events_limit =
104653242c3SHemant Agrawal 			info->max_num_events;
105653242c3SHemant Agrawal }
106653242c3SHemant Agrawal 
107653242c3SHemant Agrawal enum {
108653242c3SHemant Agrawal 	TEST_EVENTDEV_SETUP_DEFAULT,
109653242c3SHemant Agrawal 	TEST_EVENTDEV_SETUP_PRIORITY,
110653242c3SHemant Agrawal 	TEST_EVENTDEV_SETUP_DEQUEUE_TIMEOUT,
111653242c3SHemant Agrawal };
112653242c3SHemant Agrawal 
113653242c3SHemant Agrawal static int
_eventdev_setup(int mode)114653242c3SHemant Agrawal _eventdev_setup(int mode)
115653242c3SHemant Agrawal {
116653242c3SHemant Agrawal 	int i, ret;
117653242c3SHemant Agrawal 	struct rte_event_dev_config dev_conf;
118653242c3SHemant Agrawal 	struct rte_event_dev_info info;
119653242c3SHemant Agrawal 	const char *pool_name = "evdev_dpaa2_test_pool";
120653242c3SHemant Agrawal 
1217be78d02SJosh Soref 	/* Create and destroy pool for each test case to make it standalone */
122653242c3SHemant Agrawal 	eventdev_test_mempool = rte_pktmbuf_pool_create(pool_name,
123653242c3SHemant Agrawal 					MAX_EVENTS,
124653242c3SHemant Agrawal 					0 /*MBUF_CACHE_SIZE*/,
125653242c3SHemant Agrawal 					0,
126653242c3SHemant Agrawal 					512, /* Use very small mbufs */
127653242c3SHemant Agrawal 					rte_socket_id());
128653242c3SHemant Agrawal 	if (!eventdev_test_mempool) {
129653242c3SHemant Agrawal 		dpaa2_evdev_err("ERROR creating mempool");
130653242c3SHemant Agrawal 		return -1;
131653242c3SHemant Agrawal 	}
132653242c3SHemant Agrawal 
133653242c3SHemant Agrawal 	ret = rte_event_dev_info_get(evdev, &info);
134653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(ret, "Failed to get event dev info");
135653242c3SHemant Agrawal 	RTE_TEST_ASSERT(info.max_num_events >= (int32_t)MAX_EVENTS,
136653242c3SHemant Agrawal 			"ERROR max_num_events=%d < max_events=%d",
137653242c3SHemant Agrawal 				info.max_num_events, MAX_EVENTS);
138653242c3SHemant Agrawal 
139653242c3SHemant Agrawal 	devconf_set_default_sane_values(&dev_conf, &info);
140653242c3SHemant Agrawal 	if (mode == TEST_EVENTDEV_SETUP_DEQUEUE_TIMEOUT)
141653242c3SHemant Agrawal 		dev_conf.event_dev_cfg |= RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT;
142653242c3SHemant Agrawal 
143653242c3SHemant Agrawal 	ret = rte_event_dev_configure(evdev, &dev_conf);
144653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(ret, "Failed to configure eventdev");
145653242c3SHemant Agrawal 
146653242c3SHemant Agrawal 	uint32_t queue_count;
147653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(rte_event_dev_attr_get(evdev,
148653242c3SHemant Agrawal 			    RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
149653242c3SHemant Agrawal 			    &queue_count), "Queue count get failed");
150653242c3SHemant Agrawal 
151653242c3SHemant Agrawal 	if (mode == TEST_EVENTDEV_SETUP_PRIORITY) {
152653242c3SHemant Agrawal 		if (queue_count > 8) {
153653242c3SHemant Agrawal 			dpaa2_evdev_err(
154653242c3SHemant Agrawal 				"test expects the unique priority per queue");
155653242c3SHemant Agrawal 			return -ENOTSUP;
156653242c3SHemant Agrawal 		}
157653242c3SHemant Agrawal 
158653242c3SHemant Agrawal 		/* Configure event queues(0 to n) with
159653242c3SHemant Agrawal 		 * RTE_EVENT_DEV_PRIORITY_HIGHEST to
160653242c3SHemant Agrawal 		 * RTE_EVENT_DEV_PRIORITY_LOWEST
161653242c3SHemant Agrawal 		 */
162653242c3SHemant Agrawal 		uint8_t step = (RTE_EVENT_DEV_PRIORITY_LOWEST + 1) /
163653242c3SHemant Agrawal 				queue_count;
164653242c3SHemant Agrawal 		for (i = 0; i < (int)queue_count; i++) {
165653242c3SHemant Agrawal 			struct rte_event_queue_conf queue_conf;
166653242c3SHemant Agrawal 
167653242c3SHemant Agrawal 			ret = rte_event_queue_default_conf_get(evdev, i,
168653242c3SHemant Agrawal 						&queue_conf);
169653242c3SHemant Agrawal 			RTE_TEST_ASSERT_SUCCESS(ret, "Failed to get def_conf%d",
170653242c3SHemant Agrawal 					i);
171653242c3SHemant Agrawal 			queue_conf.priority = i * step;
172653242c3SHemant Agrawal 			ret = rte_event_queue_setup(evdev, i, &queue_conf);
173653242c3SHemant Agrawal 			RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup queue=%d",
174653242c3SHemant Agrawal 					i);
175653242c3SHemant Agrawal 		}
176653242c3SHemant Agrawal 
177653242c3SHemant Agrawal 	} else {
178653242c3SHemant Agrawal 		/* Configure event queues with default priority */
179653242c3SHemant Agrawal 		for (i = 0; i < (int)queue_count; i++) {
180653242c3SHemant Agrawal 			ret = rte_event_queue_setup(evdev, i, NULL);
181653242c3SHemant Agrawal 			RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup queue=%d",
182653242c3SHemant Agrawal 					i);
183653242c3SHemant Agrawal 		}
184653242c3SHemant Agrawal 	}
185653242c3SHemant Agrawal 	/* Configure event ports */
186653242c3SHemant Agrawal 	uint32_t port_count;
187653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(rte_event_dev_attr_get(evdev,
188653242c3SHemant Agrawal 				RTE_EVENT_DEV_ATTR_PORT_COUNT,
189653242c3SHemant Agrawal 				&port_count), "Port count get failed");
190653242c3SHemant Agrawal 	for (i = 0; i < (int)port_count; i++) {
191653242c3SHemant Agrawal 		ret = rte_event_port_setup(evdev, i, NULL);
192653242c3SHemant Agrawal 		RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup port=%d", i);
193653242c3SHemant Agrawal 		ret = rte_event_port_link(evdev, i, NULL, NULL, 0);
194653242c3SHemant Agrawal 		RTE_TEST_ASSERT(ret >= 0, "Failed to link all queues port=%d",
195653242c3SHemant Agrawal 				i);
196653242c3SHemant Agrawal 	}
197653242c3SHemant Agrawal 
198653242c3SHemant Agrawal 	ret = rte_event_dev_start(evdev);
199653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(ret, "Failed to start device");
200653242c3SHemant Agrawal 
201653242c3SHemant Agrawal 	return 0;
202653242c3SHemant Agrawal }
203653242c3SHemant Agrawal 
204653242c3SHemant Agrawal static int
eventdev_setup(void)205653242c3SHemant Agrawal eventdev_setup(void)
206653242c3SHemant Agrawal {
207653242c3SHemant Agrawal 	return _eventdev_setup(TEST_EVENTDEV_SETUP_DEFAULT);
208653242c3SHemant Agrawal }
209653242c3SHemant Agrawal 
210653242c3SHemant Agrawal static void
eventdev_teardown(void)211653242c3SHemant Agrawal eventdev_teardown(void)
212653242c3SHemant Agrawal {
213653242c3SHemant Agrawal 	rte_event_dev_stop(evdev);
214653242c3SHemant Agrawal 	rte_mempool_free(eventdev_test_mempool);
215653242c3SHemant Agrawal }
216653242c3SHemant Agrawal 
217653242c3SHemant Agrawal static void
update_event_and_validation_attr(struct rte_mbuf * m,struct rte_event * ev,uint32_t flow_id,uint8_t event_type,uint8_t sub_event_type,uint8_t sched_type,uint8_t queue,uint8_t port,uint8_t seq)218653242c3SHemant Agrawal update_event_and_validation_attr(struct rte_mbuf *m, struct rte_event *ev,
219653242c3SHemant Agrawal 			uint32_t flow_id, uint8_t event_type,
220653242c3SHemant Agrawal 			uint8_t sub_event_type, uint8_t sched_type,
221653242c3SHemant Agrawal 			uint8_t queue, uint8_t port, uint8_t seq)
222653242c3SHemant Agrawal {
223653242c3SHemant Agrawal 	struct event_attr *attr;
224653242c3SHemant Agrawal 
225653242c3SHemant Agrawal 	/* Store the event attributes in mbuf for future reference */
226653242c3SHemant Agrawal 	attr = rte_pktmbuf_mtod(m, struct event_attr *);
227653242c3SHemant Agrawal 	attr->flow_id = flow_id;
228653242c3SHemant Agrawal 	attr->event_type = event_type;
229653242c3SHemant Agrawal 	attr->sub_event_type = sub_event_type;
230653242c3SHemant Agrawal 	attr->sched_type = sched_type;
231653242c3SHemant Agrawal 	attr->queue = queue;
232653242c3SHemant Agrawal 	attr->port = port;
233653242c3SHemant Agrawal 	attr->seq = seq;
234653242c3SHemant Agrawal 
235653242c3SHemant Agrawal 	ev->flow_id = flow_id;
236653242c3SHemant Agrawal 	ev->sub_event_type = sub_event_type;
237653242c3SHemant Agrawal 	ev->event_type = event_type;
238653242c3SHemant Agrawal 	/* Inject the new event */
239653242c3SHemant Agrawal 	ev->op = RTE_EVENT_OP_NEW;
240653242c3SHemant Agrawal 	ev->sched_type = sched_type;
241653242c3SHemant Agrawal 	ev->queue_id = queue;
242653242c3SHemant Agrawal 	ev->mbuf = m;
243653242c3SHemant Agrawal }
244653242c3SHemant Agrawal 
245653242c3SHemant Agrawal static int
inject_events(uint32_t flow_id,uint8_t event_type,uint8_t sub_event_type,uint8_t sched_type,uint8_t queue,uint8_t port,unsigned int events)246653242c3SHemant Agrawal inject_events(uint32_t flow_id, uint8_t event_type, uint8_t sub_event_type,
247653242c3SHemant Agrawal 		uint8_t sched_type, uint8_t queue, uint8_t port,
248653242c3SHemant Agrawal 		unsigned int events)
249653242c3SHemant Agrawal {
250653242c3SHemant Agrawal 	struct rte_mbuf *m;
251653242c3SHemant Agrawal 	unsigned int i;
252653242c3SHemant Agrawal 
253653242c3SHemant Agrawal 	for (i = 0; i < events; i++) {
254653242c3SHemant Agrawal 		struct rte_event ev = {.event = 0, .u64 = 0};
255653242c3SHemant Agrawal 
256653242c3SHemant Agrawal 		m = rte_pktmbuf_alloc(eventdev_test_mempool);
257653242c3SHemant Agrawal 		RTE_TEST_ASSERT_NOT_NULL(m, "mempool alloc failed");
258653242c3SHemant Agrawal 
259653242c3SHemant Agrawal 		update_event_and_validation_attr(m, &ev, flow_id, event_type,
260653242c3SHemant Agrawal 			sub_event_type, sched_type, queue, port, i);
261653242c3SHemant Agrawal 		rte_event_enqueue_burst(evdev, port, &ev, 1);
262653242c3SHemant Agrawal 	}
263653242c3SHemant Agrawal 	return 0;
264653242c3SHemant Agrawal }
265653242c3SHemant Agrawal 
266653242c3SHemant Agrawal static int
check_excess_events(uint8_t port)267653242c3SHemant Agrawal check_excess_events(uint8_t port)
268653242c3SHemant Agrawal {
269653242c3SHemant Agrawal 	int i;
270653242c3SHemant Agrawal 	uint16_t valid_event;
271653242c3SHemant Agrawal 	struct rte_event ev;
272653242c3SHemant Agrawal 
273653242c3SHemant Agrawal 	/* Check for excess events, try for a few times and exit */
274653242c3SHemant Agrawal 	for (i = 0; i < 32; i++) {
275653242c3SHemant Agrawal 		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
276653242c3SHemant Agrawal 
277653242c3SHemant Agrawal 		RTE_TEST_ASSERT_SUCCESS(valid_event,
278ea278063SDavid Marchand 				"Unexpected valid event=%d",
279ea278063SDavid Marchand 				*dpaa2_seqn(ev.mbuf));
280653242c3SHemant Agrawal 	}
281653242c3SHemant Agrawal 	return 0;
282653242c3SHemant Agrawal }
283653242c3SHemant Agrawal 
284653242c3SHemant Agrawal static int
generate_random_events(const unsigned int total_events)285653242c3SHemant Agrawal generate_random_events(const unsigned int total_events)
286653242c3SHemant Agrawal {
287653242c3SHemant Agrawal 	struct rte_event_dev_info info;
288653242c3SHemant Agrawal 	unsigned int i;
289653242c3SHemant Agrawal 	int ret;
290653242c3SHemant Agrawal 
291653242c3SHemant Agrawal 	uint32_t queue_count;
292653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(rte_event_dev_attr_get(evdev,
293653242c3SHemant Agrawal 			    RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
294653242c3SHemant Agrawal 			    &queue_count), "Queue count get failed");
295653242c3SHemant Agrawal 
296653242c3SHemant Agrawal 	ret = rte_event_dev_info_get(evdev, &info);
297653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(ret, "Failed to get event dev info");
298653242c3SHemant Agrawal 	for (i = 0; i < total_events; i++) {
299653242c3SHemant Agrawal 		ret = inject_events(
300653242c3SHemant Agrawal 			rte_rand() % info.max_event_queue_flows /*flow_id */,
301653242c3SHemant Agrawal 			RTE_EVENT_TYPE_CPU /* event_type */,
302653242c3SHemant Agrawal 			rte_rand() % 256 /* sub_event_type */,
303653242c3SHemant Agrawal 			rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1),
304653242c3SHemant Agrawal 			rte_rand() % queue_count /* queue */,
305653242c3SHemant Agrawal 			0 /* port */,
306653242c3SHemant Agrawal 			1 /* events */);
307653242c3SHemant Agrawal 		if (ret)
308653242c3SHemant Agrawal 			return -1;
309653242c3SHemant Agrawal 	}
310653242c3SHemant Agrawal 	return ret;
311653242c3SHemant Agrawal }
312653242c3SHemant Agrawal 
313653242c3SHemant Agrawal 
314653242c3SHemant Agrawal static int
validate_event(struct rte_event * ev)315653242c3SHemant Agrawal validate_event(struct rte_event *ev)
316653242c3SHemant Agrawal {
317653242c3SHemant Agrawal 	struct event_attr *attr;
318653242c3SHemant Agrawal 
319653242c3SHemant Agrawal 	attr = rte_pktmbuf_mtod(ev->mbuf, struct event_attr *);
320653242c3SHemant Agrawal 	RTE_TEST_ASSERT_EQUAL(attr->flow_id, ev->flow_id,
321653242c3SHemant Agrawal 			"flow_id mismatch enq=%d deq =%d",
322653242c3SHemant Agrawal 			attr->flow_id, ev->flow_id);
323653242c3SHemant Agrawal 	RTE_TEST_ASSERT_EQUAL(attr->event_type, ev->event_type,
324653242c3SHemant Agrawal 			"event_type mismatch enq=%d deq =%d",
325653242c3SHemant Agrawal 			attr->event_type, ev->event_type);
326653242c3SHemant Agrawal 	RTE_TEST_ASSERT_EQUAL(attr->sub_event_type, ev->sub_event_type,
327653242c3SHemant Agrawal 			"sub_event_type mismatch enq=%d deq =%d",
328653242c3SHemant Agrawal 			attr->sub_event_type, ev->sub_event_type);
329653242c3SHemant Agrawal 	RTE_TEST_ASSERT_EQUAL(attr->sched_type, ev->sched_type,
330653242c3SHemant Agrawal 			"sched_type mismatch enq=%d deq =%d",
331653242c3SHemant Agrawal 			attr->sched_type, ev->sched_type);
332653242c3SHemant Agrawal 	RTE_TEST_ASSERT_EQUAL(attr->queue, ev->queue_id,
333653242c3SHemant Agrawal 			"queue mismatch enq=%d deq =%d",
334653242c3SHemant Agrawal 			attr->queue, ev->queue_id);
335653242c3SHemant Agrawal 	return 0;
336653242c3SHemant Agrawal }
337653242c3SHemant Agrawal 
338653242c3SHemant Agrawal typedef int (*validate_event_cb)(uint32_t index, uint8_t port,
339653242c3SHemant Agrawal 				 struct rte_event *ev);
340653242c3SHemant Agrawal 
341653242c3SHemant Agrawal static int
consume_events(uint8_t port,const uint32_t total_events,validate_event_cb fn)342653242c3SHemant Agrawal consume_events(uint8_t port, const uint32_t total_events, validate_event_cb fn)
343653242c3SHemant Agrawal {
344653242c3SHemant Agrawal 	int ret;
345653242c3SHemant Agrawal 	uint16_t valid_event;
346653242c3SHemant Agrawal 	uint32_t events = 0, forward_progress_cnt = 0, index = 0;
347653242c3SHemant Agrawal 	struct rte_event ev;
348653242c3SHemant Agrawal 
349653242c3SHemant Agrawal 	while (1) {
350653242c3SHemant Agrawal 		if (++forward_progress_cnt > UINT16_MAX) {
351653242c3SHemant Agrawal 			dpaa2_evdev_err("Detected deadlock");
352653242c3SHemant Agrawal 			return -1;
353653242c3SHemant Agrawal 		}
354653242c3SHemant Agrawal 
355653242c3SHemant Agrawal 		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
356653242c3SHemant Agrawal 		if (!valid_event)
357653242c3SHemant Agrawal 			continue;
358653242c3SHemant Agrawal 
359653242c3SHemant Agrawal 		forward_progress_cnt = 0;
360653242c3SHemant Agrawal 		ret = validate_event(&ev);
361653242c3SHemant Agrawal 		if (ret)
362653242c3SHemant Agrawal 			return -1;
363653242c3SHemant Agrawal 
364653242c3SHemant Agrawal 		if (fn != NULL) {
365653242c3SHemant Agrawal 			ret = fn(index, port, &ev);
366653242c3SHemant Agrawal 			RTE_TEST_ASSERT_SUCCESS(ret,
367653242c3SHemant Agrawal 				"Failed to validate test specific event");
368653242c3SHemant Agrawal 		}
369653242c3SHemant Agrawal 
370653242c3SHemant Agrawal 		++index;
371653242c3SHemant Agrawal 
372653242c3SHemant Agrawal 		rte_pktmbuf_free(ev.mbuf);
373653242c3SHemant Agrawal 		if (++events >= total_events)
374653242c3SHemant Agrawal 			break;
375653242c3SHemant Agrawal 	}
376653242c3SHemant Agrawal 
377653242c3SHemant Agrawal 	return check_excess_events(port);
378653242c3SHemant Agrawal }
379653242c3SHemant Agrawal 
380653242c3SHemant Agrawal static int
validate_simple_enqdeq(uint32_t index,uint8_t port,struct rte_event * ev)381653242c3SHemant Agrawal validate_simple_enqdeq(uint32_t index, uint8_t port, struct rte_event *ev)
382653242c3SHemant Agrawal {
383653242c3SHemant Agrawal 	struct event_attr *attr;
384653242c3SHemant Agrawal 
385653242c3SHemant Agrawal 	attr = rte_pktmbuf_mtod(ev->mbuf, struct event_attr *);
386653242c3SHemant Agrawal 
387653242c3SHemant Agrawal 	RTE_SET_USED(port);
388653242c3SHemant Agrawal 	RTE_TEST_ASSERT_EQUAL(index, attr->seq,
389653242c3SHemant Agrawal 		"index=%d != seqn=%d", index, attr->seq);
390653242c3SHemant Agrawal 	return 0;
391653242c3SHemant Agrawal }
392653242c3SHemant Agrawal 
393653242c3SHemant Agrawal static int
test_simple_enqdeq(uint8_t sched_type)394653242c3SHemant Agrawal test_simple_enqdeq(uint8_t sched_type)
395653242c3SHemant Agrawal {
396653242c3SHemant Agrawal 	int ret;
397653242c3SHemant Agrawal 
398653242c3SHemant Agrawal 	ret = inject_events(0 /*flow_id */,
399653242c3SHemant Agrawal 				RTE_EVENT_TYPE_CPU /* event_type */,
400653242c3SHemant Agrawal 				0 /* sub_event_type */,
401653242c3SHemant Agrawal 				sched_type,
402653242c3SHemant Agrawal 				0 /* queue */,
403653242c3SHemant Agrawal 				0 /* port */,
404653242c3SHemant Agrawal 				MAX_EVENTS);
405653242c3SHemant Agrawal 	if (ret)
406653242c3SHemant Agrawal 		return -1;
407653242c3SHemant Agrawal 
408653242c3SHemant Agrawal 	return consume_events(0 /* port */, MAX_EVENTS,	validate_simple_enqdeq);
409653242c3SHemant Agrawal }
410653242c3SHemant Agrawal 
411653242c3SHemant Agrawal static int
test_simple_enqdeq_atomic(void)412653242c3SHemant Agrawal test_simple_enqdeq_atomic(void)
413653242c3SHemant Agrawal {
414653242c3SHemant Agrawal 	return test_simple_enqdeq(RTE_SCHED_TYPE_ATOMIC);
415653242c3SHemant Agrawal }
416653242c3SHemant Agrawal 
417653242c3SHemant Agrawal static int
test_simple_enqdeq_parallel(void)418653242c3SHemant Agrawal test_simple_enqdeq_parallel(void)
419653242c3SHemant Agrawal {
420653242c3SHemant Agrawal 	return test_simple_enqdeq(RTE_SCHED_TYPE_PARALLEL);
421653242c3SHemant Agrawal }
422653242c3SHemant Agrawal 
423653242c3SHemant Agrawal /*
424653242c3SHemant Agrawal  * Generate a prescribed number of events and spread them across available
425653242c3SHemant Agrawal  * queues. On dequeue, using single event port(port 0) verify the enqueued
426653242c3SHemant Agrawal  * event attributes
427653242c3SHemant Agrawal  */
428653242c3SHemant Agrawal static int
test_multi_queue_enq_single_port_deq(void)429653242c3SHemant Agrawal test_multi_queue_enq_single_port_deq(void)
430653242c3SHemant Agrawal {
431653242c3SHemant Agrawal 	int ret;
432653242c3SHemant Agrawal 
433653242c3SHemant Agrawal 	ret = generate_random_events(MAX_EVENTS);
434653242c3SHemant Agrawal 	if (ret)
435653242c3SHemant Agrawal 		return -1;
436653242c3SHemant Agrawal 
437653242c3SHemant Agrawal 	return consume_events(0 /* port */, MAX_EVENTS, NULL);
438653242c3SHemant Agrawal }
439653242c3SHemant Agrawal 
440653242c3SHemant Agrawal static int
worker_multi_port_fn(void * arg)441653242c3SHemant Agrawal worker_multi_port_fn(void *arg)
442653242c3SHemant Agrawal {
443653242c3SHemant Agrawal 	struct test_core_param *param = arg;
444653242c3SHemant Agrawal 	struct rte_event ev;
445653242c3SHemant Agrawal 	uint16_t valid_event;
446653242c3SHemant Agrawal 	uint8_t port = param->port;
447653242c3SHemant Agrawal 	rte_atomic32_t *total_events = param->total_events;
448653242c3SHemant Agrawal 	int ret;
449653242c3SHemant Agrawal 
450653242c3SHemant Agrawal 	while (rte_atomic32_read(total_events) > 0) {
451653242c3SHemant Agrawal 		valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0);
452653242c3SHemant Agrawal 		if (!valid_event)
453653242c3SHemant Agrawal 			continue;
454653242c3SHemant Agrawal 
455653242c3SHemant Agrawal 		ret = validate_event(&ev);
456653242c3SHemant Agrawal 		RTE_TEST_ASSERT_SUCCESS(ret, "Failed to validate event");
457653242c3SHemant Agrawal 		rte_pktmbuf_free(ev.mbuf);
458653242c3SHemant Agrawal 		rte_atomic32_sub(total_events, 1);
459653242c3SHemant Agrawal 	}
460653242c3SHemant Agrawal 	return 0;
461653242c3SHemant Agrawal }
462653242c3SHemant Agrawal 
463653242c3SHemant Agrawal static int
wait_workers_to_join(int lcore,const rte_atomic32_t * count)464653242c3SHemant Agrawal wait_workers_to_join(int lcore, const rte_atomic32_t *count)
465653242c3SHemant Agrawal {
466653242c3SHemant Agrawal 	uint64_t cycles, print_cycles;
467653242c3SHemant Agrawal 
468653242c3SHemant Agrawal 	RTE_SET_USED(count);
469653242c3SHemant Agrawal 
470653242c3SHemant Agrawal 	print_cycles = cycles = rte_get_timer_cycles();
471f6c6c686SHonnappa Nagarahalli 	while (rte_eal_get_lcore_state(lcore) != WAIT) {
472653242c3SHemant Agrawal 		uint64_t new_cycles = rte_get_timer_cycles();
473653242c3SHemant Agrawal 
474653242c3SHemant Agrawal 		if (new_cycles - print_cycles > rte_get_timer_hz()) {
475653242c3SHemant Agrawal 			dpaa2_evdev_dbg("\r%s: events %d", __func__,
476653242c3SHemant Agrawal 				rte_atomic32_read(count));
477653242c3SHemant Agrawal 			print_cycles = new_cycles;
478653242c3SHemant Agrawal 		}
479653242c3SHemant Agrawal 		if (new_cycles - cycles > rte_get_timer_hz() * 10) {
480653242c3SHemant Agrawal 			dpaa2_evdev_info(
481653242c3SHemant Agrawal 				"%s: No schedules for seconds, deadlock (%d)",
482653242c3SHemant Agrawal 				__func__,
483653242c3SHemant Agrawal 				rte_atomic32_read(count));
484653242c3SHemant Agrawal 			rte_event_dev_dump(evdev, stdout);
485653242c3SHemant Agrawal 			cycles = new_cycles;
486653242c3SHemant Agrawal 			return -1;
487653242c3SHemant Agrawal 		}
488653242c3SHemant Agrawal 	}
489653242c3SHemant Agrawal 	rte_eal_mp_wait_lcore();
490653242c3SHemant Agrawal 	return 0;
491653242c3SHemant Agrawal }
492653242c3SHemant Agrawal 
493653242c3SHemant Agrawal 
494653242c3SHemant Agrawal static int
launch_workers_and_wait(int (* main_worker)(void *),int (* workers)(void *),uint32_t total_events,uint8_t nb_workers,uint8_t sched_type)495cb056611SStephen Hemminger launch_workers_and_wait(int (*main_worker)(void *),
496cb056611SStephen Hemminger 			int (*workers)(void *), uint32_t total_events,
497653242c3SHemant Agrawal 			uint8_t nb_workers, uint8_t sched_type)
498653242c3SHemant Agrawal {
499653242c3SHemant Agrawal 	uint8_t port = 0;
500653242c3SHemant Agrawal 	int w_lcore;
501653242c3SHemant Agrawal 	int ret;
502653242c3SHemant Agrawal 	struct test_core_param *param;
503653242c3SHemant Agrawal 	rte_atomic32_t atomic_total_events;
504653242c3SHemant Agrawal 	uint64_t dequeue_tmo_ticks;
505653242c3SHemant Agrawal 
506653242c3SHemant Agrawal 	if (!nb_workers)
507653242c3SHemant Agrawal 		return 0;
508653242c3SHemant Agrawal 
509653242c3SHemant Agrawal 	rte_atomic32_set(&atomic_total_events, total_events);
510b5b2d4a5SDavid Marchand 	RTE_BUILD_BUG_ON(NUM_PACKETS < MAX_EVENTS);
511653242c3SHemant Agrawal 
512653242c3SHemant Agrawal 	param = malloc(sizeof(struct test_core_param) * nb_workers);
513653242c3SHemant Agrawal 	if (!param)
514653242c3SHemant Agrawal 		return -1;
515653242c3SHemant Agrawal 
516653242c3SHemant Agrawal 	ret = rte_event_dequeue_timeout_ticks(evdev,
517653242c3SHemant Agrawal 		rte_rand() % 10000000/* 10ms */, &dequeue_tmo_ticks);
518653242c3SHemant Agrawal 	if (ret) {
519653242c3SHemant Agrawal 		free(param);
520653242c3SHemant Agrawal 		return -1;
521653242c3SHemant Agrawal 	}
522653242c3SHemant Agrawal 
523653242c3SHemant Agrawal 	param[0].total_events = &atomic_total_events;
524653242c3SHemant Agrawal 	param[0].sched_type = sched_type;
525653242c3SHemant Agrawal 	param[0].port = 0;
526653242c3SHemant Agrawal 	param[0].dequeue_tmo_ticks = dequeue_tmo_ticks;
527653242c3SHemant Agrawal 	rte_smp_wmb();
528653242c3SHemant Agrawal 
529653242c3SHemant Agrawal 	w_lcore = rte_get_next_lcore(
530653242c3SHemant Agrawal 			/* start core */ -1,
531cb056611SStephen Hemminger 			/* skip main */ 1,
532653242c3SHemant Agrawal 			/* wrap */ 0);
533cb056611SStephen Hemminger 	rte_eal_remote_launch(main_worker, &param[0], w_lcore);
534653242c3SHemant Agrawal 
535653242c3SHemant Agrawal 	for (port = 1; port < nb_workers; port++) {
536653242c3SHemant Agrawal 		param[port].total_events = &atomic_total_events;
537653242c3SHemant Agrawal 		param[port].sched_type = sched_type;
538653242c3SHemant Agrawal 		param[port].port = port;
539653242c3SHemant Agrawal 		param[port].dequeue_tmo_ticks = dequeue_tmo_ticks;
540653242c3SHemant Agrawal 		rte_smp_wmb();
541653242c3SHemant Agrawal 		w_lcore = rte_get_next_lcore(w_lcore, 1, 0);
542cb056611SStephen Hemminger 		rte_eal_remote_launch(workers, &param[port], w_lcore);
543653242c3SHemant Agrawal 	}
544653242c3SHemant Agrawal 
545653242c3SHemant Agrawal 	ret = wait_workers_to_join(w_lcore, &atomic_total_events);
546653242c3SHemant Agrawal 	free(param);
547653242c3SHemant Agrawal 	return ret;
548653242c3SHemant Agrawal }
549653242c3SHemant Agrawal 
550653242c3SHemant Agrawal /*
551653242c3SHemant Agrawal  * Generate a prescribed number of events and spread them across available
552653242c3SHemant Agrawal  * queues. Dequeue the events through multiple ports and verify the enqueued
553653242c3SHemant Agrawal  * event attributes
554653242c3SHemant Agrawal  */
555653242c3SHemant Agrawal static int
test_multi_queue_enq_multi_port_deq(void)556653242c3SHemant Agrawal test_multi_queue_enq_multi_port_deq(void)
557653242c3SHemant Agrawal {
558653242c3SHemant Agrawal 	const unsigned int total_events = MAX_EVENTS;
559653242c3SHemant Agrawal 	uint32_t nr_ports;
560653242c3SHemant Agrawal 	int ret;
561653242c3SHemant Agrawal 
562653242c3SHemant Agrawal 	ret = generate_random_events(total_events);
563653242c3SHemant Agrawal 	if (ret)
564653242c3SHemant Agrawal 		return -1;
565653242c3SHemant Agrawal 
566653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(rte_event_dev_attr_get(evdev,
567653242c3SHemant Agrawal 				RTE_EVENT_DEV_ATTR_PORT_COUNT,
568653242c3SHemant Agrawal 				&nr_ports), "Port count get failed");
569653242c3SHemant Agrawal 	nr_ports = RTE_MIN(nr_ports, rte_lcore_count() - 1);
570653242c3SHemant Agrawal 
571653242c3SHemant Agrawal 	if (!nr_ports) {
572653242c3SHemant Agrawal 		dpaa2_evdev_err("%s: Not enough ports=%d or workers=%d",
573653242c3SHemant Agrawal 				__func__, nr_ports, rte_lcore_count() - 1);
574653242c3SHemant Agrawal 		return 0;
575653242c3SHemant Agrawal 	}
576653242c3SHemant Agrawal 
577653242c3SHemant Agrawal 	return launch_workers_and_wait(worker_multi_port_fn,
578653242c3SHemant Agrawal 					worker_multi_port_fn, total_events,
579653242c3SHemant Agrawal 					nr_ports, 0xff /* invalid */);
580653242c3SHemant Agrawal }
581653242c3SHemant Agrawal 
582653242c3SHemant Agrawal static
flush(uint8_t dev_id,struct rte_event event,void * arg)583653242c3SHemant Agrawal void flush(uint8_t dev_id, struct rte_event event, void *arg)
584653242c3SHemant Agrawal {
585653242c3SHemant Agrawal 	unsigned int *count = arg;
586653242c3SHemant Agrawal 
587653242c3SHemant Agrawal 	RTE_SET_USED(dev_id);
588653242c3SHemant Agrawal 	if (event.event_type == RTE_EVENT_TYPE_CPU)
589653242c3SHemant Agrawal 		*count = *count + 1;
590653242c3SHemant Agrawal 
591653242c3SHemant Agrawal }
592653242c3SHemant Agrawal 
593653242c3SHemant Agrawal static int
test_dev_stop_flush(void)594653242c3SHemant Agrawal test_dev_stop_flush(void)
595653242c3SHemant Agrawal {
596653242c3SHemant Agrawal 	unsigned int total_events = MAX_EVENTS, count = 0;
597653242c3SHemant Agrawal 	int ret;
598653242c3SHemant Agrawal 
599653242c3SHemant Agrawal 	ret = generate_random_events(total_events);
600653242c3SHemant Agrawal 	if (ret)
601653242c3SHemant Agrawal 		return -1;
602653242c3SHemant Agrawal 
603653242c3SHemant Agrawal 	ret = rte_event_dev_stop_flush_callback_register(evdev, flush, &count);
604653242c3SHemant Agrawal 	if (ret)
605653242c3SHemant Agrawal 		return -2;
606653242c3SHemant Agrawal 	rte_event_dev_stop(evdev);
607653242c3SHemant Agrawal 	ret = rte_event_dev_stop_flush_callback_register(evdev, NULL, NULL);
608653242c3SHemant Agrawal 	if (ret)
609653242c3SHemant Agrawal 		return -3;
610653242c3SHemant Agrawal 	RTE_TEST_ASSERT_EQUAL(total_events, count,
611653242c3SHemant Agrawal 				"count mismatch total_events=%d count=%d",
612653242c3SHemant Agrawal 				total_events, count);
613653242c3SHemant Agrawal 	return 0;
614653242c3SHemant Agrawal }
615653242c3SHemant Agrawal 
616653242c3SHemant Agrawal static int
validate_queue_to_port_single_link(uint32_t index,uint8_t port,struct rte_event * ev)617653242c3SHemant Agrawal validate_queue_to_port_single_link(uint32_t index, uint8_t port,
618653242c3SHemant Agrawal 			struct rte_event *ev)
619653242c3SHemant Agrawal {
620653242c3SHemant Agrawal 	RTE_SET_USED(index);
621653242c3SHemant Agrawal 	RTE_TEST_ASSERT_EQUAL(port, ev->queue_id,
622653242c3SHemant Agrawal 				"queue mismatch enq=%d deq =%d",
623653242c3SHemant Agrawal 				port, ev->queue_id);
624653242c3SHemant Agrawal 	return 0;
625653242c3SHemant Agrawal }
626653242c3SHemant Agrawal 
627653242c3SHemant Agrawal /*
628653242c3SHemant Agrawal  * Link queue x to port x and check correctness of link by checking
629653242c3SHemant Agrawal  * queue_id == x on dequeue on the specific port x
630653242c3SHemant Agrawal  */
631653242c3SHemant Agrawal static int
test_queue_to_port_single_link(void)632653242c3SHemant Agrawal test_queue_to_port_single_link(void)
633653242c3SHemant Agrawal {
634653242c3SHemant Agrawal 	int i, nr_links, ret;
635653242c3SHemant Agrawal 
636653242c3SHemant Agrawal 	uint32_t port_count;
637653242c3SHemant Agrawal 
638653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(rte_event_dev_attr_get(evdev,
639653242c3SHemant Agrawal 				RTE_EVENT_DEV_ATTR_PORT_COUNT,
640653242c3SHemant Agrawal 				&port_count), "Port count get failed");
641653242c3SHemant Agrawal 
642653242c3SHemant Agrawal 	/* Unlink all connections that created in eventdev_setup */
643653242c3SHemant Agrawal 	for (i = 0; i < (int)port_count; i++) {
644653242c3SHemant Agrawal 		ret = rte_event_port_unlink(evdev, i, NULL, 0);
645653242c3SHemant Agrawal 		RTE_TEST_ASSERT(ret >= 0,
646653242c3SHemant Agrawal 				"Failed to unlink all queues port=%d", i);
647653242c3SHemant Agrawal 	}
648653242c3SHemant Agrawal 
649653242c3SHemant Agrawal 	uint32_t queue_count;
650653242c3SHemant Agrawal 
651653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(rte_event_dev_attr_get(evdev,
652653242c3SHemant Agrawal 			    RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
653653242c3SHemant Agrawal 			    &queue_count), "Queue count get failed");
654653242c3SHemant Agrawal 
655653242c3SHemant Agrawal 	nr_links = RTE_MIN(port_count, queue_count);
656653242c3SHemant Agrawal 	const unsigned int total_events = MAX_EVENTS / nr_links;
657653242c3SHemant Agrawal 
658653242c3SHemant Agrawal 	/* Link queue x to port x and inject events to queue x through port x */
659653242c3SHemant Agrawal 	for (i = 0; i < nr_links; i++) {
660653242c3SHemant Agrawal 		uint8_t queue = (uint8_t)i;
661653242c3SHemant Agrawal 
662653242c3SHemant Agrawal 		ret = rte_event_port_link(evdev, i, &queue, NULL, 1);
663653242c3SHemant Agrawal 		RTE_TEST_ASSERT(ret == 1, "Failed to link queue to port %d", i);
664653242c3SHemant Agrawal 
665653242c3SHemant Agrawal 		ret = inject_events(
666653242c3SHemant Agrawal 			0x100 /*flow_id */,
667653242c3SHemant Agrawal 			RTE_EVENT_TYPE_CPU /* event_type */,
668653242c3SHemant Agrawal 			rte_rand() % 256 /* sub_event_type */,
669653242c3SHemant Agrawal 			rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1),
670653242c3SHemant Agrawal 			queue /* queue */,
671653242c3SHemant Agrawal 			i /* port */,
672653242c3SHemant Agrawal 			total_events /* events */);
673653242c3SHemant Agrawal 		if (ret)
674653242c3SHemant Agrawal 			return -1;
675653242c3SHemant Agrawal 	}
676653242c3SHemant Agrawal 
677653242c3SHemant Agrawal 	/* Verify the events generated from correct queue */
678653242c3SHemant Agrawal 	for (i = 0; i < nr_links; i++) {
679653242c3SHemant Agrawal 		ret = consume_events(i /* port */, total_events,
680653242c3SHemant Agrawal 				validate_queue_to_port_single_link);
681653242c3SHemant Agrawal 		if (ret)
682653242c3SHemant Agrawal 			return -1;
683653242c3SHemant Agrawal 	}
684653242c3SHemant Agrawal 
685653242c3SHemant Agrawal 	return 0;
686653242c3SHemant Agrawal }
687653242c3SHemant Agrawal 
688653242c3SHemant Agrawal static int
validate_queue_to_port_multi_link(uint32_t index,uint8_t port,struct rte_event * ev)689653242c3SHemant Agrawal validate_queue_to_port_multi_link(uint32_t index, uint8_t port,
690653242c3SHemant Agrawal 			struct rte_event *ev)
691653242c3SHemant Agrawal {
692653242c3SHemant Agrawal 	RTE_SET_USED(index);
693653242c3SHemant Agrawal 	RTE_TEST_ASSERT_EQUAL(port, (ev->queue_id & 0x1),
694653242c3SHemant Agrawal 				"queue mismatch enq=%d deq =%d",
695653242c3SHemant Agrawal 				port, ev->queue_id);
696653242c3SHemant Agrawal 	return 0;
697653242c3SHemant Agrawal }
698653242c3SHemant Agrawal 
699653242c3SHemant Agrawal /*
700653242c3SHemant Agrawal  * Link all even number of queues to port 0 and all odd number of queues to
701653242c3SHemant Agrawal  * port 1 and verify the link connection on dequeue
702653242c3SHemant Agrawal  */
703653242c3SHemant Agrawal static int
test_queue_to_port_multi_link(void)704653242c3SHemant Agrawal test_queue_to_port_multi_link(void)
705653242c3SHemant Agrawal {
706653242c3SHemant Agrawal 	int ret, port0_events = 0, port1_events = 0;
707653242c3SHemant Agrawal 	uint8_t queue, port;
708653242c3SHemant Agrawal 	uint32_t nr_queues = 0;
709653242c3SHemant Agrawal 	uint32_t nr_ports = 0;
710653242c3SHemant Agrawal 
711653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(rte_event_dev_attr_get(evdev,
712653242c3SHemant Agrawal 			    RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
713653242c3SHemant Agrawal 			    &nr_queues), "Queue count get failed");
714653242c3SHemant Agrawal 
715653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(rte_event_dev_attr_get(evdev,
716653242c3SHemant Agrawal 				RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
717653242c3SHemant Agrawal 				&nr_queues), "Queue count get failed");
718653242c3SHemant Agrawal 	RTE_TEST_ASSERT_SUCCESS(rte_event_dev_attr_get(evdev,
719653242c3SHemant Agrawal 				RTE_EVENT_DEV_ATTR_PORT_COUNT,
720653242c3SHemant Agrawal 				&nr_ports), "Port count get failed");
721653242c3SHemant Agrawal 
722653242c3SHemant Agrawal 	if (nr_ports < 2) {
723653242c3SHemant Agrawal 		dpaa2_evdev_err("%s: Not enough ports to test ports=%d",
724653242c3SHemant Agrawal 				__func__, nr_ports);
725653242c3SHemant Agrawal 		return 0;
726653242c3SHemant Agrawal 	}
727653242c3SHemant Agrawal 
728653242c3SHemant Agrawal 	/* Unlink all connections that created in eventdev_setup */
729653242c3SHemant Agrawal 	for (port = 0; port < nr_ports; port++) {
730653242c3SHemant Agrawal 		ret = rte_event_port_unlink(evdev, port, NULL, 0);
731653242c3SHemant Agrawal 		RTE_TEST_ASSERT(ret >= 0, "Failed to unlink all queues port=%d",
732653242c3SHemant Agrawal 					port);
733653242c3SHemant Agrawal 	}
734653242c3SHemant Agrawal 
735653242c3SHemant Agrawal 	const unsigned int total_events = MAX_EVENTS / nr_queues;
736653242c3SHemant Agrawal 
737653242c3SHemant Agrawal 	/* Link all even number of queues to port0 and odd numbers to port 1*/
738653242c3SHemant Agrawal 	for (queue = 0; queue < nr_queues; queue++) {
739653242c3SHemant Agrawal 		port = queue & 0x1;
740653242c3SHemant Agrawal 		ret = rte_event_port_link(evdev, port, &queue, NULL, 1);
741653242c3SHemant Agrawal 		RTE_TEST_ASSERT(ret == 1, "Failed to link queue=%d to port=%d",
742653242c3SHemant Agrawal 					queue, port);
743653242c3SHemant Agrawal 
744653242c3SHemant Agrawal 		ret = inject_events(
745653242c3SHemant Agrawal 			0x100 /*flow_id */,
746653242c3SHemant Agrawal 			RTE_EVENT_TYPE_CPU /* event_type */,
747653242c3SHemant Agrawal 			rte_rand() % 256 /* sub_event_type */,
748653242c3SHemant Agrawal 			rte_rand() % (RTE_SCHED_TYPE_PARALLEL + 1),
749653242c3SHemant Agrawal 			queue /* queue */,
750653242c3SHemant Agrawal 			port /* port */,
751653242c3SHemant Agrawal 			total_events /* events */);
752653242c3SHemant Agrawal 		if (ret)
753653242c3SHemant Agrawal 			return -1;
754653242c3SHemant Agrawal 
755653242c3SHemant Agrawal 		if (port == 0)
756653242c3SHemant Agrawal 			port0_events += total_events;
757653242c3SHemant Agrawal 		else
758653242c3SHemant Agrawal 			port1_events += total_events;
759653242c3SHemant Agrawal 	}
760653242c3SHemant Agrawal 
761653242c3SHemant Agrawal 	ret = consume_events(0 /* port */, port0_events,
762653242c3SHemant Agrawal 				validate_queue_to_port_multi_link);
763653242c3SHemant Agrawal 	if (ret)
764653242c3SHemant Agrawal 		return -1;
765653242c3SHemant Agrawal 	ret = consume_events(1 /* port */, port1_events,
766653242c3SHemant Agrawal 				validate_queue_to_port_multi_link);
767653242c3SHemant Agrawal 	if (ret)
768653242c3SHemant Agrawal 		return -1;
769653242c3SHemant Agrawal 
770653242c3SHemant Agrawal 	return 0;
771653242c3SHemant Agrawal }
772653242c3SHemant Agrawal 
dpaa2_test_run(int (* setup)(void),void (* tdown)(void),int (* test)(void),const char * name)773653242c3SHemant Agrawal static void dpaa2_test_run(int (*setup)(void), void (*tdown)(void),
774653242c3SHemant Agrawal 		int (*test)(void), const char *name)
775653242c3SHemant Agrawal {
776653242c3SHemant Agrawal 	if (setup() < 0) {
777*a247fcd9SStephen Hemminger 		DPAA2_EVENTDEV_INFO("Error setting up test %s", name);
778653242c3SHemant Agrawal 		unsupported++;
779653242c3SHemant Agrawal 	} else {
780653242c3SHemant Agrawal 		if (test() < 0) {
781653242c3SHemant Agrawal 			failed++;
782*a247fcd9SStephen Hemminger 			DPAA2_EVENTDEV_INFO("%s Failed", name);
783653242c3SHemant Agrawal 		} else {
784653242c3SHemant Agrawal 			passed++;
785*a247fcd9SStephen Hemminger 			DPAA2_EVENTDEV_INFO("%s Passed", name);
786653242c3SHemant Agrawal 		}
787653242c3SHemant Agrawal 	}
788653242c3SHemant Agrawal 
789653242c3SHemant Agrawal 	total++;
790653242c3SHemant Agrawal 	tdown();
791653242c3SHemant Agrawal }
792653242c3SHemant Agrawal 
793653242c3SHemant Agrawal int
test_eventdev_dpaa2(void)794653242c3SHemant Agrawal test_eventdev_dpaa2(void)
795653242c3SHemant Agrawal {
796653242c3SHemant Agrawal 	testsuite_setup();
797653242c3SHemant Agrawal 
798653242c3SHemant Agrawal 	DPAA2_TEST_RUN(eventdev_setup, eventdev_teardown,
799653242c3SHemant Agrawal 			test_simple_enqdeq_atomic);
800653242c3SHemant Agrawal 	DPAA2_TEST_RUN(eventdev_setup, eventdev_teardown,
801653242c3SHemant Agrawal 			test_simple_enqdeq_parallel);
802653242c3SHemant Agrawal 	DPAA2_TEST_RUN(eventdev_setup, eventdev_teardown,
803653242c3SHemant Agrawal 			test_multi_queue_enq_single_port_deq);
804653242c3SHemant Agrawal 	DPAA2_TEST_RUN(eventdev_setup, eventdev_teardown,
805653242c3SHemant Agrawal 			test_dev_stop_flush);
806653242c3SHemant Agrawal 	DPAA2_TEST_RUN(eventdev_setup, eventdev_teardown,
807653242c3SHemant Agrawal 			test_multi_queue_enq_multi_port_deq);
808653242c3SHemant Agrawal 	DPAA2_TEST_RUN(eventdev_setup, eventdev_teardown,
809653242c3SHemant Agrawal 			test_queue_to_port_single_link);
810653242c3SHemant Agrawal 	DPAA2_TEST_RUN(eventdev_setup, eventdev_teardown,
811653242c3SHemant Agrawal 			test_queue_to_port_multi_link);
812653242c3SHemant Agrawal 
813653242c3SHemant Agrawal 	DPAA2_EVENTDEV_INFO("Total tests   : %d", total);
814653242c3SHemant Agrawal 	DPAA2_EVENTDEV_INFO("Passed        : %d", passed);
815653242c3SHemant Agrawal 	DPAA2_EVENTDEV_INFO("Failed        : %d", failed);
816653242c3SHemant Agrawal 	DPAA2_EVENTDEV_INFO("Not supported : %d", unsupported);
817653242c3SHemant Agrawal 
818653242c3SHemant Agrawal 	testsuite_teardown();
819653242c3SHemant Agrawal 
820653242c3SHemant Agrawal 	if (failed)
821653242c3SHemant Agrawal 		return -1;
822653242c3SHemant Agrawal 
823653242c3SHemant Agrawal 	return 0;
824653242c3SHemant Agrawal }
825