1*f1666288SKai Ji /* SPDX-License-Identifier: BSD-3-Clause 2*f1666288SKai Ji * Copyright(c) 2021 Intel Corporation 3*f1666288SKai Ji */ 4*f1666288SKai Ji 5*f1666288SKai Ji #ifndef _PMD_CHACHA_POLY_PRIV_H_ 6*f1666288SKai Ji #define _PMD_CHACHA_POLY_PRIV_H_ 7*f1666288SKai Ji 8*f1666288SKai Ji #include "ipsec_mb_private.h" 9*f1666288SKai Ji 10*f1666288SKai Ji #define CHACHA20_POLY1305_DIGEST_LENGTH 16 11*f1666288SKai Ji 12*f1666288SKai Ji static const 13*f1666288SKai Ji struct rte_cryptodev_capabilities chacha20_poly1305_capabilities[] = { 14*f1666288SKai Ji {/* CHACHA20-POLY1305 */ 15*f1666288SKai Ji .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 16*f1666288SKai Ji {.sym = { 17*f1666288SKai Ji .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD, 18*f1666288SKai Ji {.aead = { 19*f1666288SKai Ji .algo = RTE_CRYPTO_AEAD_CHACHA20_POLY1305, 20*f1666288SKai Ji .block_size = 64, 21*f1666288SKai Ji .key_size = { 22*f1666288SKai Ji .min = 32, 23*f1666288SKai Ji .max = 32, 24*f1666288SKai Ji .increment = 0}, 25*f1666288SKai Ji .digest_size = { 26*f1666288SKai Ji .min = 16, 27*f1666288SKai Ji .max = 16, 28*f1666288SKai Ji .increment = 0}, 29*f1666288SKai Ji .aad_size = { 30*f1666288SKai Ji .min = 0, 31*f1666288SKai Ji .max = 240, 32*f1666288SKai Ji .increment = 1}, 33*f1666288SKai Ji .iv_size = { 34*f1666288SKai Ji .min = 12, 35*f1666288SKai Ji .max = 12, 36*f1666288SKai Ji .increment = 0}, 37*f1666288SKai Ji }, 38*f1666288SKai Ji } 39*f1666288SKai Ji },} 40*f1666288SKai Ji }, 41*f1666288SKai Ji RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() 42*f1666288SKai Ji }; 43*f1666288SKai Ji 44*f1666288SKai Ji uint8_t pmd_driver_id_chacha20_poly1305; 45*f1666288SKai Ji 46*f1666288SKai Ji #endif /* _PMD_CHACHA_POLY_PRIV_H_ */ 47