1d8dd3165SPavan Nikhilesh /* SPDX-License-Identifier: BSD-3-Clause 2d8dd3165SPavan Nikhilesh * Copyright(c) 2017 Cavium, Inc 3d8dd3165SPavan Nikhilesh */ 4d8dd3165SPavan Nikhilesh 572b452c5SDmitry Kozlyuk #include <errno.h> 6d8dd3165SPavan Nikhilesh #include <string.h> 7d8dd3165SPavan Nikhilesh 8d8dd3165SPavan Nikhilesh #include <rte_atomic.h> 9d8dd3165SPavan Nikhilesh #include <rte_common.h> 10d8dd3165SPavan Nikhilesh #include <rte_cycles.h> 11d8dd3165SPavan Nikhilesh #include <rte_io.h> 12d8dd3165SPavan Nikhilesh #include <rte_spinlock.h> 13d8dd3165SPavan Nikhilesh 14d8dd3165SPavan Nikhilesh #include "octeontx_mbox.h" 15d8dd3165SPavan Nikhilesh 16d8dd3165SPavan Nikhilesh /* Mbox operation timeout in seconds */ 17d8dd3165SPavan Nikhilesh #define MBOX_WAIT_TIME_SEC 3 18d8dd3165SPavan Nikhilesh #define MAX_RAM_MBOX_LEN ((SSOW_BAR4_LEN >> 1) - 8 /* Mbox header */) 19d8dd3165SPavan Nikhilesh 20d8dd3165SPavan Nikhilesh /* Mbox channel state */ 21d8dd3165SPavan Nikhilesh enum { 22d8dd3165SPavan Nikhilesh MBOX_CHAN_STATE_REQ = 1, 23d8dd3165SPavan Nikhilesh MBOX_CHAN_STATE_RES = 0, 24d8dd3165SPavan Nikhilesh }; 25d8dd3165SPavan Nikhilesh 26d8dd3165SPavan Nikhilesh /* Response messages */ 27d8dd3165SPavan Nikhilesh enum { 28d8dd3165SPavan Nikhilesh MBOX_RET_SUCCESS, 29d8dd3165SPavan Nikhilesh MBOX_RET_INVALID, 30d8dd3165SPavan Nikhilesh MBOX_RET_INTERNAL_ERR, 31d8dd3165SPavan Nikhilesh }; 32d8dd3165SPavan Nikhilesh 33d8dd3165SPavan Nikhilesh struct mbox { 34d8dd3165SPavan Nikhilesh int init_once; 35b4134b2dSPavan Nikhilesh uint8_t ready; 36d8dd3165SPavan Nikhilesh uint8_t *ram_mbox_base; /* Base address of mbox message stored in ram */ 37d8dd3165SPavan Nikhilesh uint8_t *reg; /* Store to this register triggers PF mbox interrupt */ 38d8dd3165SPavan Nikhilesh uint16_t tag_own; /* Last tag which was written to own channel */ 39a6d6f0afSPavan Nikhilesh uint16_t domain; /* Domain */ 40d8dd3165SPavan Nikhilesh rte_spinlock_t lock; 41d8dd3165SPavan Nikhilesh }; 42d8dd3165SPavan Nikhilesh 43d8dd3165SPavan Nikhilesh static struct mbox octeontx_mbox; 44d8dd3165SPavan Nikhilesh 45d8dd3165SPavan Nikhilesh /* 46d8dd3165SPavan Nikhilesh * Structure used for mbox synchronization 47d8dd3165SPavan Nikhilesh * This structure sits at the begin of Mbox RAM and used as main 48d8dd3165SPavan Nikhilesh * synchronization point for channel communication 49d8dd3165SPavan Nikhilesh */ 50d8dd3165SPavan Nikhilesh struct mbox_ram_hdr { 51d8dd3165SPavan Nikhilesh union { 52d8dd3165SPavan Nikhilesh uint64_t u64; 53d8dd3165SPavan Nikhilesh struct { 54d8dd3165SPavan Nikhilesh uint8_t chan_state : 1; 55d8dd3165SPavan Nikhilesh uint8_t coproc : 7; 56d8dd3165SPavan Nikhilesh uint8_t msg; 57d8dd3165SPavan Nikhilesh uint8_t vfid; 58d8dd3165SPavan Nikhilesh uint8_t res_code; 59d8dd3165SPavan Nikhilesh uint16_t tag; 60d8dd3165SPavan Nikhilesh uint16_t len; 61d8dd3165SPavan Nikhilesh }; 62d8dd3165SPavan Nikhilesh }; 63d8dd3165SPavan Nikhilesh }; 64d8dd3165SPavan Nikhilesh 65b4134b2dSPavan Nikhilesh /* MBOX interface version message */ 66b4134b2dSPavan Nikhilesh struct mbox_intf_ver { 67b4134b2dSPavan Nikhilesh uint32_t platform:12; 68b4134b2dSPavan Nikhilesh uint32_t major:10; 69b4134b2dSPavan Nikhilesh uint32_t minor:10; 70b4134b2dSPavan Nikhilesh }; 71b4134b2dSPavan Nikhilesh 729c99878aSJerin Jacob RTE_LOG_REGISTER(octeontx_logtype_mbox, pmd.octeontx.mbox, NOTICE); 73d8dd3165SPavan Nikhilesh 74d8dd3165SPavan Nikhilesh static inline void 75d8dd3165SPavan Nikhilesh mbox_msgcpy(volatile uint8_t *d, volatile const uint8_t *s, uint16_t size) 76d8dd3165SPavan Nikhilesh { 77d8dd3165SPavan Nikhilesh uint16_t i; 78d8dd3165SPavan Nikhilesh 79d8dd3165SPavan Nikhilesh for (i = 0; i < size; i++) 80d8dd3165SPavan Nikhilesh d[i] = s[i]; 81d8dd3165SPavan Nikhilesh } 82d8dd3165SPavan Nikhilesh 83d8dd3165SPavan Nikhilesh static inline void 84d8dd3165SPavan Nikhilesh mbox_send_request(struct mbox *m, struct octeontx_mbox_hdr *hdr, 85d8dd3165SPavan Nikhilesh const void *txmsg, uint16_t txsize) 86d8dd3165SPavan Nikhilesh { 87d8dd3165SPavan Nikhilesh struct mbox_ram_hdr old_hdr; 88d8dd3165SPavan Nikhilesh struct mbox_ram_hdr new_hdr = { {0} }; 89d8dd3165SPavan Nikhilesh uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base; 90d8dd3165SPavan Nikhilesh uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr); 91d8dd3165SPavan Nikhilesh 92d8dd3165SPavan Nikhilesh /* 93d8dd3165SPavan Nikhilesh * Initialize the channel with the tag left by last send. 94d8dd3165SPavan Nikhilesh * On success full mbox send complete, PF increments the tag by one. 95d8dd3165SPavan Nikhilesh * The sender can validate integrity of PF message with this scheme 96d8dd3165SPavan Nikhilesh */ 97d8dd3165SPavan Nikhilesh old_hdr.u64 = rte_read64(ram_mbox_hdr); 98d8dd3165SPavan Nikhilesh m->tag_own = (old_hdr.tag + 2) & (~0x1ul); /* next even number */ 99d8dd3165SPavan Nikhilesh 100d8dd3165SPavan Nikhilesh /* Copy msg body */ 101d8dd3165SPavan Nikhilesh if (txmsg) 102d8dd3165SPavan Nikhilesh mbox_msgcpy(ram_mbox_msg, txmsg, txsize); 103d8dd3165SPavan Nikhilesh 104d8dd3165SPavan Nikhilesh /* Prepare new hdr */ 105d8dd3165SPavan Nikhilesh new_hdr.chan_state = MBOX_CHAN_STATE_REQ; 106d8dd3165SPavan Nikhilesh new_hdr.coproc = hdr->coproc; 107d8dd3165SPavan Nikhilesh new_hdr.msg = hdr->msg; 108d8dd3165SPavan Nikhilesh new_hdr.vfid = hdr->vfid; 109d8dd3165SPavan Nikhilesh new_hdr.tag = m->tag_own; 110d8dd3165SPavan Nikhilesh new_hdr.len = txsize; 111d8dd3165SPavan Nikhilesh 112d8dd3165SPavan Nikhilesh /* Write the msg header */ 113d8dd3165SPavan Nikhilesh rte_write64(new_hdr.u64, ram_mbox_hdr); 114d8dd3165SPavan Nikhilesh rte_smp_wmb(); 115d8dd3165SPavan Nikhilesh /* Notify PF about the new msg - write to MBOX reg generates PF IRQ */ 116d8dd3165SPavan Nikhilesh rte_write64(0, m->reg); 117d8dd3165SPavan Nikhilesh } 118d8dd3165SPavan Nikhilesh 119d8dd3165SPavan Nikhilesh static inline int 120d8dd3165SPavan Nikhilesh mbox_wait_response(struct mbox *m, struct octeontx_mbox_hdr *hdr, 121d8dd3165SPavan Nikhilesh void *rxmsg, uint16_t rxsize) 122d8dd3165SPavan Nikhilesh { 123d8dd3165SPavan Nikhilesh int res = 0, wait; 124d8dd3165SPavan Nikhilesh uint16_t len; 125d8dd3165SPavan Nikhilesh struct mbox_ram_hdr rx_hdr; 126d8dd3165SPavan Nikhilesh uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base; 127d8dd3165SPavan Nikhilesh uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr); 128d8dd3165SPavan Nikhilesh 129d8dd3165SPavan Nikhilesh /* Wait for response */ 130d8dd3165SPavan Nikhilesh wait = MBOX_WAIT_TIME_SEC * 1000 * 10; 131d8dd3165SPavan Nikhilesh while (wait > 0) { 132d8dd3165SPavan Nikhilesh rte_delay_us(100); 133d8dd3165SPavan Nikhilesh rx_hdr.u64 = rte_read64(ram_mbox_hdr); 134d8dd3165SPavan Nikhilesh if (rx_hdr.chan_state == MBOX_CHAN_STATE_RES) 135d8dd3165SPavan Nikhilesh break; 136d8dd3165SPavan Nikhilesh --wait; 137d8dd3165SPavan Nikhilesh } 138d8dd3165SPavan Nikhilesh 139d8dd3165SPavan Nikhilesh hdr->res_code = rx_hdr.res_code; 140d8dd3165SPavan Nikhilesh m->tag_own++; 141d8dd3165SPavan Nikhilesh 142d8dd3165SPavan Nikhilesh /* Timeout */ 143d8dd3165SPavan Nikhilesh if (wait <= 0) { 144d8dd3165SPavan Nikhilesh res = -ETIMEDOUT; 145d8dd3165SPavan Nikhilesh goto error; 146d8dd3165SPavan Nikhilesh } 147d8dd3165SPavan Nikhilesh 148d8dd3165SPavan Nikhilesh /* Tag mismatch */ 149d8dd3165SPavan Nikhilesh if (m->tag_own != rx_hdr.tag) { 150d8dd3165SPavan Nikhilesh res = -EINVAL; 151d8dd3165SPavan Nikhilesh goto error; 152d8dd3165SPavan Nikhilesh } 153d8dd3165SPavan Nikhilesh 154d8dd3165SPavan Nikhilesh /* PF nacked the msg */ 155d8dd3165SPavan Nikhilesh if (rx_hdr.res_code != MBOX_RET_SUCCESS) { 156d8dd3165SPavan Nikhilesh res = -EBADMSG; 157d8dd3165SPavan Nikhilesh goto error; 158d8dd3165SPavan Nikhilesh } 159d8dd3165SPavan Nikhilesh 160d8dd3165SPavan Nikhilesh len = RTE_MIN(rx_hdr.len, rxsize); 161d8dd3165SPavan Nikhilesh if (rxmsg) 162d8dd3165SPavan Nikhilesh mbox_msgcpy(rxmsg, ram_mbox_msg, len); 163d8dd3165SPavan Nikhilesh 164d8dd3165SPavan Nikhilesh return len; 165d8dd3165SPavan Nikhilesh 166d8dd3165SPavan Nikhilesh error: 167d8dd3165SPavan Nikhilesh mbox_log_err("Failed to send mbox(%d/%d) coproc=%d msg=%d ret=(%d,%d)", 168d8dd3165SPavan Nikhilesh m->tag_own, rx_hdr.tag, hdr->coproc, hdr->msg, res, 169d8dd3165SPavan Nikhilesh hdr->res_code); 170d8dd3165SPavan Nikhilesh return res; 171d8dd3165SPavan Nikhilesh } 172d8dd3165SPavan Nikhilesh 173d8dd3165SPavan Nikhilesh static inline int 174d8dd3165SPavan Nikhilesh mbox_send(struct mbox *m, struct octeontx_mbox_hdr *hdr, const void *txmsg, 175d8dd3165SPavan Nikhilesh uint16_t txsize, void *rxmsg, uint16_t rxsize) 176d8dd3165SPavan Nikhilesh { 177d8dd3165SPavan Nikhilesh int res = -EINVAL; 178d8dd3165SPavan Nikhilesh 179d8dd3165SPavan Nikhilesh if (m->init_once == 0 || hdr == NULL || 180d8dd3165SPavan Nikhilesh txsize > MAX_RAM_MBOX_LEN || rxsize > MAX_RAM_MBOX_LEN) { 181d8dd3165SPavan Nikhilesh mbox_log_err("Invalid init_once=%d hdr=%p txsz=%d rxsz=%d", 182d8dd3165SPavan Nikhilesh m->init_once, hdr, txsize, rxsize); 183d8dd3165SPavan Nikhilesh return res; 184d8dd3165SPavan Nikhilesh } 185d8dd3165SPavan Nikhilesh 186d8dd3165SPavan Nikhilesh rte_spinlock_lock(&m->lock); 187d8dd3165SPavan Nikhilesh 188d8dd3165SPavan Nikhilesh mbox_send_request(m, hdr, txmsg, txsize); 189d8dd3165SPavan Nikhilesh res = mbox_wait_response(m, hdr, rxmsg, rxsize); 190d8dd3165SPavan Nikhilesh 191d8dd3165SPavan Nikhilesh rte_spinlock_unlock(&m->lock); 192d8dd3165SPavan Nikhilesh return res; 193d8dd3165SPavan Nikhilesh } 194d8dd3165SPavan Nikhilesh 195d8dd3165SPavan Nikhilesh int 196a6d6f0afSPavan Nikhilesh octeontx_mbox_set_ram_mbox_base(uint8_t *ram_mbox_base, uint16_t domain) 197d8dd3165SPavan Nikhilesh { 198d8dd3165SPavan Nikhilesh struct mbox *m = &octeontx_mbox; 199d8dd3165SPavan Nikhilesh 200d8dd3165SPavan Nikhilesh if (m->init_once) 201d8dd3165SPavan Nikhilesh return -EALREADY; 202d8dd3165SPavan Nikhilesh 203d8dd3165SPavan Nikhilesh if (ram_mbox_base == NULL) { 204d8dd3165SPavan Nikhilesh mbox_log_err("Invalid ram_mbox_base=%p", ram_mbox_base); 205d8dd3165SPavan Nikhilesh return -EINVAL; 206d8dd3165SPavan Nikhilesh } 207d8dd3165SPavan Nikhilesh 208d8dd3165SPavan Nikhilesh m->ram_mbox_base = ram_mbox_base; 209d8dd3165SPavan Nikhilesh 210d8dd3165SPavan Nikhilesh if (m->reg != NULL) { 211d8dd3165SPavan Nikhilesh rte_spinlock_init(&m->lock); 212d8dd3165SPavan Nikhilesh m->init_once = 1; 213a6d6f0afSPavan Nikhilesh m->domain = domain; 214d8dd3165SPavan Nikhilesh } 215d8dd3165SPavan Nikhilesh 216d8dd3165SPavan Nikhilesh return 0; 217d8dd3165SPavan Nikhilesh } 218d8dd3165SPavan Nikhilesh 219d8dd3165SPavan Nikhilesh int 220a6d6f0afSPavan Nikhilesh octeontx_mbox_set_reg(uint8_t *reg, uint16_t domain) 221d8dd3165SPavan Nikhilesh { 222d8dd3165SPavan Nikhilesh struct mbox *m = &octeontx_mbox; 223d8dd3165SPavan Nikhilesh 224d8dd3165SPavan Nikhilesh if (m->init_once) 225d8dd3165SPavan Nikhilesh return -EALREADY; 226d8dd3165SPavan Nikhilesh 227d8dd3165SPavan Nikhilesh if (reg == NULL) { 228d8dd3165SPavan Nikhilesh mbox_log_err("Invalid reg=%p", reg); 229d8dd3165SPavan Nikhilesh return -EINVAL; 230d8dd3165SPavan Nikhilesh } 231d8dd3165SPavan Nikhilesh 232d8dd3165SPavan Nikhilesh m->reg = reg; 233d8dd3165SPavan Nikhilesh 234d8dd3165SPavan Nikhilesh if (m->ram_mbox_base != NULL) { 235d8dd3165SPavan Nikhilesh rte_spinlock_init(&m->lock); 236d8dd3165SPavan Nikhilesh m->init_once = 1; 237a6d6f0afSPavan Nikhilesh m->domain = domain; 238d8dd3165SPavan Nikhilesh } 239d8dd3165SPavan Nikhilesh 240d8dd3165SPavan Nikhilesh return 0; 241d8dd3165SPavan Nikhilesh } 242d8dd3165SPavan Nikhilesh 243d8dd3165SPavan Nikhilesh int 244d8dd3165SPavan Nikhilesh octeontx_mbox_send(struct octeontx_mbox_hdr *hdr, void *txdata, 245d8dd3165SPavan Nikhilesh uint16_t txlen, void *rxdata, uint16_t rxlen) 246d8dd3165SPavan Nikhilesh { 247d8dd3165SPavan Nikhilesh struct mbox *m = &octeontx_mbox; 248d8dd3165SPavan Nikhilesh 249d8dd3165SPavan Nikhilesh RTE_BUILD_BUG_ON(sizeof(struct mbox_ram_hdr) != 8); 250d8dd3165SPavan Nikhilesh if (rte_eal_process_type() != RTE_PROC_PRIMARY) 251d8dd3165SPavan Nikhilesh return -EINVAL; 252d8dd3165SPavan Nikhilesh 253d8dd3165SPavan Nikhilesh return mbox_send(m, hdr, txdata, txlen, rxdata, rxlen); 254d8dd3165SPavan Nikhilesh } 255b4134b2dSPavan Nikhilesh 256b4134b2dSPavan Nikhilesh static int 257b4134b2dSPavan Nikhilesh octeontx_start_domain(void) 258b4134b2dSPavan Nikhilesh { 259b4134b2dSPavan Nikhilesh struct octeontx_mbox_hdr hdr = {0}; 260b4134b2dSPavan Nikhilesh int result = -EINVAL; 261b4134b2dSPavan Nikhilesh 262b4134b2dSPavan Nikhilesh hdr.coproc = NO_COPROC; 263b4134b2dSPavan Nikhilesh hdr.msg = RM_START_APP; 264b4134b2dSPavan Nikhilesh 265b4134b2dSPavan Nikhilesh result = octeontx_mbox_send(&hdr, NULL, 0, NULL, 0); 266b4134b2dSPavan Nikhilesh if (result != 0) { 267*f665790aSDavid Marchand mbox_log_err("Could not start domain. Err=%d. FuncErr=%d", 268b4134b2dSPavan Nikhilesh result, hdr.res_code); 269b4134b2dSPavan Nikhilesh result = -EINVAL; 270b4134b2dSPavan Nikhilesh } 271b4134b2dSPavan Nikhilesh 272b4134b2dSPavan Nikhilesh return result; 273b4134b2dSPavan Nikhilesh } 274b4134b2dSPavan Nikhilesh 275b4134b2dSPavan Nikhilesh static int 276838d9439SPavan Nikhilesh octeontx_check_mbox_version(struct mbox_intf_ver *app_intf_ver, 277b4134b2dSPavan Nikhilesh struct mbox_intf_ver *intf_ver) 278b4134b2dSPavan Nikhilesh { 279b4134b2dSPavan Nikhilesh struct mbox_intf_ver kernel_intf_ver = {0}; 280b4134b2dSPavan Nikhilesh struct octeontx_mbox_hdr hdr = {0}; 281b4134b2dSPavan Nikhilesh int result = 0; 282b4134b2dSPavan Nikhilesh 283b4134b2dSPavan Nikhilesh 284b4134b2dSPavan Nikhilesh hdr.coproc = NO_COPROC; 285b4134b2dSPavan Nikhilesh hdr.msg = RM_INTERFACE_VERSION; 286b4134b2dSPavan Nikhilesh 287838d9439SPavan Nikhilesh result = octeontx_mbox_send(&hdr, app_intf_ver, 288838d9439SPavan Nikhilesh sizeof(struct mbox_intf_ver), 289b4134b2dSPavan Nikhilesh &kernel_intf_ver, sizeof(kernel_intf_ver)); 290b4134b2dSPavan Nikhilesh if (result != sizeof(kernel_intf_ver)) { 291*f665790aSDavid Marchand mbox_log_err("Could not send interface version. Err=%d. FuncErr=%d", 292b4134b2dSPavan Nikhilesh result, hdr.res_code); 293b4134b2dSPavan Nikhilesh result = -EINVAL; 294b4134b2dSPavan Nikhilesh } 295b4134b2dSPavan Nikhilesh 296b4134b2dSPavan Nikhilesh if (intf_ver) 297b4134b2dSPavan Nikhilesh *intf_ver = kernel_intf_ver; 298b4134b2dSPavan Nikhilesh 299838d9439SPavan Nikhilesh if (app_intf_ver->platform != kernel_intf_ver.platform || 300838d9439SPavan Nikhilesh app_intf_ver->major != kernel_intf_ver.major || 301838d9439SPavan Nikhilesh app_intf_ver->minor != kernel_intf_ver.minor) 302b4134b2dSPavan Nikhilesh result = -EINVAL; 303b4134b2dSPavan Nikhilesh 304b4134b2dSPavan Nikhilesh return result; 305b4134b2dSPavan Nikhilesh } 306b4134b2dSPavan Nikhilesh 307b4134b2dSPavan Nikhilesh int 308b4134b2dSPavan Nikhilesh octeontx_mbox_init(void) 309b4134b2dSPavan Nikhilesh { 310838d9439SPavan Nikhilesh struct mbox_intf_ver MBOX_INTERFACE_VERSION = { 311b4134b2dSPavan Nikhilesh .platform = 0x01, 312b4134b2dSPavan Nikhilesh .major = 0x01, 313b4134b2dSPavan Nikhilesh .minor = 0x03 314b4134b2dSPavan Nikhilesh }; 315b4134b2dSPavan Nikhilesh struct mbox_intf_ver rm_intf_ver = {0}; 316b4134b2dSPavan Nikhilesh struct mbox *m = &octeontx_mbox; 317b4134b2dSPavan Nikhilesh int ret; 318b4134b2dSPavan Nikhilesh 319b4134b2dSPavan Nikhilesh if (m->ready) 320b4134b2dSPavan Nikhilesh return 0; 321b4134b2dSPavan Nikhilesh 322b4134b2dSPavan Nikhilesh ret = octeontx_start_domain(); 323b4134b2dSPavan Nikhilesh if (ret < 0) { 324b4134b2dSPavan Nikhilesh m->init_once = 0; 325b4134b2dSPavan Nikhilesh return ret; 326b4134b2dSPavan Nikhilesh } 327b4134b2dSPavan Nikhilesh 328838d9439SPavan Nikhilesh ret = octeontx_check_mbox_version(&MBOX_INTERFACE_VERSION, 329b4134b2dSPavan Nikhilesh &rm_intf_ver); 330b4134b2dSPavan Nikhilesh if (ret < 0) { 331b4134b2dSPavan Nikhilesh mbox_log_err("MBOX version: Kernel(%d.%d.%d) != DPDK(%d.%d.%d)", 332b4134b2dSPavan Nikhilesh rm_intf_ver.platform, rm_intf_ver.major, 333b4134b2dSPavan Nikhilesh rm_intf_ver.minor, MBOX_INTERFACE_VERSION.platform, 334b4134b2dSPavan Nikhilesh MBOX_INTERFACE_VERSION.major, 335b4134b2dSPavan Nikhilesh MBOX_INTERFACE_VERSION.minor); 336b4134b2dSPavan Nikhilesh m->init_once = 0; 337b4134b2dSPavan Nikhilesh return -EINVAL; 338b4134b2dSPavan Nikhilesh } 339b4134b2dSPavan Nikhilesh 340b4134b2dSPavan Nikhilesh m->ready = 1; 341b4134b2dSPavan Nikhilesh rte_mb(); 342b4134b2dSPavan Nikhilesh 343b4134b2dSPavan Nikhilesh return 0; 344b4134b2dSPavan Nikhilesh } 345a6d6f0afSPavan Nikhilesh 346a6d6f0afSPavan Nikhilesh uint16_t 347a6d6f0afSPavan Nikhilesh octeontx_get_global_domain(void) 348a6d6f0afSPavan Nikhilesh { 349a6d6f0afSPavan Nikhilesh struct mbox *m = &octeontx_mbox; 350a6d6f0afSPavan Nikhilesh 351a6d6f0afSPavan Nikhilesh return m->domain; 352a6d6f0afSPavan Nikhilesh } 353