xref: /dpdk/drivers/common/idpf/base/idpf_controlq.h (revision 9510c5f874f652fcaa3cc6e6d9bce2c0f834a1d2)
1fb4ac04eSJunfeng Guo /* SPDX-License-Identifier: BSD-3-Clause
2*9510c5f8SSoumyadeep Hore  * Copyright(c) 2001-2024 Intel Corporation
3fb4ac04eSJunfeng Guo  */
4fb4ac04eSJunfeng Guo 
5fb4ac04eSJunfeng Guo #ifndef _IDPF_CONTROLQ_H_
6fb4ac04eSJunfeng Guo #define _IDPF_CONTROLQ_H_
7fb4ac04eSJunfeng Guo 
8fb4ac04eSJunfeng Guo #include "idpf_osdep.h"
9fb4ac04eSJunfeng Guo #include "idpf_alloc.h"
10fb4ac04eSJunfeng Guo #include "idpf_controlq_api.h"
11fb4ac04eSJunfeng Guo 
12fb4ac04eSJunfeng Guo /* Maximum buffer lengths for all control queue types */
13fb4ac04eSJunfeng Guo #define IDPF_CTLQ_MAX_RING_SIZE 1024
14fb4ac04eSJunfeng Guo #define IDPF_CTLQ_MAX_BUF_LEN	4096
15fb4ac04eSJunfeng Guo 
16fb4ac04eSJunfeng Guo #define IDPF_CTLQ_DESC(R, i) \
17fb4ac04eSJunfeng Guo 	(&(((struct idpf_ctlq_desc *)((R)->desc_ring.va))[i]))
18fb4ac04eSJunfeng Guo 
19fb4ac04eSJunfeng Guo #define IDPF_CTLQ_DESC_UNUSED(R)					\
20fb4ac04eSJunfeng Guo 	((u16)((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->ring_size) + \
21fb4ac04eSJunfeng Guo 	       (R)->next_to_clean - (R)->next_to_use - 1))
22fb4ac04eSJunfeng Guo 
23fb4ac04eSJunfeng Guo /* Data type manipulation macros. */
24fb4ac04eSJunfeng Guo #define IDPF_HI_DWORD(x)	((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF))
25fb4ac04eSJunfeng Guo #define IDPF_LO_DWORD(x)	((u32)((x) & 0xFFFFFFFF))
26fb4ac04eSJunfeng Guo #define IDPF_HI_WORD(x)		((u16)(((x) >> 16) & 0xFFFF))
27fb4ac04eSJunfeng Guo #define IDPF_LO_WORD(x)		((u16)((x) & 0xFFFF))
28fb4ac04eSJunfeng Guo 
29fb4ac04eSJunfeng Guo /* Control Queue default settings */
30fb4ac04eSJunfeng Guo #define IDPF_CTRL_SQ_CMD_TIMEOUT	250  /* msecs */
31fb4ac04eSJunfeng Guo 
32fb4ac04eSJunfeng Guo struct idpf_ctlq_desc {
33fb4ac04eSJunfeng Guo 	__le16	flags;
34fb4ac04eSJunfeng Guo 	__le16	opcode;
35fb4ac04eSJunfeng Guo 	__le16	datalen;	/* 0 for direct commands */
36fb4ac04eSJunfeng Guo 	union {
37fb4ac04eSJunfeng Guo 		__le16 ret_val;
38fb4ac04eSJunfeng Guo 		__le16 pfid_vfid;
39fb4ac04eSJunfeng Guo #define IDPF_CTLQ_DESC_VF_ID_S	0
40fb4ac04eSJunfeng Guo #ifdef SIMICS_BUILD
41fb4ac04eSJunfeng Guo #define IDPF_CTLQ_DESC_VF_ID_M	(0x3FF << IDPF_CTLQ_DESC_VF_ID_S)
42fb4ac04eSJunfeng Guo #define IDPF_CTLQ_DESC_PF_ID_S	10
43fb4ac04eSJunfeng Guo #define IDPF_CTLQ_DESC_PF_ID_M	(0x3F << IDPF_CTLQ_DESC_PF_ID_S)
44fb4ac04eSJunfeng Guo #else
45fb4ac04eSJunfeng Guo #define IDPF_CTLQ_DESC_VF_ID_M	(0x7FF << IDPF_CTLQ_DESC_VF_ID_S)
46fb4ac04eSJunfeng Guo #define IDPF_CTLQ_DESC_PF_ID_S	11
47fb4ac04eSJunfeng Guo #define IDPF_CTLQ_DESC_PF_ID_M	(0x1F << IDPF_CTLQ_DESC_PF_ID_S)
48fb4ac04eSJunfeng Guo #endif
49fb4ac04eSJunfeng Guo 	};
50fb4ac04eSJunfeng Guo 	__le32 cookie_high;
51fb4ac04eSJunfeng Guo 	__le32 cookie_low;
52fb4ac04eSJunfeng Guo 	union {
53fb4ac04eSJunfeng Guo 		struct {
54fb4ac04eSJunfeng Guo 			__le32 param0;
55fb4ac04eSJunfeng Guo 			__le32 param1;
56fb4ac04eSJunfeng Guo 			__le32 param2;
57fb4ac04eSJunfeng Guo 			__le32 param3;
58fb4ac04eSJunfeng Guo 		} direct;
59fb4ac04eSJunfeng Guo 		struct {
60fb4ac04eSJunfeng Guo 			__le32 param0;
61fb4ac04eSJunfeng Guo 			__le32 param1;
62fb4ac04eSJunfeng Guo 			__le32 addr_high;
63fb4ac04eSJunfeng Guo 			__le32 addr_low;
64fb4ac04eSJunfeng Guo 		} indirect;
65fb4ac04eSJunfeng Guo 		u8 raw[16];
66fb4ac04eSJunfeng Guo 	} params;
67fb4ac04eSJunfeng Guo };
68fb4ac04eSJunfeng Guo 
69fb4ac04eSJunfeng Guo /* Flags sub-structure
70fb4ac04eSJunfeng Guo  * |0  |1  |2  |3  |4  |5  |6  |7  |8  |9  |10 |11 |12 |13 |14 |15 |
71fb4ac04eSJunfeng Guo  * |DD |CMP|ERR|  * RSV *  |FTYPE  | *RSV* |RD |VFC|BUF|  HOST_ID  |
72fb4ac04eSJunfeng Guo  */
73fb4ac04eSJunfeng Guo /* command flags and offsets */
74fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_DD_S		0
75fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_CMP_S		1
76fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_ERR_S		2
77fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_FTYPE_S		6
78fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_RD_S		10
79fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_VFC_S		11
80fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_BUF_S		12
81fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_HOST_ID_S	13
82fb4ac04eSJunfeng Guo 
83fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_DD	BIT(IDPF_CTLQ_FLAG_DD_S)	/* 0x1	  */
84fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_CMP	BIT(IDPF_CTLQ_FLAG_CMP_S)	/* 0x2	  */
85fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_ERR	BIT(IDPF_CTLQ_FLAG_ERR_S)	/* 0x4	  */
86fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_FTYPE_VM	BIT(IDPF_CTLQ_FLAG_FTYPE_S)	/* 0x40	  */
87fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_FTYPE_PF	BIT(IDPF_CTLQ_FLAG_FTYPE_S + 1)	/* 0x80   */
88fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_RD	BIT(IDPF_CTLQ_FLAG_RD_S)	/* 0x400  */
89fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_VFC	BIT(IDPF_CTLQ_FLAG_VFC_S)	/* 0x800  */
90fb4ac04eSJunfeng Guo #define IDPF_CTLQ_FLAG_BUF	BIT(IDPF_CTLQ_FLAG_BUF_S)	/* 0x1000 */
91fb4ac04eSJunfeng Guo 
92fb4ac04eSJunfeng Guo struct idpf_mbxq_desc {
93fb4ac04eSJunfeng Guo 	u8 pad[8];		/* CTLQ flags/opcode/len/retval fields */
94fb4ac04eSJunfeng Guo 	u32 chnl_opcode;	/* avoid confusion with desc->opcode */
95fb4ac04eSJunfeng Guo 	u32 chnl_retval;	/* ditto for desc->retval */
96fb4ac04eSJunfeng Guo 	u32 pf_vf_id;		/* used by CP when sending to PF */
97fb4ac04eSJunfeng Guo };
98fb4ac04eSJunfeng Guo 
99fb4ac04eSJunfeng Guo int idpf_ctlq_alloc_ring_res(struct idpf_hw *hw,
100fb4ac04eSJunfeng Guo 			     struct idpf_ctlq_info *cq);
101fb4ac04eSJunfeng Guo 
102fb4ac04eSJunfeng Guo void idpf_ctlq_dealloc_ring_res(struct idpf_hw *hw, struct idpf_ctlq_info *cq);
103fb4ac04eSJunfeng Guo 
104fb4ac04eSJunfeng Guo /* prototype for functions used for dynamic memory allocation */
105fb4ac04eSJunfeng Guo void *idpf_alloc_dma_mem(struct idpf_hw *hw, struct idpf_dma_mem *mem,
106fb4ac04eSJunfeng Guo 			 u64 size);
107fb4ac04eSJunfeng Guo void idpf_free_dma_mem(struct idpf_hw *hw, struct idpf_dma_mem *mem);
108fb4ac04eSJunfeng Guo #endif /* _IDPF_CONTROLQ_H_ */
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