1e8a63257SHemant Agrawal.. SPDX-License-Identifier: BSD-3-Clause 26c7f491eSEd Czeck Copyright (c) 2015-2021 Atomic Rules LLC 31131cbf0SEd Czeck All rights reserved. 41131cbf0SEd Czeck 51131cbf0SEd CzeckARK Poll Mode Driver 61131cbf0SEd Czeck==================== 71131cbf0SEd Czeck 81131cbf0SEd CzeckThe ARK PMD is a DPDK poll-mode driver for the Atomic Rules Arkville 91131cbf0SEd Czeck(ARK) family of devices. 101131cbf0SEd Czeck 111131cbf0SEd CzeckMore information can be found at the `Atomic Rules website 121131cbf0SEd Czeck<http://atomicrules.com>`_. 131131cbf0SEd Czeck 141131cbf0SEd CzeckOverview 151131cbf0SEd Czeck-------- 161131cbf0SEd Czeck 171131cbf0SEd CzeckThe Atomic Rules Arkville product is DPDK and AXI compliant product 181131cbf0SEd Czeckthat marshals packets across a PCIe conduit between host DPDK mbufs and 191131cbf0SEd CzeckFPGA AXI streams. 201131cbf0SEd Czeck 211131cbf0SEd CzeckThe ARK PMD, and the spirit of the overall Arkville product, 221131cbf0SEd Czeckhas been to take the DPDK API/ABI as a fixed specification; 231131cbf0SEd Czeckthen implement much of the business logic in FPGA RTL circuits. 241131cbf0SEd CzeckThe approach of *working backwards* from the DPDK API/ABI and having 251131cbf0SEd Czeckthe GPP host software *dictate*, while the FPGA hardware *copes*, 261131cbf0SEd Czeckresults in significant performance gains over a naive implementation. 271131cbf0SEd Czeck 281131cbf0SEd CzeckWhile this document describes the ARK PMD software, it is helpful to 291131cbf0SEd Czeckunderstand what the FPGA hardware is and is not. The Arkville RTL 301131cbf0SEd Czeckcomponent provides a single PCIe Physical Function (PF) supporting 311131cbf0SEd Czecksome number of RX/Ingress and TX/Egress Queues. The ARK PMD controls 321131cbf0SEd Czeckthe Arkville core through a dedicated opaque Core BAR (CBAR). 331131cbf0SEd CzeckTo allow users full freedom for their own FPGA application IP, 341131cbf0SEd Czeckan independent FPGA Application BAR (ABAR) is provided. 351131cbf0SEd Czeck 361131cbf0SEd CzeckOne popular way to imagine Arkville's FPGA hardware aspect is as the 371131cbf0SEd CzeckFPGA PCIe-facing side of a so-called Smart NIC. The Arkville core does 381131cbf0SEd Czecknot contain any MACs, and is link-speed independent, as well as 391131cbf0SEd Czeckagnostic to the number of physical ports the application chooses to 401131cbf0SEd Czeckuse. The ARK driver exposes the familiar PMD interface to allow packet 411131cbf0SEd Czeckmovement to and from mbufs across multiple queues. 421131cbf0SEd Czeck 431131cbf0SEd CzeckHowever FPGA RTL applications could contain a universe of added 441131cbf0SEd Czeckfunctionality that an Arkville RTL core does not provide or can 451131cbf0SEd Czecknot anticipate. To allow for this expectation of user-defined 461131cbf0SEd Czeckinnovation, the ARK PMD provides a dynamic mechanism of adding 471131cbf0SEd Czeckcapabilities without having to modify the ARK PMD. 481131cbf0SEd Czeck 491131cbf0SEd CzeckThe ARK PMD is intended to support all instances of the Arkville 501131cbf0SEd CzeckRTL Core, regardless of configuration, FPGA vendor, or target 511131cbf0SEd Czeckboard. While specific capabilities such as number of physical 521131cbf0SEd Czeckhardware queue-pairs are negotiated; the driver is designed to 531131cbf0SEd Czeckremain constant over a broad and extendable feature set. 541131cbf0SEd Czeck 55c6c90ccdSShepard Siegel* FPGA Vendors Supported: AMD/Xilinx and Intel 56c6c90ccdSShepard Siegel* Number of RX/TX Queue-Pairs: up to 128 57c6c90ccdSShepard Siegel* PCIe Endpoint Technology: Gen3, Gen4, Gen5 58c6c90ccdSShepard Siegel 591131cbf0SEd CzeckIntentionally, Arkville by itself DOES NOT provide common NIC 601131cbf0SEd Czeckcapabilities such as offload or receive-side scaling (RSS). 611131cbf0SEd CzeckThese capabilities would be viewed as a gate-level "tax" on 621131cbf0SEd CzeckGreen-box FPGA applications that do not require such function. 631131cbf0SEd CzeckInstead, they can be added as needed with essentially no 641131cbf0SEd Czeckoverhead to the FPGA Application. 651131cbf0SEd Czeck 661131cbf0SEd CzeckThe ARK PMD also supports optional user extensions, through dynamic linking. 671131cbf0SEd CzeckThe ARK PMD user extensions are a feature of Arkville’s DPDK 681131cbf0SEd Czecknet/ark poll mode driver, allowing users to add their 691131cbf0SEd Czeckown code to extend the net/ark functionality without 701131cbf0SEd Czeckhaving to make source code changes to the driver. One motivation for 711131cbf0SEd Czeckthis capability is that while DPDK provides a rich set of functions 721131cbf0SEd Czeckto interact with NIC-like capabilities (e.g. MAC addresses and statistics), 731131cbf0SEd Czeckthe Arkville RTL IP does not include a MAC. Users can supply their 741131cbf0SEd Czeckown MAC or custom FPGA applications, which may require control from 751131cbf0SEd Czeckthe PMD. The user extension is the means providing the control 761131cbf0SEd Czeckbetween the user's FPGA application and the existing DPDK features via 771131cbf0SEd Czeckthe PMD. 781131cbf0SEd Czeck 791131cbf0SEd CzeckDevice Parameters 80c6c90ccdSShepard Siegel----------------- 811131cbf0SEd Czeck 821131cbf0SEd CzeckThe ARK PMD supports device parameters that are used for packet 831131cbf0SEd Czeckrouting and for internal packet generation and packet checking. This 841131cbf0SEd Czecksection describes the supported parameters. These features are 851131cbf0SEd Czeckprimarily used for diagnostics, testing, and performance verification 861131cbf0SEd Czeckunder the guidance of an Arkville specialist. The nominal use of 871131cbf0SEd CzeckArkville does not require any configuration using these parameters. 881131cbf0SEd Czeck 891131cbf0SEd Czeck"Pkt_dir" 901131cbf0SEd Czeck 911131cbf0SEd CzeckThe Packet Director controls connectivity between Arkville's internal 921131cbf0SEd Czeckhardware components. The features of the Pkt_dir are only used for 931131cbf0SEd Czeckdiagnostics and testing; it is not intended for nominal use. The full 941131cbf0SEd Czeckset of features are not published at this level. 951131cbf0SEd Czeck 961131cbf0SEd CzeckFormat: 971131cbf0SEd CzeckPkt_dir=0x00110F10 981131cbf0SEd Czeck 991131cbf0SEd Czeck"Pkt_gen" 1001131cbf0SEd Czeck 1011131cbf0SEd CzeckThe packet generator parameter takes a file as its argument. The file 1021131cbf0SEd Czeckcontains configuration parameters used internally for regression 1031131cbf0SEd Czecktesting and are not intended to be published at this level. The 1041131cbf0SEd Czeckpacket generator is an internal Arkville hardware component. 1051131cbf0SEd Czeck 1061131cbf0SEd CzeckFormat: 1071131cbf0SEd CzeckPkt_gen=./config/pg.conf 1081131cbf0SEd Czeck 1091131cbf0SEd Czeck"Pkt_chkr" 1101131cbf0SEd Czeck 1111131cbf0SEd CzeckThe packet checker parameter takes a file as its argument. The file 1121131cbf0SEd Czeckcontains configuration parameters used internally for regression 1131131cbf0SEd Czecktesting and are not intended to be published at this level. The 1141131cbf0SEd Czeckpacket checker is an internal Arkville hardware component. 1151131cbf0SEd Czeck 1161131cbf0SEd CzeckFormat: 1171131cbf0SEd CzeckPkt_chkr=./config/pc.conf 1181131cbf0SEd Czeck 1191131cbf0SEd Czeck 1201131cbf0SEd CzeckData Path Interface 1211131cbf0SEd Czeck------------------- 1221131cbf0SEd Czeck 1231131cbf0SEd CzeckIngress RX and Egress TX operation is by the nominal DPDK API . 1241131cbf0SEd CzeckThe driver supports single-port, multi-queue for both RX and TX. 1251131cbf0SEd Czeck 1261131cbf0SEd CzeckConfiguration Information 1271131cbf0SEd Czeck------------------------- 1281131cbf0SEd Czeck 12968d99d00SCiara Power**DPDK Configuration Parameter** 1301131cbf0SEd Czeck 131e274fbfeSEd Czeck * **RTE_LIBRTE_ARK_MIN_TX_PKTLEN** (default 0): Sets the minimum 132e274fbfeSEd Czeck packet length for tx packets to the FPGA. Packets less than this 133e274fbfeSEd Czeck length are padded to meet the requirement. This allows padding to 134e274fbfeSEd Czeck be offloaded or remain in host software. 1351131cbf0SEd Czeck 1361131cbf0SEd Czeck 1376c7f491eSEd CzeckDynamic PMD Extension 1386c7f491eSEd Czeck--------------------- 1396c7f491eSEd Czeck 1406c7f491eSEd CzeckDynamic PMD extensions allow users to customize net/ark functionality 1416c7f491eSEd Czeckusing their own code. Arkville RTL and this PMD support high-throughput data 1426c7f491eSEd Czeckmovement, and these extensions allow PMD support for users' FPGA 1436c7f491eSEd Czeckfeatures. 1446c7f491eSEd CzeckDynamic PMD extensions operate by having users supply a shared object 1456c7f491eSEd Czeckfile which is loaded by Arkville PMD during initialization. The 1466c7f491eSEd Czeckobject file contains extension (or hook) functions that are registered 1476c7f491eSEd Czeckand then called during PMD operations. 1486c7f491eSEd Czeck 1496c7f491eSEd CzeckThe allowable set of extension functions are defined and documented in 1506c7f491eSEd Czeck``ark_ext.h``, only the initialization function, 1516c7f491eSEd Czeck``rte_pmd_ark_dev_init()``, is required; all others are optional. The 1526c7f491eSEd Czeckfollowing sections give a small extension example along with 1536c7f491eSEd Czeckinstructions for compiling and using the extension. 1546c7f491eSEd Czeck 1556c7f491eSEd Czeck 1566c7f491eSEd CzeckExtension Example 1576c7f491eSEd Czeck^^^^^^^^^^^^^^^^^ 1586c7f491eSEd Czeck 1596c7f491eSEd CzeckThe following example shows an extension which populates mbuf fields 1606c7f491eSEd Czeckduring RX from user meta data coming from FPGA hardware. 1616c7f491eSEd Czeck 1626c7f491eSEd Czeck.. code-block:: c 1636c7f491eSEd Czeck 1646c7f491eSEd Czeck #include <ark_ext.h> 1656c7f491eSEd Czeck #include <rte_mbuf.h> 1666c7f491eSEd Czeck #include <rte_ethdev.h> 1676c7f491eSEd Czeck #include <rte_malloc.h> 1686c7f491eSEd Czeck 1696c7f491eSEd Czeck /* Global structure passed to extension/hook functions */ 1706c7f491eSEd Czeck struct ark_user_extension { 1716c7f491eSEd Czeck int timestamp_dynfield_offset; 1726c7f491eSEd Czeck }; 1736c7f491eSEd Czeck 1746c7f491eSEd Czeck /* RX tuser field based on user's hardware */ 175*e7750639SAndre Muezerie struct __rte_packed_begin user_rx_meta { 1766c7f491eSEd Czeck uint64_t timestamp; 1776c7f491eSEd Czeck uint32_t rss; 178*e7750639SAndre Muezerie } __rte_packed_end; 1796c7f491eSEd Czeck 1806c7f491eSEd Czeck /* Create ark_user_extension object for use in other hook functions */ 1816c7f491eSEd Czeck void *rte_pmd_ark_dev_init(struct rte_eth_dev * dev, 1826c7f491eSEd Czeck void * abar, int port_id ) 1836c7f491eSEd Czeck { 1846c7f491eSEd Czeck RTE_SET_USED(dev); 1856c7f491eSEd Czeck RTE_SET_USED(abar); 1866c7f491eSEd Czeck fprintf(stderr, "Called Arkville user extension for port %u\n", 1876c7f491eSEd Czeck port_id); 1886c7f491eSEd Czeck 1896c7f491eSEd Czeck struct ark_user_extension *xdata = rte_zmalloc("macExtS", 1906c7f491eSEd Czeck sizeof(struct ark_user_extension), 64); 1916c7f491eSEd Czeck if (!xdata) 1926c7f491eSEd Czeck return NULL; 1936c7f491eSEd Czeck 1946c7f491eSEd Czeck /* register dynfield for rx timestamp */ 1956c7f491eSEd Czeck rte_mbuf_dyn_rx_timestamp_register(&xdata->timestamp_dynfield_offset, 1966c7f491eSEd Czeck NULL); 1976c7f491eSEd Czeck 1986c7f491eSEd Czeck fprintf(stderr, "timestamp fields offset in extension is %d\n", 1996c7f491eSEd Czeck xdata->timestamp_dynfield_offset); 2006c7f491eSEd Czeck return xdata; 2016c7f491eSEd Czeck } 2026c7f491eSEd Czeck 2036c7f491eSEd Czeck /* uninitialization */ 2046c7f491eSEd Czeck void rte_pmd_ark_dev_uninit(struct rte_eth_dev * dev, void *user_data) 2056c7f491eSEd Czeck { 2066c7f491eSEd Czeck rte_free(user_data); 2076c7f491eSEd Czeck } 2086c7f491eSEd Czeck 2096c7f491eSEd Czeck /* Hook function -- called for each RX packet 2106c7f491eSEd Czeck * Extract RX timestamp and RSS from meta and place in mbuf 2116c7f491eSEd Czeck */ 2126c7f491eSEd Czeck void rte_pmd_ark_rx_user_meta_hook(struct rte_mbuf *mbuf, 2136c7f491eSEd Czeck const uint32_t *meta, 2146c7f491eSEd Czeck void *user_data) 2156c7f491eSEd Czeck { 2166c7f491eSEd Czeck struct ark_user_extension *xdata = user_data; 2176c7f491eSEd Czeck struct user_rx_meta *user_rx = (struct user_rx_meta*)meta; 2186c7f491eSEd Czeck *RTE_MBUF_DYNFIELD(mbuf, xdata->timestamp_dynfield_offset, uint64_t*) = 2196c7f491eSEd Czeck user_rx->timestamp; 2206c7f491eSEd Czeck mbuf->hash.rss = user_rx->rss; 2216c7f491eSEd Czeck } 2226c7f491eSEd Czeck 2236c7f491eSEd Czeck 2246c7f491eSEd CzeckCompiling Extension 2256c7f491eSEd Czeck^^^^^^^^^^^^^^^^^^^ 2266c7f491eSEd Czeck 2276c7f491eSEd CzeckIt is recommended to the compile the extension code with 2286c7f491eSEd Czeck``-Wmissing-prototypes`` flag to insure correct function types. Typical 2296c7f491eSEd CzeckDPDK options will also be needed. 2306c7f491eSEd Czeck 2316c7f491eSEd Czeck 2326c7f491eSEd CzeckAn example command line is give below 2336c7f491eSEd Czeck 2346c7f491eSEd Czeck.. code-block:: console 2356c7f491eSEd Czeck 2366c7f491eSEd Czeck cc `pkg-config --cflags libdpdk` \ 2376c7f491eSEd Czeck -O3 -DALLOW_EXPERIMENTAL_API -fPIC -Wall -Wmissing-prototypes -c \ 2386c7f491eSEd Czeck -o pmd_net_ark_ext.o pmd_net_ark_ext.c 2396c7f491eSEd Czeck # Linking 2406c7f491eSEd Czeck cc -o libfx1_100g_ext.so.1 -shared \ 2416c7f491eSEd Czeck `pkg-config --libs libdpdk` \ 2426c7f491eSEd Czeck -Wl,--unresolved-symbols=ignore-all \ 2436c7f491eSEd Czeck -Wl,-soname,libpmd_net_ark_ext.so.1 pmd_net_ark_ext.o 2446c7f491eSEd Czeck 2456c7f491eSEd CzeckIn a ``Makefile`` this would be 2466c7f491eSEd Czeck 2476c7f491eSEd Czeck.. code-block:: Makefile 2486c7f491eSEd Czeck 2496c7f491eSEd Czeck CFLAGS += $(shell pkg-config --cflags libdpdk) 2506c7f491eSEd Czeck CFLAGS += -O3 -DALLOW_EXPERIMENTAL_API -fPIC -Wall -Wmissing-prototypes 2516c7f491eSEd Czeck # Linking 2526c7f491eSEd Czeck LDFLAGS += $(shell pkg-config --libs libdpdk) 2536c7f491eSEd Czeck LDFLAGS += -Wl,--unresolved-symbols=ignore-all -Wl,-soname,libpmd_net_ark_ext.so.1 2546c7f491eSEd Czeck 2556c7f491eSEd CzeckThe application must be linked with the ``-export-dynamic`` flags if any 2566c7f491eSEd CzeckDPDK or application specific code will called from the extension. 2576c7f491eSEd Czeck 2586c7f491eSEd Czeck 2596c7f491eSEd CzeckEnabling Extension 2606c7f491eSEd Czeck^^^^^^^^^^^^^^^^^^ 2616c7f491eSEd Czeck 2626c7f491eSEd CzeckThe extensions are enabled in the application through the use of an 2636c7f491eSEd Czeckenvironment variable ``ARK_EXT_PATH`` This variable points to the lib 2646c7f491eSEd Czeckextension file generated above. For example: 2656c7f491eSEd Czeck 2666c7f491eSEd Czeck.. code-block:: console 2676c7f491eSEd Czeck 2686c7f491eSEd Czeck export ARK_EXT_PATH=$(PWD)/libpmd_net_ark_ext.so.1 2696c7f491eSEd Czeck testpmd ... 2706c7f491eSEd Czeck 2716c7f491eSEd Czeck 2721131cbf0SEd CzeckBuilding DPDK 2731131cbf0SEd Czeck------------- 2741131cbf0SEd Czeck 2751131cbf0SEd CzeckSee the :ref:`DPDK Getting Started Guide for Linux <linux_gsg>` for 2761131cbf0SEd Czeckinstructions on how to build DPDK. 2771131cbf0SEd Czeck 2781131cbf0SEd CzeckBy default the ARK PMD library will be built into the DPDK library. 2791131cbf0SEd Czeck 2801131cbf0SEd CzeckFor configuring and using UIO and VFIO frameworks, please also refer :ref:`the 2811131cbf0SEd Czeckdocumentation that comes with DPDK suite <linux_gsg>`. 2821131cbf0SEd Czeck 283e274fbfeSEd CzeckTo build with a non-zero minimum tx packet length, set the above macro in your 284e274fbfeSEd CzeckCFLAGS environment prior to the meson build step. I.e., 285e274fbfeSEd Czeck 2866c7f491eSEd Czeck.. code-block:: console 2876c7f491eSEd Czeck 288e274fbfeSEd Czeck export CFLAGS="-DRTE_LIBRTE_ARK_MIN_TX_PKTLEN=60" 289e24b8ad4SStephen Hemminger meson setup build 290e274fbfeSEd Czeck 291e274fbfeSEd Czeck 2921131cbf0SEd CzeckSupported ARK RTL PCIe Instances 2931131cbf0SEd Czeck-------------------------------- 2941131cbf0SEd Czeck 2951131cbf0SEd CzeckARK PMD supports the following Arkville RTL PCIe instances including: 2961131cbf0SEd Czeck 2971131cbf0SEd Czeck* ``1d6c:100d`` - AR-ARKA-FX0 [Arkville 32B DPDK Data Mover] 2981131cbf0SEd Czeck* ``1d6c:100e`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover] 2999ee9e0d3SEd Czeck* ``1d6c:100f`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Versal] 3009ee9e0d3SEd Czeck* ``1d6c:1010`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Agilex] 3019ee9e0d3SEd Czeck* ``1d6c:1017`` - AR-ARK-FX1 [Arkville 64B Multi-Homed Primary Endpoint] 3029ee9e0d3SEd Czeck* ``1d6c:1018`` - AR-ARK-FX1 [Arkville 64B Multi-Homed Secondary Endpoint] 3039ee9e0d3SEd Czeck* ``1d6c:1019`` - AR-ARK-FX1 [Arkville 64B Multi-Homed Tertiary Endpoint] 304b5c58298SEd Czeck* ``1d6c:101a`` - AR-ARK-SRIOV-FX0 [Arkville 32B Primary Physical Function] 305b5c58298SEd Czeck* ``1d6c:101b`` - AR-ARK-SRIOV-FX1 [Arkville 64B Primary Physical Function] 306b5c58298SEd Czeck* ``1d6c:101c`` - AR-ARK-SRIOV-VF [Arkville Virtual Function] 30751ec6c74SJohn Miller* ``1d6c:101e`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Agilex R-Tile] 30851ec6c74SJohn Miller* ``1d6c:101f`` - AR-TK242 [2x100GbE Packet Capture Device] 309cdfaa85eSShepard Siegel* ``1d6c:1022`` - AR-ARKA-FX2 [Arkville 128B DPDK Data Mover for Agilex] 310a861d5a2SEd Czeck* ``1d6c:1024`` - AR-TK242 [2x100GbE Packet Capture Device] 311a861d5a2SEd Czeck* ``1d6c:1025`` - AR-TK242-FX2 [2x100GbE Gen5 Packet Capture Device] 312a861d5a2SEd Czeck* ``1d6c:1026`` - AR-TK242-FX2 [1x200GbE Gen5 Packet Capture Device] 3131131cbf0SEd Czeck 314c6c90ccdSShepard SiegelArkville RTL Core Configurations 315c6c90ccdSShepard Siegel-------------------------------- 316c6c90ccdSShepard Siegel 317c6c90ccdSShepard SiegelArkville's RTL core may be configured by the user with different 318c6c90ccdSShepard Siegeldatapath widths to balance throughput against FPGA logic area. 319c6c90ccdSShepard SiegelThe ARK PMD has introspection on the RTL core configuration and acts accordingly. 320c6c90ccdSShepard SiegelAll Arkville configurations present identical RTL user-facing AXI 321c6c90ccdSShepard Siegelstream interfaces for both AMD/Xilinx and Intel FPGAs. 322c6c90ccdSShepard Siegel 323c6c90ccdSShepard Siegel* ARK-FX0 - 256-bit 32B datapath (PCIe Gen3, Gen4) 324c6c90ccdSShepard Siegel* ARK-FX1 - 512-bit 64B datapath (PCIe Gen3, Gen4, Gen5) 325cdfaa85eSShepard Siegel* ARK-FX2 - 1024-bit 128B datapath (PCIe Gen5x16 Only) 326c6c90ccdSShepard Siegel 327c8eaa414SEd CzeckDPDK and Arkville Firmware Versioning 328c8eaa414SEd Czeck------------------------------------- 329c8eaa414SEd Czeck 330c8eaa414SEd CzeckArkville's firmware releases and its PMD have version dependencies which 331c8eaa414SEd Czeckmust be stepped together at certain releases. PMD code ensures the 332c8eaa414SEd Czeckversions are compatible. The following lists shows where version 333c8eaa414SEd Czeckcompatible steps have occurred between DPDK releases and the corresponding 334c8eaa414SEd CzeckArkville releases. Intermediate releases not listed below remain 335c8eaa414SEd Czeckcompatible, e.g., DPDK releases 21.05, 21.08, and 21.11 are all compatible 336c8eaa414SEd Czeckwith Arkville releases 21.05, 21.08 and 21.11. LTS versions of DPDK remain 337c8eaa414SEd Czeckcompatible with the corresponding Arkville version. If other combinations 338c8eaa414SEd Czeckare required, please contact Atomic Rules support. 339c8eaa414SEd Czeck 340664cb3b2SEd Czeck* DPDK 23.11 requires Arkville 23.11. 341c8eaa414SEd Czeck* DPDK 22.07 requires Arkville 22.07. 342c8eaa414SEd Czeck* DPDK 22.03 requires Arkville 22.03. 343c8eaa414SEd Czeck* DPDK 21.05 requires Arkville 21.05. 344c8eaa414SEd Czeck* DPDK 18.11 requires Arkville 18.11. 345c8eaa414SEd Czeck* DPDK 17.05 requires Arkville 17.05 -- initial version. 346c8eaa414SEd Czeck 3471131cbf0SEd CzeckSupported Operating Systems 3481131cbf0SEd Czeck--------------------------- 3491131cbf0SEd Czeck 3501131cbf0SEd CzeckAny Linux distribution fulfilling the conditions described in ``System Requirements`` 3511131cbf0SEd Czecksection of :ref:`the DPDK documentation <linux_gsg>` or refer to *DPDK 3521131cbf0SEd CzeckRelease Notes*. ARM and PowerPC architectures are not supported at this time. 3531131cbf0SEd Czeck 3541131cbf0SEd Czeck 3551131cbf0SEd CzeckSupported Features 3561131cbf0SEd Czeck------------------ 3571131cbf0SEd Czeck 3581131cbf0SEd Czeck* Dynamic ARK PMD extensions 359c6c90ccdSShepard Siegel* Dynamic per-queue MBUF (re)sizing up to 32KB 3607feae720SStephen Hemminger* SR-IOV, VF-based queue-separation 3611131cbf0SEd Czeck* Multiple receive and transmit queues 3621131cbf0SEd Czeck* Jumbo frames up to 9K 3631131cbf0SEd Czeck* Hardware Statistics 3641131cbf0SEd Czeck 3651131cbf0SEd CzeckUnsupported Features 3661131cbf0SEd Czeck-------------------- 3671131cbf0SEd Czeck 3681131cbf0SEd CzeckFeatures that may be part of, or become part of, the Arkville RTL IP that are 3691131cbf0SEd Czecknot currently supported or exposed by the ARK PMD include: 3701131cbf0SEd Czeck 3711131cbf0SEd Czeck* Arkville's Packet Generator Control and Status 3721131cbf0SEd Czeck* Arkville's Packet Director Control and Status 3731131cbf0SEd Czeck* Arkville's Packet Checker Control and Status 3741131cbf0SEd Czeck* Arkville's Timebase Management 3751131cbf0SEd Czeck 3761131cbf0SEd CzeckPre-Requisites 3771131cbf0SEd Czeck-------------- 3781131cbf0SEd Czeck 3791131cbf0SEd Czeck#. Prepare the system as recommended by DPDK suite. This includes environment 3801131cbf0SEd Czeck variables, hugepages configuration, tool-chains and configuration 3811131cbf0SEd Czeck 3821131cbf0SEd Czeck#. Insert igb_uio kernel module using the command 'modprobe igb_uio' 3831131cbf0SEd Czeck 3841131cbf0SEd Czeck#. Bind the intended ARK device to igb_uio module 3851131cbf0SEd Czeck 3861131cbf0SEd CzeckAt this point the system should be ready to run DPDK applications. Once the 3871131cbf0SEd Czeckapplication runs to completion, the ARK PMD can be detached from igb_uio if necessary. 3881131cbf0SEd Czeck 3891131cbf0SEd CzeckUsage Example 3901131cbf0SEd Czeck------------- 3911131cbf0SEd Czeck 3921cbf25e3SShijith ThottonFollow instructions available in the document 3931cbf25e3SShijith Thotton:ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>` to launch 3948809f78cSBruce Richardson**testpmd** with Atomic Rules ARK devices managed by librte_net_ark. 3951131cbf0SEd Czeck 3961131cbf0SEd CzeckExample output: 3971131cbf0SEd Czeck 3981131cbf0SEd Czeck.. code-block:: console 3991131cbf0SEd Czeck 4001131cbf0SEd Czeck [...] 4011131cbf0SEd Czeck EAL: PCI device 0000:01:00.0 on NUMA socket -1 4021131cbf0SEd Czeck EAL: probe driver: 1d6c:100e rte_ark_pmd 4031131cbf0SEd Czeck EAL: PCI memory mapped at 0x7f9b6c400000 4041131cbf0SEd Czeck PMD: eth_ark_dev_init(): Initializing 0:2:0.1 4051131cbf0SEd Czeck ARKP PMD CommitID: 378f3a67 4061131cbf0SEd Czeck Configuring Port 0 (socket 0) 4071131cbf0SEd Czeck Port 0: DC:3C:F6:00:00:01 4081131cbf0SEd Czeck Checking link statuses... 4091131cbf0SEd Czeck Port 0 Link Up - speed 100000 Mbps - full-duplex 4101131cbf0SEd Czeck Done 4111131cbf0SEd Czeck testpmd> 412