xref: /dpdk/doc/guides/bbdevs/acc100.rst (revision 70ce9eb4aac6724bb647da49067aaefbf80a9320)
1db7949bdSNicolas Chautru..  SPDX-License-Identifier: BSD-3-Clause
2db7949bdSNicolas Chautru    Copyright(c) 2020 Intel Corporation
3db7949bdSNicolas Chautru
4*70ce9eb4SHernan VargasIntel(R) ACC100 5G/4G FEC Poll Mode Drivers
5e4665812SNicolas Chautru======================================================
6db7949bdSNicolas Chautru
7db7949bdSNicolas ChautruThe BBDEV ACC100 5G/4G FEC poll mode driver (PMD) supports an
8db7949bdSNicolas Chautruimplementation of a VRAN FEC wireless acceleration function.
9db7949bdSNicolas ChautruThis device is also known as Mount Bryce.
10db7949bdSNicolas Chautru
11db7949bdSNicolas ChautruFeatures
12db7949bdSNicolas Chautru--------
13db7949bdSNicolas Chautru
14*70ce9eb4SHernan VargasACC100 5G/4G FEC PMDs support the following features:
15db7949bdSNicolas Chautru
16db7949bdSNicolas Chautru- LDPC Encode in the DL (5GNR)
17db7949bdSNicolas Chautru- LDPC Decode in the UL (5GNR)
18db7949bdSNicolas Chautru- Turbo Encode in the DL (4G)
19db7949bdSNicolas Chautru- Turbo Decode in the UL (4G)
20db7949bdSNicolas Chautru- 16 VFs per PF (physical device)
21db7949bdSNicolas Chautru- Maximum of 128 queues per VF
22db7949bdSNicolas Chautru- PCIe Gen-3 x16 Interface
23db7949bdSNicolas Chautru- MSI
24db7949bdSNicolas Chautru- SR-IOV
25db7949bdSNicolas Chautru
26*70ce9eb4SHernan VargasACC100 5G/4G FEC PMDs support the following BBDEV capabilities:
27db7949bdSNicolas Chautru
28db7949bdSNicolas Chautru* For the LDPC encode operation:
29db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_CRC_24B_ATTACH`` :  set to attach CRC24B to CB(s)
30db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_RATE_MATCH`` :  if set then do not do Rate Match bypass
31db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_INTERLEAVER_BYPASS`` : if set then bypass interleaver
32db7949bdSNicolas Chautru
33db7949bdSNicolas Chautru* For the LDPC decode operation:
34db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK`` :  check CRC24B from CB(s)
35db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE`` :  disable early termination
36db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP`` :  drops CRC24B bits appended while decoding
37db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE`` :  provides an input for HARQ combining
38db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE`` :  provides an input for HARQ combining
39db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE`` :  HARQ memory input is internal
40db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE`` :  HARQ memory output is internal
41db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK`` :  loopback data to/from HARQ memory
42db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS`` :  HARQ memory includes the fillers bits
43db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_DEC_SCATTER_GATHER`` :  supports scatter-gather for input/output data
44db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION`` :  supports compression of the HARQ input/output
45db7949bdSNicolas Chautru   - ``RTE_BBDEV_LDPC_LLR_COMPRESSION`` :  supports LLR input compression
46db7949bdSNicolas Chautru
47db7949bdSNicolas Chautru* For the turbo encode operation:
48db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_CRC_24B_ATTACH`` :  set to attach CRC24B to CB(s)
49db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_RATE_MATCH`` :  if set then do not do Rate Match bypass
50db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_ENC_INTERRUPTS`` :  set for encoder dequeue interrupts
51db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_RV_INDEX_BYPASS`` :  set to bypass RV index
52db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_ENC_SCATTER_GATHER`` :  supports scatter-gather for input/output data
53db7949bdSNicolas Chautru
54db7949bdSNicolas Chautru* For the turbo decode operation:
55db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_CRC_TYPE_24B`` :  check CRC24B from CB(s)
56db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE`` :  perform subblock de-interleave
57db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_DEC_INTERRUPTS`` :  set for decoder dequeue interrupts
58db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN`` :  set if negative LLR encoder i/p is supported
59db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_POS_LLR_1_BIT_IN`` :  set if positive LLR encoder i/p is supported
60db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP`` :  keep CRC24B bits appended while decoding
61765f42f1SNicolas Chautru   - ``RTE_BBDEV_TURBO_DEC_CRC_24B_DROP`` : option to drop the code block CRC after decoding
62db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_EARLY_TERMINATION`` :  set early termination feature
63db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_DEC_SCATTER_GATHER`` :  supports scatter-gather for input/output data
64db7949bdSNicolas Chautru   - ``RTE_BBDEV_TURBO_HALF_ITERATION_EVEN`` :  set half iteration granularity
65db7949bdSNicolas Chautru
664afc627fSHernan Vargas* PMD-specific build flags:
674afc627fSHernan Vargas  The ACC100 PMD includes some optional build flags which may be used for troubleshooting.
684afc627fSHernan Vargas  Recommended build configuration is for these to be kept as default.
694afc627fSHernan Vargas  - ``RTE_LIBRTE_BBDEV_SKIP_VALIDATE``: option to skip API input validation.
704afc627fSHernan Vargas  Recommended value is to keep the validation enabled by default
714afc627fSHernan Vargas  as a protection for negative scenarios at a cost of some cycles
724afc627fSHernan Vargas  spent to enforce these checks.
7339fe62d0SHernan Vargas  - ``ACC100_EXT_MEM``: default option with memory external to CPU on the PCIe card DDR itself.
7439fe62d0SHernan Vargas  Alternative build option will use CPU memory (not recommended).
754afc627fSHernan Vargas
764afc627fSHernan Vargas
77db7949bdSNicolas ChautruInstallation
78db7949bdSNicolas Chautru------------
79db7949bdSNicolas Chautru
8007a2a572SCiara PowerSection 3 of the DPDK manual provides instructions on installing and compiling DPDK.
81db7949bdSNicolas Chautru
82db7949bdSNicolas ChautruDPDK requires hugepages to be configured as detailed in section 2 of the DPDK manual.
83db7949bdSNicolas ChautruThe bbdev test application has been tested with a configuration 40 x 1GB hugepages. The
84db7949bdSNicolas Chautruhugepage configuration of a server may be examined using:
85db7949bdSNicolas Chautru
86db7949bdSNicolas Chautru.. code-block:: console
87db7949bdSNicolas Chautru
88db7949bdSNicolas Chautru   grep Huge* /proc/meminfo
89db7949bdSNicolas Chautru
90db7949bdSNicolas Chautru
91db7949bdSNicolas ChautruInitialization
92db7949bdSNicolas Chautru--------------
93db7949bdSNicolas Chautru
94e4665812SNicolas ChautruWhen the device first powers up, its PCI Physical Functions (PF) can be listed through these
95*70ce9eb4SHernan Vargascommands for ACC100:
96db7949bdSNicolas Chautru
97db7949bdSNicolas Chautru.. code-block:: console
98db7949bdSNicolas Chautru
99db7949bdSNicolas Chautru  sudo lspci -vd8086:0d5c
100db7949bdSNicolas Chautru
101db7949bdSNicolas ChautruThe physical and virtual functions are compatible with Linux UIO drivers:
10233f32941SDavid Marchand``vfio_pci`` and ``igb_uio``. However, in order to work the 5G/4G
103db7949bdSNicolas ChautruFEC device first needs to be bound to one of these linux drivers through DPDK.
104db7949bdSNicolas Chautru
10533f32941SDavid MarchandFor more details on how to bind the PF device and create VF devices, see
10633f32941SDavid Marchand:ref:`linux_gsg_binding_kernel`.
107db7949bdSNicolas Chautru
108db7949bdSNicolas Chautru
109db7949bdSNicolas ChautruConfigure the VFs through PF
110db7949bdSNicolas Chautru~~~~~~~~~~~~~~~~~~~~~~~~~~~~
111db7949bdSNicolas Chautru
112db7949bdSNicolas ChautruThe PCI virtual functions must be configured before working or getting assigned
113db7949bdSNicolas Chautruto VMs/Containers. The configuration involves allocating the number of hardware
114db7949bdSNicolas Chautruqueues, priorities, load balance, bandwidth and other settings necessary for the
115db7949bdSNicolas Chautrudevice to perform FEC functions.
116db7949bdSNicolas Chautru
117db7949bdSNicolas ChautruThis configuration needs to be executed at least once after reboot or PCI FLR and can
118e4665812SNicolas Chautrube achieved by using the functions ``rte_acc10x_configure()``,
119e4665812SNicolas Chautruwhich sets up the parameters defined in the compatible ``acc100_conf`` structure.
120db7949bdSNicolas Chautru
121db7949bdSNicolas ChautruTest Application
122db7949bdSNicolas Chautru----------------
123db7949bdSNicolas Chautru
124db7949bdSNicolas ChautruBBDEV provides a test application, ``test-bbdev.py`` and range of test data for testing
12522900d7fSNicolas Chautruthe functionality of the device, depending on the device's capabilities.
126db7949bdSNicolas Chautru
12722900d7fSNicolas ChautruFor more details on how to use the test application,
12822900d7fSNicolas Chautrusee :ref:`test_bbdev_application`.
129db7949bdSNicolas Chautru
130db7949bdSNicolas Chautru
131db7949bdSNicolas ChautruTest Vectors
132db7949bdSNicolas Chautru~~~~~~~~~~~~
133db7949bdSNicolas Chautru
134db7949bdSNicolas ChautruIn addition to the simple LDPC decoder and LDPC encoder tests, bbdev also provides
135db7949bdSNicolas Chautrua range of additional tests under the test_vectors folder, which may be useful. The results
136e4665812SNicolas Chautruof these tests will depend on the device 5G/4G FEC capabilities which may cause some
137db7949bdSNicolas Chautrutestcases to be skipped, but no failure should be reported.
138fbef5a42SNicolas Chautru
139fbef5a42SNicolas Chautru
140fbef5a42SNicolas ChautruAlternate Baseband Device configuration tool
141fbef5a42SNicolas Chautru~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
142fbef5a42SNicolas Chautru
143fbef5a42SNicolas ChautruOn top of the embedded configuration feature supported in test-bbdev using "- -init-device"
144fbef5a42SNicolas Chautruoption mentioned above, there is also a tool available to perform that device configuration
145fbef5a42SNicolas Chautruusing a companion application.
146fbef5a42SNicolas ChautruThe ``pf_bb_config`` application notably enables then to run bbdev-test from the VF
147fbef5a42SNicolas Chautruand not only limited to the PF as captured above.
148fbef5a42SNicolas Chautru
149fbef5a42SNicolas ChautruSee for more details: https://github.com/intel/pf-bb-config
150fbef5a42SNicolas Chautru
151fbef5a42SNicolas ChautruSpecifically for the BBDEV ACC100 PMD, the command below can be used:
152fbef5a42SNicolas Chautru
153fbef5a42SNicolas Chautru.. code-block:: console
154fbef5a42SNicolas Chautru
155fbef5a42SNicolas Chautru  ./pf_bb_config ACC100 -c acc100/acc100_config_vf_5g.cfg
156db27370bSStephen Hemminger  ./test-bbdev.py -e="-c 0xff0 -a${VF_PCI_ADDR}" -c validation -n 64 -b 32 -l 1 -v ./ldpc_dec_default.data
157