1*fd10b026SMarkus Pfeiffer /*- 2*fd10b026SMarkus Pfeiffer * Copyright (c) 2004 Poul-Henning Kamp 3*fd10b026SMarkus Pfeiffer * All rights reserved. 4*fd10b026SMarkus Pfeiffer * 5*fd10b026SMarkus Pfeiffer * Redistribution and use in source and binary forms, with or without 6*fd10b026SMarkus Pfeiffer * modification, are permitted provided that the following conditions 7*fd10b026SMarkus Pfeiffer * are met: 8*fd10b026SMarkus Pfeiffer * 1. Redistributions of source code must retain the above copyright 9*fd10b026SMarkus Pfeiffer * notice, this list of conditions and the following disclaimer. 10*fd10b026SMarkus Pfeiffer * 2. Redistributions in binary form must reproduce the above copyright 11*fd10b026SMarkus Pfeiffer * notice, this list of conditions and the following disclaimer in the 12*fd10b026SMarkus Pfeiffer * documentation and/or other materials provided with the distribution. 13*fd10b026SMarkus Pfeiffer * 14*fd10b026SMarkus Pfeiffer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15*fd10b026SMarkus Pfeiffer * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16*fd10b026SMarkus Pfeiffer * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17*fd10b026SMarkus Pfeiffer * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18*fd10b026SMarkus Pfeiffer * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19*fd10b026SMarkus Pfeiffer * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20*fd10b026SMarkus Pfeiffer * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21*fd10b026SMarkus Pfeiffer * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22*fd10b026SMarkus Pfeiffer * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23*fd10b026SMarkus Pfeiffer * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24*fd10b026SMarkus Pfeiffer * SUCH DAMAGE. 25*fd10b026SMarkus Pfeiffer * 26*fd10b026SMarkus Pfeiffer * This file contains definitions which pertain to serial ports as such, 27*fd10b026SMarkus Pfeiffer * (both async and sync), but which do not necessarily have anything to 28*fd10b026SMarkus Pfeiffer * do with tty processing. 29*fd10b026SMarkus Pfeiffer * 30*fd10b026SMarkus Pfeiffer * $FreeBSD$ 31*fd10b026SMarkus Pfeiffer */ 32*fd10b026SMarkus Pfeiffer 33*fd10b026SMarkus Pfeiffer #ifndef _SYS_SERIAL_H_ 34*fd10b026SMarkus Pfeiffer #define _SYS_SERIAL_H_ 35*fd10b026SMarkus Pfeiffer 36*fd10b026SMarkus Pfeiffer 37*fd10b026SMarkus Pfeiffer /* 38*fd10b026SMarkus Pfeiffer * Indentification of modem control signals. These definitions match 39*fd10b026SMarkus Pfeiffer * the TIOCMGET definitions in <sys/ttycom.h> shifted a bit down, and 40*fd10b026SMarkus Pfeiffer * that identity is enforced with CTASSERT at the bottom of kern/tty.c 41*fd10b026SMarkus Pfeiffer * Both the modem bits and delta bits must fit in 16 bit. 42*fd10b026SMarkus Pfeiffer */ 43*fd10b026SMarkus Pfeiffer #define SER_DTR 0x0001 /* data terminal ready */ 44*fd10b026SMarkus Pfeiffer #define SER_RTS 0x0002 /* request to send */ 45*fd10b026SMarkus Pfeiffer #define SER_STX 0x0004 /* secondary transmit */ 46*fd10b026SMarkus Pfeiffer #define SER_SRX 0x0008 /* secondary receive */ 47*fd10b026SMarkus Pfeiffer #define SER_CTS 0x0010 /* clear to send */ 48*fd10b026SMarkus Pfeiffer #define SER_DCD 0x0020 /* data carrier detect */ 49*fd10b026SMarkus Pfeiffer #define SER_RI 0x0040 /* ring indicate */ 50*fd10b026SMarkus Pfeiffer #define SER_DSR 0x0080 /* data set ready */ 51*fd10b026SMarkus Pfeiffer 52*fd10b026SMarkus Pfeiffer #define SER_MASK_STATE 0x00ff 53*fd10b026SMarkus Pfeiffer 54*fd10b026SMarkus Pfeiffer /* Delta bits, used to indicate which signals should/was affected */ 55*fd10b026SMarkus Pfeiffer #define SER_DELTA(x) ((x) << 8) 56*fd10b026SMarkus Pfeiffer 57*fd10b026SMarkus Pfeiffer #define SER_DDTR SER_DELTA(SER_DTR) 58*fd10b026SMarkus Pfeiffer #define SER_DRTS SER_DELTA(SER_RTS) 59*fd10b026SMarkus Pfeiffer #define SER_DSTX SER_DELTA(SER_STX) 60*fd10b026SMarkus Pfeiffer #define SER_DSRX SER_DELTA(SER_SRX) 61*fd10b026SMarkus Pfeiffer #define SER_DCTS SER_DELTA(SER_CTS) 62*fd10b026SMarkus Pfeiffer #define SER_DDCD SER_DELTA(SER_DCD) 63*fd10b026SMarkus Pfeiffer #define SER_DRI SER_DELTA(SER_RI) 64*fd10b026SMarkus Pfeiffer #define SER_DDSR SER_DELTA(SER_DSR) 65*fd10b026SMarkus Pfeiffer 66*fd10b026SMarkus Pfeiffer #define SER_MASK_DELTA SER_DELTA(SER_MASK_STATE) 67*fd10b026SMarkus Pfeiffer 68*fd10b026SMarkus Pfeiffer #ifdef _KERNEL 69*fd10b026SMarkus Pfeiffer /* 70*fd10b026SMarkus Pfeiffer * Specification of interrupt sources typical for serial ports. These are 71*fd10b026SMarkus Pfeiffer * useful when some umbrella driver like scc(4) has enough knowledge of 72*fd10b026SMarkus Pfeiffer * the hardware to obtain the set of pending interrupts but does not itself 73*fd10b026SMarkus Pfeiffer * handle the interrupt. Each interrupt source can be given an interrupt 74*fd10b026SMarkus Pfeiffer * resource for which inferior drivers can install handlers. The lower 16 75*fd10b026SMarkus Pfeiffer * bits are kept free for the signals above. 76*fd10b026SMarkus Pfeiffer */ 77*fd10b026SMarkus Pfeiffer #define SER_INT_OVERRUN 0x010000 78*fd10b026SMarkus Pfeiffer #define SER_INT_BREAK 0x020000 79*fd10b026SMarkus Pfeiffer #define SER_INT_RXREADY 0x040000 80*fd10b026SMarkus Pfeiffer #define SER_INT_SIGCHG 0x080000 81*fd10b026SMarkus Pfeiffer #define SER_INT_TXIDLE 0x100000 82*fd10b026SMarkus Pfeiffer 83*fd10b026SMarkus Pfeiffer #define SER_INT_MASK 0xff0000 84*fd10b026SMarkus Pfeiffer #define SER_INT_SIGMASK (SER_MASK_DELTA | SER_MASK_STATE) 85*fd10b026SMarkus Pfeiffer 86*fd10b026SMarkus Pfeiffer #ifndef LOCORE 87*fd10b026SMarkus Pfeiffer typedef int serdev_intr_t(void*); 88*fd10b026SMarkus Pfeiffer #endif 89*fd10b026SMarkus Pfeiffer 90*fd10b026SMarkus Pfeiffer #endif /* _KERNEL */ 91*fd10b026SMarkus Pfeiffer 92*fd10b026SMarkus Pfeiffer #endif /* !_SYS_SERIAL_H_ */ 93