1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $ 34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.8 2003/07/21 05:50:42 dillon Exp $ 35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 36 * from: i386/isa sio.c,v 1.234 37 */ 38 39 #include "opt_comconsole.h" 40 #include "opt_compat.h" 41 #include "opt_ddb.h" 42 #include "opt_sio.h" 43 #include "card.h" 44 #include "pci.h" 45 #ifdef __i386__ 46 #include "puc.h" 47 #endif 48 #include "sio.h" 49 50 /* 51 * Serial driver, based on 386BSD-0.1 com driver. 52 * Mostly rewritten to use pseudo-DMA. 53 * Works for National Semiconductor NS8250-NS16550AF UARTs. 54 * COM driver, based on HP dca driver. 55 * 56 * Changes for PC-Card integration: 57 * - Added PC-Card driver table and handlers 58 */ 59 #include <sys/param.h> 60 #include <sys/systm.h> 61 #include <sys/reboot.h> 62 #include <sys/malloc.h> 63 #include <sys/tty.h> 64 #include <sys/proc.h> 65 #include <sys/module.h> 66 #include <sys/conf.h> 67 #include <sys/dkstat.h> 68 #include <sys/fcntl.h> 69 #include <sys/interrupt.h> 70 #include <sys/kernel.h> 71 #include <sys/syslog.h> 72 #include <sys/sysctl.h> 73 #include <sys/bus.h> 74 #include <machine/bus_pio.h> 75 #include <machine/bus.h> 76 #include <sys/rman.h> 77 #include <sys/timepps.h> 78 79 #include <machine/limits.h> 80 81 #include <isa/isareg.h> 82 #include <isa/isavar.h> 83 #if NPCI > 0 84 #include <pci/pcireg.h> 85 #include <pci/pcivar.h> 86 #endif 87 #if NPUC > 0 88 #include <dev/puc/pucvar.h> 89 #endif 90 #include <machine/lock.h> 91 92 #include <machine/clock.h> 93 #include <machine/ipl.h> 94 #ifndef SMP 95 #include <machine/lock.h> 96 #endif 97 #include <machine/resource.h> 98 99 #include <isa/sioreg.h> 100 101 #ifdef COM_ESP 102 #include <dev/ic/esp.h> 103 #endif 104 #include <dev/ic/ns16550.h> 105 106 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 107 108 #define CALLOUT_MASK 0x80 109 #define CONTROL_MASK 0x60 110 #define CONTROL_INIT_STATE 0x20 111 #define CONTROL_LOCK_STATE 0x40 112 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 113 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 114 | ((mynor) & 0x1f)) 115 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 116 | ((unit) & 0x1f)) 117 118 #ifdef COM_MULTIPORT 119 /* checks in flags for multiport and which is multiport "master chip" 120 * for a given card 121 */ 122 #define COM_ISMULTIPORT(flags) ((flags) & 0x01) 123 #define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 124 #define COM_NOTAST4(flags) ((flags) & 0x04) 125 #endif /* COM_MULTIPORT */ 126 127 #define COM_CONSOLE(flags) ((flags) & 0x10) 128 #define COM_FORCECONSOLE(flags) ((flags) & 0x20) 129 #define COM_LLCONSOLE(flags) ((flags) & 0x40) 130 #define COM_DEBUGGER(flags) ((flags) & 0x80) 131 #define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 132 #define COM_NOFIFO(flags) ((flags) & 0x02) 133 #define COM_ST16650A(flags) ((flags) & 0x20000) 134 #define COM_C_NOPROBE (0x40000) 135 #define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 136 #define COM_C_IIR_TXRDYBUG (0x80000) 137 #define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 138 #define COM_TI16754(flags) ((flags) & 0x200000) 139 #define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 140 141 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 142 143 #define sio_getreg(com, off) \ 144 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 145 #define sio_setreg(com, off, value) \ 146 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 147 148 /* 149 * com state bits. 150 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 151 * than the other bits so that they can be tested as a group without masking 152 * off the low bits. 153 * 154 * The following com and tty flags correspond closely: 155 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 156 * comstop()) 157 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 158 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 159 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 160 * TS_FLUSH is not used. 161 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 162 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 163 */ 164 #define CS_BUSY 0x80 /* output in progress */ 165 #define CS_TTGO 0x40 /* output not stopped by XOFF */ 166 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 167 #define CS_CHECKMSR 1 /* check of MSR scheduled */ 168 #define CS_CTS_OFLOW 2 /* use CTS output flow control */ 169 #define CS_DTR_OFF 0x10 /* DTR held off */ 170 #define CS_ODONE 4 /* output completed */ 171 #define CS_RTS_IFLOW 8 /* use RTS input flow control */ 172 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 173 174 static char const * const error_desc[] = { 175 #define CE_OVERRUN 0 176 "silo overflow", 177 #define CE_INTERRUPT_BUF_OVERFLOW 1 178 "interrupt-level buffer overflow", 179 #define CE_TTY_BUF_OVERFLOW 2 180 "tty-level buffer overflow", 181 }; 182 183 #define CE_NTYPES 3 184 #define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 185 186 /* types. XXX - should be elsewhere */ 187 typedef u_int Port_t; /* hardware port */ 188 typedef u_char bool_t; /* boolean */ 189 190 /* queue of linear buffers */ 191 struct lbq { 192 u_char *l_head; /* next char to process */ 193 u_char *l_tail; /* one past the last char to process */ 194 struct lbq *l_next; /* next in queue */ 195 bool_t l_queued; /* nonzero if queued */ 196 }; 197 198 /* com device structure */ 199 struct com_s { 200 u_int flags; /* Copy isa device flags */ 201 u_char state; /* miscellaneous flag bits */ 202 bool_t active_out; /* nonzero if the callout device is open */ 203 u_char cfcr_image; /* copy of value written to CFCR */ 204 #ifdef COM_ESP 205 bool_t esp; /* is this unit a hayes esp board? */ 206 #endif 207 u_char extra_state; /* more flag bits, separate for order trick */ 208 u_char fifo_image; /* copy of value written to FIFO */ 209 bool_t hasfifo; /* nonzero for 16550 UARTs */ 210 bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 211 bool_t loses_outints; /* nonzero if device loses output interrupts */ 212 u_char mcr_image; /* copy of value written to MCR */ 213 #ifdef COM_MULTIPORT 214 bool_t multiport; /* is this unit part of a multiport device? */ 215 #endif /* COM_MULTIPORT */ 216 bool_t no_irq; /* nonzero if irq is not attached */ 217 bool_t gone; /* hardware disappeared */ 218 bool_t poll; /* nonzero if polling is required */ 219 bool_t poll_output; /* nonzero if polling for output is required */ 220 int unit; /* unit number */ 221 int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 222 u_int tx_fifo_size; 223 u_int wopeners; /* # processes waiting for DCD in open() */ 224 225 /* 226 * The high level of the driver never reads status registers directly 227 * because there would be too many side effects to handle conveniently. 228 * Instead, it reads copies of the registers stored here by the 229 * interrupt handler. 230 */ 231 u_char last_modem_status; /* last MSR read by intr handler */ 232 u_char prev_modem_status; /* last MSR handled by high level */ 233 234 u_char hotchar; /* ldisc-specific char to be handled ASAP */ 235 u_char *ibuf; /* start of input buffer */ 236 u_char *ibufend; /* end of input buffer */ 237 u_char *ibufold; /* old input buffer, to be freed */ 238 u_char *ihighwater; /* threshold in input buffer */ 239 u_char *iptr; /* next free spot in input buffer */ 240 int ibufsize; /* size of ibuf (not include error bytes) */ 241 int ierroff; /* offset of error bytes in ibuf */ 242 243 struct lbq obufq; /* head of queue of output buffers */ 244 struct lbq obufs[2]; /* output buffers */ 245 246 bus_space_tag_t bst; 247 bus_space_handle_t bsh; 248 249 Port_t data_port; /* i/o ports */ 250 #ifdef COM_ESP 251 Port_t esp_port; 252 #endif 253 Port_t int_id_port; 254 Port_t modem_ctl_port; 255 Port_t line_status_port; 256 Port_t modem_status_port; 257 Port_t intr_ctl_port; /* Ports of IIR register */ 258 259 struct tty *tp; /* cross reference */ 260 261 /* Initial state. */ 262 struct termios it_in; /* should be in struct tty */ 263 struct termios it_out; 264 265 /* Lock state. */ 266 struct termios lt_in; /* should be in struct tty */ 267 struct termios lt_out; 268 269 bool_t do_timestamp; 270 bool_t do_dcd_timestamp; 271 struct timeval timestamp; 272 struct timeval dcd_timestamp; 273 struct pps_state pps; 274 275 u_long bytes_in; /* statistics */ 276 u_long bytes_out; 277 u_int delta_error_counts[CE_NTYPES]; 278 u_long error_counts[CE_NTYPES]; 279 280 u_long rclk; 281 282 struct resource *irqres; 283 struct resource *ioportres; 284 void *cookie; 285 286 /* 287 * Data area for output buffers. Someday we should build the output 288 * buffer queue without copying data. 289 */ 290 u_char obuf1[256]; 291 u_char obuf2[256]; 292 }; 293 294 #ifdef COM_ESP 295 static int espattach __P((struct com_s *com, Port_t esp_port)); 296 #endif 297 static int sioattach __P((device_t dev, int rid, u_long rclk)); 298 static int sio_isa_attach __P((device_t dev)); 299 300 static timeout_t siobusycheck; 301 static u_int siodivisor __P((u_long rclk, speed_t speed)); 302 static timeout_t siodtrwakeup; 303 static void comhardclose __P((struct com_s *com)); 304 static void sioinput __P((struct com_s *com)); 305 static void siointr1 __P((struct com_s *com)); 306 static void siointr __P((void *arg)); 307 static int commctl __P((struct com_s *com, int bits, int how)); 308 static int comparam __P((struct tty *tp, struct termios *t)); 309 static inthand2_t siopoll; 310 static int sioprobe __P((device_t dev, int xrid, u_long rclk)); 311 static int sio_isa_probe __P((device_t dev)); 312 static void siosettimeout __P((void)); 313 static int siosetwater __P((struct com_s *com, speed_t speed)); 314 static void comstart __P((struct tty *tp)); 315 static void comstop __P((struct tty *tp, int rw)); 316 static timeout_t comwakeup; 317 static void disc_optim __P((struct tty *tp, struct termios *t, 318 struct com_s *com)); 319 320 #if NCARD > 0 321 static int sio_pccard_attach __P((device_t dev)); 322 static int sio_pccard_detach __P((device_t dev)); 323 static int sio_pccard_probe __P((device_t dev)); 324 #endif /* NCARD > 0 */ 325 326 #if NPCI > 0 327 static int sio_pci_attach __P((device_t dev)); 328 static void sio_pci_kludge_unit __P((device_t dev)); 329 static int sio_pci_probe __P((device_t dev)); 330 #endif /* NPCI > 0 */ 331 332 #if NPUC > 0 333 static int sio_puc_attach __P((device_t dev)); 334 static int sio_puc_probe __P((device_t dev)); 335 #endif /* NPUC > 0 */ 336 337 static char driver_name[] = "sio"; 338 339 /* table and macro for fast conversion from a unit number to its com struct */ 340 static devclass_t sio_devclass; 341 #define com_addr(unit) ((struct com_s *) \ 342 devclass_get_softc(sio_devclass, unit)) 343 344 static device_method_t sio_isa_methods[] = { 345 /* Device interface */ 346 DEVMETHOD(device_probe, sio_isa_probe), 347 DEVMETHOD(device_attach, sio_isa_attach), 348 349 { 0, 0 } 350 }; 351 352 static driver_t sio_isa_driver = { 353 driver_name, 354 sio_isa_methods, 355 sizeof(struct com_s), 356 }; 357 358 #if NCARD > 0 359 static device_method_t sio_pccard_methods[] = { 360 /* Device interface */ 361 DEVMETHOD(device_probe, sio_pccard_probe), 362 DEVMETHOD(device_attach, sio_pccard_attach), 363 DEVMETHOD(device_detach, sio_pccard_detach), 364 365 { 0, 0 } 366 }; 367 368 static driver_t sio_pccard_driver = { 369 driver_name, 370 sio_pccard_methods, 371 sizeof(struct com_s), 372 }; 373 #endif /* NCARD > 0 */ 374 375 #if NPCI > 0 376 static device_method_t sio_pci_methods[] = { 377 /* Device interface */ 378 DEVMETHOD(device_probe, sio_pci_probe), 379 DEVMETHOD(device_attach, sio_pci_attach), 380 381 { 0, 0 } 382 }; 383 384 static driver_t sio_pci_driver = { 385 driver_name, 386 sio_pci_methods, 387 sizeof(struct com_s), 388 }; 389 #endif /* NPCI > 0 */ 390 391 #if NPUC > 0 392 static device_method_t sio_puc_methods[] = { 393 /* Device interface */ 394 DEVMETHOD(device_probe, sio_puc_probe), 395 DEVMETHOD(device_attach, sio_puc_attach), 396 397 { 0, 0 } 398 }; 399 400 static driver_t sio_puc_driver = { 401 driver_name, 402 sio_puc_methods, 403 sizeof(struct com_s), 404 }; 405 #endif /* NPUC > 0 */ 406 407 static d_open_t sioopen; 408 static d_close_t sioclose; 409 static d_read_t sioread; 410 static d_write_t siowrite; 411 static d_ioctl_t sioioctl; 412 413 #define CDEV_MAJOR 28 414 static struct cdevsw sio_cdevsw = { 415 /* name */ driver_name, 416 /* maj */ CDEV_MAJOR, 417 /* flags */ D_TTY | D_KQFILTER, 418 /* port */ NULL, 419 /* autoq */ 0, 420 421 /* open */ sioopen, 422 /* close */ sioclose, 423 /* read */ sioread, 424 /* write */ siowrite, 425 /* ioctl */ sioioctl, 426 /* poll */ ttypoll, 427 /* mmap */ nommap, 428 /* strategy */ nostrategy, 429 /* dump */ nodump, 430 /* psize */ nopsize, 431 /* kqfilter */ ttykqfilter 432 }; 433 434 int comconsole = -1; 435 static volatile speed_t comdefaultrate = CONSPEED; 436 static u_long comdefaultrclk = DEFAULT_RCLK; 437 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 438 #ifdef __alpha__ 439 static volatile speed_t gdbdefaultrate = CONSPEED; 440 #endif 441 static u_int com_events; /* input chars + weighted output completions */ 442 static Port_t siocniobase; 443 static int siocnunit; 444 static Port_t siogdbiobase; 445 static int siogdbunit = -1; 446 static bool_t sio_registered; 447 static int sio_timeout; 448 static int sio_timeouts_until_log; 449 static struct callout_handle sio_timeout_handle 450 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 451 static int sio_numunits; 452 453 #ifdef COM_ESP 454 /* XXX configure this properly. */ 455 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 456 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 457 #endif 458 459 /* 460 * handle sysctl read/write requests for console speed 461 * 462 * In addition to setting comdefaultrate for I/O through /dev/console, 463 * also set the initial and lock values for the /dev/ttyXX device 464 * if there is one associated with the console. Finally, if the /dev/tty 465 * device has already been open, change the speed on the open running port 466 * itself. 467 */ 468 469 static int 470 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 471 { 472 int error, s; 473 speed_t newspeed; 474 struct com_s *com; 475 struct tty *tp; 476 477 newspeed = comdefaultrate; 478 479 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 480 if (error || !req->newptr) 481 return (error); 482 483 comdefaultrate = newspeed; 484 485 if (comconsole < 0) /* serial console not selected? */ 486 return (0); 487 488 com = com_addr(comconsole); 489 if (com == NULL) 490 return (ENXIO); 491 492 /* 493 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 494 * (note, the lock rates really are boolean -- if non-zero, disallow 495 * speed changes) 496 */ 497 com->it_in.c_ispeed = com->it_in.c_ospeed = 498 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 499 com->it_out.c_ispeed = com->it_out.c_ospeed = 500 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 501 502 /* 503 * if we're open, change the running rate too 504 */ 505 tp = com->tp; 506 if (tp && (tp->t_state & TS_ISOPEN)) { 507 tp->t_termios.c_ispeed = 508 tp->t_termios.c_ospeed = comdefaultrate; 509 s = spltty(); 510 error = comparam(tp, &tp->t_termios); 511 splx(s); 512 } 513 return error; 514 } 515 516 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 517 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 518 519 #define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 520 #define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 521 522 #if NCARD > 0 523 static int 524 sio_pccard_probe(dev) 525 device_t dev; 526 { 527 /* Do not probe IRQ - pccard doesn't turn on the interrupt line */ 528 /* until bus_setup_intr */ 529 SET_FLAG(dev, COM_C_NOPROBE); 530 531 return (sioprobe(dev, 0, 0UL)); 532 } 533 534 static int 535 sio_pccard_attach(dev) 536 device_t dev; 537 { 538 return (sioattach(dev, 0, 0UL)); 539 } 540 541 /* 542 * sio_detach - unload the driver and clear the table. 543 * XXX TODO: 544 * This is usually called when the card is ejected, but 545 * can be caused by a modunload of a controller driver. 546 * The idea is to reset the driver's view of the device 547 * and ensure that any driver entry points such as 548 * read and write do not hang. 549 */ 550 static int 551 sio_pccard_detach(dev) 552 device_t dev; 553 { 554 struct com_s *com; 555 556 com = (struct com_s *) device_get_softc(dev); 557 if (com == NULL) { 558 device_printf(dev, "NULL com in siounload\n"); 559 return (0); 560 } 561 com->gone = 1; 562 if (com->irqres) { 563 bus_teardown_intr(dev, com->irqres, com->cookie); 564 bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 565 } 566 if (com->ioportres) 567 bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres); 568 if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 569 device_printf(dev, "still open, forcing close\n"); 570 com->tp->t_gen++; 571 ttyclose(com->tp); 572 ttwakeup(com->tp); 573 ttwwakeup(com->tp); 574 } else { 575 if (com->ibuf != NULL) 576 free(com->ibuf, M_DEVBUF); 577 } 578 device_printf(dev, "unloaded\n"); 579 return (0); 580 } 581 #endif /* NCARD > 0 */ 582 583 #if NPCI > 0 584 struct pci_ids { 585 u_int32_t type; 586 const char *desc; 587 int rid; 588 }; 589 590 static struct pci_ids pci_ids[] = { 591 { 0x100812b9, "3COM PCI FaxModem", 0x10 }, 592 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 }, 593 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 594 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 595 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 }, 596 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 }, 597 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 }, 598 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 }, 599 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 }, 600 { 0x00000000, NULL, 0 } 601 }; 602 603 static int 604 sio_pci_attach(dev) 605 device_t dev; 606 { 607 u_int32_t type; 608 struct pci_ids *id; 609 610 type = pci_get_devid(dev); 611 id = pci_ids; 612 while (id->type && id->type != type) 613 id++; 614 if (id->desc == NULL) 615 return (ENXIO); 616 sio_pci_kludge_unit(dev); 617 return (sioattach(dev, id->rid, 0UL)); 618 } 619 620 /* 621 * Don't cut and paste this to other drivers. It is a horrible kludge 622 * which will fail to work and also be unnecessary in future versions. 623 */ 624 static void 625 sio_pci_kludge_unit(dev) 626 device_t dev; 627 { 628 devclass_t dc; 629 int err; 630 int start; 631 int unit; 632 633 unit = 0; 634 start = 0; 635 while (resource_int_value("sio", unit, "port", &start) == 0 && 636 start > 0) 637 unit++; 638 if (device_get_unit(dev) < unit) { 639 dc = device_get_devclass(dev); 640 while (devclass_get_device(dc, unit)) 641 unit++; 642 device_printf(dev, "moving to sio%d\n", unit); 643 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */ 644 if (err) 645 device_printf(dev, "error moving device %d\n", err); 646 } 647 } 648 649 static int 650 sio_pci_probe(dev) 651 device_t dev; 652 { 653 u_int32_t type; 654 struct pci_ids *id; 655 656 type = pci_get_devid(dev); 657 id = pci_ids; 658 while (id->type && id->type != type) 659 id++; 660 if (id->desc == NULL) 661 return (ENXIO); 662 device_set_desc(dev, id->desc); 663 return (sioprobe(dev, id->rid, 0UL)); 664 } 665 #endif /* NPCI > 0 */ 666 667 #if NPUC > 0 668 static int 669 sio_puc_attach(dev) 670 device_t dev; 671 { 672 u_int rclk; 673 674 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 675 &rclk) != 0) 676 rclk = DEFAULT_RCLK; 677 return (sioattach(dev, 0, rclk)); 678 } 679 680 static int 681 sio_puc_probe(dev) 682 device_t dev; 683 { 684 u_int rclk; 685 686 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 687 &rclk) != 0) 688 rclk = DEFAULT_RCLK; 689 return (sioprobe(dev, 0, rclk)); 690 } 691 #endif /* NPUC */ 692 693 static struct isa_pnp_id sio_ids[] = { 694 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 695 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 696 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 697 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 698 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 699 /* Devices that do not have a compatid */ 700 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */ 701 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */ 702 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */ 703 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */ 704 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */ 705 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */ 706 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/ 707 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */ 708 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */ 709 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */ 710 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */ 711 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */ 712 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */ 713 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */ 714 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */ 715 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */ 716 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */ 717 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */ 718 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */ 719 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */ 720 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */ 721 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */ 722 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */ 723 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */ 724 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */ 725 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */ 726 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */ 727 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/ 728 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */ 729 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */ 730 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */ 731 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */ 732 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */ 733 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */ 734 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */ 735 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */ 736 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */ 737 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */ 738 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */ 739 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */ 740 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */ 741 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */ 742 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */ 743 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */ 744 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */ 745 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */ 746 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */ 747 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */ 748 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */ 749 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */ 750 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */ 751 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */ 752 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */ 753 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */ 754 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */ 755 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */ 756 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */ 757 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */ 758 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */ 759 {0x11007256, NULL}, /* USR0011 - USR ? */ 760 {0x01017256, NULL}, /* USR0101 - USR ? */ 761 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */ 762 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */ 763 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */ 764 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */ 765 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */ 766 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */ 767 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */ 768 {0x90307256, NULL}, /* USR3090 - USR ? */ 769 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */ 770 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */ 771 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */ 772 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */ 773 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */ 774 {0} 775 }; 776 777 778 779 static int 780 sio_isa_probe(dev) 781 device_t dev; 782 { 783 /* Check isapnp ids */ 784 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 785 return (ENXIO); 786 return (sioprobe(dev, 0, 0UL)); 787 } 788 789 static int 790 sioprobe(dev, xrid, rclk) 791 device_t dev; 792 int xrid; 793 u_long rclk; 794 { 795 #if 0 796 static bool_t already_init; 797 device_t xdev; 798 #endif 799 struct com_s *com; 800 u_int divisor; 801 bool_t failures[10]; 802 int fn; 803 device_t idev; 804 Port_t iobase; 805 intrmask_t irqmap[4]; 806 intrmask_t irqs; 807 u_char mcr_image; 808 int result; 809 u_long xirq; 810 u_int flags = device_get_flags(dev); 811 int rid; 812 struct resource *port; 813 814 rid = xrid; 815 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 816 0, ~0, IO_COMSIZE, RF_ACTIVE); 817 if (!port) 818 return (ENXIO); 819 820 com = device_get_softc(dev); 821 com->bst = rman_get_bustag(port); 822 com->bsh = rman_get_bushandle(port); 823 if (rclk == 0) 824 rclk = DEFAULT_RCLK; 825 com->rclk = rclk; 826 827 #if 0 828 /* 829 * XXX this is broken - when we are first called, there are no 830 * previously configured IO ports. We could hard code 831 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 832 * This code has been doing nothing since the conversion since 833 * "count" is zero the first time around. 834 */ 835 if (!already_init) { 836 /* 837 * Turn off MCR_IENABLE for all likely serial ports. An unused 838 * port with its MCR_IENABLE gate open will inhibit interrupts 839 * from any used port that shares the interrupt vector. 840 * XXX the gate enable is elsewhere for some multiports. 841 */ 842 device_t *devs; 843 int count, i, xioport; 844 845 devclass_get_devices(sio_devclass, &devs, &count); 846 for (i = 0; i < count; i++) { 847 xdev = devs[i]; 848 if (device_is_enabled(xdev) && 849 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 850 NULL) == 0) 851 outb(xioport + com_mcr, 0); 852 } 853 free(devs, M_TEMP); 854 already_init = TRUE; 855 } 856 #endif 857 858 if (COM_LLCONSOLE(flags)) { 859 printf("sio%d: reserved for low-level i/o\n", 860 device_get_unit(dev)); 861 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 862 return (ENXIO); 863 } 864 865 /* 866 * If the device is on a multiport card and has an AST/4 867 * compatible interrupt control register, initialize this 868 * register and prepare to leave MCR_IENABLE clear in the mcr. 869 * Otherwise, prepare to set MCR_IENABLE in the mcr. 870 * Point idev to the device struct giving the correct id_irq. 871 * This is the struct for the master device if there is one. 872 */ 873 idev = dev; 874 mcr_image = MCR_IENABLE; 875 #ifdef COM_MULTIPORT 876 if (COM_ISMULTIPORT(flags)) { 877 Port_t xiobase; 878 u_long io; 879 880 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 881 if (idev == NULL) { 882 printf("sio%d: master device %d not configured\n", 883 device_get_unit(dev), COM_MPMASTER(flags)); 884 idev = dev; 885 } 886 if (!COM_NOTAST4(flags)) { 887 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 888 NULL) == 0) { 889 xiobase = io; 890 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 891 NULL, NULL) == 0) 892 outb(xiobase + com_scr, 0x80); 893 else 894 outb(xiobase + com_scr, 0); 895 } 896 mcr_image = 0; 897 } 898 } 899 #endif /* COM_MULTIPORT */ 900 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 901 mcr_image = 0; 902 903 bzero(failures, sizeof failures); 904 iobase = rman_get_start(port); 905 906 /* 907 * We don't want to get actual interrupts, just masked ones. 908 * Interrupts from this line should already be masked in the ICU, 909 * but mask them in the processor as well in case there are some 910 * (misconfigured) shared interrupts. 911 */ 912 com_lock(); 913 /* EXTRA DELAY? */ 914 915 /* 916 * For the TI16754 chips, set prescaler to 1 (4 is often the 917 * default after-reset value) as otherwise it's impossible to 918 * get highest baudrates. 919 */ 920 if (COM_TI16754(flags)) { 921 u_char cfcr, efr; 922 923 cfcr = sio_getreg(com, com_cfcr); 924 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 925 efr = sio_getreg(com, com_efr); 926 /* Unlock extended features to turn off prescaler. */ 927 sio_setreg(com, com_efr, efr | EFR_EFE); 928 /* Disable EFR. */ 929 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 930 /* Turn off prescaler. */ 931 sio_setreg(com, com_mcr, 932 sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 933 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 934 sio_setreg(com, com_efr, efr); 935 sio_setreg(com, com_cfcr, cfcr); 936 } 937 938 /* 939 * Initialize the speed and the word size and wait long enough to 940 * drain the maximum of 16 bytes of junk in device output queues. 941 * The speed is undefined after a master reset and must be set 942 * before relying on anything related to output. There may be 943 * junk after a (very fast) soft reboot and (apparently) after 944 * master reset. 945 * XXX what about the UART bug avoided by waiting in comparam()? 946 * We don't want to to wait long enough to drain at 2 bps. 947 */ 948 if (iobase == siocniobase) 949 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 950 else { 951 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 952 divisor = siodivisor(rclk, SIO_TEST_SPEED); 953 sio_setreg(com, com_dlbl, divisor & 0xff); 954 sio_setreg(com, com_dlbh, divisor >> 8); 955 sio_setreg(com, com_cfcr, CFCR_8BITS); 956 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 957 } 958 959 /* 960 * Enable the interrupt gate and disable device interupts. This 961 * should leave the device driving the interrupt line low and 962 * guarantee an edge trigger if an interrupt can be generated. 963 */ 964 /* EXTRA DELAY? */ 965 sio_setreg(com, com_mcr, mcr_image); 966 sio_setreg(com, com_ier, 0); 967 DELAY(1000); /* XXX */ 968 irqmap[0] = isa_irq_pending(); 969 970 /* 971 * Attempt to set loopback mode so that we can send a null byte 972 * without annoying any external device. 973 */ 974 /* EXTRA DELAY? */ 975 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 976 977 /* 978 * Attempt to generate an output interrupt. On 8250's, setting 979 * IER_ETXRDY generates an interrupt independent of the current 980 * setting and independent of whether the THR is empty. On 16450's, 981 * setting IER_ETXRDY generates an interrupt independent of the 982 * current setting. On 16550A's, setting IER_ETXRDY only 983 * generates an interrupt when IER_ETXRDY is not already set. 984 */ 985 sio_setreg(com, com_ier, IER_ETXRDY); 986 987 /* 988 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 989 * an interrupt. They'd better generate one for actually doing 990 * output. Loopback may be broken on the same incompatibles but 991 * it's unlikely to do more than allow the null byte out. 992 */ 993 sio_setreg(com, com_data, 0); 994 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 995 996 /* 997 * Turn off loopback mode so that the interrupt gate works again 998 * (MCR_IENABLE was hidden). This should leave the device driving 999 * an interrupt line high. It doesn't matter if the interrupt 1000 * line oscillates while we are not looking at it, since interrupts 1001 * are disabled. 1002 */ 1003 /* EXTRA DELAY? */ 1004 sio_setreg(com, com_mcr, mcr_image); 1005 1006 /* 1007 * Some pcmcia cards have the "TXRDY bug", so we check everyone 1008 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 1009 */ 1010 if (COM_NOPROBE(flags)) { 1011 /* Reading IIR register twice */ 1012 for (fn = 0; fn < 2; fn ++) { 1013 DELAY(10000); 1014 failures[6] = sio_getreg(com, com_iir); 1015 } 1016 /* Check IIR_TXRDY clear ? */ 1017 result = 0; 1018 if (failures[6] & IIR_TXRDY) { 1019 /* Nop, Double check with clearing IER */ 1020 sio_setreg(com, com_ier, 0); 1021 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 1022 /* Ok. we're familia this gang */ 1023 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 1024 } else { 1025 /* Unknown, Just omit this chip.. XXX */ 1026 result = ENXIO; 1027 sio_setreg(com, com_mcr, 0); 1028 } 1029 } else { 1030 /* OK. this is well-known guys */ 1031 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 1032 } 1033 sio_setreg(com, com_ier, 0); 1034 sio_setreg(com, com_cfcr, CFCR_8BITS); 1035 com_unlock(); 1036 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1037 return (iobase == siocniobase ? 0 : result); 1038 } 1039 1040 /* 1041 * Check that 1042 * o the CFCR, IER and MCR in UART hold the values written to them 1043 * (the values happen to be all distinct - this is good for 1044 * avoiding false positive tests from bus echoes). 1045 * o an output interrupt is generated and its vector is correct. 1046 * o the interrupt goes away when the IIR in the UART is read. 1047 */ 1048 /* EXTRA DELAY? */ 1049 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 1050 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 1051 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 1052 DELAY(10000); /* Some internal modems need this time */ 1053 irqmap[1] = isa_irq_pending(); 1054 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 1055 DELAY(1000); /* XXX */ 1056 irqmap[2] = isa_irq_pending(); 1057 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 1058 1059 /* 1060 * Turn off all device interrupts and check that they go off properly. 1061 * Leave MCR_IENABLE alone. For ports without a master port, it gates 1062 * the OUT2 output of the UART to 1063 * the ICU input. Closing the gate would give a floating ICU input 1064 * (unless there is another device driving it) and spurious interrupts. 1065 * (On the system that this was first tested on, the input floats high 1066 * and gives a (masked) interrupt as soon as the gate is closed.) 1067 */ 1068 sio_setreg(com, com_ier, 0); 1069 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 1070 failures[7] = sio_getreg(com, com_ier); 1071 DELAY(1000); /* XXX */ 1072 irqmap[3] = isa_irq_pending(); 1073 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 1074 1075 com_unlock(); 1076 1077 irqs = irqmap[1] & ~irqmap[0]; 1078 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 1079 ((1 << xirq) & irqs) == 0) 1080 printf( 1081 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 1082 device_get_unit(dev), xirq, irqs); 1083 if (bootverbose) 1084 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 1085 device_get_unit(dev), 1086 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 1087 1088 result = 0; 1089 for (fn = 0; fn < sizeof failures; ++fn) 1090 if (failures[fn]) { 1091 sio_setreg(com, com_mcr, 0); 1092 result = ENXIO; 1093 if (bootverbose) { 1094 printf("sio%d: probe failed test(s):", 1095 device_get_unit(dev)); 1096 for (fn = 0; fn < sizeof failures; ++fn) 1097 if (failures[fn]) 1098 printf(" %d", fn); 1099 printf("\n"); 1100 } 1101 break; 1102 } 1103 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1104 return (iobase == siocniobase ? 0 : result); 1105 } 1106 1107 #ifdef COM_ESP 1108 static int 1109 espattach(com, esp_port) 1110 struct com_s *com; 1111 Port_t esp_port; 1112 { 1113 u_char dips; 1114 u_char val; 1115 1116 /* 1117 * Check the ESP-specific I/O port to see if we're an ESP 1118 * card. If not, return failure immediately. 1119 */ 1120 if ((inb(esp_port) & 0xf3) == 0) { 1121 printf(" port 0x%x is not an ESP board?\n", esp_port); 1122 return (0); 1123 } 1124 1125 /* 1126 * We've got something that claims to be a Hayes ESP card. 1127 * Let's hope so. 1128 */ 1129 1130 /* Get the dip-switch configuration */ 1131 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 1132 dips = inb(esp_port + ESP_STATUS1); 1133 1134 /* 1135 * Bits 0,1 of dips say which COM port we are. 1136 */ 1137 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 1138 printf(" : ESP"); 1139 else { 1140 printf(" esp_port has com %d\n", dips & 0x03); 1141 return (0); 1142 } 1143 1144 /* 1145 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 1146 */ 1147 outb(esp_port + ESP_CMD1, ESP_GETTEST); 1148 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 1149 val = inb(esp_port + ESP_STATUS2); 1150 if ((val & 0x70) < 0x20) { 1151 printf("-old (%o)", val & 0x70); 1152 return (0); 1153 } 1154 1155 /* 1156 * Check for ability to emulate 16550: bit 7 == 1 1157 */ 1158 if ((dips & 0x80) == 0) { 1159 printf(" slave"); 1160 return (0); 1161 } 1162 1163 /* 1164 * Okay, we seem to be a Hayes ESP card. Whee. 1165 */ 1166 com->esp = TRUE; 1167 com->esp_port = esp_port; 1168 return (1); 1169 } 1170 #endif /* COM_ESP */ 1171 1172 static int 1173 sio_isa_attach(dev) 1174 device_t dev; 1175 { 1176 return (sioattach(dev, 0, 0UL)); 1177 } 1178 1179 static int 1180 sioattach(dev, xrid, rclk) 1181 device_t dev; 1182 int xrid; 1183 u_long rclk; 1184 { 1185 struct com_s *com; 1186 #ifdef COM_ESP 1187 Port_t *espp; 1188 #endif 1189 Port_t iobase; 1190 int minorbase; 1191 int unit; 1192 u_int flags; 1193 int rid; 1194 struct resource *port; 1195 int ret; 1196 1197 rid = xrid; 1198 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 1199 0, ~0, IO_COMSIZE, RF_ACTIVE); 1200 if (!port) 1201 return (ENXIO); 1202 1203 iobase = rman_get_start(port); 1204 unit = device_get_unit(dev); 1205 com = device_get_softc(dev); 1206 flags = device_get_flags(dev); 1207 1208 if (unit >= sio_numunits) 1209 sio_numunits = unit + 1; 1210 /* 1211 * sioprobe() has initialized the device registers as follows: 1212 * o cfcr = CFCR_8BITS. 1213 * It is most important that CFCR_DLAB is off, so that the 1214 * data port is not hidden when we enable interrupts. 1215 * o ier = 0. 1216 * Interrupts are only enabled when the line is open. 1217 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 1218 * interrupt control register or the config specifies no irq. 1219 * Keeping MCR_DTR and MCR_RTS off might stop the external 1220 * device from sending before we are ready. 1221 */ 1222 bzero(com, sizeof *com); 1223 com->unit = unit; 1224 com->ioportres = port; 1225 com->bst = rman_get_bustag(port); 1226 com->bsh = rman_get_bushandle(port); 1227 com->cfcr_image = CFCR_8BITS; 1228 com->dtr_wait = 3 * hz; 1229 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 1230 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 1231 com->tx_fifo_size = 1; 1232 com->obufs[0].l_head = com->obuf1; 1233 com->obufs[1].l_head = com->obuf2; 1234 1235 com->data_port = iobase + com_data; 1236 com->int_id_port = iobase + com_iir; 1237 com->modem_ctl_port = iobase + com_mcr; 1238 com->mcr_image = inb(com->modem_ctl_port); 1239 com->line_status_port = iobase + com_lsr; 1240 com->modem_status_port = iobase + com_msr; 1241 com->intr_ctl_port = iobase + com_ier; 1242 1243 if (rclk == 0) 1244 rclk = DEFAULT_RCLK; 1245 com->rclk = rclk; 1246 1247 /* 1248 * We don't use all the flags from <sys/ttydefaults.h> since they 1249 * are only relevant for logins. It's important to have echo off 1250 * initially so that the line doesn't start blathering before the 1251 * echo flag can be turned off. 1252 */ 1253 com->it_in.c_iflag = 0; 1254 com->it_in.c_oflag = 0; 1255 com->it_in.c_cflag = TTYDEF_CFLAG; 1256 com->it_in.c_lflag = 0; 1257 if (unit == comconsole) { 1258 com->it_in.c_iflag = TTYDEF_IFLAG; 1259 com->it_in.c_oflag = TTYDEF_OFLAG; 1260 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 1261 com->it_in.c_lflag = TTYDEF_LFLAG; 1262 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 1263 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 1264 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 1265 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1266 } else 1267 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1268 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1269 com_unlock(); 1270 /* 1271 * Leave i/o resources allocated if this is a `cn'-level 1272 * console, so that other devices can't snarf them. 1273 */ 1274 if (iobase != siocniobase) 1275 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1276 return (ENOMEM); 1277 } 1278 com_unlock(); 1279 termioschars(&com->it_in); 1280 com->it_out = com->it_in; 1281 1282 /* attempt to determine UART type */ 1283 printf("sio%d: type", unit); 1284 1285 1286 #ifdef COM_MULTIPORT 1287 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 1288 #else 1289 if (!COM_IIR_TXRDYBUG(flags)) 1290 #endif 1291 { 1292 u_char scr; 1293 u_char scr1; 1294 u_char scr2; 1295 1296 scr = sio_getreg(com, com_scr); 1297 sio_setreg(com, com_scr, 0xa5); 1298 scr1 = sio_getreg(com, com_scr); 1299 sio_setreg(com, com_scr, 0x5a); 1300 scr2 = sio_getreg(com, com_scr); 1301 sio_setreg(com, com_scr, scr); 1302 if (scr1 != 0xa5 || scr2 != 0x5a) { 1303 printf(" 8250"); 1304 goto determined_type; 1305 } 1306 } 1307 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1308 DELAY(100); 1309 com->st16650a = 0; 1310 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1311 case FIFO_RX_LOW: 1312 printf(" 16450"); 1313 break; 1314 case FIFO_RX_MEDL: 1315 printf(" 16450?"); 1316 break; 1317 case FIFO_RX_MEDH: 1318 printf(" 16550?"); 1319 break; 1320 case FIFO_RX_HIGH: 1321 if (COM_NOFIFO(flags)) { 1322 printf(" 16550A fifo disabled"); 1323 } else { 1324 com->hasfifo = TRUE; 1325 if (COM_ST16650A(flags)) { 1326 com->st16650a = 1; 1327 com->tx_fifo_size = 32; 1328 printf(" ST16650A"); 1329 } else if (COM_TI16754(flags)) { 1330 com->tx_fifo_size = 64; 1331 printf(" TI16754"); 1332 } else { 1333 com->tx_fifo_size = COM_FIFOSIZE(flags); 1334 printf(" 16550A"); 1335 } 1336 } 1337 #ifdef COM_ESP 1338 for (espp = likely_esp_ports; *espp != 0; espp++) 1339 if (espattach(com, *espp)) { 1340 com->tx_fifo_size = 1024; 1341 break; 1342 } 1343 #endif 1344 if (!com->st16650a && !COM_TI16754(flags)) { 1345 if (!com->tx_fifo_size) 1346 com->tx_fifo_size = 16; 1347 else 1348 printf(" lookalike with %d bytes FIFO", 1349 com->tx_fifo_size); 1350 } 1351 1352 break; 1353 } 1354 1355 #ifdef COM_ESP 1356 if (com->esp) { 1357 /* 1358 * Set 16550 compatibility mode. 1359 * We don't use the ESP_MODE_SCALE bit to increase the 1360 * fifo trigger levels because we can't handle large 1361 * bursts of input. 1362 * XXX flow control should be set in comparam(), not here. 1363 */ 1364 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1365 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1366 1367 /* Set RTS/CTS flow control. */ 1368 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1369 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1370 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1371 1372 /* Set flow-control levels. */ 1373 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1374 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1375 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1376 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1377 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1378 } 1379 #endif /* COM_ESP */ 1380 sio_setreg(com, com_fifo, 0); 1381 determined_type: ; 1382 1383 #ifdef COM_MULTIPORT 1384 if (COM_ISMULTIPORT(flags)) { 1385 device_t masterdev; 1386 1387 com->multiport = TRUE; 1388 printf(" (multiport"); 1389 if (unit == COM_MPMASTER(flags)) 1390 printf(" master"); 1391 printf(")"); 1392 masterdev = devclass_get_device(sio_devclass, 1393 COM_MPMASTER(flags)); 1394 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1395 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1396 } 1397 #endif /* COM_MULTIPORT */ 1398 if (unit == comconsole) 1399 printf(", console"); 1400 if (COM_IIR_TXRDYBUG(flags)) 1401 printf(" with a bogus IIR_TXRDY register"); 1402 printf("\n"); 1403 1404 if (!sio_registered) { 1405 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll"); 1406 sio_registered = TRUE; 1407 } 1408 minorbase = UNIT_TO_MINOR(unit); 1409 make_dev(&sio_cdevsw, minorbase, 1410 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1411 make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 1412 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1413 make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 1414 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1415 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 1416 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1417 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 1418 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1419 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 1420 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1421 com->flags = flags; 1422 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1423 pps_init(&com->pps); 1424 1425 rid = 0; 1426 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 1427 RF_ACTIVE); 1428 if (com->irqres) { 1429 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1430 INTR_TYPE_TTY | INTR_TYPE_FAST, 1431 siointr, com, &com->cookie); 1432 if (ret) { 1433 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1434 com->irqres, INTR_TYPE_TTY, 1435 siointr, com, &com->cookie); 1436 if (ret == 0) 1437 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1438 } 1439 if (ret) 1440 device_printf(dev, "could not activate interrupt\n"); 1441 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1442 defined(ALT_BREAK_TO_DEBUGGER)) 1443 /* 1444 * Enable interrupts for early break-to-debugger support 1445 * on the console. 1446 */ 1447 if (ret == 0 && unit == comconsole) 1448 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1449 IER_EMSC); 1450 #endif 1451 } 1452 1453 return (0); 1454 } 1455 1456 static int 1457 sioopen(dev_t dev, int flag, int mode, struct thread *td) 1458 { 1459 struct com_s *com; 1460 int error; 1461 int mynor; 1462 int s; 1463 struct tty *tp; 1464 int unit; 1465 1466 mynor = minor(dev); 1467 unit = MINOR_TO_UNIT(mynor); 1468 com = com_addr(unit); 1469 if (com == NULL) 1470 return (ENXIO); 1471 if (com->gone) 1472 return (ENXIO); 1473 if (mynor & CONTROL_MASK) 1474 return (0); 1475 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1476 s = spltty(); 1477 /* 1478 * We jump to this label after all non-interrupted sleeps to pick 1479 * up any changes of the device state. 1480 */ 1481 open_top: 1482 while (com->state & CS_DTR_OFF) { 1483 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0); 1484 if (com_addr(unit) == NULL) 1485 return (ENXIO); 1486 if (error != 0 || com->gone) 1487 goto out; 1488 } 1489 if (tp->t_state & TS_ISOPEN) { 1490 /* 1491 * The device is open, so everything has been initialized. 1492 * Handle conflicts. 1493 */ 1494 if (mynor & CALLOUT_MASK) { 1495 if (!com->active_out) { 1496 error = EBUSY; 1497 goto out; 1498 } 1499 } else { 1500 if (com->active_out) { 1501 if (flag & O_NONBLOCK) { 1502 error = EBUSY; 1503 goto out; 1504 } 1505 error = tsleep(&com->active_out, 1506 PCATCH, "siobi", 0); 1507 if (com_addr(unit) == NULL) 1508 return (ENXIO); 1509 if (error != 0 || com->gone) 1510 goto out; 1511 goto open_top; 1512 } 1513 } 1514 if (tp->t_state & TS_XCLUDE && suser(td)) { 1515 error = EBUSY; 1516 goto out; 1517 } 1518 } else { 1519 /* 1520 * The device isn't open, so there are no conflicts. 1521 * Initialize it. Initialization is done twice in many 1522 * cases: to preempt sleeping callin opens if we are 1523 * callout, and to complete a callin open after DCD rises. 1524 */ 1525 tp->t_oproc = comstart; 1526 tp->t_param = comparam; 1527 tp->t_stop = comstop; 1528 tp->t_dev = dev; 1529 tp->t_termios = mynor & CALLOUT_MASK 1530 ? com->it_out : com->it_in; 1531 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 1532 com->poll = com->no_irq; 1533 com->poll_output = com->loses_outints; 1534 ++com->wopeners; 1535 error = comparam(tp, &tp->t_termios); 1536 --com->wopeners; 1537 if (error != 0) 1538 goto out; 1539 /* 1540 * XXX we should goto open_top if comparam() slept. 1541 */ 1542 if (com->hasfifo) { 1543 /* 1544 * (Re)enable and drain fifos. 1545 * 1546 * Certain SMC chips cause problems if the fifos 1547 * are enabled while input is ready. Turn off the 1548 * fifo if necessary to clear the input. We test 1549 * the input ready bit after enabling the fifos 1550 * since we've already enabled them in comparam() 1551 * and to handle races between enabling and fresh 1552 * input. 1553 */ 1554 while (TRUE) { 1555 sio_setreg(com, com_fifo, 1556 FIFO_RCV_RST | FIFO_XMT_RST 1557 | com->fifo_image); 1558 /* 1559 * XXX the delays are for superstitious 1560 * historical reasons. It must be less than 1561 * the character time at the maximum 1562 * supported speed (87 usec at 115200 bps 1563 * 8N1). Otherwise we might loop endlessly 1564 * if data is streaming in. We used to use 1565 * delays of 100. That usually worked 1566 * because DELAY(100) used to usually delay 1567 * for about 85 usec instead of 100. 1568 */ 1569 DELAY(50); 1570 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1571 break; 1572 sio_setreg(com, com_fifo, 0); 1573 DELAY(50); 1574 (void) inb(com->data_port); 1575 } 1576 } 1577 1578 com_lock(); 1579 (void) inb(com->line_status_port); 1580 (void) inb(com->data_port); 1581 com->prev_modem_status = com->last_modem_status 1582 = inb(com->modem_status_port); 1583 if (COM_IIR_TXRDYBUG(com->flags)) { 1584 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 1585 | IER_EMSC); 1586 } else { 1587 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 1588 | IER_ERLS | IER_EMSC); 1589 } 1590 com_unlock(); 1591 /* 1592 * Handle initial DCD. Callout devices get a fake initial 1593 * DCD (trapdoor DCD). If we are callout, then any sleeping 1594 * callin opens get woken up and resume sleeping on "siobi" 1595 * instead of "siodcd". 1596 */ 1597 /* 1598 * XXX `mynor & CALLOUT_MASK' should be 1599 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1600 * TRAPDOOR_CARRIER is the default initial state for callout 1601 * devices and SOFT_CARRIER is like CLOCAL except it hides 1602 * the true carrier. 1603 */ 1604 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1605 (*linesw[tp->t_line].l_modem)(tp, 1); 1606 } 1607 /* 1608 * Wait for DCD if necessary. 1609 */ 1610 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1611 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 1612 ++com->wopeners; 1613 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0); 1614 if (com_addr(unit) == NULL) 1615 return (ENXIO); 1616 --com->wopeners; 1617 if (error != 0 || com->gone) 1618 goto out; 1619 goto open_top; 1620 } 1621 error = (*linesw[tp->t_line].l_open)(dev, tp); 1622 disc_optim(tp, &tp->t_termios, com); 1623 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1624 com->active_out = TRUE; 1625 siosettimeout(); 1626 out: 1627 splx(s); 1628 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1629 comhardclose(com); 1630 return (error); 1631 } 1632 1633 static int 1634 sioclose(dev_t dev, int flag, int mode, struct thread *td) 1635 { 1636 struct com_s *com; 1637 int mynor; 1638 int s; 1639 struct tty *tp; 1640 1641 mynor = minor(dev); 1642 if (mynor & CONTROL_MASK) 1643 return (0); 1644 com = com_addr(MINOR_TO_UNIT(mynor)); 1645 if (com == NULL) 1646 return (ENODEV); 1647 tp = com->tp; 1648 s = spltty(); 1649 (*linesw[tp->t_line].l_close)(tp, flag); 1650 disc_optim(tp, &tp->t_termios, com); 1651 comstop(tp, FREAD | FWRITE); 1652 comhardclose(com); 1653 ttyclose(tp); 1654 siosettimeout(); 1655 splx(s); 1656 if (com->gone) { 1657 printf("sio%d: gone\n", com->unit); 1658 s = spltty(); 1659 if (com->ibuf != NULL) 1660 free(com->ibuf, M_DEVBUF); 1661 bzero(tp, sizeof *tp); 1662 splx(s); 1663 } 1664 return (0); 1665 } 1666 1667 static void 1668 comhardclose(com) 1669 struct com_s *com; 1670 { 1671 int s; 1672 struct tty *tp; 1673 int unit; 1674 1675 unit = com->unit; 1676 s = spltty(); 1677 com->poll = FALSE; 1678 com->poll_output = FALSE; 1679 com->do_timestamp = FALSE; 1680 com->do_dcd_timestamp = FALSE; 1681 com->pps.ppsparam.mode = 0; 1682 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1683 tp = com->tp; 1684 1685 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1686 defined(ALT_BREAK_TO_DEBUGGER)) 1687 /* 1688 * Leave interrupts enabled and don't clear DTR if this is the 1689 * console. This allows us to detect break-to-debugger events 1690 * while the console device is closed. 1691 */ 1692 if (com->unit != comconsole) 1693 #endif 1694 { 1695 sio_setreg(com, com_ier, 0); 1696 if (tp->t_cflag & HUPCL 1697 /* 1698 * XXX we will miss any carrier drop between here and the 1699 * next open. Perhaps we should watch DCD even when the 1700 * port is closed; it is not sufficient to check it at 1701 * the next open because it might go up and down while 1702 * we're not watching. 1703 */ 1704 || (!com->active_out 1705 && !(com->prev_modem_status & MSR_DCD) 1706 && !(com->it_in.c_cflag & CLOCAL)) 1707 || !(tp->t_state & TS_ISOPEN)) { 1708 (void)commctl(com, TIOCM_DTR, DMBIC); 1709 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 1710 timeout(siodtrwakeup, com, com->dtr_wait); 1711 com->state |= CS_DTR_OFF; 1712 } 1713 } 1714 } 1715 if (com->hasfifo) { 1716 /* 1717 * Disable fifos so that they are off after controlled 1718 * reboots. Some BIOSes fail to detect 16550s when the 1719 * fifos are enabled. 1720 */ 1721 sio_setreg(com, com_fifo, 0); 1722 } 1723 com->active_out = FALSE; 1724 wakeup(&com->active_out); 1725 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1726 splx(s); 1727 } 1728 1729 static int 1730 sioread(dev, uio, flag) 1731 dev_t dev; 1732 struct uio *uio; 1733 int flag; 1734 { 1735 int mynor; 1736 struct com_s *com; 1737 1738 mynor = minor(dev); 1739 if (mynor & CONTROL_MASK) 1740 return (ENODEV); 1741 com = com_addr(MINOR_TO_UNIT(mynor)); 1742 if (com == NULL || com->gone) 1743 return (ENODEV); 1744 return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 1745 } 1746 1747 static int 1748 siowrite(dev, uio, flag) 1749 dev_t dev; 1750 struct uio *uio; 1751 int flag; 1752 { 1753 int mynor; 1754 struct com_s *com; 1755 int unit; 1756 1757 mynor = minor(dev); 1758 if (mynor & CONTROL_MASK) 1759 return (ENODEV); 1760 1761 unit = MINOR_TO_UNIT(mynor); 1762 com = com_addr(unit); 1763 if (com == NULL || com->gone) 1764 return (ENODEV); 1765 /* 1766 * (XXX) We disallow virtual consoles if the physical console is 1767 * a serial port. This is in case there is a display attached that 1768 * is not the console. In that situation we don't need/want the X 1769 * server taking over the console. 1770 */ 1771 if (constty != NULL && unit == comconsole) 1772 constty = NULL; 1773 return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 1774 } 1775 1776 static void 1777 siobusycheck(chan) 1778 void *chan; 1779 { 1780 struct com_s *com; 1781 int s; 1782 1783 com = (struct com_s *)chan; 1784 1785 /* 1786 * Clear TS_BUSY if low-level output is complete. 1787 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1788 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1789 * called again. Reading the line status port outside of siointr1() 1790 * is safe because CS_BUSY is clear so there are no output interrupts 1791 * to lose. 1792 */ 1793 s = spltty(); 1794 if (com->state & CS_BUSY) 1795 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1796 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1797 == (LSR_TSRE | LSR_TXRDY)) { 1798 com->tp->t_state &= ~TS_BUSY; 1799 ttwwakeup(com->tp); 1800 com->extra_state &= ~CSE_BUSYCHECK; 1801 } else 1802 timeout(siobusycheck, com, hz / 100); 1803 splx(s); 1804 } 1805 1806 static u_int 1807 siodivisor(rclk, speed) 1808 u_long rclk; 1809 speed_t speed; 1810 { 1811 long actual_speed; 1812 u_int divisor; 1813 int error; 1814 1815 if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 1816 return (0); 1817 divisor = (rclk / (8UL * speed) + 1) / 2; 1818 if (divisor == 0 || divisor >= 65536) 1819 return (0); 1820 actual_speed = rclk / (16UL * divisor); 1821 1822 /* 10 times error in percent: */ 1823 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 1824 1825 /* 3.0% maximum error tolerance: */ 1826 if (error < -30 || error > 30) 1827 return (0); 1828 1829 return (divisor); 1830 } 1831 1832 static void 1833 siodtrwakeup(chan) 1834 void *chan; 1835 { 1836 struct com_s *com; 1837 1838 com = (struct com_s *)chan; 1839 com->state &= ~CS_DTR_OFF; 1840 wakeup(&com->dtr_wait); 1841 } 1842 1843 static void 1844 sioinput(com) 1845 struct com_s *com; 1846 { 1847 u_char *buf; 1848 int incc; 1849 u_char line_status; 1850 int recv_data; 1851 struct tty *tp; 1852 1853 buf = com->ibuf; 1854 tp = com->tp; 1855 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1856 com_events -= (com->iptr - com->ibuf); 1857 com->iptr = com->ibuf; 1858 return; 1859 } 1860 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1861 /* 1862 * Avoid the grotesquely inefficient lineswitch routine 1863 * (ttyinput) in "raw" mode. It usually takes about 450 1864 * instructions (that's without canonical processing or echo!). 1865 * slinput is reasonably fast (usually 40 instructions plus 1866 * call overhead). 1867 */ 1868 do { 1869 com_unlock(); 1870 incc = com->iptr - buf; 1871 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1872 && (com->state & CS_RTS_IFLOW 1873 || tp->t_iflag & IXOFF) 1874 && !(tp->t_state & TS_TBLOCK)) 1875 ttyblock(tp); 1876 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1877 += b_to_q((char *)buf, incc, &tp->t_rawq); 1878 buf += incc; 1879 tk_nin += incc; 1880 tk_rawcc += incc; 1881 tp->t_rawcc += incc; 1882 ttwakeup(tp); 1883 if (tp->t_state & TS_TTSTOP 1884 && (tp->t_iflag & IXANY 1885 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1886 tp->t_state &= ~TS_TTSTOP; 1887 tp->t_lflag &= ~FLUSHO; 1888 comstart(tp); 1889 } 1890 com_lock(); 1891 } while (buf < com->iptr); 1892 } else { 1893 do { 1894 com_unlock(); 1895 line_status = buf[com->ierroff]; 1896 recv_data = *buf++; 1897 if (line_status 1898 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1899 if (line_status & LSR_BI) 1900 recv_data |= TTY_BI; 1901 if (line_status & LSR_FE) 1902 recv_data |= TTY_FE; 1903 if (line_status & LSR_OE) 1904 recv_data |= TTY_OE; 1905 if (line_status & LSR_PE) 1906 recv_data |= TTY_PE; 1907 } 1908 (*linesw[tp->t_line].l_rint)(recv_data, tp); 1909 com_lock(); 1910 } while (buf < com->iptr); 1911 } 1912 com_events -= (com->iptr - com->ibuf); 1913 com->iptr = com->ibuf; 1914 1915 /* 1916 * There is now room for another low-level buffer full of input, 1917 * so enable RTS if it is now disabled and there is room in the 1918 * high-level buffer. 1919 */ 1920 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1921 !(tp->t_state & TS_TBLOCK)) 1922 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1923 } 1924 1925 void 1926 siointr(arg) 1927 void *arg; 1928 { 1929 #ifndef COM_MULTIPORT 1930 com_lock(); 1931 siointr1((struct com_s *) arg); 1932 com_unlock(); 1933 #else /* COM_MULTIPORT */ 1934 bool_t possibly_more_intrs; 1935 int unit; 1936 struct com_s *com; 1937 1938 /* 1939 * Loop until there is no activity on any port. This is necessary 1940 * to get an interrupt edge more than to avoid another interrupt. 1941 * If the IRQ signal is just an OR of the IRQ signals from several 1942 * devices, then the edge from one may be lost because another is 1943 * on. 1944 */ 1945 com_lock(); 1946 do { 1947 possibly_more_intrs = FALSE; 1948 for (unit = 0; unit < sio_numunits; ++unit) { 1949 com = com_addr(unit); 1950 /* 1951 * XXX com_lock(); 1952 * would it work here, or be counter-productive? 1953 */ 1954 if (com != NULL 1955 && !com->gone 1956 && (inb(com->int_id_port) & IIR_IMASK) 1957 != IIR_NOPEND) { 1958 siointr1(com); 1959 possibly_more_intrs = TRUE; 1960 } 1961 /* XXX com_unlock(); */ 1962 } 1963 } while (possibly_more_intrs); 1964 com_unlock(); 1965 #endif /* COM_MULTIPORT */ 1966 } 1967 1968 static void 1969 siointr1(com) 1970 struct com_s *com; 1971 { 1972 u_char line_status; 1973 u_char modem_status; 1974 u_char *ioptr; 1975 u_char recv_data; 1976 u_char int_ctl; 1977 u_char int_ctl_new; 1978 struct timecounter *tc; 1979 u_int count; 1980 1981 int_ctl = inb(com->intr_ctl_port); 1982 int_ctl_new = int_ctl; 1983 1984 while (!com->gone) { 1985 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1986 modem_status = inb(com->modem_status_port); 1987 if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 1988 tc = timecounter; 1989 count = tc->tc_get_timecount(tc); 1990 pps_event(&com->pps, tc, count, 1991 (modem_status & MSR_DCD) ? 1992 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1993 } 1994 } 1995 line_status = inb(com->line_status_port); 1996 1997 /* input event? (check first to help avoid overruns) */ 1998 while (line_status & LSR_RCV_MASK) { 1999 /* break/unnattached error bits or real input? */ 2000 if (!(line_status & LSR_RXRDY)) 2001 recv_data = 0; 2002 else 2003 recv_data = inb(com->data_port); 2004 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 2005 /* 2006 * Solaris implements a new BREAK which is initiated 2007 * by a character sequence CR ~ ^b which is similar 2008 * to a familiar pattern used on Sun servers by the 2009 * Remote Console. 2010 */ 2011 #define KEY_CRTLB 2 /* ^B */ 2012 #define KEY_CR 13 /* CR '\r' */ 2013 #define KEY_TILDE 126 /* ~ */ 2014 2015 if (com->unit == comconsole) { 2016 static int brk_state1 = 0, brk_state2 = 0; 2017 if (recv_data == KEY_CR) { 2018 brk_state1 = recv_data; 2019 brk_state2 = 0; 2020 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) { 2021 if (recv_data == KEY_TILDE) 2022 brk_state2 = recv_data; 2023 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) { 2024 breakpoint(); 2025 brk_state1 = brk_state2 = 0; 2026 goto cont; 2027 } else 2028 brk_state2 = 0; 2029 } else 2030 brk_state1 = 0; 2031 } 2032 #endif 2033 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 2034 /* 2035 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 2036 * Otherwise, push the work to a higher level 2037 * (to handle PARMRK) if we're bypassing. 2038 * Otherwise, convert BI/FE and PE+INPCK to 0. 2039 * 2040 * This makes bypassing work right in the 2041 * usual "raw" case (IGNBRK set, and IGNPAR 2042 * and INPCK clear). 2043 * 2044 * Note: BI together with FE/PE means just BI. 2045 */ 2046 if (line_status & LSR_BI) { 2047 #if defined(DDB) && defined(BREAK_TO_DEBUGGER) 2048 if (com->unit == comconsole) { 2049 breakpoint(); 2050 goto cont; 2051 } 2052 #endif 2053 if (com->tp == NULL 2054 || com->tp->t_iflag & IGNBRK) 2055 goto cont; 2056 } else { 2057 if (com->tp == NULL 2058 || com->tp->t_iflag & IGNPAR) 2059 goto cont; 2060 } 2061 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 2062 && (line_status & (LSR_BI | LSR_FE) 2063 || com->tp->t_iflag & INPCK)) 2064 recv_data = 0; 2065 } 2066 ++com->bytes_in; 2067 if (com->hotchar != 0 && recv_data == com->hotchar) 2068 setsofttty(); 2069 ioptr = com->iptr; 2070 if (ioptr >= com->ibufend) 2071 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 2072 else { 2073 if (com->do_timestamp) 2074 microtime(&com->timestamp); 2075 ++com_events; 2076 schedsofttty(); 2077 #if 0 /* for testing input latency vs efficiency */ 2078 if (com->iptr - com->ibuf == 8) 2079 setsofttty(); 2080 #endif 2081 ioptr[0] = recv_data; 2082 ioptr[com->ierroff] = line_status; 2083 com->iptr = ++ioptr; 2084 if (ioptr == com->ihighwater 2085 && com->state & CS_RTS_IFLOW) 2086 outb(com->modem_ctl_port, 2087 com->mcr_image &= ~MCR_RTS); 2088 if (line_status & LSR_OE) 2089 CE_RECORD(com, CE_OVERRUN); 2090 } 2091 cont: 2092 /* 2093 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 2094 * jump from the top of the loop to here 2095 */ 2096 line_status = inb(com->line_status_port) & 0x7F; 2097 } 2098 2099 /* modem status change? (always check before doing output) */ 2100 modem_status = inb(com->modem_status_port); 2101 if (modem_status != com->last_modem_status) { 2102 if (com->do_dcd_timestamp 2103 && !(com->last_modem_status & MSR_DCD) 2104 && modem_status & MSR_DCD) 2105 microtime(&com->dcd_timestamp); 2106 2107 /* 2108 * Schedule high level to handle DCD changes. Note 2109 * that we don't use the delta bits anywhere. Some 2110 * UARTs mess them up, and it's easy to remember the 2111 * previous bits and calculate the delta. 2112 */ 2113 com->last_modem_status = modem_status; 2114 if (!(com->state & CS_CHECKMSR)) { 2115 com_events += LOTS_OF_EVENTS; 2116 com->state |= CS_CHECKMSR; 2117 setsofttty(); 2118 } 2119 2120 /* handle CTS change immediately for crisp flow ctl */ 2121 if (com->state & CS_CTS_OFLOW) { 2122 if (modem_status & MSR_CTS) 2123 com->state |= CS_ODEVREADY; 2124 else 2125 com->state &= ~CS_ODEVREADY; 2126 } 2127 } 2128 2129 /* output queued and everything ready? */ 2130 if (line_status & LSR_TXRDY 2131 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 2132 ioptr = com->obufq.l_head; 2133 if (com->tx_fifo_size > 1) { 2134 u_int ocount; 2135 2136 ocount = com->obufq.l_tail - ioptr; 2137 if (ocount > com->tx_fifo_size) 2138 ocount = com->tx_fifo_size; 2139 com->bytes_out += ocount; 2140 do 2141 outb(com->data_port, *ioptr++); 2142 while (--ocount != 0); 2143 } else { 2144 outb(com->data_port, *ioptr++); 2145 ++com->bytes_out; 2146 } 2147 com->obufq.l_head = ioptr; 2148 if (COM_IIR_TXRDYBUG(com->flags)) { 2149 int_ctl_new = int_ctl | IER_ETXRDY; 2150 } 2151 if (ioptr >= com->obufq.l_tail) { 2152 struct lbq *qp; 2153 2154 qp = com->obufq.l_next; 2155 qp->l_queued = FALSE; 2156 qp = qp->l_next; 2157 if (qp != NULL) { 2158 com->obufq.l_head = qp->l_head; 2159 com->obufq.l_tail = qp->l_tail; 2160 com->obufq.l_next = qp; 2161 } else { 2162 /* output just completed */ 2163 if (COM_IIR_TXRDYBUG(com->flags)) { 2164 int_ctl_new = int_ctl & ~IER_ETXRDY; 2165 } 2166 com->state &= ~CS_BUSY; 2167 } 2168 if (!(com->state & CS_ODONE)) { 2169 com_events += LOTS_OF_EVENTS; 2170 com->state |= CS_ODONE; 2171 setsofttty(); /* handle at high level ASAP */ 2172 } 2173 } 2174 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 2175 outb(com->intr_ctl_port, int_ctl_new); 2176 } 2177 } 2178 2179 /* finished? */ 2180 #ifndef COM_MULTIPORT 2181 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 2182 #endif /* COM_MULTIPORT */ 2183 return; 2184 } 2185 } 2186 2187 static int 2188 sioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td) 2189 { 2190 struct com_s *com; 2191 int error; 2192 int mynor; 2193 int s; 2194 struct tty *tp; 2195 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2196 u_long oldcmd; 2197 struct termios term; 2198 #endif 2199 2200 mynor = minor(dev); 2201 com = com_addr(MINOR_TO_UNIT(mynor)); 2202 if (com == NULL || com->gone) 2203 return (ENODEV); 2204 if (mynor & CONTROL_MASK) { 2205 struct termios *ct; 2206 2207 switch (mynor & CONTROL_MASK) { 2208 case CONTROL_INIT_STATE: 2209 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 2210 break; 2211 case CONTROL_LOCK_STATE: 2212 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 2213 break; 2214 default: 2215 return (ENODEV); /* /dev/nodev */ 2216 } 2217 switch (cmd) { 2218 case TIOCSETA: 2219 error = suser(td); 2220 if (error != 0) 2221 return (error); 2222 *ct = *(struct termios *)data; 2223 return (0); 2224 case TIOCGETA: 2225 *(struct termios *)data = *ct; 2226 return (0); 2227 case TIOCGETD: 2228 *(int *)data = TTYDISC; 2229 return (0); 2230 case TIOCGWINSZ: 2231 bzero(data, sizeof(struct winsize)); 2232 return (0); 2233 default: 2234 return (ENOTTY); 2235 } 2236 } 2237 tp = com->tp; 2238 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2239 term = tp->t_termios; 2240 oldcmd = cmd; 2241 error = ttsetcompat(tp, &cmd, data, &term); 2242 if (error != 0) 2243 return (error); 2244 if (cmd != oldcmd) 2245 data = (caddr_t)&term; 2246 #endif 2247 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 2248 int cc; 2249 struct termios *dt = (struct termios *)data; 2250 struct termios *lt = mynor & CALLOUT_MASK 2251 ? &com->lt_out : &com->lt_in; 2252 2253 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2254 | (dt->c_iflag & ~lt->c_iflag); 2255 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2256 | (dt->c_oflag & ~lt->c_oflag); 2257 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2258 | (dt->c_cflag & ~lt->c_cflag); 2259 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2260 | (dt->c_lflag & ~lt->c_lflag); 2261 for (cc = 0; cc < NCCS; ++cc) 2262 if (lt->c_cc[cc] != 0) 2263 dt->c_cc[cc] = tp->t_cc[cc]; 2264 if (lt->c_ispeed != 0) 2265 dt->c_ispeed = tp->t_ispeed; 2266 if (lt->c_ospeed != 0) 2267 dt->c_ospeed = tp->t_ospeed; 2268 } 2269 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 2270 if (error != ENOIOCTL) 2271 return (error); 2272 s = spltty(); 2273 error = ttioctl(tp, cmd, data, flag); 2274 disc_optim(tp, &tp->t_termios, com); 2275 if (error != ENOIOCTL) { 2276 splx(s); 2277 return (error); 2278 } 2279 switch (cmd) { 2280 case TIOCSBRK: 2281 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2282 break; 2283 case TIOCCBRK: 2284 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2285 break; 2286 case TIOCSDTR: 2287 (void)commctl(com, TIOCM_DTR, DMBIS); 2288 break; 2289 case TIOCCDTR: 2290 (void)commctl(com, TIOCM_DTR, DMBIC); 2291 break; 2292 /* 2293 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 2294 * changes get undone on the next call to comparam(). 2295 */ 2296 case TIOCMSET: 2297 (void)commctl(com, *(int *)data, DMSET); 2298 break; 2299 case TIOCMBIS: 2300 (void)commctl(com, *(int *)data, DMBIS); 2301 break; 2302 case TIOCMBIC: 2303 (void)commctl(com, *(int *)data, DMBIC); 2304 break; 2305 case TIOCMGET: 2306 *(int *)data = commctl(com, 0, DMGET); 2307 break; 2308 case TIOCMSDTRWAIT: 2309 /* must be root since the wait applies to following logins */ 2310 error = suser(td); 2311 if (error != 0) { 2312 splx(s); 2313 return (error); 2314 } 2315 com->dtr_wait = *(int *)data * hz / 100; 2316 break; 2317 case TIOCMGDTRWAIT: 2318 *(int *)data = com->dtr_wait * 100 / hz; 2319 break; 2320 case TIOCTIMESTAMP: 2321 com->do_timestamp = TRUE; 2322 *(struct timeval *)data = com->timestamp; 2323 break; 2324 case TIOCDCDTIMESTAMP: 2325 com->do_dcd_timestamp = TRUE; 2326 *(struct timeval *)data = com->dcd_timestamp; 2327 break; 2328 default: 2329 splx(s); 2330 error = pps_ioctl(cmd, data, &com->pps); 2331 if (error == ENODEV) 2332 error = ENOTTY; 2333 return (error); 2334 } 2335 splx(s); 2336 return (0); 2337 } 2338 2339 static void 2340 siopoll(void *dummy) 2341 { 2342 int unit; 2343 2344 if (com_events == 0) 2345 return; 2346 repeat: 2347 for (unit = 0; unit < sio_numunits; ++unit) { 2348 struct com_s *com; 2349 int incc; 2350 struct tty *tp; 2351 2352 com = com_addr(unit); 2353 if (com == NULL) 2354 continue; 2355 tp = com->tp; 2356 if (tp == NULL || com->gone) { 2357 /* 2358 * Discard any events related to never-opened or 2359 * going-away devices. 2360 */ 2361 com_lock(); 2362 incc = com->iptr - com->ibuf; 2363 com->iptr = com->ibuf; 2364 if (com->state & CS_CHECKMSR) { 2365 incc += LOTS_OF_EVENTS; 2366 com->state &= ~CS_CHECKMSR; 2367 } 2368 com_events -= incc; 2369 com_unlock(); 2370 continue; 2371 } 2372 if (com->iptr != com->ibuf) { 2373 com_lock(); 2374 sioinput(com); 2375 com_unlock(); 2376 } 2377 if (com->state & CS_CHECKMSR) { 2378 u_char delta_modem_status; 2379 2380 com_lock(); 2381 delta_modem_status = com->last_modem_status 2382 ^ com->prev_modem_status; 2383 com->prev_modem_status = com->last_modem_status; 2384 com_events -= LOTS_OF_EVENTS; 2385 com->state &= ~CS_CHECKMSR; 2386 com_unlock(); 2387 if (delta_modem_status & MSR_DCD) 2388 (*linesw[tp->t_line].l_modem) 2389 (tp, com->prev_modem_status & MSR_DCD); 2390 } 2391 if (com->state & CS_ODONE) { 2392 com_lock(); 2393 com_events -= LOTS_OF_EVENTS; 2394 com->state &= ~CS_ODONE; 2395 com_unlock(); 2396 if (!(com->state & CS_BUSY) 2397 && !(com->extra_state & CSE_BUSYCHECK)) { 2398 timeout(siobusycheck, com, hz / 100); 2399 com->extra_state |= CSE_BUSYCHECK; 2400 } 2401 (*linesw[tp->t_line].l_start)(tp); 2402 } 2403 if (com_events == 0) 2404 break; 2405 } 2406 if (com_events >= LOTS_OF_EVENTS) 2407 goto repeat; 2408 } 2409 2410 static int 2411 comparam(tp, t) 2412 struct tty *tp; 2413 struct termios *t; 2414 { 2415 u_int cfcr; 2416 int cflag; 2417 struct com_s *com; 2418 u_int divisor; 2419 u_char dlbh; 2420 u_char dlbl; 2421 int s; 2422 int unit; 2423 2424 unit = DEV_TO_UNIT(tp->t_dev); 2425 com = com_addr(unit); 2426 if (com == NULL) 2427 return (ENODEV); 2428 2429 /* do historical conversions */ 2430 if (t->c_ispeed == 0) 2431 t->c_ispeed = t->c_ospeed; 2432 2433 /* check requested parameters */ 2434 if (t->c_ospeed == 0) 2435 divisor = 0; 2436 else { 2437 if (t->c_ispeed != t->c_ospeed) 2438 return (EINVAL); 2439 divisor = siodivisor(com->rclk, t->c_ispeed); 2440 if (divisor == 0) 2441 return (EINVAL); 2442 } 2443 2444 /* parameters are OK, convert them to the com struct and the device */ 2445 s = spltty(); 2446 if (divisor == 0) 2447 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 2448 else 2449 (void)commctl(com, TIOCM_DTR, DMBIS); 2450 cflag = t->c_cflag; 2451 switch (cflag & CSIZE) { 2452 case CS5: 2453 cfcr = CFCR_5BITS; 2454 break; 2455 case CS6: 2456 cfcr = CFCR_6BITS; 2457 break; 2458 case CS7: 2459 cfcr = CFCR_7BITS; 2460 break; 2461 default: 2462 cfcr = CFCR_8BITS; 2463 break; 2464 } 2465 if (cflag & PARENB) { 2466 cfcr |= CFCR_PENAB; 2467 if (!(cflag & PARODD)) 2468 cfcr |= CFCR_PEVEN; 2469 } 2470 if (cflag & CSTOPB) 2471 cfcr |= CFCR_STOPB; 2472 2473 if (com->hasfifo && divisor != 0) { 2474 /* 2475 * Use a fifo trigger level low enough so that the input 2476 * latency from the fifo is less than about 16 msec and 2477 * the total latency is less than about 30 msec. These 2478 * latencies are reasonable for humans. Serial comms 2479 * protocols shouldn't expect anything better since modem 2480 * latencies are larger. 2481 * 2482 * Interrupts can be held up for long periods of time 2483 * due to inefficiencies in other parts of the kernel, 2484 * certain video cards, etc. Setting the FIFO trigger 2485 * point to MEDH instead of HIGH gives us 694uS of slop 2486 * (8 character times) instead of 173uS (2 character times) 2487 * @ 115200 bps. 2488 */ 2489 com->fifo_image = t->c_ospeed <= 4800 2490 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 2491 #ifdef COM_ESP 2492 /* 2493 * The Hayes ESP card needs the fifo DMA mode bit set 2494 * in compatibility mode. If not, it will interrupt 2495 * for each character received. 2496 */ 2497 if (com->esp) 2498 com->fifo_image |= FIFO_DMA_MODE; 2499 #endif 2500 sio_setreg(com, com_fifo, com->fifo_image); 2501 } 2502 2503 /* 2504 * This returns with interrupts disabled so that we can complete 2505 * the speed change atomically. Keeping interrupts disabled is 2506 * especially important while com_data is hidden. 2507 */ 2508 (void) siosetwater(com, t->c_ispeed); 2509 2510 if (divisor != 0) { 2511 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2512 /* 2513 * Only set the divisor registers if they would change, 2514 * since on some 16550 incompatibles (UMC8669F), setting 2515 * them while input is arriving them loses sync until 2516 * data stops arriving. 2517 */ 2518 dlbl = divisor & 0xFF; 2519 if (sio_getreg(com, com_dlbl) != dlbl) 2520 sio_setreg(com, com_dlbl, dlbl); 2521 dlbh = divisor >> 8; 2522 if (sio_getreg(com, com_dlbh) != dlbh) 2523 sio_setreg(com, com_dlbh, dlbh); 2524 } 2525 2526 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2527 2528 if (!(tp->t_state & TS_TTSTOP)) 2529 com->state |= CS_TTGO; 2530 2531 if (cflag & CRTS_IFLOW) { 2532 if (com->st16650a) { 2533 sio_setreg(com, com_cfcr, 0xbf); 2534 sio_setreg(com, com_fifo, 2535 sio_getreg(com, com_fifo) | 0x40); 2536 } 2537 com->state |= CS_RTS_IFLOW; 2538 /* 2539 * If CS_RTS_IFLOW just changed from off to on, the change 2540 * needs to be propagated to MCR_RTS. This isn't urgent, 2541 * so do it later by calling comstart() instead of repeating 2542 * a lot of code from comstart() here. 2543 */ 2544 } else if (com->state & CS_RTS_IFLOW) { 2545 com->state &= ~CS_RTS_IFLOW; 2546 /* 2547 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2548 * on here, since comstart() won't do it later. 2549 */ 2550 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2551 if (com->st16650a) { 2552 sio_setreg(com, com_cfcr, 0xbf); 2553 sio_setreg(com, com_fifo, 2554 sio_getreg(com, com_fifo) & ~0x40); 2555 } 2556 } 2557 2558 2559 /* 2560 * Set up state to handle output flow control. 2561 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2562 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2563 */ 2564 com->state |= CS_ODEVREADY; 2565 com->state &= ~CS_CTS_OFLOW; 2566 if (cflag & CCTS_OFLOW) { 2567 com->state |= CS_CTS_OFLOW; 2568 if (!(com->last_modem_status & MSR_CTS)) 2569 com->state &= ~CS_ODEVREADY; 2570 if (com->st16650a) { 2571 sio_setreg(com, com_cfcr, 0xbf); 2572 sio_setreg(com, com_fifo, 2573 sio_getreg(com, com_fifo) | 0x80); 2574 } 2575 } else { 2576 if (com->st16650a) { 2577 sio_setreg(com, com_cfcr, 0xbf); 2578 sio_setreg(com, com_fifo, 2579 sio_getreg(com, com_fifo) & ~0x80); 2580 } 2581 } 2582 2583 sio_setreg(com, com_cfcr, com->cfcr_image); 2584 2585 /* XXX shouldn't call functions while intrs are disabled. */ 2586 disc_optim(tp, t, com); 2587 /* 2588 * Recover from fiddling with CS_TTGO. We used to call siointr1() 2589 * unconditionally, but that defeated the careful discarding of 2590 * stale input in sioopen(). 2591 */ 2592 if (com->state >= (CS_BUSY | CS_TTGO)) 2593 siointr1(com); 2594 2595 com_unlock(); 2596 splx(s); 2597 comstart(tp); 2598 if (com->ibufold != NULL) { 2599 free(com->ibufold, M_DEVBUF); 2600 com->ibufold = NULL; 2601 } 2602 return (0); 2603 } 2604 2605 static int 2606 siosetwater(com, speed) 2607 struct com_s *com; 2608 speed_t speed; 2609 { 2610 int cp4ticks; 2611 u_char *ibuf; 2612 int ibufsize; 2613 struct tty *tp; 2614 2615 /* 2616 * Make the buffer size large enough to handle a softtty interrupt 2617 * latency of about 2 ticks without loss of throughput or data 2618 * (about 3 ticks if input flow control is not used or not honoured, 2619 * but a bit less for CS5-CS7 modes). 2620 */ 2621 cp4ticks = speed / 10 / hz * 4; 2622 for (ibufsize = 128; ibufsize < cp4ticks;) 2623 ibufsize <<= 1; 2624 if (ibufsize == com->ibufsize) { 2625 com_lock(); 2626 return (0); 2627 } 2628 2629 /* 2630 * Allocate input buffer. The extra factor of 2 in the size is 2631 * to allow for an error byte for each input byte. 2632 */ 2633 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 2634 if (ibuf == NULL) { 2635 com_lock(); 2636 return (ENOMEM); 2637 } 2638 2639 /* Initialize non-critical variables. */ 2640 com->ibufold = com->ibuf; 2641 com->ibufsize = ibufsize; 2642 tp = com->tp; 2643 if (tp != NULL) { 2644 tp->t_ififosize = 2 * ibufsize; 2645 tp->t_ispeedwat = (speed_t)-1; 2646 tp->t_ospeedwat = (speed_t)-1; 2647 } 2648 2649 /* 2650 * Read current input buffer, if any. Continue with interrupts 2651 * disabled. 2652 */ 2653 com_lock(); 2654 if (com->iptr != com->ibuf) 2655 sioinput(com); 2656 2657 /*- 2658 * Initialize critical variables, including input buffer watermarks. 2659 * The external device is asked to stop sending when the buffer 2660 * exactly reaches high water, or when the high level requests it. 2661 * The high level is notified immediately (rather than at a later 2662 * clock tick) when this watermark is reached. 2663 * The buffer size is chosen so the watermark should almost never 2664 * be reached. 2665 * The low watermark is invisibly 0 since the buffer is always 2666 * emptied all at once. 2667 */ 2668 com->iptr = com->ibuf = ibuf; 2669 com->ibufend = ibuf + ibufsize; 2670 com->ierroff = ibufsize; 2671 com->ihighwater = ibuf + 3 * ibufsize / 4; 2672 return (0); 2673 } 2674 2675 static void 2676 comstart(tp) 2677 struct tty *tp; 2678 { 2679 struct com_s *com; 2680 int s; 2681 int unit; 2682 2683 unit = DEV_TO_UNIT(tp->t_dev); 2684 com = com_addr(unit); 2685 if (com == NULL) 2686 return; 2687 s = spltty(); 2688 com_lock(); 2689 if (tp->t_state & TS_TTSTOP) 2690 com->state &= ~CS_TTGO; 2691 else 2692 com->state |= CS_TTGO; 2693 if (tp->t_state & TS_TBLOCK) { 2694 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2695 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2696 } else { 2697 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2698 && com->state & CS_RTS_IFLOW) 2699 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2700 } 2701 com_unlock(); 2702 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2703 ttwwakeup(tp); 2704 splx(s); 2705 return; 2706 } 2707 if (tp->t_outq.c_cc != 0) { 2708 struct lbq *qp; 2709 struct lbq *next; 2710 2711 if (!com->obufs[0].l_queued) { 2712 com->obufs[0].l_tail 2713 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2714 sizeof com->obuf1); 2715 com->obufs[0].l_next = NULL; 2716 com->obufs[0].l_queued = TRUE; 2717 com_lock(); 2718 if (com->state & CS_BUSY) { 2719 qp = com->obufq.l_next; 2720 while ((next = qp->l_next) != NULL) 2721 qp = next; 2722 qp->l_next = &com->obufs[0]; 2723 } else { 2724 com->obufq.l_head = com->obufs[0].l_head; 2725 com->obufq.l_tail = com->obufs[0].l_tail; 2726 com->obufq.l_next = &com->obufs[0]; 2727 com->state |= CS_BUSY; 2728 } 2729 com_unlock(); 2730 } 2731 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2732 com->obufs[1].l_tail 2733 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2734 sizeof com->obuf2); 2735 com->obufs[1].l_next = NULL; 2736 com->obufs[1].l_queued = TRUE; 2737 com_lock(); 2738 if (com->state & CS_BUSY) { 2739 qp = com->obufq.l_next; 2740 while ((next = qp->l_next) != NULL) 2741 qp = next; 2742 qp->l_next = &com->obufs[1]; 2743 } else { 2744 com->obufq.l_head = com->obufs[1].l_head; 2745 com->obufq.l_tail = com->obufs[1].l_tail; 2746 com->obufq.l_next = &com->obufs[1]; 2747 com->state |= CS_BUSY; 2748 } 2749 com_unlock(); 2750 } 2751 tp->t_state |= TS_BUSY; 2752 } 2753 com_lock(); 2754 if (com->state >= (CS_BUSY | CS_TTGO)) 2755 siointr1(com); /* fake interrupt to start output */ 2756 com_unlock(); 2757 ttwwakeup(tp); 2758 splx(s); 2759 } 2760 2761 static void 2762 comstop(tp, rw) 2763 struct tty *tp; 2764 int rw; 2765 { 2766 struct com_s *com; 2767 2768 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2769 if (com == NULL || com->gone) 2770 return; 2771 com_lock(); 2772 if (rw & FWRITE) { 2773 if (com->hasfifo) 2774 #ifdef COM_ESP 2775 /* XXX avoid h/w bug. */ 2776 if (!com->esp) 2777 #endif 2778 sio_setreg(com, com_fifo, 2779 FIFO_XMT_RST | com->fifo_image); 2780 com->obufs[0].l_queued = FALSE; 2781 com->obufs[1].l_queued = FALSE; 2782 if (com->state & CS_ODONE) 2783 com_events -= LOTS_OF_EVENTS; 2784 com->state &= ~(CS_ODONE | CS_BUSY); 2785 com->tp->t_state &= ~TS_BUSY; 2786 } 2787 if (rw & FREAD) { 2788 if (com->hasfifo) 2789 #ifdef COM_ESP 2790 /* XXX avoid h/w bug. */ 2791 if (!com->esp) 2792 #endif 2793 sio_setreg(com, com_fifo, 2794 FIFO_RCV_RST | com->fifo_image); 2795 com_events -= (com->iptr - com->ibuf); 2796 com->iptr = com->ibuf; 2797 } 2798 com_unlock(); 2799 comstart(tp); 2800 } 2801 2802 static int 2803 commctl(com, bits, how) 2804 struct com_s *com; 2805 int bits; 2806 int how; 2807 { 2808 int mcr; 2809 int msr; 2810 2811 if (how == DMGET) { 2812 bits = TIOCM_LE; /* XXX - always enabled while open */ 2813 mcr = com->mcr_image; 2814 if (mcr & MCR_DTR) 2815 bits |= TIOCM_DTR; 2816 if (mcr & MCR_RTS) 2817 bits |= TIOCM_RTS; 2818 msr = com->prev_modem_status; 2819 if (msr & MSR_CTS) 2820 bits |= TIOCM_CTS; 2821 if (msr & MSR_DCD) 2822 bits |= TIOCM_CD; 2823 if (msr & MSR_DSR) 2824 bits |= TIOCM_DSR; 2825 /* 2826 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 2827 * more volatile by reading the modem status a lot. Perhaps 2828 * we should latch both bits until the status is read here. 2829 */ 2830 if (msr & (MSR_RI | MSR_TERI)) 2831 bits |= TIOCM_RI; 2832 return (bits); 2833 } 2834 mcr = 0; 2835 if (bits & TIOCM_DTR) 2836 mcr |= MCR_DTR; 2837 if (bits & TIOCM_RTS) 2838 mcr |= MCR_RTS; 2839 if (com->gone) 2840 return(0); 2841 com_lock(); 2842 switch (how) { 2843 case DMSET: 2844 outb(com->modem_ctl_port, 2845 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 2846 break; 2847 case DMBIS: 2848 outb(com->modem_ctl_port, com->mcr_image |= mcr); 2849 break; 2850 case DMBIC: 2851 outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 2852 break; 2853 } 2854 com_unlock(); 2855 return (0); 2856 } 2857 2858 static void 2859 siosettimeout() 2860 { 2861 struct com_s *com; 2862 bool_t someopen; 2863 int unit; 2864 2865 /* 2866 * Set our timeout period to 1 second if no polled devices are open. 2867 * Otherwise set it to max(1/200, 1/hz). 2868 * Enable timeouts iff some device is open. 2869 */ 2870 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2871 sio_timeout = hz; 2872 someopen = FALSE; 2873 for (unit = 0; unit < sio_numunits; ++unit) { 2874 com = com_addr(unit); 2875 if (com != NULL && com->tp != NULL 2876 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2877 someopen = TRUE; 2878 if (com->poll || com->poll_output) { 2879 sio_timeout = hz > 200 ? hz / 200 : 1; 2880 break; 2881 } 2882 } 2883 } 2884 if (someopen) { 2885 sio_timeouts_until_log = hz / sio_timeout; 2886 sio_timeout_handle = timeout(comwakeup, (void *)NULL, 2887 sio_timeout); 2888 } else { 2889 /* Flush error messages, if any. */ 2890 sio_timeouts_until_log = 1; 2891 comwakeup((void *)NULL); 2892 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2893 } 2894 } 2895 2896 static void 2897 comwakeup(chan) 2898 void *chan; 2899 { 2900 struct com_s *com; 2901 int unit; 2902 2903 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 2904 2905 /* 2906 * Recover from lost output interrupts. 2907 * Poll any lines that don't use interrupts. 2908 */ 2909 for (unit = 0; unit < sio_numunits; ++unit) { 2910 com = com_addr(unit); 2911 if (com != NULL && !com->gone 2912 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2913 com_lock(); 2914 siointr1(com); 2915 com_unlock(); 2916 } 2917 } 2918 2919 /* 2920 * Check for and log errors, but not too often. 2921 */ 2922 if (--sio_timeouts_until_log > 0) 2923 return; 2924 sio_timeouts_until_log = hz / sio_timeout; 2925 for (unit = 0; unit < sio_numunits; ++unit) { 2926 int errnum; 2927 2928 com = com_addr(unit); 2929 if (com == NULL) 2930 continue; 2931 if (com->gone) 2932 continue; 2933 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2934 u_int delta; 2935 u_long total; 2936 2937 com_lock(); 2938 delta = com->delta_error_counts[errnum]; 2939 com->delta_error_counts[errnum] = 0; 2940 com_unlock(); 2941 if (delta == 0) 2942 continue; 2943 total = com->error_counts[errnum] += delta; 2944 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2945 unit, delta, error_desc[errnum], 2946 delta == 1 ? "" : "s", total); 2947 } 2948 } 2949 } 2950 2951 static void 2952 disc_optim(tp, t, com) 2953 struct tty *tp; 2954 struct termios *t; 2955 struct com_s *com; 2956 { 2957 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 2958 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 2959 && (!(t->c_iflag & PARMRK) 2960 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 2961 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 2962 && linesw[tp->t_line].l_rint == ttyinput) 2963 tp->t_state |= TS_CAN_BYPASS_L_RINT; 2964 else 2965 tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 2966 com->hotchar = linesw[tp->t_line].l_hotchar; 2967 } 2968 2969 /* 2970 * Following are all routines needed for SIO to act as console 2971 */ 2972 #include <sys/cons.h> 2973 2974 struct siocnstate { 2975 u_char dlbl; 2976 u_char dlbh; 2977 u_char ier; 2978 u_char cfcr; 2979 u_char mcr; 2980 }; 2981 2982 static speed_t siocngetspeed __P((Port_t, u_long rclk)); 2983 static void siocnclose __P((struct siocnstate *sp, Port_t iobase)); 2984 static void siocnopen __P((struct siocnstate *sp, Port_t iobase, int speed)); 2985 static void siocntxwait __P((Port_t iobase)); 2986 2987 static cn_probe_t siocnprobe; 2988 static cn_init_t siocninit; 2989 static cn_checkc_t siocncheckc; 2990 static cn_getc_t siocngetc; 2991 static cn_putc_t siocnputc; 2992 2993 #ifdef __i386__ 2994 CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc, 2995 siocnputc, NULL); 2996 #endif 2997 2998 /* To get the GDB related variables */ 2999 #if DDB > 0 3000 #include <ddb/ddb.h> 3001 #endif 3002 3003 static void 3004 siocntxwait(iobase) 3005 Port_t iobase; 3006 { 3007 int timo; 3008 3009 /* 3010 * Wait for any pending transmission to finish. Required to avoid 3011 * the UART lockup bug when the speed is changed, and for normal 3012 * transmits. 3013 */ 3014 timo = 100000; 3015 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 3016 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 3017 ; 3018 } 3019 3020 /* 3021 * Read the serial port specified and try to figure out what speed 3022 * it's currently running at. We're assuming the serial port has 3023 * been initialized and is basicly idle. This routine is only intended 3024 * to be run at system startup. 3025 * 3026 * If the value read from the serial port doesn't make sense, return 0. 3027 */ 3028 3029 static speed_t 3030 siocngetspeed(iobase, rclk) 3031 Port_t iobase; 3032 u_long rclk; 3033 { 3034 u_int divisor; 3035 u_char dlbh; 3036 u_char dlbl; 3037 u_char cfcr; 3038 3039 cfcr = inb(iobase + com_cfcr); 3040 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 3041 3042 dlbl = inb(iobase + com_dlbl); 3043 dlbh = inb(iobase + com_dlbh); 3044 3045 outb(iobase + com_cfcr, cfcr); 3046 3047 divisor = dlbh << 8 | dlbl; 3048 3049 /* XXX there should be more sanity checking. */ 3050 if (divisor == 0) 3051 return (CONSPEED); 3052 return (rclk / (16UL * divisor)); 3053 } 3054 3055 static void 3056 siocnopen(sp, iobase, speed) 3057 struct siocnstate *sp; 3058 Port_t iobase; 3059 int speed; 3060 { 3061 u_int divisor; 3062 u_char dlbh; 3063 u_char dlbl; 3064 3065 /* 3066 * Save all the device control registers except the fifo register 3067 * and set our default ones (cs8 -parenb speed=comdefaultrate). 3068 * We can't save the fifo register since it is read-only. 3069 */ 3070 sp->ier = inb(iobase + com_ier); 3071 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 3072 siocntxwait(iobase); 3073 sp->cfcr = inb(iobase + com_cfcr); 3074 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 3075 sp->dlbl = inb(iobase + com_dlbl); 3076 sp->dlbh = inb(iobase + com_dlbh); 3077 /* 3078 * Only set the divisor registers if they would change, since on 3079 * some 16550 incompatibles (Startech), setting them clears the 3080 * data input register. This also reduces the effects of the 3081 * UMC8669F bug. 3082 */ 3083 divisor = siodivisor(comdefaultrclk, speed); 3084 dlbl = divisor & 0xFF; 3085 if (sp->dlbl != dlbl) 3086 outb(iobase + com_dlbl, dlbl); 3087 dlbh = divisor >> 8; 3088 if (sp->dlbh != dlbh) 3089 outb(iobase + com_dlbh, dlbh); 3090 outb(iobase + com_cfcr, CFCR_8BITS); 3091 sp->mcr = inb(iobase + com_mcr); 3092 /* 3093 * We don't want interrupts, but must be careful not to "disable" 3094 * them by clearing the MCR_IENABLE bit, since that might cause 3095 * an interrupt by floating the IRQ line. 3096 */ 3097 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 3098 } 3099 3100 static void 3101 siocnclose(sp, iobase) 3102 struct siocnstate *sp; 3103 Port_t iobase; 3104 { 3105 /* 3106 * Restore the device control registers. 3107 */ 3108 siocntxwait(iobase); 3109 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 3110 if (sp->dlbl != inb(iobase + com_dlbl)) 3111 outb(iobase + com_dlbl, sp->dlbl); 3112 if (sp->dlbh != inb(iobase + com_dlbh)) 3113 outb(iobase + com_dlbh, sp->dlbh); 3114 outb(iobase + com_cfcr, sp->cfcr); 3115 /* 3116 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 3117 */ 3118 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 3119 outb(iobase + com_ier, sp->ier); 3120 } 3121 3122 static void 3123 siocnprobe(cp) 3124 struct consdev *cp; 3125 { 3126 speed_t boot_speed; 3127 u_char cfcr; 3128 u_int divisor; 3129 int s, unit; 3130 struct siocnstate sp; 3131 3132 /* 3133 * Find our first enabled console, if any. If it is a high-level 3134 * console device, then initialize it and return successfully. 3135 * If it is a low-level console device, then initialize it and 3136 * return unsuccessfully. It must be initialized in both cases 3137 * for early use by console drivers and debuggers. Initializing 3138 * the hardware is not necessary in all cases, since the i/o 3139 * routines initialize it on the fly, but it is necessary if 3140 * input might arrive while the hardware is switched back to an 3141 * uninitialized state. We can't handle multiple console devices 3142 * yet because our low-level routines don't take a device arg. 3143 * We trust the user to set the console flags properly so that we 3144 * don't need to probe. 3145 */ 3146 cp->cn_pri = CN_DEAD; 3147 3148 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 3149 int flags; 3150 int disabled; 3151 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 3152 if (disabled) 3153 continue; 3154 } 3155 if (resource_int_value("sio", unit, "flags", &flags)) 3156 continue; 3157 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 3158 int port; 3159 Port_t iobase; 3160 3161 if (resource_int_value("sio", unit, "port", &port)) 3162 continue; 3163 iobase = port; 3164 s = spltty(); 3165 if (boothowto & RB_SERIAL) { 3166 boot_speed = 3167 siocngetspeed(iobase, comdefaultrclk); 3168 if (boot_speed) 3169 comdefaultrate = boot_speed; 3170 } 3171 3172 /* 3173 * Initialize the divisor latch. We can't rely on 3174 * siocnopen() to do this the first time, since it 3175 * avoids writing to the latch if the latch appears 3176 * to have the correct value. Also, if we didn't 3177 * just read the speed from the hardware, then we 3178 * need to set the speed in hardware so that 3179 * switching it later is null. 3180 */ 3181 cfcr = inb(iobase + com_cfcr); 3182 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 3183 divisor = siodivisor(comdefaultrclk, comdefaultrate); 3184 outb(iobase + com_dlbl, divisor & 0xff); 3185 outb(iobase + com_dlbh, divisor >> 8); 3186 outb(iobase + com_cfcr, cfcr); 3187 3188 siocnopen(&sp, iobase, comdefaultrate); 3189 3190 splx(s); 3191 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 3192 cp->cn_dev = makedev(CDEV_MAJOR, unit); 3193 cp->cn_pri = COM_FORCECONSOLE(flags) 3194 || boothowto & RB_SERIAL 3195 ? CN_REMOTE : CN_NORMAL; 3196 siocniobase = iobase; 3197 siocnunit = unit; 3198 } 3199 if (COM_DEBUGGER(flags)) { 3200 printf("sio%d: gdb debugging port\n", unit); 3201 siogdbiobase = iobase; 3202 siogdbunit = unit; 3203 #if DDB > 0 3204 gdbdev = makedev(CDEV_MAJOR, unit); 3205 gdb_getc = siocngetc; 3206 gdb_putc = siocnputc; 3207 #endif 3208 } 3209 } 3210 } 3211 #ifdef __i386__ 3212 #if DDB > 0 3213 /* 3214 * XXX Ugly Compatability. 3215 * If no gdb port has been specified, set it to be the console 3216 * as some configuration files don't specify the gdb port. 3217 */ 3218 if (gdbdev == NODEV && (boothowto & RB_GDB)) { 3219 printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 3220 siocnunit); 3221 printf("Set flag 0x80 on desired GDB port in your\n"); 3222 printf("configuration file (currently sio only).\n"); 3223 siogdbiobase = siocniobase; 3224 siogdbunit = siocnunit; 3225 gdbdev = makedev(CDEV_MAJOR, siocnunit); 3226 gdb_getc = siocngetc; 3227 gdb_putc = siocnputc; 3228 } 3229 #endif 3230 #endif 3231 } 3232 3233 #ifdef __alpha__ 3234 3235 CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 3236 3237 int 3238 siocnattach(port, speed) 3239 int port; 3240 int speed; 3241 { 3242 int s; 3243 u_char cfcr; 3244 u_int divisor; 3245 struct siocnstate sp; 3246 3247 siocniobase = port; 3248 comdefaultrate = speed; 3249 sio_consdev.cn_pri = CN_NORMAL; 3250 sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0); 3251 3252 s = spltty(); 3253 3254 /* 3255 * Initialize the divisor latch. We can't rely on 3256 * siocnopen() to do this the first time, since it 3257 * avoids writing to the latch if the latch appears 3258 * to have the correct value. Also, if we didn't 3259 * just read the speed from the hardware, then we 3260 * need to set the speed in hardware so that 3261 * switching it later is null. 3262 */ 3263 cfcr = inb(siocniobase + com_cfcr); 3264 outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 3265 divisor = siodivisor(comdefaultrclk, comdefaultrate); 3266 outb(siocniobase + com_dlbl, divisor & 0xff); 3267 outb(siocniobase + com_dlbh, divisor >> 8); 3268 outb(siocniobase + com_cfcr, cfcr); 3269 3270 siocnopen(&sp, siocniobase, comdefaultrate); 3271 splx(s); 3272 3273 cn_tab = &sio_consdev; 3274 return (0); 3275 } 3276 3277 int 3278 siogdbattach(port, speed) 3279 int port; 3280 int speed; 3281 { 3282 int s; 3283 u_char cfcr; 3284 u_int divisor; 3285 struct siocnstate sp; 3286 3287 siogdbiobase = port; 3288 gdbdefaultrate = speed; 3289 3290 s = spltty(); 3291 3292 /* 3293 * Initialize the divisor latch. We can't rely on 3294 * siocnopen() to do this the first time, since it 3295 * avoids writing to the latch if the latch appears 3296 * to have the correct value. Also, if we didn't 3297 * just read the speed from the hardware, then we 3298 * need to set the speed in hardware so that 3299 * switching it later is null. 3300 */ 3301 cfcr = inb(siogdbiobase + com_cfcr); 3302 outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 3303 divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 3304 outb(siogdbiobase + com_dlbl, divisor & 0xff); 3305 outb(siogdbiobase + com_dlbh, divisor >> 8); 3306 outb(siogdbiobase + com_cfcr, cfcr); 3307 3308 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3309 splx(s); 3310 3311 return (0); 3312 } 3313 3314 #endif 3315 3316 static void 3317 siocninit(cp) 3318 struct consdev *cp; 3319 { 3320 comconsole = DEV_TO_UNIT(cp->cn_dev); 3321 } 3322 3323 static int 3324 siocncheckc(dev) 3325 dev_t dev; 3326 { 3327 int c; 3328 Port_t iobase; 3329 int s; 3330 struct siocnstate sp; 3331 3332 if (minor(dev) == siogdbunit) 3333 iobase = siogdbiobase; 3334 else 3335 iobase = siocniobase; 3336 s = spltty(); 3337 siocnopen(&sp, iobase, comdefaultrate); 3338 if (inb(iobase + com_lsr) & LSR_RXRDY) 3339 c = inb(iobase + com_data); 3340 else 3341 c = -1; 3342 siocnclose(&sp, iobase); 3343 splx(s); 3344 return (c); 3345 } 3346 3347 3348 int 3349 siocngetc(dev) 3350 dev_t dev; 3351 { 3352 int c; 3353 Port_t iobase; 3354 int s; 3355 struct siocnstate sp; 3356 3357 if (minor(dev) == siogdbunit) 3358 iobase = siogdbiobase; 3359 else 3360 iobase = siocniobase; 3361 s = spltty(); 3362 siocnopen(&sp, iobase, comdefaultrate); 3363 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3364 ; 3365 c = inb(iobase + com_data); 3366 siocnclose(&sp, iobase); 3367 splx(s); 3368 return (c); 3369 } 3370 3371 void 3372 siocnputc(dev, c) 3373 dev_t dev; 3374 int c; 3375 { 3376 int s; 3377 struct siocnstate sp; 3378 Port_t iobase; 3379 3380 if (minor(dev) == siogdbunit) 3381 iobase = siogdbiobase; 3382 else 3383 iobase = siocniobase; 3384 s = spltty(); 3385 siocnopen(&sp, iobase, comdefaultrate); 3386 siocntxwait(iobase); 3387 outb(iobase + com_data, c); 3388 siocnclose(&sp, iobase); 3389 splx(s); 3390 } 3391 3392 #ifdef __alpha__ 3393 int 3394 siogdbgetc() 3395 { 3396 int c; 3397 Port_t iobase; 3398 int s; 3399 struct siocnstate sp; 3400 3401 iobase = siogdbiobase; 3402 s = spltty(); 3403 siocnopen(&sp, iobase, gdbdefaultrate); 3404 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3405 ; 3406 c = inb(iobase + com_data); 3407 siocnclose(&sp, iobase); 3408 splx(s); 3409 return (c); 3410 } 3411 3412 void 3413 siogdbputc(c) 3414 int c; 3415 { 3416 int s; 3417 struct siocnstate sp; 3418 3419 s = spltty(); 3420 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3421 siocntxwait(siogdbiobase); 3422 outb(siogdbiobase + com_data, c); 3423 siocnclose(&sp, siogdbiobase); 3424 splx(s); 3425 } 3426 #endif 3427 3428 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 3429 #if NCARD > 0 3430 DRIVER_MODULE(sio, pccard, sio_pccard_driver, sio_devclass, 0, 0); 3431 #endif 3432 #if NPCI > 0 3433 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0); 3434 #endif 3435 #if NPUC > 0 3436 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0); 3437 #endif 3438