1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $ 34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.36 2006/10/25 20:56:02 dillon Exp $ 35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 36 * from: i386/isa sio.c,v 1.234 37 */ 38 39 #include "opt_comconsole.h" 40 #include "opt_compat.h" 41 #include "opt_ddb.h" 42 #include "opt_sio.h" 43 #include "use_pci.h" 44 #ifdef __i386__ 45 #include "use_puc.h" 46 #endif 47 #include "use_sio.h" 48 49 /* 50 * Serial driver, based on 386BSD-0.1 com driver. 51 * Mostly rewritten to use pseudo-DMA. 52 * Works for National Semiconductor NS8250-NS16550AF UARTs. 53 * COM driver, based on HP dca driver. 54 * 55 * Changes for PC-Card integration: 56 * - Added PC-Card driver table and handlers 57 */ 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/reboot.h> 61 #include <sys/malloc.h> 62 #include <sys/tty.h> 63 #include <sys/proc.h> 64 #include <sys/module.h> 65 #include <sys/conf.h> 66 #include <sys/dkstat.h> 67 #include <sys/fcntl.h> 68 #include <sys/interrupt.h> 69 #include <sys/kernel.h> 70 #include <sys/syslog.h> 71 #include <sys/sysctl.h> 72 #include <sys/bus.h> 73 #include <sys/rman.h> 74 #include <sys/timepps.h> 75 #include <sys/thread2.h> 76 77 #include <machine/limits.h> 78 79 #include <bus/isa/isareg.h> 80 #include <bus/isa/isavar.h> 81 #if NPCI > 0 82 #include <bus/pci/pcireg.h> 83 #include <bus/pci/pcivar.h> 84 #endif 85 #if NPUC > 0 86 #include <dev/misc/puc/pucvar.h> 87 #endif 88 #include <machine/lock.h> 89 90 #include <machine/clock.h> 91 #include <machine/ipl.h> 92 #ifndef SMP 93 #include <machine/lock.h> 94 #endif 95 96 #include "sioreg.h" 97 #include "sio_private.h" 98 99 #ifdef COM_ESP 100 #include "../ic_layer/esp.h" 101 #endif 102 103 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 104 105 #define CALLOUT_MASK 0x80 106 #define CONTROL_MASK 0x60 107 #define CONTROL_INIT_STATE 0x20 108 #define CONTROL_LOCK_STATE 0x40 109 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 110 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 111 | ((mynor) & 0x1f)) 112 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 113 | ((unit) & 0x1f)) 114 115 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 116 117 #define sio_getreg(com, off) \ 118 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 119 #define sio_setreg(com, off, value) \ 120 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 121 122 /* 123 * com state bits. 124 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 125 * than the other bits so that they can be tested as a group without masking 126 * off the low bits. 127 * 128 * The following com and tty flags correspond closely: 129 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 130 * comstop()) 131 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 132 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 133 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 134 * TS_FLUSH is not used. 135 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 136 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 137 */ 138 #define CS_BUSY 0x80 /* output in progress */ 139 #define CS_TTGO 0x40 /* output not stopped by XOFF */ 140 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 141 #define CS_CHECKMSR 1 /* check of MSR scheduled */ 142 #define CS_CTS_OFLOW 2 /* use CTS output flow control */ 143 #define CS_DTR_OFF 0x10 /* DTR held off */ 144 #define CS_ODONE 4 /* output completed */ 145 #define CS_RTS_IFLOW 8 /* use RTS input flow control */ 146 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 147 148 static char const * const error_desc[] = { 149 #define CE_OVERRUN 0 150 "silo overflow", 151 #define CE_INTERRUPT_BUF_OVERFLOW 1 152 "interrupt-level buffer overflow", 153 #define CE_TTY_BUF_OVERFLOW 2 154 "tty-level buffer overflow", 155 }; 156 157 #ifdef COM_ESP 158 static int espattach (struct com_s *com, Port_t esp_port); 159 #endif 160 static int sio_isa_attach (device_t dev); 161 162 static timeout_t siobusycheck; 163 static u_int siodivisor (u_long rclk, speed_t speed); 164 static timeout_t siodtrwakeup; 165 static void comhardclose (struct com_s *com); 166 static void sioinput (struct com_s *com); 167 static void siointr1 (struct com_s *com); 168 static void siointr (void *arg); 169 static int commctl (struct com_s *com, int bits, int how); 170 static int comparam (struct tty *tp, struct termios *t); 171 static inthand2_t siopoll; 172 static int sio_isa_probe (device_t dev); 173 static void siosettimeout (void); 174 static int siosetwater (struct com_s *com, speed_t speed); 175 static void comstart (struct tty *tp); 176 static void comstop (struct tty *tp, int rw); 177 static timeout_t comwakeup; 178 static void disc_optim (struct tty *tp, struct termios *t, 179 struct com_s *com); 180 181 #if NPCI > 0 182 static int sio_pci_attach (device_t dev); 183 static void sio_pci_kludge_unit (device_t dev); 184 static int sio_pci_probe (device_t dev); 185 #endif /* NPCI > 0 */ 186 187 #if NPUC > 0 188 static int sio_puc_attach (device_t dev); 189 static int sio_puc_probe (device_t dev); 190 #endif /* NPUC > 0 */ 191 192 static char driver_name[] = "sio"; 193 194 /* table and macro for fast conversion from a unit number to its com struct */ 195 devclass_t sio_devclass; 196 #define com_addr(unit) ((struct com_s *) \ 197 devclass_get_softc(sio_devclass, unit)) 198 199 static device_method_t sio_isa_methods[] = { 200 /* Device interface */ 201 DEVMETHOD(device_probe, sio_isa_probe), 202 DEVMETHOD(device_attach, sio_isa_attach), 203 204 { 0, 0 } 205 }; 206 207 static driver_t sio_isa_driver = { 208 driver_name, 209 sio_isa_methods, 210 sizeof(struct com_s), 211 }; 212 213 #if NPCI > 0 214 static device_method_t sio_pci_methods[] = { 215 /* Device interface */ 216 DEVMETHOD(device_probe, sio_pci_probe), 217 DEVMETHOD(device_attach, sio_pci_attach), 218 219 { 0, 0 } 220 }; 221 222 static driver_t sio_pci_driver = { 223 driver_name, 224 sio_pci_methods, 225 sizeof(struct com_s), 226 }; 227 #endif /* NPCI > 0 */ 228 229 #if NPUC > 0 230 static device_method_t sio_puc_methods[] = { 231 /* Device interface */ 232 DEVMETHOD(device_probe, sio_puc_probe), 233 DEVMETHOD(device_attach, sio_puc_attach), 234 235 { 0, 0 } 236 }; 237 238 static driver_t sio_puc_driver = { 239 driver_name, 240 sio_puc_methods, 241 sizeof(struct com_s), 242 }; 243 #endif /* NPUC > 0 */ 244 245 static d_open_t sioopen; 246 static d_close_t sioclose; 247 static d_read_t sioread; 248 static d_write_t siowrite; 249 static d_ioctl_t sioioctl; 250 251 #define CDEV_MAJOR 28 252 static struct dev_ops sio_ops = { 253 { driver_name, CDEV_MAJOR, D_TTY | D_KQFILTER }, 254 .d_open = sioopen, 255 .d_close = sioclose, 256 .d_read = sioread, 257 .d_write = siowrite, 258 .d_ioctl = sioioctl, 259 .d_poll = ttypoll, 260 .d_kqfilter = ttykqfilter 261 }; 262 263 int comconsole = -1; 264 static volatile speed_t comdefaultrate = CONSPEED; 265 static u_long comdefaultrclk = DEFAULT_RCLK; 266 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 267 static u_int com_events; /* input chars + weighted output completions */ 268 static Port_t siocniobase; 269 static int siocnunit; 270 static Port_t siogdbiobase; 271 static int siogdbunit = -1; 272 static bool_t sio_registered; 273 static int sio_timeout; 274 static int sio_timeouts_until_log; 275 static struct callout sio_timeout_handle; 276 static int sio_numunits; 277 278 #ifdef COM_ESP 279 /* XXX configure this properly. */ 280 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 281 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 282 #endif 283 284 /* 285 * handle sysctl read/write requests for console speed 286 * 287 * In addition to setting comdefaultrate for I/O through /dev/console, 288 * also set the initial and lock values for the /dev/ttyXX device 289 * if there is one associated with the console. Finally, if the /dev/tty 290 * device has already been open, change the speed on the open running port 291 * itself. 292 */ 293 294 static int 295 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 296 { 297 int error; 298 speed_t newspeed; 299 struct com_s *com; 300 struct tty *tp; 301 302 newspeed = comdefaultrate; 303 304 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 305 if (error || !req->newptr) 306 return (error); 307 308 comdefaultrate = newspeed; 309 310 if (comconsole < 0) /* serial console not selected? */ 311 return (0); 312 313 com = com_addr(comconsole); 314 if (com == NULL) 315 return (ENXIO); 316 317 /* 318 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 319 * (note, the lock rates really are boolean -- if non-zero, disallow 320 * speed changes) 321 */ 322 com->it_in.c_ispeed = com->it_in.c_ospeed = 323 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 324 com->it_out.c_ispeed = com->it_out.c_ospeed = 325 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 326 327 /* 328 * if we're open, change the running rate too 329 */ 330 tp = com->tp; 331 if (tp && (tp->t_state & TS_ISOPEN)) { 332 tp->t_termios.c_ispeed = 333 tp->t_termios.c_ospeed = comdefaultrate; 334 crit_enter(); 335 error = comparam(tp, &tp->t_termios); 336 crit_exit(); 337 } 338 return error; 339 } 340 341 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 342 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 343 344 #if NPCI > 0 345 struct pci_ids { 346 u_int32_t type; 347 const char *desc; 348 int rid; 349 }; 350 351 static struct pci_ids pci_ids[] = { 352 { 0x100812b9, "3COM PCI FaxModem", 0x10 }, 353 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 }, 354 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 355 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 356 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 }, 357 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 }, 358 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 }, 359 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 }, 360 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 }, 361 { 0x00000000, NULL, 0 } 362 }; 363 364 static int 365 sio_pci_attach(dev) 366 device_t dev; 367 { 368 u_int32_t type; 369 struct pci_ids *id; 370 371 type = pci_get_devid(dev); 372 id = pci_ids; 373 while (id->type && id->type != type) 374 id++; 375 if (id->desc == NULL) 376 return (ENXIO); 377 sio_pci_kludge_unit(dev); 378 return (sioattach(dev, id->rid, 0UL)); 379 } 380 381 /* 382 * Don't cut and paste this to other drivers. It is a horrible kludge 383 * which will fail to work and also be unnecessary in future versions. 384 */ 385 static void 386 sio_pci_kludge_unit(dev) 387 device_t dev; 388 { 389 devclass_t dc; 390 int err; 391 int start; 392 int unit; 393 394 unit = 0; 395 start = 0; 396 while (resource_int_value("sio", unit, "port", &start) == 0 && 397 start > 0) 398 unit++; 399 if (device_get_unit(dev) < unit) { 400 dc = device_get_devclass(dev); 401 while (devclass_get_device(dc, unit)) 402 unit++; 403 device_printf(dev, "moving to sio%d\n", unit); 404 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */ 405 if (err) 406 device_printf(dev, "error moving device %d\n", err); 407 } 408 } 409 410 static int 411 sio_pci_probe(dev) 412 device_t dev; 413 { 414 u_int32_t type; 415 struct pci_ids *id; 416 417 type = pci_get_devid(dev); 418 id = pci_ids; 419 while (id->type && id->type != type) 420 id++; 421 if (id->desc == NULL) 422 return (ENXIO); 423 device_set_desc(dev, id->desc); 424 return (sioprobe(dev, id->rid, 0UL)); 425 } 426 #endif /* NPCI > 0 */ 427 428 #if NPUC > 0 429 static int 430 sio_puc_attach(dev) 431 device_t dev; 432 { 433 u_int rclk; 434 435 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 436 &rclk) != 0) 437 rclk = DEFAULT_RCLK; 438 return (sioattach(dev, 0, rclk)); 439 } 440 441 static int 442 sio_puc_probe(dev) 443 device_t dev; 444 { 445 u_int rclk; 446 447 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 448 &rclk) != 0) 449 rclk = DEFAULT_RCLK; 450 return (sioprobe(dev, 0, rclk)); 451 } 452 #endif /* NPUC */ 453 454 static struct isa_pnp_id sio_ids[] = { 455 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 456 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 457 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 458 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 459 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 460 /* Devices that do not have a compatid */ 461 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */ 462 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */ 463 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */ 464 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */ 465 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */ 466 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */ 467 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/ 468 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */ 469 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */ 470 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */ 471 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */ 472 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */ 473 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */ 474 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */ 475 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */ 476 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */ 477 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */ 478 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */ 479 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */ 480 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */ 481 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */ 482 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */ 483 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */ 484 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */ 485 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */ 486 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */ 487 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */ 488 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/ 489 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */ 490 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */ 491 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */ 492 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */ 493 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */ 494 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */ 495 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */ 496 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */ 497 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */ 498 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */ 499 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */ 500 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */ 501 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */ 502 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */ 503 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */ 504 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */ 505 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */ 506 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */ 507 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */ 508 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */ 509 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */ 510 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */ 511 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */ 512 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */ 513 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */ 514 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */ 515 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */ 516 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */ 517 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */ 518 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */ 519 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */ 520 {0x11007256, NULL}, /* USR0011 - USR ? */ 521 {0x01017256, NULL}, /* USR0101 - USR ? */ 522 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */ 523 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */ 524 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */ 525 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */ 526 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */ 527 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */ 528 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */ 529 {0x90307256, NULL}, /* USR3090 - USR ? */ 530 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */ 531 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */ 532 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */ 533 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */ 534 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */ 535 {0} 536 }; 537 538 539 540 static int 541 sio_isa_probe(dev) 542 device_t dev; 543 { 544 /* Check isapnp ids */ 545 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 546 return (ENXIO); 547 return (sioprobe(dev, 0, 0UL)); 548 } 549 550 int 551 sioprobe(dev, xrid, rclk) 552 device_t dev; 553 int xrid; 554 u_long rclk; 555 { 556 #if 0 557 static bool_t already_init; 558 device_t xdev; 559 #endif 560 struct com_s *com; 561 u_int divisor; 562 bool_t failures[10]; 563 int fn; 564 device_t idev; 565 Port_t iobase; 566 intrmask_t irqmap[4]; 567 intrmask_t irqs; 568 u_char mcr_image; 569 int result; 570 u_long xirq; 571 u_int flags = device_get_flags(dev); 572 int rid; 573 struct resource *port; 574 575 rid = xrid; 576 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 577 0, ~0, IO_COMSIZE, RF_ACTIVE); 578 if (!port) 579 return (ENXIO); 580 581 com = device_get_softc(dev); 582 com->bst = rman_get_bustag(port); 583 com->bsh = rman_get_bushandle(port); 584 if (rclk == 0) 585 rclk = DEFAULT_RCLK; 586 com->rclk = rclk; 587 588 #if 0 589 /* 590 * XXX this is broken - when we are first called, there are no 591 * previously configured IO ports. We could hard code 592 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 593 * This code has been doing nothing since the conversion since 594 * "count" is zero the first time around. 595 */ 596 if (!already_init) { 597 /* 598 * Turn off MCR_IENABLE for all likely serial ports. An unused 599 * port with its MCR_IENABLE gate open will inhibit interrupts 600 * from any used port that shares the interrupt vector. 601 * XXX the gate enable is elsewhere for some multiports. 602 */ 603 device_t *devs; 604 int count, i, xioport; 605 606 devclass_get_devices(sio_devclass, &devs, &count); 607 for (i = 0; i < count; i++) { 608 xdev = devs[i]; 609 if (device_is_enabled(xdev) && 610 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 611 NULL) == 0) 612 outb(xioport + com_mcr, 0); 613 } 614 kfree(devs, M_TEMP); 615 already_init = TRUE; 616 } 617 #endif 618 619 if (COM_LLCONSOLE(flags)) { 620 printf("sio%d: reserved for low-level i/o\n", 621 device_get_unit(dev)); 622 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 623 return (ENXIO); 624 } 625 626 /* 627 * If the device is on a multiport card and has an AST/4 628 * compatible interrupt control register, initialize this 629 * register and prepare to leave MCR_IENABLE clear in the mcr. 630 * Otherwise, prepare to set MCR_IENABLE in the mcr. 631 * Point idev to the device struct giving the correct id_irq. 632 * This is the struct for the master device if there is one. 633 */ 634 idev = dev; 635 mcr_image = MCR_IENABLE; 636 #ifdef COM_MULTIPORT 637 if (COM_ISMULTIPORT(flags)) { 638 Port_t xiobase; 639 u_long io; 640 641 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 642 if (idev == NULL) { 643 printf("sio%d: master device %d not configured\n", 644 device_get_unit(dev), COM_MPMASTER(flags)); 645 idev = dev; 646 } 647 if (!COM_NOTAST4(flags)) { 648 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 649 NULL) == 0) { 650 xiobase = io; 651 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 652 NULL, NULL) == 0) 653 outb(xiobase + com_scr, 0x80); 654 else 655 outb(xiobase + com_scr, 0); 656 } 657 mcr_image = 0; 658 } 659 } 660 #endif /* COM_MULTIPORT */ 661 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 662 mcr_image = 0; 663 664 bzero(failures, sizeof failures); 665 iobase = rman_get_start(port); 666 667 /* 668 * We don't want to get actual interrupts, just masked ones. 669 * Interrupts from this line should already be masked in the ICU, 670 * but mask them in the processor as well in case there are some 671 * (misconfigured) shared interrupts. 672 */ 673 com_lock(); 674 /* EXTRA DELAY? */ 675 676 /* 677 * For the TI16754 chips, set prescaler to 1 (4 is often the 678 * default after-reset value) as otherwise it's impossible to 679 * get highest baudrates. 680 */ 681 if (COM_TI16754(flags)) { 682 u_char cfcr, efr; 683 684 cfcr = sio_getreg(com, com_cfcr); 685 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 686 efr = sio_getreg(com, com_efr); 687 /* Unlock extended features to turn off prescaler. */ 688 sio_setreg(com, com_efr, efr | EFR_EFE); 689 /* Disable EFR. */ 690 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 691 /* Turn off prescaler. */ 692 sio_setreg(com, com_mcr, 693 sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 694 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 695 sio_setreg(com, com_efr, efr); 696 sio_setreg(com, com_cfcr, cfcr); 697 } 698 699 /* 700 * Initialize the speed and the word size and wait long enough to 701 * drain the maximum of 16 bytes of junk in device output queues. 702 * The speed is undefined after a master reset and must be set 703 * before relying on anything related to output. There may be 704 * junk after a (very fast) soft reboot and (apparently) after 705 * master reset. 706 * XXX what about the UART bug avoided by waiting in comparam()? 707 * We don't want to to wait long enough to drain at 2 bps. 708 */ 709 if (iobase == siocniobase) { 710 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 711 } else { 712 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 713 divisor = siodivisor(rclk, SIO_TEST_SPEED); 714 sio_setreg(com, com_dlbl, divisor & 0xff); 715 sio_setreg(com, com_dlbh, divisor >> 8); 716 sio_setreg(com, com_cfcr, CFCR_8BITS); 717 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 718 } 719 720 /* 721 * Make sure we can drain the receiver. If we can't, the serial 722 * port may not exist. 723 */ 724 for (fn = 0; fn < 256; ++fn) { 725 if ((sio_getreg(com, com_lsr) & LSR_RXRDY) == 0) 726 break; 727 (void)sio_getreg(com, com_data); 728 } 729 if (fn == 256) { 730 printf("sio%d: can't drain, serial port might " 731 "not exist, disabling\n", device_get_unit(dev)); 732 com_unlock(); 733 return (ENXIO); 734 } 735 736 /* 737 * Enable the interrupt gate and disable device interupts. This 738 * should leave the device driving the interrupt line low and 739 * guarantee an edge trigger if an interrupt can be generated. 740 */ 741 /* EXTRA DELAY? */ 742 sio_setreg(com, com_mcr, mcr_image); 743 sio_setreg(com, com_ier, 0); 744 DELAY(1000); /* XXX */ 745 irqmap[0] = isa_irq_pending(); 746 747 /* 748 * Attempt to set loopback mode so that we can send a null byte 749 * without annoying any external device. 750 */ 751 /* EXTRA DELAY? */ 752 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 753 754 /* 755 * Attempt to generate an output interrupt. On 8250's, setting 756 * IER_ETXRDY generates an interrupt independent of the current 757 * setting and independent of whether the THR is empty. On 16450's, 758 * setting IER_ETXRDY generates an interrupt independent of the 759 * current setting. On 16550A's, setting IER_ETXRDY only 760 * generates an interrupt when IER_ETXRDY is not already set. 761 */ 762 sio_setreg(com, com_ier, IER_ETXRDY); 763 764 /* 765 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 766 * an interrupt. They'd better generate one for actually doing 767 * output. Loopback may be broken on the same incompatibles but 768 * it's unlikely to do more than allow the null byte out. 769 */ 770 sio_setreg(com, com_data, 0); 771 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 772 773 /* 774 * Turn off loopback mode so that the interrupt gate works again 775 * (MCR_IENABLE was hidden). This should leave the device driving 776 * an interrupt line high. It doesn't matter if the interrupt 777 * line oscillates while we are not looking at it, since interrupts 778 * are disabled. 779 */ 780 /* EXTRA DELAY? */ 781 sio_setreg(com, com_mcr, mcr_image); 782 783 /* 784 * Some pcmcia cards have the "TXRDY bug", so we check everyone 785 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 786 */ 787 if (COM_NOPROBE(flags)) { 788 /* Reading IIR register twice */ 789 for (fn = 0; fn < 2; fn ++) { 790 DELAY(10000); 791 failures[6] = sio_getreg(com, com_iir); 792 } 793 /* Check IIR_TXRDY clear ? */ 794 result = 0; 795 if (failures[6] & IIR_TXRDY) { 796 /* Nop, Double check with clearing IER */ 797 sio_setreg(com, com_ier, 0); 798 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 799 /* Ok. we're familia this gang */ 800 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 801 } else { 802 /* Unknown, Just omit this chip.. XXX */ 803 result = ENXIO; 804 sio_setreg(com, com_mcr, 0); 805 } 806 } else { 807 /* OK. this is well-known guys */ 808 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 809 } 810 sio_setreg(com, com_ier, 0); 811 sio_setreg(com, com_cfcr, CFCR_8BITS); 812 com_unlock(); 813 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 814 return (iobase == siocniobase ? 0 : result); 815 } 816 817 /* 818 * Check that 819 * o the CFCR, IER and MCR in UART hold the values written to them 820 * (the values happen to be all distinct - this is good for 821 * avoiding false positive tests from bus echoes). 822 * o an output interrupt is generated and its vector is correct. 823 * o the interrupt goes away when the IIR in the UART is read. 824 */ 825 /* EXTRA DELAY? */ 826 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 827 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 828 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 829 DELAY(10000); /* Some internal modems need this time */ 830 irqmap[1] = isa_irq_pending(); 831 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 832 DELAY(1000); /* XXX */ 833 irqmap[2] = isa_irq_pending(); 834 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 835 836 /* 837 * Turn off all device interrupts and check that they go off properly. 838 * Leave MCR_IENABLE alone. For ports without a master port, it gates 839 * the OUT2 output of the UART to 840 * the ICU input. Closing the gate would give a floating ICU input 841 * (unless there is another device driving it) and spurious interrupts. 842 * (On the system that this was first tested on, the input floats high 843 * and gives a (masked) interrupt as soon as the gate is closed.) 844 */ 845 sio_setreg(com, com_ier, 0); 846 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 847 failures[7] = sio_getreg(com, com_ier); 848 DELAY(1000); /* XXX */ 849 irqmap[3] = isa_irq_pending(); 850 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 851 852 com_unlock(); 853 854 irqs = irqmap[1] & ~irqmap[0]; 855 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 856 ((1 << xirq) & irqs) == 0) 857 printf( 858 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 859 device_get_unit(dev), xirq, irqs); 860 if (bootverbose) 861 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 862 device_get_unit(dev), 863 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 864 865 result = 0; 866 for (fn = 0; fn < sizeof failures; ++fn) 867 if (failures[fn]) { 868 sio_setreg(com, com_mcr, 0); 869 result = ENXIO; 870 if (bootverbose) { 871 printf("sio%d: probe failed test(s):", 872 device_get_unit(dev)); 873 for (fn = 0; fn < sizeof failures; ++fn) 874 if (failures[fn]) 875 printf(" %d", fn); 876 printf("\n"); 877 } 878 break; 879 } 880 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 881 return (iobase == siocniobase ? 0 : result); 882 } 883 884 #ifdef COM_ESP 885 static int 886 espattach(com, esp_port) 887 struct com_s *com; 888 Port_t esp_port; 889 { 890 u_char dips; 891 u_char val; 892 893 /* 894 * Check the ESP-specific I/O port to see if we're an ESP 895 * card. If not, return failure immediately. 896 */ 897 if ((inb(esp_port) & 0xf3) == 0) { 898 printf(" port 0x%x is not an ESP board?\n", esp_port); 899 return (0); 900 } 901 902 /* 903 * We've got something that claims to be a Hayes ESP card. 904 * Let's hope so. 905 */ 906 907 /* Get the dip-switch configuration */ 908 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 909 dips = inb(esp_port + ESP_STATUS1); 910 911 /* 912 * Bits 0,1 of dips say which COM port we are. 913 */ 914 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 915 printf(" : ESP"); 916 else { 917 printf(" esp_port has com %d\n", dips & 0x03); 918 return (0); 919 } 920 921 /* 922 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 923 */ 924 outb(esp_port + ESP_CMD1, ESP_GETTEST); 925 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 926 val = inb(esp_port + ESP_STATUS2); 927 if ((val & 0x70) < 0x20) { 928 printf("-old (%o)", val & 0x70); 929 return (0); 930 } 931 932 /* 933 * Check for ability to emulate 16550: bit 7 == 1 934 */ 935 if ((dips & 0x80) == 0) { 936 printf(" slave"); 937 return (0); 938 } 939 940 /* 941 * Okay, we seem to be a Hayes ESP card. Whee. 942 */ 943 com->esp = TRUE; 944 com->esp_port = esp_port; 945 return (1); 946 } 947 #endif /* COM_ESP */ 948 949 static int 950 sio_isa_attach(dev) 951 device_t dev; 952 { 953 return (sioattach(dev, 0, 0UL)); 954 } 955 956 int 957 sioattach(dev, xrid, rclk) 958 device_t dev; 959 int xrid; 960 u_long rclk; 961 { 962 struct com_s *com; 963 #ifdef COM_ESP 964 Port_t *espp; 965 #endif 966 Port_t iobase; 967 int minorbase; 968 int unit; 969 u_int flags; 970 int rid; 971 struct resource *port; 972 int ret; 973 static int did_init; 974 975 if (did_init == 0) { 976 did_init = 1; 977 callout_init(&sio_timeout_handle); 978 } 979 980 rid = xrid; 981 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 982 0, ~0, IO_COMSIZE, RF_ACTIVE); 983 if (!port) 984 return (ENXIO); 985 986 iobase = rman_get_start(port); 987 unit = device_get_unit(dev); 988 com = device_get_softc(dev); 989 flags = device_get_flags(dev); 990 991 if (unit >= sio_numunits) 992 sio_numunits = unit + 1; 993 /* 994 * sioprobe() has initialized the device registers as follows: 995 * o cfcr = CFCR_8BITS. 996 * It is most important that CFCR_DLAB is off, so that the 997 * data port is not hidden when we enable interrupts. 998 * o ier = 0. 999 * Interrupts are only enabled when the line is open. 1000 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 1001 * interrupt control register or the config specifies no irq. 1002 * Keeping MCR_DTR and MCR_RTS off might stop the external 1003 * device from sending before we are ready. 1004 */ 1005 bzero(com, sizeof *com); 1006 com->unit = unit; 1007 com->ioportres = port; 1008 com->bst = rman_get_bustag(port); 1009 com->bsh = rman_get_bushandle(port); 1010 com->cfcr_image = CFCR_8BITS; 1011 com->dtr_wait = 3 * hz; 1012 callout_init(&com->dtr_ch); 1013 callout_init(&com->busy_ch); 1014 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 1015 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 1016 com->tx_fifo_size = 1; 1017 com->obufs[0].l_head = com->obuf1; 1018 com->obufs[1].l_head = com->obuf2; 1019 1020 com->data_port = iobase + com_data; 1021 com->int_id_port = iobase + com_iir; 1022 com->modem_ctl_port = iobase + com_mcr; 1023 com->mcr_image = inb(com->modem_ctl_port); 1024 com->line_status_port = iobase + com_lsr; 1025 com->modem_status_port = iobase + com_msr; 1026 com->intr_ctl_port = iobase + com_ier; 1027 1028 if (rclk == 0) 1029 rclk = DEFAULT_RCLK; 1030 com->rclk = rclk; 1031 1032 /* 1033 * We don't use all the flags from <sys/ttydefaults.h> since they 1034 * are only relevant for logins. It's important to have echo off 1035 * initially so that the line doesn't start blathering before the 1036 * echo flag can be turned off. 1037 */ 1038 com->it_in.c_iflag = 0; 1039 com->it_in.c_oflag = 0; 1040 com->it_in.c_cflag = TTYDEF_CFLAG; 1041 com->it_in.c_lflag = 0; 1042 if (unit == comconsole) { 1043 com->it_in.c_iflag = TTYDEF_IFLAG; 1044 com->it_in.c_oflag = TTYDEF_OFLAG; 1045 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 1046 com->it_in.c_lflag = TTYDEF_LFLAG; 1047 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 1048 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 1049 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 1050 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1051 } else 1052 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1053 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1054 com_unlock(); 1055 /* 1056 * Leave i/o resources allocated if this is a `cn'-level 1057 * console, so that other devices can't snarf them. 1058 */ 1059 if (iobase != siocniobase) 1060 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1061 return (ENOMEM); 1062 } 1063 com_unlock(); 1064 termioschars(&com->it_in); 1065 com->it_out = com->it_in; 1066 1067 /* attempt to determine UART type */ 1068 printf("sio%d: type", unit); 1069 1070 1071 #ifdef COM_MULTIPORT 1072 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 1073 #else 1074 if (!COM_IIR_TXRDYBUG(flags)) 1075 #endif 1076 { 1077 u_char scr; 1078 u_char scr1; 1079 u_char scr2; 1080 1081 scr = sio_getreg(com, com_scr); 1082 sio_setreg(com, com_scr, 0xa5); 1083 scr1 = sio_getreg(com, com_scr); 1084 sio_setreg(com, com_scr, 0x5a); 1085 scr2 = sio_getreg(com, com_scr); 1086 sio_setreg(com, com_scr, scr); 1087 if (scr1 != 0xa5 || scr2 != 0x5a) { 1088 printf(" 8250"); 1089 goto determined_type; 1090 } 1091 } 1092 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1093 DELAY(100); 1094 com->st16650a = 0; 1095 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1096 case FIFO_RX_LOW: 1097 printf(" 16450"); 1098 break; 1099 case FIFO_RX_MEDL: 1100 printf(" 16450?"); 1101 break; 1102 case FIFO_RX_MEDH: 1103 printf(" 16550?"); 1104 break; 1105 case FIFO_RX_HIGH: 1106 if (COM_NOFIFO(flags)) { 1107 printf(" 16550A fifo disabled"); 1108 } else { 1109 com->hasfifo = TRUE; 1110 if (COM_ST16650A(flags)) { 1111 com->st16650a = 1; 1112 com->tx_fifo_size = 32; 1113 printf(" ST16650A"); 1114 } else if (COM_TI16754(flags)) { 1115 com->tx_fifo_size = 64; 1116 printf(" TI16754"); 1117 } else { 1118 com->tx_fifo_size = COM_FIFOSIZE(flags); 1119 printf(" 16550A"); 1120 } 1121 } 1122 #ifdef COM_ESP 1123 for (espp = likely_esp_ports; *espp != 0; espp++) 1124 if (espattach(com, *espp)) { 1125 com->tx_fifo_size = 1024; 1126 break; 1127 } 1128 #endif 1129 if (!com->st16650a && !COM_TI16754(flags)) { 1130 if (!com->tx_fifo_size) 1131 com->tx_fifo_size = 16; 1132 else 1133 printf(" lookalike with %d bytes FIFO", 1134 com->tx_fifo_size); 1135 } 1136 1137 break; 1138 } 1139 1140 #ifdef COM_ESP 1141 if (com->esp) { 1142 /* 1143 * Set 16550 compatibility mode. 1144 * We don't use the ESP_MODE_SCALE bit to increase the 1145 * fifo trigger levels because we can't handle large 1146 * bursts of input. 1147 * XXX flow control should be set in comparam(), not here. 1148 */ 1149 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1150 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1151 1152 /* Set RTS/CTS flow control. */ 1153 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1154 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1155 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1156 1157 /* Set flow-control levels. */ 1158 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1159 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1160 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1161 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1162 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1163 } 1164 #endif /* COM_ESP */ 1165 sio_setreg(com, com_fifo, 0); 1166 determined_type: ; 1167 1168 #ifdef COM_MULTIPORT 1169 if (COM_ISMULTIPORT(flags)) { 1170 device_t masterdev; 1171 1172 com->multiport = TRUE; 1173 printf(" (multiport"); 1174 if (unit == COM_MPMASTER(flags)) 1175 printf(" master"); 1176 printf(")"); 1177 masterdev = devclass_get_device(sio_devclass, 1178 COM_MPMASTER(flags)); 1179 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1180 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1181 } 1182 #endif /* COM_MULTIPORT */ 1183 if (unit == comconsole) 1184 printf(", console"); 1185 if (COM_IIR_TXRDYBUG(flags)) 1186 printf(" with a bogus IIR_TXRDY register"); 1187 printf("\n"); 1188 1189 if (!sio_registered) { 1190 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll", NULL); 1191 sio_registered = TRUE; 1192 } 1193 minorbase = UNIT_TO_MINOR(unit); 1194 dev_ops_add(&sio_ops, UNIT_TO_MINOR(-1), minorbase); 1195 make_dev(&sio_ops, minorbase, 1196 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1197 make_dev(&sio_ops, minorbase | CONTROL_INIT_STATE, 1198 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1199 make_dev(&sio_ops, minorbase | CONTROL_LOCK_STATE, 1200 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1201 make_dev(&sio_ops, minorbase | CALLOUT_MASK, 1202 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1203 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 1204 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1205 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 1206 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1207 com->flags = flags; 1208 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1209 pps_init(&com->pps); 1210 1211 rid = 0; 1212 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 1213 RF_ACTIVE); 1214 if (com->irqres) { 1215 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1216 INTR_FAST, siointr, com, 1217 &com->cookie, NULL); 1218 if (ret) { 1219 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1220 com->irqres, 0, siointr, com, 1221 &com->cookie, NULL); 1222 if (ret == 0) 1223 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1224 } 1225 if (ret) 1226 device_printf(dev, "could not activate interrupt\n"); 1227 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1228 defined(ALT_BREAK_TO_DEBUGGER)) 1229 /* 1230 * Enable interrupts for early break-to-debugger support 1231 * on the console. 1232 */ 1233 if (ret == 0 && unit == comconsole) 1234 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1235 IER_EMSC); 1236 #endif 1237 } 1238 1239 return (0); 1240 } 1241 1242 static int 1243 sioopen(struct dev_open_args *ap) 1244 { 1245 cdev_t dev = ap->a_head.a_dev; 1246 struct com_s *com; 1247 int error; 1248 int mynor; 1249 struct tty *tp; 1250 int unit; 1251 1252 mynor = minor(dev); 1253 unit = MINOR_TO_UNIT(mynor); 1254 com = com_addr(unit); 1255 if (com == NULL) 1256 return (ENXIO); 1257 if (com->gone) 1258 return (ENXIO); 1259 if (mynor & CONTROL_MASK) 1260 return (0); 1261 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1262 crit_enter(); 1263 /* 1264 * We jump to this label after all non-interrupted sleeps to pick 1265 * up any changes of the device state. 1266 */ 1267 open_top: 1268 while (com->state & CS_DTR_OFF) { 1269 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0); 1270 if (com_addr(unit) == NULL) { 1271 crit_exit(); 1272 return (ENXIO); 1273 } 1274 if (error != 0 || com->gone) 1275 goto out; 1276 } 1277 if (tp->t_state & TS_ISOPEN) { 1278 /* 1279 * The device is open, so everything has been initialized. 1280 * Handle conflicts. 1281 */ 1282 if (mynor & CALLOUT_MASK) { 1283 if (!com->active_out) { 1284 error = EBUSY; 1285 goto out; 1286 } 1287 } else { 1288 if (com->active_out) { 1289 if (ap->a_oflags & O_NONBLOCK) { 1290 error = EBUSY; 1291 goto out; 1292 } 1293 error = tsleep(&com->active_out, 1294 PCATCH, "siobi", 0); 1295 if (com_addr(unit) == NULL) { 1296 crit_exit(); 1297 return (ENXIO); 1298 } 1299 if (error != 0 || com->gone) 1300 goto out; 1301 goto open_top; 1302 } 1303 } 1304 if (tp->t_state & TS_XCLUDE && suser_cred(ap->a_cred, 0)) { 1305 error = EBUSY; 1306 goto out; 1307 } 1308 } else { 1309 /* 1310 * The device isn't open, so there are no conflicts. 1311 * Initialize it. Initialization is done twice in many 1312 * cases: to preempt sleeping callin opens if we are 1313 * callout, and to complete a callin open after DCD rises. 1314 */ 1315 tp->t_oproc = comstart; 1316 tp->t_param = comparam; 1317 tp->t_stop = comstop; 1318 tp->t_dev = dev; 1319 tp->t_termios = mynor & CALLOUT_MASK 1320 ? com->it_out : com->it_in; 1321 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 1322 com->poll = com->no_irq; 1323 com->poll_output = com->loses_outints; 1324 ++com->wopeners; 1325 error = comparam(tp, &tp->t_termios); 1326 --com->wopeners; 1327 if (error != 0) 1328 goto out; 1329 /* 1330 * XXX we should goto open_top if comparam() slept. 1331 */ 1332 if (com->hasfifo) { 1333 /* 1334 * (Re)enable and drain fifos. 1335 * 1336 * Certain SMC chips cause problems if the fifos 1337 * are enabled while input is ready. Turn off the 1338 * fifo if necessary to clear the input. We test 1339 * the input ready bit after enabling the fifos 1340 * since we've already enabled them in comparam() 1341 * and to handle races between enabling and fresh 1342 * input. 1343 */ 1344 while (TRUE) { 1345 sio_setreg(com, com_fifo, 1346 FIFO_RCV_RST | FIFO_XMT_RST 1347 | com->fifo_image); 1348 /* 1349 * XXX the delays are for superstitious 1350 * historical reasons. It must be less than 1351 * the character time at the maximum 1352 * supported speed (87 usec at 115200 bps 1353 * 8N1). Otherwise we might loop endlessly 1354 * if data is streaming in. We used to use 1355 * delays of 100. That usually worked 1356 * because DELAY(100) used to usually delay 1357 * for about 85 usec instead of 100. 1358 */ 1359 DELAY(50); 1360 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1361 break; 1362 sio_setreg(com, com_fifo, 0); 1363 DELAY(50); 1364 (void) inb(com->data_port); 1365 } 1366 } 1367 1368 com_lock(); 1369 (void) inb(com->line_status_port); 1370 (void) inb(com->data_port); 1371 com->prev_modem_status = com->last_modem_status 1372 = inb(com->modem_status_port); 1373 if (COM_IIR_TXRDYBUG(com->flags)) { 1374 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 1375 | IER_EMSC); 1376 } else { 1377 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 1378 | IER_ERLS | IER_EMSC); 1379 } 1380 com_unlock(); 1381 /* 1382 * Handle initial DCD. Callout devices get a fake initial 1383 * DCD (trapdoor DCD). If we are callout, then any sleeping 1384 * callin opens get woken up and resume sleeping on "siobi" 1385 * instead of "siodcd". 1386 */ 1387 /* 1388 * XXX `mynor & CALLOUT_MASK' should be 1389 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1390 * TRAPDOOR_CARRIER is the default initial state for callout 1391 * devices and SOFT_CARRIER is like CLOCAL except it hides 1392 * the true carrier. 1393 */ 1394 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1395 (*linesw[tp->t_line].l_modem)(tp, 1); 1396 } 1397 /* 1398 * Wait for DCD if necessary. 1399 */ 1400 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1401 && !(tp->t_cflag & CLOCAL) && !(ap->a_oflags & O_NONBLOCK)) { 1402 ++com->wopeners; 1403 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0); 1404 if (com_addr(unit) == NULL) { 1405 crit_exit(); 1406 return (ENXIO); 1407 } 1408 --com->wopeners; 1409 if (error != 0 || com->gone) 1410 goto out; 1411 goto open_top; 1412 } 1413 error = (*linesw[tp->t_line].l_open)(dev, tp); 1414 disc_optim(tp, &tp->t_termios, com); 1415 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1416 com->active_out = TRUE; 1417 siosettimeout(); 1418 out: 1419 crit_exit(); 1420 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1421 comhardclose(com); 1422 return (error); 1423 } 1424 1425 static int 1426 sioclose(struct dev_close_args *ap) 1427 { 1428 cdev_t dev = ap->a_head.a_dev; 1429 struct com_s *com; 1430 int mynor; 1431 struct tty *tp; 1432 1433 mynor = minor(dev); 1434 if (mynor & CONTROL_MASK) 1435 return (0); 1436 com = com_addr(MINOR_TO_UNIT(mynor)); 1437 if (com == NULL) 1438 return (ENODEV); 1439 tp = com->tp; 1440 crit_enter(); 1441 (*linesw[tp->t_line].l_close)(tp, ap->a_fflag); 1442 disc_optim(tp, &tp->t_termios, com); 1443 comstop(tp, FREAD | FWRITE); 1444 comhardclose(com); 1445 ttyclose(tp); 1446 siosettimeout(); 1447 crit_exit(); 1448 if (com->gone) { 1449 printf("sio%d: gone\n", com->unit); 1450 crit_enter(); 1451 if (com->ibuf != NULL) 1452 kfree(com->ibuf, M_DEVBUF); 1453 bzero(tp, sizeof *tp); 1454 crit_exit(); 1455 } 1456 return (0); 1457 } 1458 1459 static void 1460 comhardclose(com) 1461 struct com_s *com; 1462 { 1463 struct tty *tp; 1464 int unit; 1465 1466 unit = com->unit; 1467 crit_enter(); 1468 com->poll = FALSE; 1469 com->poll_output = FALSE; 1470 com->do_timestamp = FALSE; 1471 com->do_dcd_timestamp = FALSE; 1472 com->pps.ppsparam.mode = 0; 1473 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1474 tp = com->tp; 1475 1476 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1477 defined(ALT_BREAK_TO_DEBUGGER)) 1478 /* 1479 * Leave interrupts enabled and don't clear DTR if this is the 1480 * console. This allows us to detect break-to-debugger events 1481 * while the console device is closed. 1482 */ 1483 if (com->unit != comconsole) 1484 #endif 1485 { 1486 sio_setreg(com, com_ier, 0); 1487 if (tp->t_cflag & HUPCL 1488 /* 1489 * XXX we will miss any carrier drop between here and the 1490 * next open. Perhaps we should watch DCD even when the 1491 * port is closed; it is not sufficient to check it at 1492 * the next open because it might go up and down while 1493 * we're not watching. 1494 */ 1495 || (!com->active_out 1496 && !(com->prev_modem_status & MSR_DCD) 1497 && !(com->it_in.c_cflag & CLOCAL)) 1498 || !(tp->t_state & TS_ISOPEN)) { 1499 (void)commctl(com, TIOCM_DTR, DMBIC); 1500 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 1501 callout_reset(&com->dtr_ch, com->dtr_wait, 1502 siodtrwakeup, com); 1503 com->state |= CS_DTR_OFF; 1504 } 1505 } 1506 } 1507 if (com->hasfifo) { 1508 /* 1509 * Disable fifos so that they are off after controlled 1510 * reboots. Some BIOSes fail to detect 16550s when the 1511 * fifos are enabled. 1512 */ 1513 sio_setreg(com, com_fifo, 0); 1514 } 1515 com->active_out = FALSE; 1516 wakeup(&com->active_out); 1517 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1518 crit_exit(); 1519 } 1520 1521 static int 1522 sioread(struct dev_read_args *ap) 1523 { 1524 cdev_t dev = ap->a_head.a_dev; 1525 int mynor; 1526 struct com_s *com; 1527 1528 mynor = minor(dev); 1529 if (mynor & CONTROL_MASK) 1530 return (ENODEV); 1531 com = com_addr(MINOR_TO_UNIT(mynor)); 1532 if (com == NULL || com->gone) 1533 return (ENODEV); 1534 return ((*linesw[com->tp->t_line].l_read)(com->tp, ap->a_uio, ap->a_ioflag)); 1535 } 1536 1537 static int 1538 siowrite(struct dev_write_args *ap) 1539 { 1540 cdev_t dev = ap->a_head.a_dev; 1541 int mynor; 1542 struct com_s *com; 1543 int unit; 1544 1545 mynor = minor(dev); 1546 if (mynor & CONTROL_MASK) 1547 return (ENODEV); 1548 1549 unit = MINOR_TO_UNIT(mynor); 1550 com = com_addr(unit); 1551 if (com == NULL || com->gone) 1552 return (ENODEV); 1553 /* 1554 * (XXX) We disallow virtual consoles if the physical console is 1555 * a serial port. This is in case there is a display attached that 1556 * is not the console. In that situation we don't need/want the X 1557 * server taking over the console. 1558 */ 1559 if (constty != NULL && unit == comconsole) 1560 constty = NULL; 1561 return ((*linesw[com->tp->t_line].l_write)(com->tp, ap->a_uio, ap->a_ioflag)); 1562 } 1563 1564 static void 1565 siobusycheck(chan) 1566 void *chan; 1567 { 1568 struct com_s *com; 1569 1570 com = (struct com_s *)chan; 1571 1572 /* 1573 * Clear TS_BUSY if low-level output is complete. 1574 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1575 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1576 * called again. Reading the line status port outside of siointr1() 1577 * is safe because CS_BUSY is clear so there are no output interrupts 1578 * to lose. 1579 */ 1580 crit_enter(); 1581 if (com->state & CS_BUSY) 1582 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1583 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1584 == (LSR_TSRE | LSR_TXRDY)) { 1585 com->tp->t_state &= ~TS_BUSY; 1586 ttwwakeup(com->tp); 1587 com->extra_state &= ~CSE_BUSYCHECK; 1588 } else { 1589 callout_reset(&com->busy_ch, hz / 100, siobusycheck, com); 1590 } 1591 crit_exit(); 1592 } 1593 1594 static u_int 1595 siodivisor(rclk, speed) 1596 u_long rclk; 1597 speed_t speed; 1598 { 1599 long actual_speed; 1600 u_int divisor; 1601 int error; 1602 1603 if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 1604 return (0); 1605 divisor = (rclk / (8UL * speed) + 1) / 2; 1606 if (divisor == 0 || divisor >= 65536) 1607 return (0); 1608 actual_speed = rclk / (16UL * divisor); 1609 1610 /* 10 times error in percent: */ 1611 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 1612 1613 /* 3.0% maximum error tolerance: */ 1614 if (error < -30 || error > 30) 1615 return (0); 1616 1617 return (divisor); 1618 } 1619 1620 static void 1621 siodtrwakeup(chan) 1622 void *chan; 1623 { 1624 struct com_s *com; 1625 1626 com = (struct com_s *)chan; 1627 com->state &= ~CS_DTR_OFF; 1628 wakeup(&com->dtr_wait); 1629 } 1630 1631 static void 1632 sioinput(com) 1633 struct com_s *com; 1634 { 1635 u_char *buf; 1636 int incc; 1637 u_char line_status; 1638 int recv_data; 1639 struct tty *tp; 1640 1641 buf = com->ibuf; 1642 tp = com->tp; 1643 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1644 com_events -= (com->iptr - com->ibuf); 1645 com->iptr = com->ibuf; 1646 return; 1647 } 1648 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1649 /* 1650 * Avoid the grotesquely inefficient lineswitch routine 1651 * (ttyinput) in "raw" mode. It usually takes about 450 1652 * instructions (that's without canonical processing or echo!). 1653 * slinput is reasonably fast (usually 40 instructions plus 1654 * call overhead). 1655 */ 1656 do { 1657 com_unlock(); 1658 incc = com->iptr - buf; 1659 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1660 && (com->state & CS_RTS_IFLOW 1661 || tp->t_iflag & IXOFF) 1662 && !(tp->t_state & TS_TBLOCK)) 1663 ttyblock(tp); 1664 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1665 += b_to_q((char *)buf, incc, &tp->t_rawq); 1666 buf += incc; 1667 tk_nin += incc; 1668 tk_rawcc += incc; 1669 tp->t_rawcc += incc; 1670 ttwakeup(tp); 1671 if (tp->t_state & TS_TTSTOP 1672 && (tp->t_iflag & IXANY 1673 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1674 tp->t_state &= ~TS_TTSTOP; 1675 tp->t_lflag &= ~FLUSHO; 1676 comstart(tp); 1677 } 1678 com_lock(); 1679 } while (buf < com->iptr); 1680 } else { 1681 do { 1682 com_unlock(); 1683 line_status = buf[com->ierroff]; 1684 recv_data = *buf++; 1685 if (line_status 1686 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1687 if (line_status & LSR_BI) 1688 recv_data |= TTY_BI; 1689 if (line_status & LSR_FE) 1690 recv_data |= TTY_FE; 1691 if (line_status & LSR_OE) 1692 recv_data |= TTY_OE; 1693 if (line_status & LSR_PE) 1694 recv_data |= TTY_PE; 1695 } 1696 (*linesw[tp->t_line].l_rint)(recv_data, tp); 1697 com_lock(); 1698 } while (buf < com->iptr); 1699 } 1700 com_events -= (com->iptr - com->ibuf); 1701 com->iptr = com->ibuf; 1702 1703 /* 1704 * There is now room for another low-level buffer full of input, 1705 * so enable RTS if it is now disabled and there is room in the 1706 * high-level buffer. 1707 */ 1708 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1709 !(tp->t_state & TS_TBLOCK)) 1710 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1711 } 1712 1713 void 1714 siointr(arg) 1715 void *arg; 1716 { 1717 #ifndef COM_MULTIPORT 1718 com_lock(); 1719 siointr1((struct com_s *) arg); 1720 com_unlock(); 1721 #else /* COM_MULTIPORT */ 1722 bool_t possibly_more_intrs; 1723 int unit; 1724 struct com_s *com; 1725 1726 /* 1727 * Loop until there is no activity on any port. This is necessary 1728 * to get an interrupt edge more than to avoid another interrupt. 1729 * If the IRQ signal is just an OR of the IRQ signals from several 1730 * devices, then the edge from one may be lost because another is 1731 * on. 1732 */ 1733 com_lock(); 1734 do { 1735 possibly_more_intrs = FALSE; 1736 for (unit = 0; unit < sio_numunits; ++unit) { 1737 com = com_addr(unit); 1738 /* 1739 * XXX com_lock(); 1740 * would it work here, or be counter-productive? 1741 */ 1742 if (com != NULL 1743 && !com->gone 1744 && (inb(com->int_id_port) & IIR_IMASK) 1745 != IIR_NOPEND) { 1746 siointr1(com); 1747 possibly_more_intrs = TRUE; 1748 } 1749 /* XXX com_unlock(); */ 1750 } 1751 } while (possibly_more_intrs); 1752 com_unlock(); 1753 #endif /* COM_MULTIPORT */ 1754 } 1755 1756 static void 1757 siointr1(com) 1758 struct com_s *com; 1759 { 1760 u_char line_status; 1761 u_char modem_status; 1762 u_char *ioptr; 1763 u_char recv_data; 1764 u_char int_ctl; 1765 u_char int_ctl_new; 1766 u_int count; 1767 1768 int_ctl = inb(com->intr_ctl_port); 1769 int_ctl_new = int_ctl; 1770 1771 while (!com->gone) { 1772 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1773 modem_status = inb(com->modem_status_port); 1774 if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 1775 count = sys_cputimer->count(); 1776 pps_event(&com->pps, count, 1777 (modem_status & MSR_DCD) ? 1778 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1779 } 1780 } 1781 line_status = inb(com->line_status_port); 1782 1783 /* input event? (check first to help avoid overruns) */ 1784 while (line_status & LSR_RCV_MASK) { 1785 /* break/unnattached error bits or real input? */ 1786 if (!(line_status & LSR_RXRDY)) 1787 recv_data = 0; 1788 else 1789 recv_data = inb(com->data_port); 1790 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 1791 /* 1792 * Solaris implements a new BREAK which is initiated 1793 * by a character sequence CR ~ ^b which is similar 1794 * to a familiar pattern used on Sun servers by the 1795 * Remote Console. 1796 */ 1797 #define KEY_CRTLB 2 /* ^B */ 1798 #define KEY_CR 13 /* CR '\r' */ 1799 #define KEY_TILDE 126 /* ~ */ 1800 1801 if (com->unit == comconsole) { 1802 static int brk_state1 = 0, brk_state2 = 0; 1803 if (recv_data == KEY_CR) { 1804 brk_state1 = recv_data; 1805 brk_state2 = 0; 1806 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) { 1807 if (recv_data == KEY_TILDE) 1808 brk_state2 = recv_data; 1809 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) { 1810 breakpoint(); 1811 brk_state1 = brk_state2 = 0; 1812 goto cont; 1813 } else 1814 brk_state2 = 0; 1815 } else 1816 brk_state1 = 0; 1817 } 1818 #endif 1819 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1820 /* 1821 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1822 * Otherwise, push the work to a higher level 1823 * (to handle PARMRK) if we're bypassing. 1824 * Otherwise, convert BI/FE and PE+INPCK to 0. 1825 * 1826 * This makes bypassing work right in the 1827 * usual "raw" case (IGNBRK set, and IGNPAR 1828 * and INPCK clear). 1829 * 1830 * Note: BI together with FE/PE means just BI. 1831 */ 1832 if (line_status & LSR_BI) { 1833 #if defined(DDB) && defined(BREAK_TO_DEBUGGER) 1834 if (com->unit == comconsole) { 1835 breakpoint(); 1836 goto cont; 1837 } 1838 #endif 1839 if (com->tp == NULL 1840 || com->tp->t_iflag & IGNBRK) 1841 goto cont; 1842 } else { 1843 if (com->tp == NULL 1844 || com->tp->t_iflag & IGNPAR) 1845 goto cont; 1846 } 1847 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1848 && (line_status & (LSR_BI | LSR_FE) 1849 || com->tp->t_iflag & INPCK)) 1850 recv_data = 0; 1851 } 1852 ++com->bytes_in; 1853 if (com->hotchar != 0 && recv_data == com->hotchar) 1854 setsofttty(); 1855 ioptr = com->iptr; 1856 if (ioptr >= com->ibufend) 1857 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 1858 else { 1859 if (com->do_timestamp) 1860 microtime(&com->timestamp); 1861 ++com_events; 1862 schedsofttty(); 1863 #if 0 /* for testing input latency vs efficiency */ 1864 if (com->iptr - com->ibuf == 8) 1865 setsofttty(); 1866 #endif 1867 ioptr[0] = recv_data; 1868 ioptr[com->ierroff] = line_status; 1869 com->iptr = ++ioptr; 1870 if (ioptr == com->ihighwater 1871 && com->state & CS_RTS_IFLOW) 1872 outb(com->modem_ctl_port, 1873 com->mcr_image &= ~MCR_RTS); 1874 if (line_status & LSR_OE) 1875 CE_RECORD(com, CE_OVERRUN); 1876 } 1877 cont: 1878 /* 1879 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 1880 * jump from the top of the loop to here 1881 */ 1882 line_status = inb(com->line_status_port) & 0x7F; 1883 } 1884 1885 /* modem status change? (always check before doing output) */ 1886 modem_status = inb(com->modem_status_port); 1887 if (modem_status != com->last_modem_status) { 1888 if (com->do_dcd_timestamp 1889 && !(com->last_modem_status & MSR_DCD) 1890 && modem_status & MSR_DCD) 1891 microtime(&com->dcd_timestamp); 1892 1893 /* 1894 * Schedule high level to handle DCD changes. Note 1895 * that we don't use the delta bits anywhere. Some 1896 * UARTs mess them up, and it's easy to remember the 1897 * previous bits and calculate the delta. 1898 */ 1899 com->last_modem_status = modem_status; 1900 if (!(com->state & CS_CHECKMSR)) { 1901 com_events += LOTS_OF_EVENTS; 1902 com->state |= CS_CHECKMSR; 1903 setsofttty(); 1904 } 1905 1906 /* handle CTS change immediately for crisp flow ctl */ 1907 if (com->state & CS_CTS_OFLOW) { 1908 if (modem_status & MSR_CTS) 1909 com->state |= CS_ODEVREADY; 1910 else 1911 com->state &= ~CS_ODEVREADY; 1912 } 1913 } 1914 1915 /* output queued and everything ready? */ 1916 if (line_status & LSR_TXRDY 1917 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 1918 ioptr = com->obufq.l_head; 1919 if (com->tx_fifo_size > 1) { 1920 u_int ocount; 1921 1922 ocount = com->obufq.l_tail - ioptr; 1923 if (ocount > com->tx_fifo_size) 1924 ocount = com->tx_fifo_size; 1925 com->bytes_out += ocount; 1926 do 1927 outb(com->data_port, *ioptr++); 1928 while (--ocount != 0); 1929 } else { 1930 outb(com->data_port, *ioptr++); 1931 ++com->bytes_out; 1932 } 1933 com->obufq.l_head = ioptr; 1934 if (COM_IIR_TXRDYBUG(com->flags)) { 1935 int_ctl_new = int_ctl | IER_ETXRDY; 1936 } 1937 if (ioptr >= com->obufq.l_tail) { 1938 struct lbq *qp; 1939 1940 qp = com->obufq.l_next; 1941 qp->l_queued = FALSE; 1942 qp = qp->l_next; 1943 if (qp != NULL) { 1944 com->obufq.l_head = qp->l_head; 1945 com->obufq.l_tail = qp->l_tail; 1946 com->obufq.l_next = qp; 1947 } else { 1948 /* output just completed */ 1949 if (COM_IIR_TXRDYBUG(com->flags)) { 1950 int_ctl_new = int_ctl & ~IER_ETXRDY; 1951 } 1952 com->state &= ~CS_BUSY; 1953 } 1954 if (!(com->state & CS_ODONE)) { 1955 com_events += LOTS_OF_EVENTS; 1956 com->state |= CS_ODONE; 1957 setsofttty(); /* handle at high level ASAP */ 1958 } 1959 } 1960 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 1961 outb(com->intr_ctl_port, int_ctl_new); 1962 } 1963 } 1964 1965 /* finished? */ 1966 #ifndef COM_MULTIPORT 1967 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 1968 #endif /* COM_MULTIPORT */ 1969 return; 1970 } 1971 } 1972 1973 static int 1974 sioioctl(struct dev_ioctl_args *ap) 1975 { 1976 cdev_t dev = ap->a_head.a_dev; 1977 caddr_t data = ap->a_data; 1978 struct com_s *com; 1979 int error; 1980 int mynor; 1981 struct tty *tp; 1982 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 1983 u_long oldcmd; 1984 struct termios term; 1985 #endif 1986 1987 mynor = minor(dev); 1988 com = com_addr(MINOR_TO_UNIT(mynor)); 1989 if (com == NULL || com->gone) 1990 return (ENODEV); 1991 if (mynor & CONTROL_MASK) { 1992 struct termios *ct; 1993 1994 switch (mynor & CONTROL_MASK) { 1995 case CONTROL_INIT_STATE: 1996 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 1997 break; 1998 case CONTROL_LOCK_STATE: 1999 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 2000 break; 2001 default: 2002 return (ENODEV); /* /dev/nodev */ 2003 } 2004 switch (ap->a_cmd) { 2005 case TIOCSETA: 2006 error = suser_cred(ap->a_cred, 0); 2007 if (error != 0) 2008 return (error); 2009 *ct = *(struct termios *)data; 2010 return (0); 2011 case TIOCGETA: 2012 *(struct termios *)data = *ct; 2013 return (0); 2014 case TIOCGETD: 2015 *(int *)data = TTYDISC; 2016 return (0); 2017 case TIOCGWINSZ: 2018 bzero(data, sizeof(struct winsize)); 2019 return (0); 2020 default: 2021 return (ENOTTY); 2022 } 2023 } 2024 tp = com->tp; 2025 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2026 term = tp->t_termios; 2027 oldcmd = ap->a_cmd; 2028 error = ttsetcompat(tp, &ap->a_cmd, data, &term); 2029 if (error != 0) 2030 return (error); 2031 if (ap->a_cmd != oldcmd) 2032 data = (caddr_t)&term; 2033 #endif 2034 if (ap->a_cmd == TIOCSETA || ap->a_cmd == TIOCSETAW || 2035 ap->a_cmd == TIOCSETAF) { 2036 int cc; 2037 struct termios *dt = (struct termios *)data; 2038 struct termios *lt = mynor & CALLOUT_MASK 2039 ? &com->lt_out : &com->lt_in; 2040 2041 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2042 | (dt->c_iflag & ~lt->c_iflag); 2043 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2044 | (dt->c_oflag & ~lt->c_oflag); 2045 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2046 | (dt->c_cflag & ~lt->c_cflag); 2047 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2048 | (dt->c_lflag & ~lt->c_lflag); 2049 for (cc = 0; cc < NCCS; ++cc) 2050 if (lt->c_cc[cc] != 0) 2051 dt->c_cc[cc] = tp->t_cc[cc]; 2052 if (lt->c_ispeed != 0) 2053 dt->c_ispeed = tp->t_ispeed; 2054 if (lt->c_ospeed != 0) 2055 dt->c_ospeed = tp->t_ospeed; 2056 } 2057 error = (*linesw[tp->t_line].l_ioctl)(tp, ap->a_cmd, data, ap->a_fflag, ap->a_cred); 2058 if (error != ENOIOCTL) 2059 return (error); 2060 crit_enter(); 2061 error = ttioctl(tp, ap->a_cmd, data, ap->a_fflag); 2062 disc_optim(tp, &tp->t_termios, com); 2063 if (error != ENOIOCTL) { 2064 crit_exit(); 2065 return (error); 2066 } 2067 switch (ap->a_cmd) { 2068 case TIOCSBRK: 2069 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2070 break; 2071 case TIOCCBRK: 2072 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2073 break; 2074 case TIOCSDTR: 2075 (void)commctl(com, TIOCM_DTR, DMBIS); 2076 break; 2077 case TIOCCDTR: 2078 (void)commctl(com, TIOCM_DTR, DMBIC); 2079 break; 2080 /* 2081 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 2082 * changes get undone on the next call to comparam(). 2083 */ 2084 case TIOCMSET: 2085 (void)commctl(com, *(int *)data, DMSET); 2086 break; 2087 case TIOCMBIS: 2088 (void)commctl(com, *(int *)data, DMBIS); 2089 break; 2090 case TIOCMBIC: 2091 (void)commctl(com, *(int *)data, DMBIC); 2092 break; 2093 case TIOCMGET: 2094 *(int *)data = commctl(com, 0, DMGET); 2095 break; 2096 case TIOCMSDTRWAIT: 2097 /* must be root since the wait applies to following logins */ 2098 error = suser_cred(ap->a_cred, 0); 2099 if (error != 0) { 2100 crit_exit(); 2101 return (error); 2102 } 2103 com->dtr_wait = *(int *)data * hz / 100; 2104 break; 2105 case TIOCMGDTRWAIT: 2106 *(int *)data = com->dtr_wait * 100 / hz; 2107 break; 2108 case TIOCTIMESTAMP: 2109 com->do_timestamp = TRUE; 2110 *(struct timeval *)data = com->timestamp; 2111 break; 2112 case TIOCDCDTIMESTAMP: 2113 com->do_dcd_timestamp = TRUE; 2114 *(struct timeval *)data = com->dcd_timestamp; 2115 break; 2116 default: 2117 crit_exit(); 2118 error = pps_ioctl(ap->a_cmd, data, &com->pps); 2119 if (error == ENODEV) 2120 error = ENOTTY; 2121 return (error); 2122 } 2123 crit_exit(); 2124 return (0); 2125 } 2126 2127 static void 2128 siopoll(void *dummy, void *frame) 2129 { 2130 int unit; 2131 2132 if (com_events == 0) 2133 return; 2134 repeat: 2135 for (unit = 0; unit < sio_numunits; ++unit) { 2136 struct com_s *com; 2137 int incc; 2138 struct tty *tp; 2139 2140 com = com_addr(unit); 2141 if (com == NULL) 2142 continue; 2143 tp = com->tp; 2144 if (tp == NULL || com->gone) { 2145 /* 2146 * Discard any events related to never-opened or 2147 * going-away devices. 2148 */ 2149 com_lock(); 2150 incc = com->iptr - com->ibuf; 2151 com->iptr = com->ibuf; 2152 if (com->state & CS_CHECKMSR) { 2153 incc += LOTS_OF_EVENTS; 2154 com->state &= ~CS_CHECKMSR; 2155 } 2156 com_events -= incc; 2157 com_unlock(); 2158 continue; 2159 } 2160 if (com->iptr != com->ibuf) { 2161 com_lock(); 2162 sioinput(com); 2163 com_unlock(); 2164 } 2165 if (com->state & CS_CHECKMSR) { 2166 u_char delta_modem_status; 2167 2168 com_lock(); 2169 delta_modem_status = com->last_modem_status 2170 ^ com->prev_modem_status; 2171 com->prev_modem_status = com->last_modem_status; 2172 com_events -= LOTS_OF_EVENTS; 2173 com->state &= ~CS_CHECKMSR; 2174 com_unlock(); 2175 if (delta_modem_status & MSR_DCD) 2176 (*linesw[tp->t_line].l_modem) 2177 (tp, com->prev_modem_status & MSR_DCD); 2178 } 2179 if (com->state & CS_ODONE) { 2180 com_lock(); 2181 com_events -= LOTS_OF_EVENTS; 2182 com->state &= ~CS_ODONE; 2183 com_unlock(); 2184 if (!(com->state & CS_BUSY) 2185 && !(com->extra_state & CSE_BUSYCHECK)) { 2186 callout_reset(&com->busy_ch, hz / 100, 2187 siobusycheck, com); 2188 com->extra_state |= CSE_BUSYCHECK; 2189 } 2190 (*linesw[tp->t_line].l_start)(tp); 2191 } 2192 if (com_events == 0) 2193 break; 2194 } 2195 if (com_events >= LOTS_OF_EVENTS) 2196 goto repeat; 2197 } 2198 2199 static int 2200 comparam(tp, t) 2201 struct tty *tp; 2202 struct termios *t; 2203 { 2204 u_int cfcr; 2205 int cflag; 2206 struct com_s *com; 2207 u_int divisor; 2208 u_char dlbh; 2209 u_char dlbl; 2210 int unit; 2211 2212 unit = DEV_TO_UNIT(tp->t_dev); 2213 com = com_addr(unit); 2214 if (com == NULL) 2215 return (ENODEV); 2216 2217 /* do historical conversions */ 2218 if (t->c_ispeed == 0) 2219 t->c_ispeed = t->c_ospeed; 2220 2221 /* check requested parameters */ 2222 if (t->c_ospeed == 0) 2223 divisor = 0; 2224 else { 2225 if (t->c_ispeed != t->c_ospeed) 2226 return (EINVAL); 2227 divisor = siodivisor(com->rclk, t->c_ispeed); 2228 if (divisor == 0) 2229 return (EINVAL); 2230 } 2231 2232 /* parameters are OK, convert them to the com struct and the device */ 2233 crit_enter(); 2234 if (divisor == 0) 2235 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 2236 else 2237 (void)commctl(com, TIOCM_DTR, DMBIS); 2238 cflag = t->c_cflag; 2239 switch (cflag & CSIZE) { 2240 case CS5: 2241 cfcr = CFCR_5BITS; 2242 break; 2243 case CS6: 2244 cfcr = CFCR_6BITS; 2245 break; 2246 case CS7: 2247 cfcr = CFCR_7BITS; 2248 break; 2249 default: 2250 cfcr = CFCR_8BITS; 2251 break; 2252 } 2253 if (cflag & PARENB) { 2254 cfcr |= CFCR_PENAB; 2255 if (!(cflag & PARODD)) 2256 cfcr |= CFCR_PEVEN; 2257 } 2258 if (cflag & CSTOPB) 2259 cfcr |= CFCR_STOPB; 2260 2261 if (com->hasfifo && divisor != 0) { 2262 /* 2263 * Use a fifo trigger level low enough so that the input 2264 * latency from the fifo is less than about 16 msec and 2265 * the total latency is less than about 30 msec. These 2266 * latencies are reasonable for humans. Serial comms 2267 * protocols shouldn't expect anything better since modem 2268 * latencies are larger. 2269 * 2270 * Interrupts can be held up for long periods of time 2271 * due to inefficiencies in other parts of the kernel, 2272 * certain video cards, etc. Setting the FIFO trigger 2273 * point to MEDH instead of HIGH gives us 694uS of slop 2274 * (8 character times) instead of 173uS (2 character times) 2275 * @ 115200 bps. 2276 */ 2277 com->fifo_image = t->c_ospeed <= 4800 2278 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 2279 #ifdef COM_ESP 2280 /* 2281 * The Hayes ESP card needs the fifo DMA mode bit set 2282 * in compatibility mode. If not, it will interrupt 2283 * for each character received. 2284 */ 2285 if (com->esp) 2286 com->fifo_image |= FIFO_DMA_MODE; 2287 #endif 2288 sio_setreg(com, com_fifo, com->fifo_image); 2289 } 2290 2291 /* 2292 * This returns with interrupts disabled so that we can complete 2293 * the speed change atomically. Keeping interrupts disabled is 2294 * especially important while com_data is hidden. 2295 */ 2296 (void) siosetwater(com, t->c_ispeed); 2297 2298 if (divisor != 0) { 2299 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2300 /* 2301 * Only set the divisor registers if they would change, 2302 * since on some 16550 incompatibles (UMC8669F), setting 2303 * them while input is arriving them loses sync until 2304 * data stops arriving. 2305 */ 2306 dlbl = divisor & 0xFF; 2307 if (sio_getreg(com, com_dlbl) != dlbl) 2308 sio_setreg(com, com_dlbl, dlbl); 2309 dlbh = divisor >> 8; 2310 if (sio_getreg(com, com_dlbh) != dlbh) 2311 sio_setreg(com, com_dlbh, dlbh); 2312 } 2313 2314 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2315 2316 if (!(tp->t_state & TS_TTSTOP)) 2317 com->state |= CS_TTGO; 2318 2319 if (cflag & CRTS_IFLOW) { 2320 if (com->st16650a) { 2321 sio_setreg(com, com_cfcr, 0xbf); 2322 sio_setreg(com, com_fifo, 2323 sio_getreg(com, com_fifo) | 0x40); 2324 } 2325 com->state |= CS_RTS_IFLOW; 2326 /* 2327 * If CS_RTS_IFLOW just changed from off to on, the change 2328 * needs to be propagated to MCR_RTS. This isn't urgent, 2329 * so do it later by calling comstart() instead of repeating 2330 * a lot of code from comstart() here. 2331 */ 2332 } else if (com->state & CS_RTS_IFLOW) { 2333 com->state &= ~CS_RTS_IFLOW; 2334 /* 2335 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2336 * on here, since comstart() won't do it later. 2337 */ 2338 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2339 if (com->st16650a) { 2340 sio_setreg(com, com_cfcr, 0xbf); 2341 sio_setreg(com, com_fifo, 2342 sio_getreg(com, com_fifo) & ~0x40); 2343 } 2344 } 2345 2346 2347 /* 2348 * Set up state to handle output flow control. 2349 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2350 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2351 */ 2352 com->state |= CS_ODEVREADY; 2353 com->state &= ~CS_CTS_OFLOW; 2354 if (cflag & CCTS_OFLOW) { 2355 com->state |= CS_CTS_OFLOW; 2356 if (!(com->last_modem_status & MSR_CTS)) 2357 com->state &= ~CS_ODEVREADY; 2358 if (com->st16650a) { 2359 sio_setreg(com, com_cfcr, 0xbf); 2360 sio_setreg(com, com_fifo, 2361 sio_getreg(com, com_fifo) | 0x80); 2362 } 2363 } else { 2364 if (com->st16650a) { 2365 sio_setreg(com, com_cfcr, 0xbf); 2366 sio_setreg(com, com_fifo, 2367 sio_getreg(com, com_fifo) & ~0x80); 2368 } 2369 } 2370 2371 sio_setreg(com, com_cfcr, com->cfcr_image); 2372 2373 /* XXX shouldn't call functions while intrs are disabled. */ 2374 disc_optim(tp, t, com); 2375 /* 2376 * Recover from fiddling with CS_TTGO. We used to call siointr1() 2377 * unconditionally, but that defeated the careful discarding of 2378 * stale input in sioopen(). 2379 */ 2380 if (com->state >= (CS_BUSY | CS_TTGO)) 2381 siointr1(com); 2382 2383 com_unlock(); 2384 crit_exit(); 2385 comstart(tp); 2386 if (com->ibufold != NULL) { 2387 kfree(com->ibufold, M_DEVBUF); 2388 com->ibufold = NULL; 2389 } 2390 return (0); 2391 } 2392 2393 static int 2394 siosetwater(com, speed) 2395 struct com_s *com; 2396 speed_t speed; 2397 { 2398 int cp4ticks; 2399 u_char *ibuf; 2400 int ibufsize; 2401 struct tty *tp; 2402 2403 /* 2404 * Make the buffer size large enough to handle a softtty interrupt 2405 * latency of about 2 ticks without loss of throughput or data 2406 * (about 3 ticks if input flow control is not used or not honoured, 2407 * but a bit less for CS5-CS7 modes). 2408 */ 2409 cp4ticks = speed / 10 / hz * 4; 2410 for (ibufsize = 128; ibufsize < cp4ticks;) 2411 ibufsize <<= 1; 2412 if (ibufsize == com->ibufsize) { 2413 com_lock(); 2414 return (0); 2415 } 2416 2417 /* 2418 * Allocate input buffer. The extra factor of 2 in the size is 2419 * to allow for an error byte for each input byte. 2420 */ 2421 ibuf = kmalloc(2 * ibufsize, M_DEVBUF, M_WAITOK | M_ZERO); 2422 2423 /* Initialize non-critical variables. */ 2424 com->ibufold = com->ibuf; 2425 com->ibufsize = ibufsize; 2426 tp = com->tp; 2427 if (tp != NULL) { 2428 tp->t_ififosize = 2 * ibufsize; 2429 tp->t_ispeedwat = (speed_t)-1; 2430 tp->t_ospeedwat = (speed_t)-1; 2431 } 2432 2433 /* 2434 * Read current input buffer, if any. Continue with interrupts 2435 * disabled. 2436 */ 2437 com_lock(); 2438 if (com->iptr != com->ibuf) 2439 sioinput(com); 2440 2441 /*- 2442 * Initialize critical variables, including input buffer watermarks. 2443 * The external device is asked to stop sending when the buffer 2444 * exactly reaches high water, or when the high level requests it. 2445 * The high level is notified immediately (rather than at a later 2446 * clock tick) when this watermark is reached. 2447 * The buffer size is chosen so the watermark should almost never 2448 * be reached. 2449 * The low watermark is invisibly 0 since the buffer is always 2450 * emptied all at once. 2451 */ 2452 com->iptr = com->ibuf = ibuf; 2453 com->ibufend = ibuf + ibufsize; 2454 com->ierroff = ibufsize; 2455 com->ihighwater = ibuf + 3 * ibufsize / 4; 2456 return (0); 2457 } 2458 2459 static void 2460 comstart(tp) 2461 struct tty *tp; 2462 { 2463 struct com_s *com; 2464 int unit; 2465 2466 unit = DEV_TO_UNIT(tp->t_dev); 2467 com = com_addr(unit); 2468 if (com == NULL) 2469 return; 2470 crit_enter(); 2471 com_lock(); 2472 if (tp->t_state & TS_TTSTOP) 2473 com->state &= ~CS_TTGO; 2474 else 2475 com->state |= CS_TTGO; 2476 if (tp->t_state & TS_TBLOCK) { 2477 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2478 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2479 } else { 2480 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2481 && com->state & CS_RTS_IFLOW) 2482 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2483 } 2484 com_unlock(); 2485 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2486 ttwwakeup(tp); 2487 crit_exit(); 2488 return; 2489 } 2490 if (tp->t_outq.c_cc != 0) { 2491 struct lbq *qp; 2492 struct lbq *next; 2493 2494 if (!com->obufs[0].l_queued) { 2495 com->obufs[0].l_tail 2496 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2497 sizeof com->obuf1); 2498 com->obufs[0].l_next = NULL; 2499 com->obufs[0].l_queued = TRUE; 2500 com_lock(); 2501 if (com->state & CS_BUSY) { 2502 qp = com->obufq.l_next; 2503 while ((next = qp->l_next) != NULL) 2504 qp = next; 2505 qp->l_next = &com->obufs[0]; 2506 } else { 2507 com->obufq.l_head = com->obufs[0].l_head; 2508 com->obufq.l_tail = com->obufs[0].l_tail; 2509 com->obufq.l_next = &com->obufs[0]; 2510 com->state |= CS_BUSY; 2511 } 2512 com_unlock(); 2513 } 2514 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2515 com->obufs[1].l_tail 2516 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2517 sizeof com->obuf2); 2518 com->obufs[1].l_next = NULL; 2519 com->obufs[1].l_queued = TRUE; 2520 com_lock(); 2521 if (com->state & CS_BUSY) { 2522 qp = com->obufq.l_next; 2523 while ((next = qp->l_next) != NULL) 2524 qp = next; 2525 qp->l_next = &com->obufs[1]; 2526 } else { 2527 com->obufq.l_head = com->obufs[1].l_head; 2528 com->obufq.l_tail = com->obufs[1].l_tail; 2529 com->obufq.l_next = &com->obufs[1]; 2530 com->state |= CS_BUSY; 2531 } 2532 com_unlock(); 2533 } 2534 tp->t_state |= TS_BUSY; 2535 } 2536 com_lock(); 2537 if (com->state >= (CS_BUSY | CS_TTGO)) 2538 siointr1(com); /* fake interrupt to start output */ 2539 com_unlock(); 2540 ttwwakeup(tp); 2541 crit_exit(); 2542 } 2543 2544 static void 2545 comstop(tp, rw) 2546 struct tty *tp; 2547 int rw; 2548 { 2549 struct com_s *com; 2550 2551 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2552 if (com == NULL || com->gone) 2553 return; 2554 com_lock(); 2555 if (rw & FWRITE) { 2556 if (com->hasfifo) 2557 #ifdef COM_ESP 2558 /* XXX avoid h/w bug. */ 2559 if (!com->esp) 2560 #endif 2561 sio_setreg(com, com_fifo, 2562 FIFO_XMT_RST | com->fifo_image); 2563 com->obufs[0].l_queued = FALSE; 2564 com->obufs[1].l_queued = FALSE; 2565 if (com->state & CS_ODONE) 2566 com_events -= LOTS_OF_EVENTS; 2567 com->state &= ~(CS_ODONE | CS_BUSY); 2568 com->tp->t_state &= ~TS_BUSY; 2569 } 2570 if (rw & FREAD) { 2571 if (com->hasfifo) 2572 #ifdef COM_ESP 2573 /* XXX avoid h/w bug. */ 2574 if (!com->esp) 2575 #endif 2576 sio_setreg(com, com_fifo, 2577 FIFO_RCV_RST | com->fifo_image); 2578 com_events -= (com->iptr - com->ibuf); 2579 com->iptr = com->ibuf; 2580 } 2581 com_unlock(); 2582 comstart(tp); 2583 } 2584 2585 static int 2586 commctl(com, bits, how) 2587 struct com_s *com; 2588 int bits; 2589 int how; 2590 { 2591 int mcr; 2592 int msr; 2593 2594 if (how == DMGET) { 2595 bits = TIOCM_LE; /* XXX - always enabled while open */ 2596 mcr = com->mcr_image; 2597 if (mcr & MCR_DTR) 2598 bits |= TIOCM_DTR; 2599 if (mcr & MCR_RTS) 2600 bits |= TIOCM_RTS; 2601 msr = com->prev_modem_status; 2602 if (msr & MSR_CTS) 2603 bits |= TIOCM_CTS; 2604 if (msr & MSR_DCD) 2605 bits |= TIOCM_CD; 2606 if (msr & MSR_DSR) 2607 bits |= TIOCM_DSR; 2608 /* 2609 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 2610 * more volatile by reading the modem status a lot. Perhaps 2611 * we should latch both bits until the status is read here. 2612 */ 2613 if (msr & (MSR_RI | MSR_TERI)) 2614 bits |= TIOCM_RI; 2615 return (bits); 2616 } 2617 mcr = 0; 2618 if (bits & TIOCM_DTR) 2619 mcr |= MCR_DTR; 2620 if (bits & TIOCM_RTS) 2621 mcr |= MCR_RTS; 2622 if (com->gone) 2623 return(0); 2624 com_lock(); 2625 switch (how) { 2626 case DMSET: 2627 outb(com->modem_ctl_port, 2628 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 2629 break; 2630 case DMBIS: 2631 outb(com->modem_ctl_port, com->mcr_image |= mcr); 2632 break; 2633 case DMBIC: 2634 outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 2635 break; 2636 } 2637 com_unlock(); 2638 return (0); 2639 } 2640 2641 static void 2642 siosettimeout() 2643 { 2644 struct com_s *com; 2645 bool_t someopen; 2646 int unit; 2647 2648 /* 2649 * Set our timeout period to 1 second if no polled devices are open. 2650 * Otherwise set it to max(1/200, 1/hz). 2651 * Enable timeouts iff some device is open. 2652 */ 2653 callout_stop(&sio_timeout_handle); 2654 sio_timeout = hz; 2655 someopen = FALSE; 2656 for (unit = 0; unit < sio_numunits; ++unit) { 2657 com = com_addr(unit); 2658 if (com != NULL && com->tp != NULL 2659 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2660 someopen = TRUE; 2661 if (com->poll || com->poll_output) { 2662 sio_timeout = hz > 200 ? hz / 200 : 1; 2663 break; 2664 } 2665 } 2666 } 2667 if (someopen) { 2668 sio_timeouts_until_log = hz / sio_timeout; 2669 callout_reset(&sio_timeout_handle, sio_timeout, 2670 comwakeup, NULL); 2671 } else { 2672 /* Flush error messages, if any. */ 2673 sio_timeouts_until_log = 1; 2674 comwakeup((void *)NULL); 2675 callout_stop(&sio_timeout_handle); 2676 } 2677 } 2678 2679 static void 2680 comwakeup(chan) 2681 void *chan; 2682 { 2683 struct com_s *com; 2684 int unit; 2685 2686 callout_reset(&sio_timeout_handle, sio_timeout, comwakeup, NULL); 2687 2688 /* 2689 * Recover from lost output interrupts. 2690 * Poll any lines that don't use interrupts. 2691 */ 2692 for (unit = 0; unit < sio_numunits; ++unit) { 2693 com = com_addr(unit); 2694 if (com != NULL && !com->gone 2695 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2696 com_lock(); 2697 siointr1(com); 2698 com_unlock(); 2699 } 2700 } 2701 2702 /* 2703 * Check for and log errors, but not too often. 2704 */ 2705 if (--sio_timeouts_until_log > 0) 2706 return; 2707 sio_timeouts_until_log = hz / sio_timeout; 2708 for (unit = 0; unit < sio_numunits; ++unit) { 2709 int errnum; 2710 2711 com = com_addr(unit); 2712 if (com == NULL) 2713 continue; 2714 if (com->gone) 2715 continue; 2716 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2717 u_int delta; 2718 u_long total; 2719 2720 com_lock(); 2721 delta = com->delta_error_counts[errnum]; 2722 com->delta_error_counts[errnum] = 0; 2723 com_unlock(); 2724 if (delta == 0) 2725 continue; 2726 total = com->error_counts[errnum] += delta; 2727 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2728 unit, delta, error_desc[errnum], 2729 delta == 1 ? "" : "s", total); 2730 } 2731 } 2732 } 2733 2734 static void 2735 disc_optim(tp, t, com) 2736 struct tty *tp; 2737 struct termios *t; 2738 struct com_s *com; 2739 { 2740 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 2741 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 2742 && (!(t->c_iflag & PARMRK) 2743 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 2744 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 2745 && linesw[tp->t_line].l_rint == ttyinput) 2746 tp->t_state |= TS_CAN_BYPASS_L_RINT; 2747 else 2748 tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 2749 com->hotchar = linesw[tp->t_line].l_hotchar; 2750 } 2751 2752 /* 2753 * Following are all routines needed for SIO to act as console 2754 */ 2755 #include <sys/cons.h> 2756 2757 struct siocnstate { 2758 u_char dlbl; 2759 u_char dlbh; 2760 u_char ier; 2761 u_char cfcr; 2762 u_char mcr; 2763 }; 2764 2765 static speed_t siocngetspeed (Port_t, u_long rclk); 2766 static void siocnclose (struct siocnstate *sp, Port_t iobase); 2767 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed); 2768 static void siocntxwait (Port_t iobase); 2769 2770 static cn_probe_t siocnprobe; 2771 static cn_init_t siocninit; 2772 static cn_checkc_t siocncheckc; 2773 static cn_getc_t siocngetc; 2774 static cn_putc_t siocnputc; 2775 2776 #ifdef __i386__ 2777 CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc, 2778 siocnputc, NULL); 2779 #endif 2780 2781 /* To get the GDB related variables */ 2782 #if DDB > 0 2783 #include <ddb/ddb.h> 2784 #endif 2785 2786 static void 2787 siocntxwait(iobase) 2788 Port_t iobase; 2789 { 2790 int timo; 2791 2792 /* 2793 * Wait for any pending transmission to finish. Required to avoid 2794 * the UART lockup bug when the speed is changed, and for normal 2795 * transmits. 2796 */ 2797 timo = 100000; 2798 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2799 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2800 ; 2801 } 2802 2803 /* 2804 * Read the serial port specified and try to figure out what speed 2805 * it's currently running at. We're assuming the serial port has 2806 * been initialized and is basicly idle. This routine is only intended 2807 * to be run at system startup. 2808 * 2809 * If the value read from the serial port doesn't make sense, return 0. 2810 */ 2811 2812 static speed_t 2813 siocngetspeed(iobase, rclk) 2814 Port_t iobase; 2815 u_long rclk; 2816 { 2817 u_int divisor; 2818 u_char dlbh; 2819 u_char dlbl; 2820 u_char cfcr; 2821 2822 cfcr = inb(iobase + com_cfcr); 2823 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2824 2825 dlbl = inb(iobase + com_dlbl); 2826 dlbh = inb(iobase + com_dlbh); 2827 2828 outb(iobase + com_cfcr, cfcr); 2829 2830 divisor = dlbh << 8 | dlbl; 2831 2832 /* XXX there should be more sanity checking. */ 2833 if (divisor == 0) 2834 return (CONSPEED); 2835 return (rclk / (16UL * divisor)); 2836 } 2837 2838 static void 2839 siocnopen(sp, iobase, speed) 2840 struct siocnstate *sp; 2841 Port_t iobase; 2842 int speed; 2843 { 2844 u_int divisor; 2845 u_char dlbh; 2846 u_char dlbl; 2847 2848 /* 2849 * Save all the device control registers except the fifo register 2850 * and set our default ones (cs8 -parenb speed=comdefaultrate). 2851 * We can't save the fifo register since it is read-only. 2852 */ 2853 sp->ier = inb(iobase + com_ier); 2854 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 2855 siocntxwait(iobase); 2856 sp->cfcr = inb(iobase + com_cfcr); 2857 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2858 sp->dlbl = inb(iobase + com_dlbl); 2859 sp->dlbh = inb(iobase + com_dlbh); 2860 /* 2861 * Only set the divisor registers if they would change, since on 2862 * some 16550 incompatibles (Startech), setting them clears the 2863 * data input register. This also reduces the effects of the 2864 * UMC8669F bug. 2865 */ 2866 divisor = siodivisor(comdefaultrclk, speed); 2867 dlbl = divisor & 0xFF; 2868 if (sp->dlbl != dlbl) 2869 outb(iobase + com_dlbl, dlbl); 2870 dlbh = divisor >> 8; 2871 if (sp->dlbh != dlbh) 2872 outb(iobase + com_dlbh, dlbh); 2873 outb(iobase + com_cfcr, CFCR_8BITS); 2874 sp->mcr = inb(iobase + com_mcr); 2875 /* 2876 * We don't want interrupts, but must be careful not to "disable" 2877 * them by clearing the MCR_IENABLE bit, since that might cause 2878 * an interrupt by floating the IRQ line. 2879 */ 2880 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 2881 } 2882 2883 static void 2884 siocnclose(sp, iobase) 2885 struct siocnstate *sp; 2886 Port_t iobase; 2887 { 2888 /* 2889 * Restore the device control registers. 2890 */ 2891 siocntxwait(iobase); 2892 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2893 if (sp->dlbl != inb(iobase + com_dlbl)) 2894 outb(iobase + com_dlbl, sp->dlbl); 2895 if (sp->dlbh != inb(iobase + com_dlbh)) 2896 outb(iobase + com_dlbh, sp->dlbh); 2897 outb(iobase + com_cfcr, sp->cfcr); 2898 /* 2899 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 2900 */ 2901 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 2902 outb(iobase + com_ier, sp->ier); 2903 } 2904 2905 static void 2906 siocnprobe(cp) 2907 struct consdev *cp; 2908 { 2909 speed_t boot_speed; 2910 u_char cfcr; 2911 u_int divisor; 2912 int unit; 2913 struct siocnstate sp; 2914 2915 /* 2916 * Find our first enabled console, if any. If it is a high-level 2917 * console device, then initialize it and return successfully. 2918 * If it is a low-level console device, then initialize it and 2919 * return unsuccessfully. It must be initialized in both cases 2920 * for early use by console drivers and debuggers. Initializing 2921 * the hardware is not necessary in all cases, since the i/o 2922 * routines initialize it on the fly, but it is necessary if 2923 * input might arrive while the hardware is switched back to an 2924 * uninitialized state. We can't handle multiple console devices 2925 * yet because our low-level routines don't take a device arg. 2926 * We trust the user to set the console flags properly so that we 2927 * don't need to probe. 2928 */ 2929 cp->cn_pri = CN_DEAD; 2930 2931 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 2932 int flags; 2933 int disabled; 2934 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 2935 if (disabled) 2936 continue; 2937 } 2938 if (resource_int_value("sio", unit, "flags", &flags)) 2939 continue; 2940 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 2941 int port; 2942 Port_t iobase; 2943 2944 if (resource_int_value("sio", unit, "port", &port)) 2945 continue; 2946 iobase = port; 2947 crit_enter(); 2948 if (boothowto & RB_SERIAL) { 2949 boot_speed = 2950 siocngetspeed(iobase, comdefaultrclk); 2951 if (boot_speed) 2952 comdefaultrate = boot_speed; 2953 } 2954 2955 /* 2956 * Initialize the divisor latch. We can't rely on 2957 * siocnopen() to do this the first time, since it 2958 * avoids writing to the latch if the latch appears 2959 * to have the correct value. Also, if we didn't 2960 * just read the speed from the hardware, then we 2961 * need to set the speed in hardware so that 2962 * switching it later is null. 2963 */ 2964 cfcr = inb(iobase + com_cfcr); 2965 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2966 divisor = siodivisor(comdefaultrclk, comdefaultrate); 2967 outb(iobase + com_dlbl, divisor & 0xff); 2968 outb(iobase + com_dlbh, divisor >> 8); 2969 outb(iobase + com_cfcr, cfcr); 2970 2971 siocnopen(&sp, iobase, comdefaultrate); 2972 2973 crit_exit(); 2974 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2975 cp->cn_dev = make_dev(&sio_ops, unit, 2976 UID_ROOT, GID_WHEEL, 0600, 2977 "ttyd%r", unit); 2978 cp->cn_pri = COM_FORCECONSOLE(flags) 2979 || boothowto & RB_SERIAL 2980 ? CN_REMOTE : CN_NORMAL; 2981 siocniobase = iobase; 2982 siocnunit = unit; 2983 } 2984 if (COM_DEBUGGER(flags)) { 2985 printf("sio%d: gdb debugging port\n", unit); 2986 siogdbiobase = iobase; 2987 siogdbunit = unit; 2988 #if DDB > 0 2989 gdbdev = make_dev(&sio_ops, unit, 2990 UID_ROOT, GID_WHEEL, 0600, 2991 "ttyd%r", unit); 2992 gdb_getc = siocngetc; 2993 gdb_putc = siocnputc; 2994 #endif 2995 } 2996 } 2997 } 2998 #ifdef __i386__ 2999 #if DDB > 0 3000 /* 3001 * XXX Ugly Compatability. 3002 * If no gdb port has been specified, set it to be the console 3003 * as some configuration files don't specify the gdb port. 3004 */ 3005 if (gdbdev == NOCDEV && (boothowto & RB_GDB)) { 3006 printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 3007 siocnunit); 3008 printf("Set flag 0x80 on desired GDB port in your\n"); 3009 printf("configuration file (currently sio only).\n"); 3010 siogdbiobase = siocniobase; 3011 siogdbunit = siocnunit; 3012 gdbdev = make_dev(&sio_ops, siocnunit, 3013 UID_ROOT, GID_WHEEL, 0600, 3014 "ttyd%r", siocnunit); 3015 gdb_getc = siocngetc; 3016 gdb_putc = siocnputc; 3017 } 3018 #endif 3019 #endif 3020 } 3021 3022 static void 3023 siocninit(cp) 3024 struct consdev *cp; 3025 { 3026 comconsole = DEV_TO_UNIT(cp->cn_dev); 3027 } 3028 3029 static int 3030 siocncheckc(dev) 3031 cdev_t dev; 3032 { 3033 int c; 3034 Port_t iobase; 3035 struct siocnstate sp; 3036 3037 if (minor(dev) == siogdbunit) 3038 iobase = siogdbiobase; 3039 else 3040 iobase = siocniobase; 3041 crit_enter(); 3042 siocnopen(&sp, iobase, comdefaultrate); 3043 if (inb(iobase + com_lsr) & LSR_RXRDY) 3044 c = inb(iobase + com_data); 3045 else 3046 c = -1; 3047 siocnclose(&sp, iobase); 3048 crit_exit(); 3049 return (c); 3050 } 3051 3052 3053 int 3054 siocngetc(dev) 3055 cdev_t dev; 3056 { 3057 int c; 3058 Port_t iobase; 3059 struct siocnstate sp; 3060 3061 if (minor(dev) == siogdbunit) 3062 iobase = siogdbiobase; 3063 else 3064 iobase = siocniobase; 3065 crit_enter(); 3066 siocnopen(&sp, iobase, comdefaultrate); 3067 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3068 ; 3069 c = inb(iobase + com_data); 3070 siocnclose(&sp, iobase); 3071 crit_exit(); 3072 return (c); 3073 } 3074 3075 void 3076 siocnputc(dev, c) 3077 cdev_t dev; 3078 int c; 3079 { 3080 struct siocnstate sp; 3081 Port_t iobase; 3082 3083 if (minor(dev) == siogdbunit) 3084 iobase = siogdbiobase; 3085 else 3086 iobase = siocniobase; 3087 crit_enter(); 3088 siocnopen(&sp, iobase, comdefaultrate); 3089 siocntxwait(iobase); 3090 outb(iobase + com_data, c); 3091 siocnclose(&sp, iobase); 3092 crit_exit(); 3093 } 3094 3095 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 3096 #if NPCI > 0 3097 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0); 3098 #endif 3099 #if NPUC > 0 3100 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0); 3101 #endif 3102