1*fd501800SSascha Wildner /*- 2*fd501800SSascha Wildner * Copyright (c) 2012-2015 LSI Corp. 3*fd501800SSascha Wildner * Copyright (c) 2013-2016 Avago Technologies 4*fd501800SSascha Wildner * All rights reserved. 5*fd501800SSascha Wildner * 6*fd501800SSascha Wildner * Redistribution and use in source and binary forms, with or without 7*fd501800SSascha Wildner * modification, are permitted provided that the following conditions 8*fd501800SSascha Wildner * are met: 9*fd501800SSascha Wildner * 1. Redistributions of source code must retain the above copyright 10*fd501800SSascha Wildner * notice, this list of conditions and the following disclaimer. 11*fd501800SSascha Wildner * 2. Redistributions in binary form must reproduce the above copyright 12*fd501800SSascha Wildner * notice, this list of conditions and the following disclaimer in the 13*fd501800SSascha Wildner * documentation and/or other materials provided with the distribution. 14*fd501800SSascha Wildner * 3. Neither the name of the author nor the names of any co-contributors 15*fd501800SSascha Wildner * may be used to endorse or promote products derived from this software 16*fd501800SSascha Wildner * without specific prior written permission. 17*fd501800SSascha Wildner * 18*fd501800SSascha Wildner * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19*fd501800SSascha Wildner * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*fd501800SSascha Wildner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*fd501800SSascha Wildner * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22*fd501800SSascha Wildner * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23*fd501800SSascha Wildner * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24*fd501800SSascha Wildner * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25*fd501800SSascha Wildner * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26*fd501800SSascha Wildner * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27*fd501800SSascha Wildner * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28*fd501800SSascha Wildner * SUCH DAMAGE. 29*fd501800SSascha Wildner * 30*fd501800SSascha Wildner * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 31*fd501800SSascha Wildner * 32*fd501800SSascha Wildner * $FreeBSD: head/sys/dev/mpr/mpi/mpi2_targ.h 299263 2016-05-09 16:12:32Z slm $ 33*fd501800SSascha Wildner */ 34*fd501800SSascha Wildner 35*fd501800SSascha Wildner /* 36*fd501800SSascha Wildner * Copyright (c) 2000-2015 LSI Corporation. 37*fd501800SSascha Wildner * Copyright (c) 2013-2016 Avago Technologies 38*fd501800SSascha Wildner * All rights reserved. 39*fd501800SSascha Wildner * 40*fd501800SSascha Wildner * 41*fd501800SSascha Wildner * Name: mpi2_targ.h 42*fd501800SSascha Wildner * Title: MPI Target mode messages and structures 43*fd501800SSascha Wildner * Creation Date: September 8, 2006 44*fd501800SSascha Wildner * 45*fd501800SSascha Wildner * mpi2_targ.h Version: 02.00.09 46*fd501800SSascha Wildner * 47*fd501800SSascha Wildner * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 48*fd501800SSascha Wildner * prefix are for use only on MPI v2.5 products, and must not be used 49*fd501800SSascha Wildner * with MPI v2.0 products. Unless otherwise noted, names beginning with 50*fd501800SSascha Wildner * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 51*fd501800SSascha Wildner * 52*fd501800SSascha Wildner * Version History 53*fd501800SSascha Wildner * --------------- 54*fd501800SSascha Wildner * 55*fd501800SSascha Wildner * Date Version Description 56*fd501800SSascha Wildner * -------- -------- ------------------------------------------------------ 57*fd501800SSascha Wildner * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 58*fd501800SSascha Wildner * 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to 59*fd501800SSascha Wildner * BufferPostFlags field of CommandBufferPostBase Request. 60*fd501800SSascha Wildner * 02-29-08 02.00.02 Modified various names to make them 32-character unique. 61*fd501800SSascha Wildner * 10-02-08 02.00.03 Removed NextCmdBufferOffset from 62*fd501800SSascha Wildner * MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST. 63*fd501800SSascha Wildner * Target Status Send Request only takes a single SGE for 64*fd501800SSascha Wildner * response data. 65*fd501800SSascha Wildner * 02-10-10 02.00.04 Added comment to MPI2_TARGET_SSP_RSP_IU structure. 66*fd501800SSascha Wildner * 11-18-11 02.00.05 Incorporating additions for MPI v2.5. 67*fd501800SSascha Wildner * 11-27-12 02.00.06 Added InitiatorDevHandle field to MPI2_TARGET_MODE_ABORT 68*fd501800SSascha Wildner * request message structure. 69*fd501800SSascha Wildner * Added AbortType MPI2_TARGET_MODE_ABORT_DEVHANDLE and 70*fd501800SSascha Wildner * MPI2_TARGET_MODE_ABORT_ALL_COMMANDS. 71*fd501800SSascha Wildner * 06-13-14 02.00.07 Added MinMSIxIndex and MaxMSIxIndex fields to 72*fd501800SSascha Wildner * MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST. 73*fd501800SSascha Wildner * 11-18-14 02.00.08 Updated copyright information. 74*fd501800SSascha Wildner * 03-16-15 02.00.09 Updated for MPI v2.6. 75*fd501800SSascha Wildner * Added MPI26_TARGET_ASSIST_IOFLAGS_ESCAPE_PASSTHROUGH. 76*fd501800SSascha Wildner * -------------------------------------------------------------------------- 77*fd501800SSascha Wildner */ 78*fd501800SSascha Wildner 79*fd501800SSascha Wildner #ifndef MPI2_TARG_H 80*fd501800SSascha Wildner #define MPI2_TARG_H 81*fd501800SSascha Wildner 82*fd501800SSascha Wildner 83*fd501800SSascha Wildner /****************************************************************************** 84*fd501800SSascha Wildner * 85*fd501800SSascha Wildner * SCSI Target Messages 86*fd501800SSascha Wildner * 87*fd501800SSascha Wildner *******************************************************************************/ 88*fd501800SSascha Wildner 89*fd501800SSascha Wildner /**************************************************************************** 90*fd501800SSascha Wildner * Target Command Buffer Post Base Request 91*fd501800SSascha Wildner ****************************************************************************/ 92*fd501800SSascha Wildner 93*fd501800SSascha Wildner typedef struct _MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST 94*fd501800SSascha Wildner { 95*fd501800SSascha Wildner U8 BufferPostFlags; /* 0x00 */ 96*fd501800SSascha Wildner U8 Reserved1; /* 0x01 */ 97*fd501800SSascha Wildner U8 ChainOffset; /* 0x02 */ 98*fd501800SSascha Wildner U8 Function; /* 0x03 */ 99*fd501800SSascha Wildner U16 TotalCmdBuffers; /* 0x04 */ 100*fd501800SSascha Wildner U8 Reserved; /* 0x06 */ 101*fd501800SSascha Wildner U8 MsgFlags; /* 0x07 */ 102*fd501800SSascha Wildner U8 VP_ID; /* 0x08 */ 103*fd501800SSascha Wildner U8 VF_ID; /* 0x09 */ 104*fd501800SSascha Wildner U16 Reserved2; /* 0x0A */ 105*fd501800SSascha Wildner U32 Reserved3; /* 0x0C */ 106*fd501800SSascha Wildner U16 CmdBufferLength; /* 0x10 */ 107*fd501800SSascha Wildner U8 MinMSIxIndex; /* 0x12 */ /* MPI 2.5 and newer only; Reserved in MPI 2.0 */ 108*fd501800SSascha Wildner U8 MaxMSIxIndex; /* 0x13 */ /* MPI 2.5 and newer only; Reserved in MPI 2.0 */ 109*fd501800SSascha Wildner U32 BaseAddressLow; /* 0x14 */ 110*fd501800SSascha Wildner U32 BaseAddressHigh; /* 0x18 */ 111*fd501800SSascha Wildner } MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST, 112*fd501800SSascha Wildner MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST, 113*fd501800SSascha Wildner Mpi2TargetCmdBufferPostBaseRequest_t, 114*fd501800SSascha Wildner MPI2_POINTER pMpi2TargetCmdBufferPostBaseRequest_t; 115*fd501800SSascha Wildner 116*fd501800SSascha Wildner /* values for the BufferPostflags field */ 117*fd501800SSascha Wildner #define MPI2_CMD_BUF_POST_BASE_ADDRESS_SPACE_MASK (0x0C) 118*fd501800SSascha Wildner #define MPI2_CMD_BUF_POST_BASE_SYSTEM_ADDRESS_SPACE (0x00) 119*fd501800SSascha Wildner #define MPI2_CMD_BUF_POST_BASE_IOCDDR_ADDRESS_SPACE (0x04) 120*fd501800SSascha Wildner #define MPI2_CMD_BUF_POST_BASE_IOCPLB_ADDRESS_SPACE (0x08) /* only for MPI v2.5 and earlier */ 121*fd501800SSascha Wildner #define MPI26_CMD_BUF_POST_BASE_IOCCTL_ADDRESS_SPACE (0x08) /* for MPI v2.6 only */ 122*fd501800SSascha Wildner #define MPI2_CMD_BUF_POST_BASE_IOCPLBNTA_ADDRESS_SPACE (0x0C) /* only for MPI v2.5 and earlier */ 123*fd501800SSascha Wildner 124*fd501800SSascha Wildner #define MPI2_CMD_BUF_POST_BASE_FLAGS_AUTO_POST_ALL (0x01) 125*fd501800SSascha Wildner 126*fd501800SSascha Wildner 127*fd501800SSascha Wildner /**************************************************************************** 128*fd501800SSascha Wildner * Target Command Buffer Post List Request 129*fd501800SSascha Wildner ****************************************************************************/ 130*fd501800SSascha Wildner 131*fd501800SSascha Wildner typedef struct _MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST 132*fd501800SSascha Wildner { 133*fd501800SSascha Wildner U16 Reserved; /* 0x00 */ 134*fd501800SSascha Wildner U8 ChainOffset; /* 0x02 */ 135*fd501800SSascha Wildner U8 Function; /* 0x03 */ 136*fd501800SSascha Wildner U16 CmdBufferCount; /* 0x04 */ 137*fd501800SSascha Wildner U8 Reserved1; /* 0x06 */ 138*fd501800SSascha Wildner U8 MsgFlags; /* 0x07 */ 139*fd501800SSascha Wildner U8 VP_ID; /* 0x08 */ 140*fd501800SSascha Wildner U8 VF_ID; /* 0x09 */ 141*fd501800SSascha Wildner U16 Reserved2; /* 0x0A */ 142*fd501800SSascha Wildner U32 Reserved3; /* 0x0C */ 143*fd501800SSascha Wildner U16 IoIndex[2]; /* 0x10 */ 144*fd501800SSascha Wildner } MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST, 145*fd501800SSascha Wildner MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST, 146*fd501800SSascha Wildner Mpi2TargetCmdBufferPostListRequest_t, 147*fd501800SSascha Wildner MPI2_POINTER pMpi2TargetCmdBufferPostListRequest_t; 148*fd501800SSascha Wildner 149*fd501800SSascha Wildner /**************************************************************************** 150*fd501800SSascha Wildner * Target Command Buffer Post Base List Reply 151*fd501800SSascha Wildner ****************************************************************************/ 152*fd501800SSascha Wildner 153*fd501800SSascha Wildner typedef struct _MPI2_TARGET_BUF_POST_BASE_LIST_REPLY 154*fd501800SSascha Wildner { 155*fd501800SSascha Wildner U8 Flags; /* 0x00 */ 156*fd501800SSascha Wildner U8 Reserved; /* 0x01 */ 157*fd501800SSascha Wildner U8 MsgLength; /* 0x02 */ 158*fd501800SSascha Wildner U8 Function; /* 0x03 */ 159*fd501800SSascha Wildner U16 Reserved1; /* 0x04 */ 160*fd501800SSascha Wildner U8 Reserved2; /* 0x06 */ 161*fd501800SSascha Wildner U8 MsgFlags; /* 0x07 */ 162*fd501800SSascha Wildner U8 VP_ID; /* 0x08 */ 163*fd501800SSascha Wildner U8 VF_ID; /* 0x09 */ 164*fd501800SSascha Wildner U16 Reserved3; /* 0x0A */ 165*fd501800SSascha Wildner U16 Reserved4; /* 0x0C */ 166*fd501800SSascha Wildner U16 IOCStatus; /* 0x0E */ 167*fd501800SSascha Wildner U32 IOCLogInfo; /* 0x10 */ 168*fd501800SSascha Wildner U16 IoIndex; /* 0x14 */ 169*fd501800SSascha Wildner U16 Reserved5; /* 0x16 */ 170*fd501800SSascha Wildner U32 Reserved6; /* 0x18 */ 171*fd501800SSascha Wildner } MPI2_TARGET_BUF_POST_BASE_LIST_REPLY, 172*fd501800SSascha Wildner MPI2_POINTER PTR_MPI2_TARGET_BUF_POST_BASE_LIST_REPLY, 173*fd501800SSascha Wildner Mpi2TargetCmdBufferPostBaseListReply_t, 174*fd501800SSascha Wildner MPI2_POINTER pMpi2TargetCmdBufferPostBaseListReply_t; 175*fd501800SSascha Wildner 176*fd501800SSascha Wildner /* Flags defines */ 177*fd501800SSascha Wildner #define MPI2_CMD_BUF_POST_REPLY_IOINDEX_VALID (0x01) 178*fd501800SSascha Wildner 179*fd501800SSascha Wildner 180*fd501800SSascha Wildner /**************************************************************************** 181*fd501800SSascha Wildner * Command Buffer Formats (with 16 byte CDB) 182*fd501800SSascha Wildner ****************************************************************************/ 183*fd501800SSascha Wildner 184*fd501800SSascha Wildner typedef struct _MPI2_TARGET_SSP_CMD_BUFFER 185*fd501800SSascha Wildner { 186*fd501800SSascha Wildner U8 FrameType; /* 0x00 */ 187*fd501800SSascha Wildner U8 Reserved1; /* 0x01 */ 188*fd501800SSascha Wildner U16 InitiatorConnectionTag; /* 0x02 */ 189*fd501800SSascha Wildner U32 HashedSourceSASAddress; /* 0x04 */ 190*fd501800SSascha Wildner U16 Reserved2; /* 0x08 */ 191*fd501800SSascha Wildner U16 Flags; /* 0x0A */ 192*fd501800SSascha Wildner U32 Reserved3; /* 0x0C */ 193*fd501800SSascha Wildner U16 Tag; /* 0x10 */ 194*fd501800SSascha Wildner U16 TargetPortTransferTag; /* 0x12 */ 195*fd501800SSascha Wildner U32 DataOffset; /* 0x14 */ 196*fd501800SSascha Wildner /* COMMAND information unit starts here */ 197*fd501800SSascha Wildner U8 LogicalUnitNumber[8]; /* 0x18 */ 198*fd501800SSascha Wildner U8 Reserved4; /* 0x20 */ 199*fd501800SSascha Wildner U8 TaskAttribute; /* lower 3 bits */ /* 0x21 */ 200*fd501800SSascha Wildner U8 Reserved5; /* 0x22 */ 201*fd501800SSascha Wildner U8 AdditionalCDBLength; /* upper 5 bits */ /* 0x23 */ 202*fd501800SSascha Wildner U8 CDB[16]; /* 0x24 */ 203*fd501800SSascha Wildner /* Additional CDB bytes extend past the CDB field */ 204*fd501800SSascha Wildner } MPI2_TARGET_SSP_CMD_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_CMD_BUFFER, 205*fd501800SSascha Wildner Mpi2TargetSspCmdBuffer, MPI2_POINTER pMp2iTargetSspCmdBuffer; 206*fd501800SSascha Wildner 207*fd501800SSascha Wildner typedef struct _MPI2_TARGET_SSP_TASK_BUFFER 208*fd501800SSascha Wildner { 209*fd501800SSascha Wildner U8 FrameType; /* 0x00 */ 210*fd501800SSascha Wildner U8 Reserved1; /* 0x01 */ 211*fd501800SSascha Wildner U16 InitiatorConnectionTag; /* 0x02 */ 212*fd501800SSascha Wildner U32 HashedSourceSASAddress; /* 0x04 */ 213*fd501800SSascha Wildner U16 Reserved2; /* 0x08 */ 214*fd501800SSascha Wildner U16 Flags; /* 0x0A */ 215*fd501800SSascha Wildner U32 Reserved3; /* 0x0C */ 216*fd501800SSascha Wildner U16 Tag; /* 0x10 */ 217*fd501800SSascha Wildner U16 TargetPortTransferTag; /* 0x12 */ 218*fd501800SSascha Wildner U32 DataOffset; /* 0x14 */ 219*fd501800SSascha Wildner /* TASK information unit starts here */ 220*fd501800SSascha Wildner U8 LogicalUnitNumber[8]; /* 0x18 */ 221*fd501800SSascha Wildner U16 Reserved4; /* 0x20 */ 222*fd501800SSascha Wildner U8 TaskManagementFunction; /* 0x22 */ 223*fd501800SSascha Wildner U8 Reserved5; /* 0x23 */ 224*fd501800SSascha Wildner U16 ManagedTaskTag; /* 0x24 */ 225*fd501800SSascha Wildner U16 Reserved6; /* 0x26 */ 226*fd501800SSascha Wildner U32 Reserved7; /* 0x28 */ 227*fd501800SSascha Wildner U32 Reserved8; /* 0x2C */ 228*fd501800SSascha Wildner U32 Reserved9; /* 0x30 */ 229*fd501800SSascha Wildner } MPI2_TARGET_SSP_TASK_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_TASK_BUFFER, 230*fd501800SSascha Wildner Mpi2TargetSspTaskBuffer, MPI2_POINTER pMpi2TargetSspTaskBuffer; 231*fd501800SSascha Wildner 232*fd501800SSascha Wildner /* mask and shift for HashedSourceSASAddress field */ 233*fd501800SSascha Wildner #define MPI2_TARGET_HASHED_SAS_ADDRESS_MASK (0xFFFFFF00) 234*fd501800SSascha Wildner #define MPI2_TARGET_HASHED_SAS_ADDRESS_SHIFT (8) 235*fd501800SSascha Wildner 236*fd501800SSascha Wildner 237*fd501800SSascha Wildner /**************************************************************************** 238*fd501800SSascha Wildner * MPI v2.0 Target Assist Request 239*fd501800SSascha Wildner ****************************************************************************/ 240*fd501800SSascha Wildner 241*fd501800SSascha Wildner typedef struct _MPI2_TARGET_ASSIST_REQUEST 242*fd501800SSascha Wildner { 243*fd501800SSascha Wildner U8 Reserved1; /* 0x00 */ 244*fd501800SSascha Wildner U8 TargetAssistFlags; /* 0x01 */ 245*fd501800SSascha Wildner U8 ChainOffset; /* 0x02 */ 246*fd501800SSascha Wildner U8 Function; /* 0x03 */ 247*fd501800SSascha Wildner U16 QueueTag; /* 0x04 */ 248*fd501800SSascha Wildner U8 Reserved2; /* 0x06 */ 249*fd501800SSascha Wildner U8 MsgFlags; /* 0x07 */ 250*fd501800SSascha Wildner U8 VP_ID; /* 0x08 */ 251*fd501800SSascha Wildner U8 VF_ID; /* 0x09 */ 252*fd501800SSascha Wildner U16 Reserved3; /* 0x0A */ 253*fd501800SSascha Wildner U16 IoIndex; /* 0x0C */ 254*fd501800SSascha Wildner U16 InitiatorConnectionTag; /* 0x0E */ 255*fd501800SSascha Wildner U16 SGLFlags; /* 0x10 */ 256*fd501800SSascha Wildner U8 SequenceNumber; /* 0x12 */ 257*fd501800SSascha Wildner U8 Reserved4; /* 0x13 */ 258*fd501800SSascha Wildner U8 SGLOffset0; /* 0x14 */ 259*fd501800SSascha Wildner U8 SGLOffset1; /* 0x15 */ 260*fd501800SSascha Wildner U8 SGLOffset2; /* 0x16 */ 261*fd501800SSascha Wildner U8 SGLOffset3; /* 0x17 */ 262*fd501800SSascha Wildner U32 SkipCount; /* 0x18 */ 263*fd501800SSascha Wildner U32 DataLength; /* 0x1C */ 264*fd501800SSascha Wildner U32 BidirectionalDataLength; /* 0x20 */ 265*fd501800SSascha Wildner U16 IoFlags; /* 0x24 */ 266*fd501800SSascha Wildner U16 EEDPFlags; /* 0x26 */ 267*fd501800SSascha Wildner U32 EEDPBlockSize; /* 0x28 */ 268*fd501800SSascha Wildner U32 SecondaryReferenceTag; /* 0x2C */ 269*fd501800SSascha Wildner U16 SecondaryApplicationTag; /* 0x30 */ 270*fd501800SSascha Wildner U16 ApplicationTagTranslationMask; /* 0x32 */ 271*fd501800SSascha Wildner U32 PrimaryReferenceTag; /* 0x34 */ 272*fd501800SSascha Wildner U16 PrimaryApplicationTag; /* 0x38 */ 273*fd501800SSascha Wildner U16 PrimaryApplicationTagMask; /* 0x3A */ 274*fd501800SSascha Wildner U32 RelativeOffset; /* 0x3C */ 275*fd501800SSascha Wildner U32 Reserved5; /* 0x40 */ 276*fd501800SSascha Wildner U32 Reserved6; /* 0x44 */ 277*fd501800SSascha Wildner U32 Reserved7; /* 0x48 */ 278*fd501800SSascha Wildner U32 Reserved8; /* 0x4C */ 279*fd501800SSascha Wildner MPI2_SGE_IO_UNION SGL[1]; /* 0x50 */ 280*fd501800SSascha Wildner } MPI2_TARGET_ASSIST_REQUEST, MPI2_POINTER PTR_MPI2_TARGET_ASSIST_REQUEST, 281*fd501800SSascha Wildner Mpi2TargetAssistRequest_t, MPI2_POINTER pMpi2TargetAssistRequest_t; 282*fd501800SSascha Wildner 283*fd501800SSascha Wildner /* Target Assist TargetAssistFlags bits */ 284*fd501800SSascha Wildner 285*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80) 286*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_FLAGS_TLR (0x10) 287*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_FLAGS_RETRANSMIT (0x04) 288*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02) 289*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01) 290*fd501800SSascha Wildner 291*fd501800SSascha Wildner /* Target Assist SGLFlags bits */ 292*fd501800SSascha Wildner 293*fd501800SSascha Wildner /* base values for Data Location Address Space */ 294*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_ADDR_MASK (0x0C) 295*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_SYSTEM_ADDR (0x00) 296*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_IOCDDR_ADDR (0x04) 297*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_IOCPLB_ADDR (0x08) 298*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_PLBNTA_ADDR (0x0C) 299*fd501800SSascha Wildner 300*fd501800SSascha Wildner /* base values for Type */ 301*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_TYPE_MASK (0x03) 302*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_MPI_TYPE (0x00) 303*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_32IEEE_TYPE (0x01) 304*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_64IEEE_TYPE (0x02) 305*fd501800SSascha Wildner 306*fd501800SSascha Wildner /* shift values for each sub-field */ 307*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_SGL3_SHIFT (12) 308*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_SGL2_SHIFT (8) 309*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_SGL1_SHIFT (4) 310*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_SGLFLAGS_SGL0_SHIFT (0) 311*fd501800SSascha Wildner 312*fd501800SSascha Wildner /* Target Assist IoFlags bits */ 313*fd501800SSascha Wildner 314*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800) 315*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_IOFLAGS_MULTICAST (0x0400) 316*fd501800SSascha Wildner #define MPI2_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200) 317*fd501800SSascha Wildner 318*fd501800SSascha Wildner /* Target Assist EEDPFlags bits */ 319*fd501800SSascha Wildner 320*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_INC_PRI_REFTAG (0x8000) 321*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_INC_SEC_REFTAG (0x4000) 322*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_INC_PRI_APPTAG (0x2000) 323*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_INC_SEC_APPTAG (0x1000) 324*fd501800SSascha Wildner 325*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_CHECK_REFTAG (0x0400) 326*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_CHECK_APPTAG (0x0200) 327*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_CHECK_GUARD (0x0100) 328*fd501800SSascha Wildner 329*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_PASSTHRU_REFTAG (0x0008) 330*fd501800SSascha Wildner 331*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_MASK_OP (0x0007) 332*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_NOOP_OP (0x0000) 333*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_CHECK_OP (0x0001) 334*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_STRIP_OP (0x0002) 335*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_CHECK_REMOVE_OP (0x0003) 336*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_INSERT_OP (0x0004) 337*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_REPLACE_OP (0x0006) 338*fd501800SSascha Wildner #define MPI2_TA_EEDPFLAGS_CHECK_REGEN_OP (0x0007) 339*fd501800SSascha Wildner 340*fd501800SSascha Wildner 341*fd501800SSascha Wildner /**************************************************************************** 342*fd501800SSascha Wildner * MPI v2.5 Target Assist Request 343*fd501800SSascha Wildner ****************************************************************************/ 344*fd501800SSascha Wildner 345*fd501800SSascha Wildner typedef struct _MPI25_TARGET_ASSIST_REQUEST 346*fd501800SSascha Wildner { 347*fd501800SSascha Wildner U8 Reserved1; /* 0x00 */ 348*fd501800SSascha Wildner U8 TargetAssistFlags; /* 0x01 */ 349*fd501800SSascha Wildner U8 ChainOffset; /* 0x02 */ 350*fd501800SSascha Wildner U8 Function; /* 0x03 */ 351*fd501800SSascha Wildner U16 QueueTag; /* 0x04 */ 352*fd501800SSascha Wildner U8 Reserved2; /* 0x06 */ 353*fd501800SSascha Wildner U8 MsgFlags; /* 0x07 */ 354*fd501800SSascha Wildner U8 VP_ID; /* 0x08 */ 355*fd501800SSascha Wildner U8 VF_ID; /* 0x09 */ 356*fd501800SSascha Wildner U16 Reserved3; /* 0x0A */ 357*fd501800SSascha Wildner U16 IoIndex; /* 0x0C */ 358*fd501800SSascha Wildner U16 InitiatorConnectionTag; /* 0x0E */ 359*fd501800SSascha Wildner U8 DMAFlags; /* 0x10 */ 360*fd501800SSascha Wildner U8 Reserved9; /* 0x11 */ 361*fd501800SSascha Wildner U8 SequenceNumber; /* 0x12 */ 362*fd501800SSascha Wildner U8 Reserved4; /* 0x13 */ 363*fd501800SSascha Wildner U8 SGLOffset0; /* 0x14 */ 364*fd501800SSascha Wildner U8 SGLOffset1; /* 0x15 */ 365*fd501800SSascha Wildner U8 SGLOffset2; /* 0x16 */ 366*fd501800SSascha Wildner U8 SGLOffset3; /* 0x17 */ 367*fd501800SSascha Wildner U32 SkipCount; /* 0x18 */ 368*fd501800SSascha Wildner U32 DataLength; /* 0x1C */ 369*fd501800SSascha Wildner U32 BidirectionalDataLength; /* 0x20 */ 370*fd501800SSascha Wildner U16 IoFlags; /* 0x24 */ 371*fd501800SSascha Wildner U16 EEDPFlags; /* 0x26 */ 372*fd501800SSascha Wildner U16 EEDPBlockSize; /* 0x28 */ 373*fd501800SSascha Wildner U16 Reserved10; /* 0x2A */ 374*fd501800SSascha Wildner U32 SecondaryReferenceTag; /* 0x2C */ 375*fd501800SSascha Wildner U16 SecondaryApplicationTag; /* 0x30 */ 376*fd501800SSascha Wildner U16 ApplicationTagTranslationMask; /* 0x32 */ 377*fd501800SSascha Wildner U32 PrimaryReferenceTag; /* 0x34 */ 378*fd501800SSascha Wildner U16 PrimaryApplicationTag; /* 0x38 */ 379*fd501800SSascha Wildner U16 PrimaryApplicationTagMask; /* 0x3A */ 380*fd501800SSascha Wildner U32 RelativeOffset; /* 0x3C */ 381*fd501800SSascha Wildner U32 Reserved5; /* 0x40 */ 382*fd501800SSascha Wildner U32 Reserved6; /* 0x44 */ 383*fd501800SSascha Wildner U32 Reserved7; /* 0x48 */ 384*fd501800SSascha Wildner U32 Reserved8; /* 0x4C */ 385*fd501800SSascha Wildner MPI25_SGE_IO_UNION SGL; /* 0x50 */ 386*fd501800SSascha Wildner } MPI25_TARGET_ASSIST_REQUEST, MPI2_POINTER PTR_MPI25_TARGET_ASSIST_REQUEST, 387*fd501800SSascha Wildner Mpi25TargetAssistRequest_t, MPI2_POINTER pMpi25TargetAssistRequest_t; 388*fd501800SSascha Wildner 389*fd501800SSascha Wildner /* use MPI2_TARGET_ASSIST_FLAGS_ defines for the Flags field */ 390*fd501800SSascha Wildner 391*fd501800SSascha Wildner /* Defines for the DMAFlags field 392*fd501800SSascha Wildner * Each setting affects 4 SGLS, from SGL0 to SGL3. 393*fd501800SSascha Wildner * D = Data 394*fd501800SSascha Wildner * C = Cache DIF 395*fd501800SSascha Wildner * I = Interleaved 396*fd501800SSascha Wildner * H = Host DIF 397*fd501800SSascha Wildner */ 398*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_MASK (0x0F) 399*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_D_D_D (0x00) 400*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_D_D_C (0x01) 401*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_D_D_I (0x02) 402*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_D_C_C (0x03) 403*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_D_C_I (0x04) 404*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_D_I_I (0x05) 405*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_C_C_C (0x06) 406*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_C_C_I (0x07) 407*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_C_I_I (0x08) 408*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_I_I_I (0x09) 409*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_H_D_D (0x0A) 410*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_H_D_C (0x0B) 411*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_H_D_I (0x0C) 412*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_H_C_C (0x0D) 413*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_H_C_I (0x0E) 414*fd501800SSascha Wildner #define MPI25_TA_DMAFLAGS_OP_D_H_I_I (0x0F) 415*fd501800SSascha Wildner 416*fd501800SSascha Wildner /* defines for the IoFlags field */ 417*fd501800SSascha Wildner #define MPI26_TARGET_ASSIST_IOFLAGS_ESCAPE_PASSTHROUGH (0x2000) /* MPI v2.6 and later */ 418*fd501800SSascha Wildner #define MPI25_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800) 419*fd501800SSascha Wildner #define MPI25_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200) 420*fd501800SSascha Wildner 421*fd501800SSascha Wildner /* defines for the EEDPFlags field */ 422*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_INC_PRI_REFTAG (0x8000) 423*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_INC_SEC_REFTAG (0x4000) 424*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_INC_PRI_APPTAG (0x2000) 425*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_INC_SEC_APPTAG (0x1000) 426*fd501800SSascha Wildner 427*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_CHECK_REFTAG (0x0400) 428*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_CHECK_APPTAG (0x0200) 429*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_CHECK_GUARD (0x0100) 430*fd501800SSascha Wildner 431*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0) 432*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_COMPATIBLE_MODE (0x0000) 433*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040) 434*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080) 435*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0) 436*fd501800SSascha Wildner 437*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030) 438*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000) 439*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010) 440*fd501800SSascha Wildner 441*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_PASSTHRU_REFTAG (0x0008) 442*fd501800SSascha Wildner 443*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_MASK_OP (0x0007) 444*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_NOOP_OP (0x0000) 445*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_CHECK_OP (0x0001) 446*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_STRIP_OP (0x0002) 447*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_CHECK_REMOVE_OP (0x0003) 448*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_INSERT_OP (0x0004) 449*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_REPLACE_OP (0x0006) 450*fd501800SSascha Wildner #define MPI25_TA_EEDPFLAGS_CHECK_REGEN_OP (0x0007) 451*fd501800SSascha Wildner 452*fd501800SSascha Wildner 453*fd501800SSascha Wildner /**************************************************************************** 454*fd501800SSascha Wildner * Target Status Send Request 455*fd501800SSascha Wildner ****************************************************************************/ 456*fd501800SSascha Wildner 457*fd501800SSascha Wildner typedef struct _MPI2_TARGET_STATUS_SEND_REQUEST 458*fd501800SSascha Wildner { 459*fd501800SSascha Wildner U8 Reserved1; /* 0x00 */ 460*fd501800SSascha Wildner U8 StatusFlags; /* 0x01 */ 461*fd501800SSascha Wildner U8 ChainOffset; /* 0x02 */ 462*fd501800SSascha Wildner U8 Function; /* 0x03 */ 463*fd501800SSascha Wildner U16 QueueTag; /* 0x04 */ 464*fd501800SSascha Wildner U8 Reserved2; /* 0x06 */ 465*fd501800SSascha Wildner U8 MsgFlags; /* 0x07 */ 466*fd501800SSascha Wildner U8 VP_ID; /* 0x08 */ 467*fd501800SSascha Wildner U8 VF_ID; /* 0x09 */ 468*fd501800SSascha Wildner U16 Reserved3; /* 0x0A */ 469*fd501800SSascha Wildner U16 IoIndex; /* 0x0C */ 470*fd501800SSascha Wildner U16 InitiatorConnectionTag; /* 0x0E */ 471*fd501800SSascha Wildner U16 SGLFlags; /* 0x10 */ /* MPI v2.0 only. Reserved on MPI v2.5. */ 472*fd501800SSascha Wildner U16 Reserved4; /* 0x12 */ 473*fd501800SSascha Wildner U8 SGLOffset0; /* 0x14 */ 474*fd501800SSascha Wildner U8 Reserved5; /* 0x15 */ 475*fd501800SSascha Wildner U16 Reserved6; /* 0x16 */ 476*fd501800SSascha Wildner U32 Reserved7; /* 0x18 */ 477*fd501800SSascha Wildner U32 Reserved8; /* 0x1C */ 478*fd501800SSascha Wildner MPI2_SIMPLE_SGE_UNION StatusDataSGE; /* 0x20 */ /* MPI v2.5: This must be an IEEE Simple Element 64. */ 479*fd501800SSascha Wildner } MPI2_TARGET_STATUS_SEND_REQUEST, 480*fd501800SSascha Wildner MPI2_POINTER PTR_MPI2_TARGET_STATUS_SEND_REQUEST, 481*fd501800SSascha Wildner Mpi2TargetStatusSendRequest_t, MPI2_POINTER pMpi2TargetStatusSendRequest_t; 482*fd501800SSascha Wildner 483*fd501800SSascha Wildner /* Target Status Send StatusFlags bits */ 484*fd501800SSascha Wildner 485*fd501800SSascha Wildner #define MPI2_TSS_FLAGS_REPOST_CMD_BUFFER (0x80) 486*fd501800SSascha Wildner #define MPI2_TSS_FLAGS_RETRANSMIT (0x04) 487*fd501800SSascha Wildner #define MPI2_TSS_FLAGS_AUTO_GOOD_STATUS (0x01) 488*fd501800SSascha Wildner 489*fd501800SSascha Wildner /* Target Status Send SGLFlags bits - MPI v2.0 only */ 490*fd501800SSascha Wildner /* Data Location Address Space */ 491*fd501800SSascha Wildner #define MPI2_TSS_SGLFLAGS_ADDR_MASK (0x0C) 492*fd501800SSascha Wildner #define MPI2_TSS_SGLFLAGS_SYSTEM_ADDR (0x00) 493*fd501800SSascha Wildner #define MPI2_TSS_SGLFLAGS_IOCDDR_ADDR (0x04) 494*fd501800SSascha Wildner #define MPI2_TSS_SGLFLAGS_IOCPLB_ADDR (0x08) 495*fd501800SSascha Wildner #define MPI2_TSS_SGLFLAGS_IOCPLBNTA_ADDR (0x0C) 496*fd501800SSascha Wildner /* Type */ 497*fd501800SSascha Wildner #define MPI2_TSS_SGLFLAGS_TYPE_MASK (0x03) 498*fd501800SSascha Wildner #define MPI2_TSS_SGLFLAGS_MPI_TYPE (0x00) 499*fd501800SSascha Wildner #define MPI2_TSS_SGLFLAGS_IEEE32_TYPE (0x01) 500*fd501800SSascha Wildner #define MPI2_TSS_SGLFLAGS_IEEE64_TYPE (0x02) 501*fd501800SSascha Wildner 502*fd501800SSascha Wildner 503*fd501800SSascha Wildner 504*fd501800SSascha Wildner /* 505*fd501800SSascha Wildner * NOTE: The SSP status IU is big-endian. When used on a little-endian system, 506*fd501800SSascha Wildner * this structure properly orders the bytes. 507*fd501800SSascha Wildner */ 508*fd501800SSascha Wildner typedef struct _MPI2_TARGET_SSP_RSP_IU 509*fd501800SSascha Wildner { 510*fd501800SSascha Wildner U32 Reserved0[6]; /* reserved for SSP header */ /* 0x00 */ 511*fd501800SSascha Wildner 512*fd501800SSascha Wildner /* start of RESPONSE information unit */ 513*fd501800SSascha Wildner U32 Reserved1; /* 0x18 */ 514*fd501800SSascha Wildner U32 Reserved2; /* 0x1C */ 515*fd501800SSascha Wildner U16 Reserved3; /* 0x20 */ 516*fd501800SSascha Wildner U8 DataPres; /* lower 2 bits */ /* 0x22 */ 517*fd501800SSascha Wildner U8 Status; /* 0x23 */ 518*fd501800SSascha Wildner U32 Reserved4; /* 0x24 */ 519*fd501800SSascha Wildner U32 SenseDataLength; /* 0x28 */ 520*fd501800SSascha Wildner U32 ResponseDataLength; /* 0x2C */ 521*fd501800SSascha Wildner 522*fd501800SSascha Wildner /* start of Response or Sense Data (size may vary dynamically) */ 523*fd501800SSascha Wildner U8 ResponseSenseData[4]; /* 0x30 */ 524*fd501800SSascha Wildner } MPI2_TARGET_SSP_RSP_IU, MPI2_POINTER PTR_MPI2_TARGET_SSP_RSP_IU, 525*fd501800SSascha Wildner Mpi2TargetSspRspIu_t, MPI2_POINTER pMpi2TargetSspRspIu_t; 526*fd501800SSascha Wildner 527*fd501800SSascha Wildner 528*fd501800SSascha Wildner /**************************************************************************** 529*fd501800SSascha Wildner * Target Standard Reply - used with Target Assist or Target Status Send 530*fd501800SSascha Wildner ****************************************************************************/ 531*fd501800SSascha Wildner 532*fd501800SSascha Wildner typedef struct _MPI2_TARGET_STANDARD_REPLY 533*fd501800SSascha Wildner { 534*fd501800SSascha Wildner U16 Reserved; /* 0x00 */ 535*fd501800SSascha Wildner U8 MsgLength; /* 0x02 */ 536*fd501800SSascha Wildner U8 Function; /* 0x03 */ 537*fd501800SSascha Wildner U16 Reserved1; /* 0x04 */ 538*fd501800SSascha Wildner U8 Reserved2; /* 0x06 */ 539*fd501800SSascha Wildner U8 MsgFlags; /* 0x07 */ 540*fd501800SSascha Wildner U8 VP_ID; /* 0x08 */ 541*fd501800SSascha Wildner U8 VF_ID; /* 0x09 */ 542*fd501800SSascha Wildner U16 Reserved3; /* 0x0A */ 543*fd501800SSascha Wildner U16 Reserved4; /* 0x0C */ 544*fd501800SSascha Wildner U16 IOCStatus; /* 0x0E */ 545*fd501800SSascha Wildner U32 IOCLogInfo; /* 0x10 */ 546*fd501800SSascha Wildner U16 IoIndex; /* 0x14 */ 547*fd501800SSascha Wildner U16 Reserved5; /* 0x16 */ 548*fd501800SSascha Wildner U32 TransferCount; /* 0x18 */ 549*fd501800SSascha Wildner U32 BidirectionalTransferCount; /* 0x1C */ 550*fd501800SSascha Wildner } MPI2_TARGET_STANDARD_REPLY, MPI2_POINTER PTR_MPI2_TARGET_STANDARD_REPLY, 551*fd501800SSascha Wildner Mpi2TargetErrorReply_t, MPI2_POINTER pMpi2TargetErrorReply_t; 552*fd501800SSascha Wildner 553*fd501800SSascha Wildner 554*fd501800SSascha Wildner /**************************************************************************** 555*fd501800SSascha Wildner * Target Mode Abort Request 556*fd501800SSascha Wildner ****************************************************************************/ 557*fd501800SSascha Wildner 558*fd501800SSascha Wildner typedef struct _MPI2_TARGET_MODE_ABORT_REQUEST 559*fd501800SSascha Wildner { 560*fd501800SSascha Wildner U8 AbortType; /* 0x00 */ 561*fd501800SSascha Wildner U8 Reserved1; /* 0x01 */ 562*fd501800SSascha Wildner U8 ChainOffset; /* 0x02 */ 563*fd501800SSascha Wildner U8 Function; /* 0x03 */ 564*fd501800SSascha Wildner U16 Reserved2; /* 0x04 */ 565*fd501800SSascha Wildner U8 Reserved3; /* 0x06 */ 566*fd501800SSascha Wildner U8 MsgFlags; /* 0x07 */ 567*fd501800SSascha Wildner U8 VP_ID; /* 0x08 */ 568*fd501800SSascha Wildner U8 VF_ID; /* 0x09 */ 569*fd501800SSascha Wildner U16 Reserved4; /* 0x0A */ 570*fd501800SSascha Wildner U16 IoIndexToAbort; /* 0x0C */ 571*fd501800SSascha Wildner U16 InitiatorDevHandle; /* 0x0E */ 572*fd501800SSascha Wildner U32 MidToAbort; /* 0x10 */ 573*fd501800SSascha Wildner } MPI2_TARGET_MODE_ABORT, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT, 574*fd501800SSascha Wildner Mpi2TargetModeAbort_t, MPI2_POINTER pMpi2TargetModeAbort_t; 575*fd501800SSascha Wildner 576*fd501800SSascha Wildner /* Target Mode Abort AbortType values */ 577*fd501800SSascha Wildner 578*fd501800SSascha Wildner #define MPI2_TARGET_MODE_ABORT_ALL_CMD_BUFFERS (0x00) 579*fd501800SSascha Wildner #define MPI2_TARGET_MODE_ABORT_ALL_IO (0x01) 580*fd501800SSascha Wildner #define MPI2_TARGET_MODE_ABORT_EXACT_IO (0x02) 581*fd501800SSascha Wildner #define MPI2_TARGET_MODE_ABORT_EXACT_IO_REQUEST (0x03) 582*fd501800SSascha Wildner #define MPI2_TARGET_MODE_ABORT_IO_REQUEST_AND_IO (0x04) 583*fd501800SSascha Wildner #define MPI2_TARGET_MODE_ABORT_DEVHANDLE (0x05) 584*fd501800SSascha Wildner #define MPI2_TARGET_MODE_ABORT_ALL_COMMANDS (0x06) 585*fd501800SSascha Wildner 586*fd501800SSascha Wildner 587*fd501800SSascha Wildner /**************************************************************************** 588*fd501800SSascha Wildner * Target Mode Abort Reply 589*fd501800SSascha Wildner ****************************************************************************/ 590*fd501800SSascha Wildner 591*fd501800SSascha Wildner typedef struct _MPI2_TARGET_MODE_ABORT_REPLY 592*fd501800SSascha Wildner { 593*fd501800SSascha Wildner U16 Reserved; /* 0x00 */ 594*fd501800SSascha Wildner U8 MsgLength; /* 0x02 */ 595*fd501800SSascha Wildner U8 Function; /* 0x03 */ 596*fd501800SSascha Wildner U16 Reserved1; /* 0x04 */ 597*fd501800SSascha Wildner U8 Reserved2; /* 0x06 */ 598*fd501800SSascha Wildner U8 MsgFlags; /* 0x07 */ 599*fd501800SSascha Wildner U8 VP_ID; /* 0x08 */ 600*fd501800SSascha Wildner U8 VF_ID; /* 0x09 */ 601*fd501800SSascha Wildner U16 Reserved3; /* 0x0A */ 602*fd501800SSascha Wildner U16 Reserved4; /* 0x0C */ 603*fd501800SSascha Wildner U16 IOCStatus; /* 0x0E */ 604*fd501800SSascha Wildner U32 IOCLogInfo; /* 0x10 */ 605*fd501800SSascha Wildner U32 AbortCount; /* 0x14 */ 606*fd501800SSascha Wildner } MPI2_TARGET_MODE_ABORT_REPLY, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT_REPLY, 607*fd501800SSascha Wildner Mpi2TargetModeAbortReply_t, MPI2_POINTER pMpi2TargetModeAbortReply_t; 608*fd501800SSascha Wildner 609*fd501800SSascha Wildner 610*fd501800SSascha Wildner #endif 611*fd501800SSascha Wildner 612