179251f5eSSepherosa Ziehau /******************************************************************************
279251f5eSSepherosa Ziehau
36150453fSSepherosa Ziehau Copyright (c) 2001-2017, Intel Corporation
479251f5eSSepherosa Ziehau All rights reserved.
579251f5eSSepherosa Ziehau
679251f5eSSepherosa Ziehau Redistribution and use in source and binary forms, with or without
779251f5eSSepherosa Ziehau modification, are permitted provided that the following conditions are met:
879251f5eSSepherosa Ziehau
979251f5eSSepherosa Ziehau 1. Redistributions of source code must retain the above copyright notice,
1079251f5eSSepherosa Ziehau this list of conditions and the following disclaimer.
1179251f5eSSepherosa Ziehau
1279251f5eSSepherosa Ziehau 2. Redistributions in binary form must reproduce the above copyright
1379251f5eSSepherosa Ziehau notice, this list of conditions and the following disclaimer in the
1479251f5eSSepherosa Ziehau documentation and/or other materials provided with the distribution.
1579251f5eSSepherosa Ziehau
1679251f5eSSepherosa Ziehau 3. Neither the name of the Intel Corporation nor the names of its
1779251f5eSSepherosa Ziehau contributors may be used to endorse or promote products derived from
1879251f5eSSepherosa Ziehau this software without specific prior written permission.
1979251f5eSSepherosa Ziehau
2079251f5eSSepherosa Ziehau THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2179251f5eSSepherosa Ziehau AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2279251f5eSSepherosa Ziehau IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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2879251f5eSSepherosa Ziehau CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2979251f5eSSepherosa Ziehau ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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3179251f5eSSepherosa Ziehau
3279251f5eSSepherosa Ziehau ******************************************************************************/
3379251f5eSSepherosa Ziehau /*$FreeBSD$*/
3479251f5eSSepherosa Ziehau
3579251f5eSSepherosa Ziehau
3679251f5eSSepherosa Ziehau #include "ixgbe_type.h"
3779251f5eSSepherosa Ziehau #include "ixgbe_dcb.h"
3879251f5eSSepherosa Ziehau #include "ixgbe_dcb_82598.h"
3979251f5eSSepherosa Ziehau #include "ixgbe_dcb_82599.h"
4079251f5eSSepherosa Ziehau
4179251f5eSSepherosa Ziehau /**
4279251f5eSSepherosa Ziehau * ixgbe_dcb_calculate_tc_credits - This calculates the ieee traffic class
4379251f5eSSepherosa Ziehau * credits from the configured bandwidth percentages. Credits
4479251f5eSSepherosa Ziehau * are the smallest unit programmable into the underlying
4579251f5eSSepherosa Ziehau * hardware. The IEEE 802.1Qaz specification do not use bandwidth
4679251f5eSSepherosa Ziehau * groups so this is much simplified from the CEE case.
47*dd5ce676SSepherosa Ziehau * @bw: bandwidth index by traffic class
48*dd5ce676SSepherosa Ziehau * @refill: refill credits index by traffic class
49*dd5ce676SSepherosa Ziehau * @max: max credits by traffic class
50*dd5ce676SSepherosa Ziehau * @max_frame_size: maximum frame size
5179251f5eSSepherosa Ziehau */
ixgbe_dcb_calculate_tc_credits(u8 * bw,u16 * refill,u16 * max,int max_frame_size)5279251f5eSSepherosa Ziehau s32 ixgbe_dcb_calculate_tc_credits(u8 *bw, u16 *refill, u16 *max,
5379251f5eSSepherosa Ziehau int max_frame_size)
5479251f5eSSepherosa Ziehau {
5579251f5eSSepherosa Ziehau int min_percent = 100;
5679251f5eSSepherosa Ziehau int min_credit, multiplier;
5779251f5eSSepherosa Ziehau int i;
5879251f5eSSepherosa Ziehau
5979251f5eSSepherosa Ziehau min_credit = ((max_frame_size / 2) + IXGBE_DCB_CREDIT_QUANTUM - 1) /
6079251f5eSSepherosa Ziehau IXGBE_DCB_CREDIT_QUANTUM;
6179251f5eSSepherosa Ziehau
6279251f5eSSepherosa Ziehau for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {
6379251f5eSSepherosa Ziehau if (bw[i] < min_percent && bw[i])
6479251f5eSSepherosa Ziehau min_percent = bw[i];
6579251f5eSSepherosa Ziehau }
6679251f5eSSepherosa Ziehau
6779251f5eSSepherosa Ziehau multiplier = (min_credit / min_percent) + 1;
6879251f5eSSepherosa Ziehau
6979251f5eSSepherosa Ziehau /* Find out the hw credits for each TC */
7079251f5eSSepherosa Ziehau for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {
7179251f5eSSepherosa Ziehau int val = min(bw[i] * multiplier, IXGBE_DCB_MAX_CREDIT_REFILL);
7279251f5eSSepherosa Ziehau
7379251f5eSSepherosa Ziehau if (val < min_credit)
7479251f5eSSepherosa Ziehau val = min_credit;
7579251f5eSSepherosa Ziehau refill[i] = (u16)val;
7679251f5eSSepherosa Ziehau
7779251f5eSSepherosa Ziehau max[i] = bw[i] ? (bw[i]*IXGBE_DCB_MAX_CREDIT)/100 : min_credit;
7879251f5eSSepherosa Ziehau }
7979251f5eSSepherosa Ziehau
8079251f5eSSepherosa Ziehau return 0;
8179251f5eSSepherosa Ziehau }
8279251f5eSSepherosa Ziehau
8379251f5eSSepherosa Ziehau /**
8479251f5eSSepherosa Ziehau * ixgbe_dcb_calculate_tc_credits_cee - Calculates traffic class credits
85*dd5ce676SSepherosa Ziehau * @hw: pointer to hardware structure
86*dd5ce676SSepherosa Ziehau * @dcb_config: Struct containing DCB settings
87*dd5ce676SSepherosa Ziehau * @max_frame_size: Maximum frame size
88*dd5ce676SSepherosa Ziehau * @direction: Configuring either Tx or Rx
8979251f5eSSepherosa Ziehau *
9079251f5eSSepherosa Ziehau * This function calculates the credits allocated to each traffic class.
9179251f5eSSepherosa Ziehau * It should be called only after the rules are checked by
9279251f5eSSepherosa Ziehau * ixgbe_dcb_check_config_cee().
9379251f5eSSepherosa Ziehau */
ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw * hw,struct ixgbe_dcb_config * dcb_config,u32 max_frame_size,u8 direction)9479251f5eSSepherosa Ziehau s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *hw,
9579251f5eSSepherosa Ziehau struct ixgbe_dcb_config *dcb_config,
9679251f5eSSepherosa Ziehau u32 max_frame_size, u8 direction)
9779251f5eSSepherosa Ziehau {
9879251f5eSSepherosa Ziehau struct ixgbe_dcb_tc_path *p;
9979251f5eSSepherosa Ziehau u32 min_multiplier = 0;
10079251f5eSSepherosa Ziehau u16 min_percent = 100;
10179251f5eSSepherosa Ziehau s32 ret_val = IXGBE_SUCCESS;
10279251f5eSSepherosa Ziehau /* Initialization values default for Tx settings */
10379251f5eSSepherosa Ziehau u32 min_credit = 0;
10479251f5eSSepherosa Ziehau u32 credit_refill = 0;
10579251f5eSSepherosa Ziehau u32 credit_max = 0;
10679251f5eSSepherosa Ziehau u16 link_percentage = 0;
10779251f5eSSepherosa Ziehau u8 bw_percent = 0;
10879251f5eSSepherosa Ziehau u8 i;
10979251f5eSSepherosa Ziehau
11079251f5eSSepherosa Ziehau if (dcb_config == NULL) {
11179251f5eSSepherosa Ziehau ret_val = IXGBE_ERR_CONFIG;
11279251f5eSSepherosa Ziehau goto out;
11379251f5eSSepherosa Ziehau }
11479251f5eSSepherosa Ziehau
11579251f5eSSepherosa Ziehau min_credit = ((max_frame_size / 2) + IXGBE_DCB_CREDIT_QUANTUM - 1) /
11679251f5eSSepherosa Ziehau IXGBE_DCB_CREDIT_QUANTUM;
11779251f5eSSepherosa Ziehau
11879251f5eSSepherosa Ziehau /* Find smallest link percentage */
11979251f5eSSepherosa Ziehau for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {
12079251f5eSSepherosa Ziehau p = &dcb_config->tc_config[i].path[direction];
12179251f5eSSepherosa Ziehau bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
12279251f5eSSepherosa Ziehau link_percentage = p->bwg_percent;
12379251f5eSSepherosa Ziehau
12479251f5eSSepherosa Ziehau link_percentage = (link_percentage * bw_percent) / 100;
12579251f5eSSepherosa Ziehau
12679251f5eSSepherosa Ziehau if (link_percentage && link_percentage < min_percent)
12779251f5eSSepherosa Ziehau min_percent = link_percentage;
12879251f5eSSepherosa Ziehau }
12979251f5eSSepherosa Ziehau
13079251f5eSSepherosa Ziehau /*
13179251f5eSSepherosa Ziehau * The ratio between traffic classes will control the bandwidth
13279251f5eSSepherosa Ziehau * percentages seen on the wire. To calculate this ratio we use
13379251f5eSSepherosa Ziehau * a multiplier. It is required that the refill credits must be
13479251f5eSSepherosa Ziehau * larger than the max frame size so here we find the smallest
13579251f5eSSepherosa Ziehau * multiplier that will allow all bandwidth percentages to be
13679251f5eSSepherosa Ziehau * greater than the max frame size.
13779251f5eSSepherosa Ziehau */
13879251f5eSSepherosa Ziehau min_multiplier = (min_credit / min_percent) + 1;
13979251f5eSSepherosa Ziehau
14079251f5eSSepherosa Ziehau /* Find out the link percentage for each TC first */
14179251f5eSSepherosa Ziehau for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {
14279251f5eSSepherosa Ziehau p = &dcb_config->tc_config[i].path[direction];
14379251f5eSSepherosa Ziehau bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
14479251f5eSSepherosa Ziehau
14579251f5eSSepherosa Ziehau link_percentage = p->bwg_percent;
14679251f5eSSepherosa Ziehau /* Must be careful of integer division for very small nums */
14779251f5eSSepherosa Ziehau link_percentage = (link_percentage * bw_percent) / 100;
14879251f5eSSepherosa Ziehau if (p->bwg_percent > 0 && link_percentage == 0)
14979251f5eSSepherosa Ziehau link_percentage = 1;
15079251f5eSSepherosa Ziehau
15179251f5eSSepherosa Ziehau /* Save link_percentage for reference */
15279251f5eSSepherosa Ziehau p->link_percent = (u8)link_percentage;
15379251f5eSSepherosa Ziehau
15479251f5eSSepherosa Ziehau /* Calculate credit refill ratio using multiplier */
15579251f5eSSepherosa Ziehau credit_refill = min(link_percentage * min_multiplier,
15679251f5eSSepherosa Ziehau (u32)IXGBE_DCB_MAX_CREDIT_REFILL);
1576150453fSSepherosa Ziehau
1586150453fSSepherosa Ziehau /* Refill at least minimum credit */
1596150453fSSepherosa Ziehau if (credit_refill < min_credit)
1606150453fSSepherosa Ziehau credit_refill = min_credit;
1616150453fSSepherosa Ziehau
16279251f5eSSepherosa Ziehau p->data_credits_refill = (u16)credit_refill;
16379251f5eSSepherosa Ziehau
16479251f5eSSepherosa Ziehau /* Calculate maximum credit for the TC */
16579251f5eSSepherosa Ziehau credit_max = (link_percentage * IXGBE_DCB_MAX_CREDIT) / 100;
16679251f5eSSepherosa Ziehau
16779251f5eSSepherosa Ziehau /*
16879251f5eSSepherosa Ziehau * Adjustment based on rule checking, if the percentage
16979251f5eSSepherosa Ziehau * of a TC is too small, the maximum credit may not be
17079251f5eSSepherosa Ziehau * enough to send out a jumbo frame in data plane arbitration.
17179251f5eSSepherosa Ziehau */
1726150453fSSepherosa Ziehau if (credit_max < min_credit)
17379251f5eSSepherosa Ziehau credit_max = min_credit;
17479251f5eSSepherosa Ziehau
17579251f5eSSepherosa Ziehau if (direction == IXGBE_DCB_TX_CONFIG) {
17679251f5eSSepherosa Ziehau /*
17779251f5eSSepherosa Ziehau * Adjustment based on rule checking, if the
17879251f5eSSepherosa Ziehau * percentage of a TC is too small, the maximum
17979251f5eSSepherosa Ziehau * credit may not be enough to send out a TSO
18079251f5eSSepherosa Ziehau * packet in descriptor plane arbitration.
18179251f5eSSepherosa Ziehau */
18279251f5eSSepherosa Ziehau if (credit_max && (credit_max <
18379251f5eSSepherosa Ziehau IXGBE_DCB_MIN_TSO_CREDIT)
18479251f5eSSepherosa Ziehau && (hw->mac.type == ixgbe_mac_82598EB))
18579251f5eSSepherosa Ziehau credit_max = IXGBE_DCB_MIN_TSO_CREDIT;
18679251f5eSSepherosa Ziehau
18779251f5eSSepherosa Ziehau dcb_config->tc_config[i].desc_credits_max =
18879251f5eSSepherosa Ziehau (u16)credit_max;
18979251f5eSSepherosa Ziehau }
19079251f5eSSepherosa Ziehau
19179251f5eSSepherosa Ziehau p->data_credits_max = (u16)credit_max;
19279251f5eSSepherosa Ziehau }
19379251f5eSSepherosa Ziehau
19479251f5eSSepherosa Ziehau out:
19579251f5eSSepherosa Ziehau return ret_val;
19679251f5eSSepherosa Ziehau }
19779251f5eSSepherosa Ziehau
19879251f5eSSepherosa Ziehau /**
19979251f5eSSepherosa Ziehau * ixgbe_dcb_unpack_pfc_cee - Unpack dcb_config PFC info
20079251f5eSSepherosa Ziehau * @cfg: dcb configuration to unpack into hardware consumable fields
20179251f5eSSepherosa Ziehau * @map: user priority to traffic class map
20279251f5eSSepherosa Ziehau * @pfc_up: u8 to store user priority PFC bitmask
20379251f5eSSepherosa Ziehau *
20479251f5eSSepherosa Ziehau * This unpacks the dcb configuration PFC info which is stored per
20579251f5eSSepherosa Ziehau * traffic class into a 8bit user priority bitmask that can be
20679251f5eSSepherosa Ziehau * consumed by hardware routines. The priority to tc map must be
20779251f5eSSepherosa Ziehau * updated before calling this routine to use current up-to maps.
20879251f5eSSepherosa Ziehau */
ixgbe_dcb_unpack_pfc_cee(struct ixgbe_dcb_config * cfg,u8 * map,u8 * pfc_up)20979251f5eSSepherosa Ziehau void ixgbe_dcb_unpack_pfc_cee(struct ixgbe_dcb_config *cfg, u8 *map, u8 *pfc_up)
21079251f5eSSepherosa Ziehau {
21179251f5eSSepherosa Ziehau struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
21279251f5eSSepherosa Ziehau int up;
21379251f5eSSepherosa Ziehau
21479251f5eSSepherosa Ziehau /*
21579251f5eSSepherosa Ziehau * If the TC for this user priority has PFC enabled then set the
21679251f5eSSepherosa Ziehau * matching bit in 'pfc_up' to reflect that PFC is enabled.
21779251f5eSSepherosa Ziehau */
21879251f5eSSepherosa Ziehau for (*pfc_up = 0, up = 0; up < IXGBE_DCB_MAX_USER_PRIORITY; up++) {
21979251f5eSSepherosa Ziehau if (tc_config[map[up]].pfc != ixgbe_dcb_pfc_disabled)
22079251f5eSSepherosa Ziehau *pfc_up |= 1 << up;
22179251f5eSSepherosa Ziehau }
22279251f5eSSepherosa Ziehau }
22379251f5eSSepherosa Ziehau
ixgbe_dcb_unpack_refill_cee(struct ixgbe_dcb_config * cfg,int direction,u16 * refill)22479251f5eSSepherosa Ziehau void ixgbe_dcb_unpack_refill_cee(struct ixgbe_dcb_config *cfg, int direction,
22579251f5eSSepherosa Ziehau u16 *refill)
22679251f5eSSepherosa Ziehau {
22779251f5eSSepherosa Ziehau struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
22879251f5eSSepherosa Ziehau int tc;
22979251f5eSSepherosa Ziehau
23079251f5eSSepherosa Ziehau for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++)
23179251f5eSSepherosa Ziehau refill[tc] = tc_config[tc].path[direction].data_credits_refill;
23279251f5eSSepherosa Ziehau }
23379251f5eSSepherosa Ziehau
ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config * cfg,u16 * max)23479251f5eSSepherosa Ziehau void ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config *cfg, u16 *max)
23579251f5eSSepherosa Ziehau {
23679251f5eSSepherosa Ziehau struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
23779251f5eSSepherosa Ziehau int tc;
23879251f5eSSepherosa Ziehau
23979251f5eSSepherosa Ziehau for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++)
24079251f5eSSepherosa Ziehau max[tc] = tc_config[tc].desc_credits_max;
24179251f5eSSepherosa Ziehau }
24279251f5eSSepherosa Ziehau
ixgbe_dcb_unpack_bwgid_cee(struct ixgbe_dcb_config * cfg,int direction,u8 * bwgid)24379251f5eSSepherosa Ziehau void ixgbe_dcb_unpack_bwgid_cee(struct ixgbe_dcb_config *cfg, int direction,
24479251f5eSSepherosa Ziehau u8 *bwgid)
24579251f5eSSepherosa Ziehau {
24679251f5eSSepherosa Ziehau struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
24779251f5eSSepherosa Ziehau int tc;
24879251f5eSSepherosa Ziehau
24979251f5eSSepherosa Ziehau for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++)
25079251f5eSSepherosa Ziehau bwgid[tc] = tc_config[tc].path[direction].bwg_id;
25179251f5eSSepherosa Ziehau }
25279251f5eSSepherosa Ziehau
ixgbe_dcb_unpack_tsa_cee(struct ixgbe_dcb_config * cfg,int direction,u8 * tsa)25379251f5eSSepherosa Ziehau void ixgbe_dcb_unpack_tsa_cee(struct ixgbe_dcb_config *cfg, int direction,
25479251f5eSSepherosa Ziehau u8 *tsa)
25579251f5eSSepherosa Ziehau {
25679251f5eSSepherosa Ziehau struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
25779251f5eSSepherosa Ziehau int tc;
25879251f5eSSepherosa Ziehau
25979251f5eSSepherosa Ziehau for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++)
26079251f5eSSepherosa Ziehau tsa[tc] = tc_config[tc].path[direction].tsa;
26179251f5eSSepherosa Ziehau }
26279251f5eSSepherosa Ziehau
ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config * cfg,int direction,u8 up)26379251f5eSSepherosa Ziehau u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *cfg, int direction, u8 up)
26479251f5eSSepherosa Ziehau {
26579251f5eSSepherosa Ziehau struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
26679251f5eSSepherosa Ziehau u8 prio_mask = 1 << up;
26779251f5eSSepherosa Ziehau u8 tc = cfg->num_tcs.pg_tcs;
26879251f5eSSepherosa Ziehau
26979251f5eSSepherosa Ziehau /* If tc is 0 then DCB is likely not enabled or supported */
27079251f5eSSepherosa Ziehau if (!tc)
27179251f5eSSepherosa Ziehau goto out;
27279251f5eSSepherosa Ziehau
27379251f5eSSepherosa Ziehau /*
27479251f5eSSepherosa Ziehau * Test from maximum TC to 1 and report the first match we find. If
27579251f5eSSepherosa Ziehau * we find no match we can assume that the TC is 0 since the TC must
27679251f5eSSepherosa Ziehau * be set for all user priorities
27779251f5eSSepherosa Ziehau */
27879251f5eSSepherosa Ziehau for (tc--; tc; tc--) {
27979251f5eSSepherosa Ziehau if (prio_mask & tc_config[tc].path[direction].up_to_tc_bitmap)
28079251f5eSSepherosa Ziehau break;
28179251f5eSSepherosa Ziehau }
28279251f5eSSepherosa Ziehau out:
28379251f5eSSepherosa Ziehau return tc;
28479251f5eSSepherosa Ziehau }
28579251f5eSSepherosa Ziehau
ixgbe_dcb_unpack_map_cee(struct ixgbe_dcb_config * cfg,int direction,u8 * map)28679251f5eSSepherosa Ziehau void ixgbe_dcb_unpack_map_cee(struct ixgbe_dcb_config *cfg, int direction,
28779251f5eSSepherosa Ziehau u8 *map)
28879251f5eSSepherosa Ziehau {
28979251f5eSSepherosa Ziehau u8 up;
29079251f5eSSepherosa Ziehau
29179251f5eSSepherosa Ziehau for (up = 0; up < IXGBE_DCB_MAX_USER_PRIORITY; up++)
29279251f5eSSepherosa Ziehau map[up] = ixgbe_dcb_get_tc_from_up(cfg, direction, up);
29379251f5eSSepherosa Ziehau }
29479251f5eSSepherosa Ziehau
29579251f5eSSepherosa Ziehau /**
29679251f5eSSepherosa Ziehau * ixgbe_dcb_config - Struct containing DCB settings.
29779251f5eSSepherosa Ziehau * @dcb_config: Pointer to DCB config structure
29879251f5eSSepherosa Ziehau *
29979251f5eSSepherosa Ziehau * This function checks DCB rules for DCB settings.
30079251f5eSSepherosa Ziehau * The following rules are checked:
30179251f5eSSepherosa Ziehau * 1. The sum of bandwidth percentages of all Bandwidth Groups must total 100%.
30279251f5eSSepherosa Ziehau * 2. The sum of bandwidth percentages of all Traffic Classes within a Bandwidth
30379251f5eSSepherosa Ziehau * Group must total 100.
30479251f5eSSepherosa Ziehau * 3. A Traffic Class should not be set to both Link Strict Priority
30579251f5eSSepherosa Ziehau * and Group Strict Priority.
30679251f5eSSepherosa Ziehau * 4. Link strict Bandwidth Groups can only have link strict traffic classes
30779251f5eSSepherosa Ziehau * with zero bandwidth.
30879251f5eSSepherosa Ziehau */
ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config * dcb_config)30979251f5eSSepherosa Ziehau s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *dcb_config)
31079251f5eSSepherosa Ziehau {
31179251f5eSSepherosa Ziehau struct ixgbe_dcb_tc_path *p;
31279251f5eSSepherosa Ziehau s32 ret_val = IXGBE_SUCCESS;
31379251f5eSSepherosa Ziehau u8 i, j, bw = 0, bw_id;
31479251f5eSSepherosa Ziehau u8 bw_sum[2][IXGBE_DCB_MAX_BW_GROUP];
31579251f5eSSepherosa Ziehau bool link_strict[2][IXGBE_DCB_MAX_BW_GROUP];
31679251f5eSSepherosa Ziehau
31779251f5eSSepherosa Ziehau memset(bw_sum, 0, sizeof(bw_sum));
31879251f5eSSepherosa Ziehau memset(link_strict, 0, sizeof(link_strict));
31979251f5eSSepherosa Ziehau
32079251f5eSSepherosa Ziehau /* First Tx, then Rx */
32179251f5eSSepherosa Ziehau for (i = 0; i < 2; i++) {
32279251f5eSSepherosa Ziehau /* Check each traffic class for rule violation */
32379251f5eSSepherosa Ziehau for (j = 0; j < IXGBE_DCB_MAX_TRAFFIC_CLASS; j++) {
32479251f5eSSepherosa Ziehau p = &dcb_config->tc_config[j].path[i];
32579251f5eSSepherosa Ziehau
32679251f5eSSepherosa Ziehau bw = p->bwg_percent;
32779251f5eSSepherosa Ziehau bw_id = p->bwg_id;
32879251f5eSSepherosa Ziehau
32979251f5eSSepherosa Ziehau if (bw_id >= IXGBE_DCB_MAX_BW_GROUP) {
33079251f5eSSepherosa Ziehau ret_val = IXGBE_ERR_CONFIG;
33179251f5eSSepherosa Ziehau goto err_config;
33279251f5eSSepherosa Ziehau }
33379251f5eSSepherosa Ziehau if (p->tsa == ixgbe_dcb_tsa_strict) {
33479251f5eSSepherosa Ziehau link_strict[i][bw_id] = TRUE;
33579251f5eSSepherosa Ziehau /* Link strict should have zero bandwidth */
33679251f5eSSepherosa Ziehau if (bw) {
33779251f5eSSepherosa Ziehau ret_val = IXGBE_ERR_CONFIG;
33879251f5eSSepherosa Ziehau goto err_config;
33979251f5eSSepherosa Ziehau }
34079251f5eSSepherosa Ziehau } else if (!bw) {
34179251f5eSSepherosa Ziehau /*
34279251f5eSSepherosa Ziehau * Traffic classes without link strict
34379251f5eSSepherosa Ziehau * should have non-zero bandwidth.
34479251f5eSSepherosa Ziehau */
34579251f5eSSepherosa Ziehau ret_val = IXGBE_ERR_CONFIG;
34679251f5eSSepherosa Ziehau goto err_config;
34779251f5eSSepherosa Ziehau }
34879251f5eSSepherosa Ziehau bw_sum[i][bw_id] += bw;
34979251f5eSSepherosa Ziehau }
35079251f5eSSepherosa Ziehau
35179251f5eSSepherosa Ziehau bw = 0;
35279251f5eSSepherosa Ziehau
35379251f5eSSepherosa Ziehau /* Check each bandwidth group for rule violation */
35479251f5eSSepherosa Ziehau for (j = 0; j < IXGBE_DCB_MAX_BW_GROUP; j++) {
35579251f5eSSepherosa Ziehau bw += dcb_config->bw_percentage[i][j];
35679251f5eSSepherosa Ziehau /*
35779251f5eSSepherosa Ziehau * Sum of bandwidth percentages of all traffic classes
35879251f5eSSepherosa Ziehau * within a Bandwidth Group must total 100 except for
35979251f5eSSepherosa Ziehau * link strict group (zero bandwidth).
36079251f5eSSepherosa Ziehau */
36179251f5eSSepherosa Ziehau if (link_strict[i][j]) {
36279251f5eSSepherosa Ziehau if (bw_sum[i][j]) {
36379251f5eSSepherosa Ziehau /*
36479251f5eSSepherosa Ziehau * Link strict group should have zero
36579251f5eSSepherosa Ziehau * bandwidth.
36679251f5eSSepherosa Ziehau */
36779251f5eSSepherosa Ziehau ret_val = IXGBE_ERR_CONFIG;
36879251f5eSSepherosa Ziehau goto err_config;
36979251f5eSSepherosa Ziehau }
37079251f5eSSepherosa Ziehau } else if (bw_sum[i][j] != IXGBE_DCB_BW_PERCENT &&
37179251f5eSSepherosa Ziehau bw_sum[i][j] != 0) {
37279251f5eSSepherosa Ziehau ret_val = IXGBE_ERR_CONFIG;
37379251f5eSSepherosa Ziehau goto err_config;
37479251f5eSSepherosa Ziehau }
37579251f5eSSepherosa Ziehau }
37679251f5eSSepherosa Ziehau
37779251f5eSSepherosa Ziehau if (bw != IXGBE_DCB_BW_PERCENT) {
37879251f5eSSepherosa Ziehau ret_val = IXGBE_ERR_CONFIG;
37979251f5eSSepherosa Ziehau goto err_config;
38079251f5eSSepherosa Ziehau }
38179251f5eSSepherosa Ziehau }
38279251f5eSSepherosa Ziehau
38379251f5eSSepherosa Ziehau err_config:
38479251f5eSSepherosa Ziehau
38579251f5eSSepherosa Ziehau return ret_val;
38679251f5eSSepherosa Ziehau }
38779251f5eSSepherosa Ziehau
38879251f5eSSepherosa Ziehau /**
38979251f5eSSepherosa Ziehau * ixgbe_dcb_get_tc_stats - Returns status of each traffic class
39079251f5eSSepherosa Ziehau * @hw: pointer to hardware structure
39179251f5eSSepherosa Ziehau * @stats: pointer to statistics structure
39279251f5eSSepherosa Ziehau * @tc_count: Number of elements in bwg_array.
39379251f5eSSepherosa Ziehau *
39479251f5eSSepherosa Ziehau * This function returns the status data for each of the Traffic Classes in use.
39579251f5eSSepherosa Ziehau */
ixgbe_dcb_get_tc_stats(struct ixgbe_hw * hw,struct ixgbe_hw_stats * stats,u8 tc_count)39679251f5eSSepherosa Ziehau s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
39779251f5eSSepherosa Ziehau u8 tc_count)
39879251f5eSSepherosa Ziehau {
39979251f5eSSepherosa Ziehau s32 ret = IXGBE_NOT_IMPLEMENTED;
40079251f5eSSepherosa Ziehau switch (hw->mac.type) {
40179251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
40279251f5eSSepherosa Ziehau ret = ixgbe_dcb_get_tc_stats_82598(hw, stats, tc_count);
40379251f5eSSepherosa Ziehau break;
40479251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
40579251f5eSSepherosa Ziehau case ixgbe_mac_X540:
40663d483cdSSepherosa Ziehau case ixgbe_mac_X550:
40763d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
40863d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
40979251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
41079251f5eSSepherosa Ziehau ret = ixgbe_dcb_get_tc_stats_82599(hw, stats, tc_count);
41179251f5eSSepherosa Ziehau break;
41279251f5eSSepherosa Ziehau #endif
41379251f5eSSepherosa Ziehau default:
41479251f5eSSepherosa Ziehau break;
41579251f5eSSepherosa Ziehau }
41679251f5eSSepherosa Ziehau return ret;
41779251f5eSSepherosa Ziehau }
41879251f5eSSepherosa Ziehau
41979251f5eSSepherosa Ziehau /**
42079251f5eSSepherosa Ziehau * ixgbe_dcb_get_pfc_stats - Returns CBFC status of each traffic class
42179251f5eSSepherosa Ziehau * @hw: pointer to hardware structure
42279251f5eSSepherosa Ziehau * @stats: pointer to statistics structure
42379251f5eSSepherosa Ziehau * @tc_count: Number of elements in bwg_array.
42479251f5eSSepherosa Ziehau *
42579251f5eSSepherosa Ziehau * This function returns the CBFC status data for each of the Traffic Classes.
42679251f5eSSepherosa Ziehau */
ixgbe_dcb_get_pfc_stats(struct ixgbe_hw * hw,struct ixgbe_hw_stats * stats,u8 tc_count)42779251f5eSSepherosa Ziehau s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
42879251f5eSSepherosa Ziehau u8 tc_count)
42979251f5eSSepherosa Ziehau {
43079251f5eSSepherosa Ziehau s32 ret = IXGBE_NOT_IMPLEMENTED;
43179251f5eSSepherosa Ziehau switch (hw->mac.type) {
43279251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
43379251f5eSSepherosa Ziehau ret = ixgbe_dcb_get_pfc_stats_82598(hw, stats, tc_count);
43479251f5eSSepherosa Ziehau break;
43579251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
43679251f5eSSepherosa Ziehau case ixgbe_mac_X540:
43763d483cdSSepherosa Ziehau case ixgbe_mac_X550:
43863d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
43963d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
44079251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
44179251f5eSSepherosa Ziehau ret = ixgbe_dcb_get_pfc_stats_82599(hw, stats, tc_count);
44279251f5eSSepherosa Ziehau break;
44379251f5eSSepherosa Ziehau #endif
44479251f5eSSepherosa Ziehau default:
44579251f5eSSepherosa Ziehau break;
44679251f5eSSepherosa Ziehau }
44779251f5eSSepherosa Ziehau return ret;
44879251f5eSSepherosa Ziehau }
44979251f5eSSepherosa Ziehau
45079251f5eSSepherosa Ziehau /**
45179251f5eSSepherosa Ziehau * ixgbe_dcb_config_rx_arbiter_cee - Config Rx arbiter
45279251f5eSSepherosa Ziehau * @hw: pointer to hardware structure
45379251f5eSSepherosa Ziehau * @dcb_config: pointer to ixgbe_dcb_config structure
45479251f5eSSepherosa Ziehau *
45579251f5eSSepherosa Ziehau * Configure Rx Data Arbiter and credits for each traffic class.
45679251f5eSSepherosa Ziehau */
ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw * hw,struct ixgbe_dcb_config * dcb_config)45779251f5eSSepherosa Ziehau s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *hw,
45879251f5eSSepherosa Ziehau struct ixgbe_dcb_config *dcb_config)
45979251f5eSSepherosa Ziehau {
46079251f5eSSepherosa Ziehau s32 ret = IXGBE_NOT_IMPLEMENTED;
46179251f5eSSepherosa Ziehau u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };
46279251f5eSSepherosa Ziehau u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };
46379251f5eSSepherosa Ziehau u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
46479251f5eSSepherosa Ziehau u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };
46579251f5eSSepherosa Ziehau u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };
46679251f5eSSepherosa Ziehau
46779251f5eSSepherosa Ziehau ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill);
46879251f5eSSepherosa Ziehau ixgbe_dcb_unpack_max_cee(dcb_config, max);
46979251f5eSSepherosa Ziehau ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid);
47079251f5eSSepherosa Ziehau ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa);
47179251f5eSSepherosa Ziehau ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map);
47279251f5eSSepherosa Ziehau
47379251f5eSSepherosa Ziehau switch (hw->mac.type) {
47479251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
47579251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa);
47679251f5eSSepherosa Ziehau break;
47779251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
47879251f5eSSepherosa Ziehau case ixgbe_mac_X540:
47963d483cdSSepherosa Ziehau case ixgbe_mac_X550:
48063d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
48163d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
48279251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
48379251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwgid,
48479251f5eSSepherosa Ziehau tsa, map);
48579251f5eSSepherosa Ziehau break;
48679251f5eSSepherosa Ziehau #endif
48779251f5eSSepherosa Ziehau default:
48879251f5eSSepherosa Ziehau break;
48979251f5eSSepherosa Ziehau }
49079251f5eSSepherosa Ziehau return ret;
49179251f5eSSepherosa Ziehau }
49279251f5eSSepherosa Ziehau
49379251f5eSSepherosa Ziehau /**
49479251f5eSSepherosa Ziehau * ixgbe_dcb_config_tx_desc_arbiter_cee - Config Tx Desc arbiter
49579251f5eSSepherosa Ziehau * @hw: pointer to hardware structure
49679251f5eSSepherosa Ziehau * @dcb_config: pointer to ixgbe_dcb_config structure
49779251f5eSSepherosa Ziehau *
49879251f5eSSepherosa Ziehau * Configure Tx Descriptor Arbiter and credits for each traffic class.
49979251f5eSSepherosa Ziehau */
ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw * hw,struct ixgbe_dcb_config * dcb_config)50079251f5eSSepherosa Ziehau s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *hw,
50179251f5eSSepherosa Ziehau struct ixgbe_dcb_config *dcb_config)
50279251f5eSSepherosa Ziehau {
50379251f5eSSepherosa Ziehau s32 ret = IXGBE_NOT_IMPLEMENTED;
50479251f5eSSepherosa Ziehau u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS];
50579251f5eSSepherosa Ziehau u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS];
50679251f5eSSepherosa Ziehau u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS];
50779251f5eSSepherosa Ziehau u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS];
50879251f5eSSepherosa Ziehau
50979251f5eSSepherosa Ziehau ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill);
51079251f5eSSepherosa Ziehau ixgbe_dcb_unpack_max_cee(dcb_config, max);
51179251f5eSSepherosa Ziehau ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid);
51279251f5eSSepherosa Ziehau ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa);
51379251f5eSSepherosa Ziehau
51479251f5eSSepherosa Ziehau switch (hw->mac.type) {
51579251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
51679251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max,
51779251f5eSSepherosa Ziehau bwgid, tsa);
51879251f5eSSepherosa Ziehau break;
51979251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
52079251f5eSSepherosa Ziehau case ixgbe_mac_X540:
52163d483cdSSepherosa Ziehau case ixgbe_mac_X550:
52263d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
52363d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
52479251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
52579251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max,
52679251f5eSSepherosa Ziehau bwgid, tsa);
52779251f5eSSepherosa Ziehau break;
52879251f5eSSepherosa Ziehau #endif
52979251f5eSSepherosa Ziehau default:
53079251f5eSSepherosa Ziehau break;
53179251f5eSSepherosa Ziehau }
53279251f5eSSepherosa Ziehau return ret;
53379251f5eSSepherosa Ziehau }
53479251f5eSSepherosa Ziehau
53579251f5eSSepherosa Ziehau /**
53679251f5eSSepherosa Ziehau * ixgbe_dcb_config_tx_data_arbiter_cee - Config Tx data arbiter
53779251f5eSSepherosa Ziehau * @hw: pointer to hardware structure
53879251f5eSSepherosa Ziehau * @dcb_config: pointer to ixgbe_dcb_config structure
53979251f5eSSepherosa Ziehau *
54079251f5eSSepherosa Ziehau * Configure Tx Data Arbiter and credits for each traffic class.
54179251f5eSSepherosa Ziehau */
ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw * hw,struct ixgbe_dcb_config * dcb_config)54279251f5eSSepherosa Ziehau s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *hw,
54379251f5eSSepherosa Ziehau struct ixgbe_dcb_config *dcb_config)
54479251f5eSSepherosa Ziehau {
54579251f5eSSepherosa Ziehau s32 ret = IXGBE_NOT_IMPLEMENTED;
54679251f5eSSepherosa Ziehau u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS];
54779251f5eSSepherosa Ziehau u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS];
54879251f5eSSepherosa Ziehau u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
54979251f5eSSepherosa Ziehau u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS];
55079251f5eSSepherosa Ziehau u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS];
55179251f5eSSepherosa Ziehau
55279251f5eSSepherosa Ziehau ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill);
55379251f5eSSepherosa Ziehau ixgbe_dcb_unpack_max_cee(dcb_config, max);
55479251f5eSSepherosa Ziehau ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid);
55579251f5eSSepherosa Ziehau ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa);
55679251f5eSSepherosa Ziehau ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map);
55779251f5eSSepherosa Ziehau
55879251f5eSSepherosa Ziehau switch (hw->mac.type) {
55979251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
56079251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max,
56179251f5eSSepherosa Ziehau bwgid, tsa);
56279251f5eSSepherosa Ziehau break;
56379251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
56479251f5eSSepherosa Ziehau case ixgbe_mac_X540:
56563d483cdSSepherosa Ziehau case ixgbe_mac_X550:
56663d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
56763d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
56879251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
56979251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max,
57079251f5eSSepherosa Ziehau bwgid, tsa,
57179251f5eSSepherosa Ziehau map);
57279251f5eSSepherosa Ziehau break;
57379251f5eSSepherosa Ziehau #endif
57479251f5eSSepherosa Ziehau default:
57579251f5eSSepherosa Ziehau break;
57679251f5eSSepherosa Ziehau }
57779251f5eSSepherosa Ziehau return ret;
57879251f5eSSepherosa Ziehau }
57979251f5eSSepherosa Ziehau
58079251f5eSSepherosa Ziehau /**
58179251f5eSSepherosa Ziehau * ixgbe_dcb_config_pfc_cee - Config priority flow control
58279251f5eSSepherosa Ziehau * @hw: pointer to hardware structure
58379251f5eSSepherosa Ziehau * @dcb_config: pointer to ixgbe_dcb_config structure
58479251f5eSSepherosa Ziehau *
58579251f5eSSepherosa Ziehau * Configure Priority Flow Control for each traffic class.
58679251f5eSSepherosa Ziehau */
ixgbe_dcb_config_pfc_cee(struct ixgbe_hw * hw,struct ixgbe_dcb_config * dcb_config)58779251f5eSSepherosa Ziehau s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *hw,
58879251f5eSSepherosa Ziehau struct ixgbe_dcb_config *dcb_config)
58979251f5eSSepherosa Ziehau {
59079251f5eSSepherosa Ziehau s32 ret = IXGBE_NOT_IMPLEMENTED;
59179251f5eSSepherosa Ziehau u8 pfc_en;
59279251f5eSSepherosa Ziehau u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
59379251f5eSSepherosa Ziehau
59479251f5eSSepherosa Ziehau ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map);
59579251f5eSSepherosa Ziehau ixgbe_dcb_unpack_pfc_cee(dcb_config, map, &pfc_en);
59679251f5eSSepherosa Ziehau
59779251f5eSSepherosa Ziehau switch (hw->mac.type) {
59879251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
59979251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en);
60079251f5eSSepherosa Ziehau break;
60179251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
60279251f5eSSepherosa Ziehau case ixgbe_mac_X540:
60363d483cdSSepherosa Ziehau case ixgbe_mac_X550:
60463d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
60563d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
60679251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
60779251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);
60879251f5eSSepherosa Ziehau break;
60979251f5eSSepherosa Ziehau #endif
61079251f5eSSepherosa Ziehau default:
61179251f5eSSepherosa Ziehau break;
61279251f5eSSepherosa Ziehau }
61379251f5eSSepherosa Ziehau return ret;
61479251f5eSSepherosa Ziehau }
61579251f5eSSepherosa Ziehau
61679251f5eSSepherosa Ziehau /**
61779251f5eSSepherosa Ziehau * ixgbe_dcb_config_tc_stats - Config traffic class statistics
61879251f5eSSepherosa Ziehau * @hw: pointer to hardware structure
61979251f5eSSepherosa Ziehau *
62079251f5eSSepherosa Ziehau * Configure queue statistics registers, all queues belonging to same traffic
62179251f5eSSepherosa Ziehau * class uses a single set of queue statistics counters.
62279251f5eSSepherosa Ziehau */
ixgbe_dcb_config_tc_stats(struct ixgbe_hw * hw)62379251f5eSSepherosa Ziehau s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *hw)
62479251f5eSSepherosa Ziehau {
62579251f5eSSepherosa Ziehau s32 ret = IXGBE_NOT_IMPLEMENTED;
62679251f5eSSepherosa Ziehau switch (hw->mac.type) {
62779251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
62879251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_tc_stats_82598(hw);
62979251f5eSSepherosa Ziehau break;
63079251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
63179251f5eSSepherosa Ziehau case ixgbe_mac_X540:
63263d483cdSSepherosa Ziehau case ixgbe_mac_X550:
63363d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
63463d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
63579251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
63679251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_tc_stats_82599(hw, NULL);
63779251f5eSSepherosa Ziehau break;
63879251f5eSSepherosa Ziehau #endif
63979251f5eSSepherosa Ziehau default:
64079251f5eSSepherosa Ziehau break;
64179251f5eSSepherosa Ziehau }
64279251f5eSSepherosa Ziehau return ret;
64379251f5eSSepherosa Ziehau }
64479251f5eSSepherosa Ziehau
64579251f5eSSepherosa Ziehau /**
64679251f5eSSepherosa Ziehau * ixgbe_dcb_hw_config_cee - Config and enable DCB
64779251f5eSSepherosa Ziehau * @hw: pointer to hardware structure
64879251f5eSSepherosa Ziehau * @dcb_config: pointer to ixgbe_dcb_config structure
64979251f5eSSepherosa Ziehau *
65079251f5eSSepherosa Ziehau * Configure dcb settings and enable dcb mode.
65179251f5eSSepherosa Ziehau */
ixgbe_dcb_hw_config_cee(struct ixgbe_hw * hw,struct ixgbe_dcb_config * dcb_config)65279251f5eSSepherosa Ziehau s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *hw,
65379251f5eSSepherosa Ziehau struct ixgbe_dcb_config *dcb_config)
65479251f5eSSepherosa Ziehau {
65579251f5eSSepherosa Ziehau s32 ret = IXGBE_NOT_IMPLEMENTED;
65679251f5eSSepherosa Ziehau u8 pfc_en;
65779251f5eSSepherosa Ziehau u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS];
65879251f5eSSepherosa Ziehau u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS];
65979251f5eSSepherosa Ziehau u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
66079251f5eSSepherosa Ziehau u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS];
66179251f5eSSepherosa Ziehau u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS];
66279251f5eSSepherosa Ziehau
66379251f5eSSepherosa Ziehau /* Unpack CEE standard containers */
66479251f5eSSepherosa Ziehau ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill);
66579251f5eSSepherosa Ziehau ixgbe_dcb_unpack_max_cee(dcb_config, max);
66679251f5eSSepherosa Ziehau ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid);
66779251f5eSSepherosa Ziehau ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa);
66879251f5eSSepherosa Ziehau ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map);
66979251f5eSSepherosa Ziehau
67079251f5eSSepherosa Ziehau hw->mac.ops.setup_rxpba(hw, dcb_config->num_tcs.pg_tcs,
67179251f5eSSepherosa Ziehau 0, dcb_config->rx_pba_cfg);
67279251f5eSSepherosa Ziehau
67379251f5eSSepherosa Ziehau switch (hw->mac.type) {
67479251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
67579251f5eSSepherosa Ziehau ret = ixgbe_dcb_hw_config_82598(hw, dcb_config->link_speed,
67679251f5eSSepherosa Ziehau refill, max, bwgid, tsa);
67779251f5eSSepherosa Ziehau break;
67879251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
67979251f5eSSepherosa Ziehau case ixgbe_mac_X540:
68063d483cdSSepherosa Ziehau case ixgbe_mac_X550:
68163d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
68263d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
68379251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
68479251f5eSSepherosa Ziehau ixgbe_dcb_config_82599(hw, dcb_config);
68579251f5eSSepherosa Ziehau ret = ixgbe_dcb_hw_config_82599(hw, dcb_config->link_speed,
68679251f5eSSepherosa Ziehau refill, max, bwgid,
68779251f5eSSepherosa Ziehau tsa, map);
68879251f5eSSepherosa Ziehau
68979251f5eSSepherosa Ziehau ixgbe_dcb_config_tc_stats_82599(hw, dcb_config);
69079251f5eSSepherosa Ziehau break;
69179251f5eSSepherosa Ziehau #endif
69279251f5eSSepherosa Ziehau default:
69379251f5eSSepherosa Ziehau break;
69479251f5eSSepherosa Ziehau }
69579251f5eSSepherosa Ziehau
69679251f5eSSepherosa Ziehau if (!ret && dcb_config->pfc_mode_enable) {
69779251f5eSSepherosa Ziehau ixgbe_dcb_unpack_pfc_cee(dcb_config, map, &pfc_en);
69879251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_pfc(hw, pfc_en, map);
69979251f5eSSepherosa Ziehau }
70079251f5eSSepherosa Ziehau
70179251f5eSSepherosa Ziehau return ret;
70279251f5eSSepherosa Ziehau }
70379251f5eSSepherosa Ziehau
70479251f5eSSepherosa Ziehau /* Helper routines to abstract HW specifics from DCB netlink ops */
ixgbe_dcb_config_pfc(struct ixgbe_hw * hw,u8 pfc_en,u8 * map)70579251f5eSSepherosa Ziehau s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *hw, u8 pfc_en, u8 *map)
70679251f5eSSepherosa Ziehau {
70779251f5eSSepherosa Ziehau int ret = IXGBE_ERR_PARAM;
70879251f5eSSepherosa Ziehau
70979251f5eSSepherosa Ziehau switch (hw->mac.type) {
71079251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
71179251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en);
71279251f5eSSepherosa Ziehau break;
71379251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
71479251f5eSSepherosa Ziehau case ixgbe_mac_X540:
71563d483cdSSepherosa Ziehau case ixgbe_mac_X550:
71663d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
71763d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
71879251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
71979251f5eSSepherosa Ziehau ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);
72079251f5eSSepherosa Ziehau break;
72179251f5eSSepherosa Ziehau #endif
72279251f5eSSepherosa Ziehau default:
72379251f5eSSepherosa Ziehau break;
72479251f5eSSepherosa Ziehau }
72579251f5eSSepherosa Ziehau return ret;
72679251f5eSSepherosa Ziehau }
72779251f5eSSepherosa Ziehau
ixgbe_dcb_hw_config(struct ixgbe_hw * hw,u16 * refill,u16 * max,u8 * bwg_id,u8 * tsa,u8 * map)72879251f5eSSepherosa Ziehau s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, u16 *refill, u16 *max,
72979251f5eSSepherosa Ziehau u8 *bwg_id, u8 *tsa, u8 *map)
73079251f5eSSepherosa Ziehau {
73179251f5eSSepherosa Ziehau switch (hw->mac.type) {
73279251f5eSSepherosa Ziehau case ixgbe_mac_82598EB:
73379251f5eSSepherosa Ziehau ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa);
73479251f5eSSepherosa Ziehau ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, bwg_id,
73579251f5eSSepherosa Ziehau tsa);
73679251f5eSSepherosa Ziehau ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, bwg_id,
73779251f5eSSepherosa Ziehau tsa);
73879251f5eSSepherosa Ziehau break;
73979251f5eSSepherosa Ziehau case ixgbe_mac_82599EB:
74079251f5eSSepherosa Ziehau case ixgbe_mac_X540:
74163d483cdSSepherosa Ziehau case ixgbe_mac_X550:
74263d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_x:
74363d483cdSSepherosa Ziehau case ixgbe_mac_X550EM_a:
74479251f5eSSepherosa Ziehau #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
74579251f5eSSepherosa Ziehau ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id,
74679251f5eSSepherosa Ziehau tsa, map);
74779251f5eSSepherosa Ziehau ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id,
74879251f5eSSepherosa Ziehau tsa);
74979251f5eSSepherosa Ziehau ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id,
75079251f5eSSepherosa Ziehau tsa, map);
75179251f5eSSepherosa Ziehau break;
75279251f5eSSepherosa Ziehau #endif
75379251f5eSSepherosa Ziehau default:
75479251f5eSSepherosa Ziehau break;
75579251f5eSSepherosa Ziehau }
75679251f5eSSepherosa Ziehau return 0;
75779251f5eSSepherosa Ziehau }
758