1d217d4d9SSepherosa Ziehau /*
2d217d4d9SSepherosa Ziehau * Copyright (c) 2007 The DragonFly Project. All rights reserved.
3d217d4d9SSepherosa Ziehau *
4d217d4d9SSepherosa Ziehau * This code is derived from software contributed to The DragonFly Project
5d217d4d9SSepherosa Ziehau * by Sepherosa Ziehau <sepherosa@gmail.com>
6d217d4d9SSepherosa Ziehau *
7d217d4d9SSepherosa Ziehau * Redistribution and use in source and binary forms, with or without
8d217d4d9SSepherosa Ziehau * modification, are permitted provided that the following conditions
9d217d4d9SSepherosa Ziehau * are met:
10d217d4d9SSepherosa Ziehau *
11d217d4d9SSepherosa Ziehau * 1. Redistributions of source code must retain the above copyright
12d217d4d9SSepherosa Ziehau * notice, this list of conditions and the following disclaimer.
13d217d4d9SSepherosa Ziehau * 2. Redistributions in binary form must reproduce the above copyright
14d217d4d9SSepherosa Ziehau * notice, this list of conditions and the following disclaimer in
15d217d4d9SSepherosa Ziehau * the documentation and/or other materials provided with the
16d217d4d9SSepherosa Ziehau * distribution.
17d217d4d9SSepherosa Ziehau * 3. Neither the name of The DragonFly Project nor the names of its
18d217d4d9SSepherosa Ziehau * contributors may be used to endorse or promote products derived
19d217d4d9SSepherosa Ziehau * from this software without specific, prior written permission.
20d217d4d9SSepherosa Ziehau *
21d217d4d9SSepherosa Ziehau * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22d217d4d9SSepherosa Ziehau * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23d217d4d9SSepherosa Ziehau * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24d217d4d9SSepherosa Ziehau * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25d217d4d9SSepherosa Ziehau * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26d217d4d9SSepherosa Ziehau * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27d217d4d9SSepherosa Ziehau * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28d217d4d9SSepherosa Ziehau * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29d217d4d9SSepherosa Ziehau * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30d217d4d9SSepherosa Ziehau * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31d217d4d9SSepherosa Ziehau * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32d217d4d9SSepherosa Ziehau * SUCH DAMAGE.
33d217d4d9SSepherosa Ziehau */
34d217d4d9SSepherosa Ziehau
35d217d4d9SSepherosa Ziehau #include <sys/param.h>
36b5b6e4f4SSepherosa Ziehau #include <sys/bitops.h>
37d217d4d9SSepherosa Ziehau #include <sys/endian.h>
38d217d4d9SSepherosa Ziehau #include <sys/kernel.h>
39d217d4d9SSepherosa Ziehau #include <sys/bus.h>
409db4b353SSepherosa Ziehau #include <sys/interrupt.h>
41d217d4d9SSepherosa Ziehau #include <sys/malloc.h>
42d217d4d9SSepherosa Ziehau #include <sys/proc.h>
43d217d4d9SSepherosa Ziehau #include <sys/rman.h>
44d217d4d9SSepherosa Ziehau #include <sys/serialize.h>
45d217d4d9SSepherosa Ziehau #include <sys/socket.h>
46d217d4d9SSepherosa Ziehau #include <sys/sockio.h>
47d217d4d9SSepherosa Ziehau #include <sys/sysctl.h>
48d217d4d9SSepherosa Ziehau
49d217d4d9SSepherosa Ziehau #include <net/ethernet.h>
50d217d4d9SSepherosa Ziehau #include <net/if.h>
51d217d4d9SSepherosa Ziehau #include <net/bpf.h>
52d217d4d9SSepherosa Ziehau #include <net/if_arp.h>
53d217d4d9SSepherosa Ziehau #include <net/if_dl.h>
54d217d4d9SSepherosa Ziehau #include <net/if_media.h>
55d217d4d9SSepherosa Ziehau #include <net/ifq_var.h>
56d217d4d9SSepherosa Ziehau #include <net/vlan/if_vlan_var.h>
57d217d4d9SSepherosa Ziehau
58d217d4d9SSepherosa Ziehau #include <dev/netif/mii_layer/miivar.h>
59d217d4d9SSepherosa Ziehau
60d217d4d9SSepherosa Ziehau #include <bus/pci/pcireg.h>
61d217d4d9SSepherosa Ziehau #include <bus/pci/pcivar.h>
62dcb4b80dSSascha Wildner #include "pcidevs.h"
63d217d4d9SSepherosa Ziehau
64b5b6e4f4SSepherosa Ziehau #include <dev/netif/et/if_etreg.h>
65b5b6e4f4SSepherosa Ziehau #include <dev/netif/et/if_etvar.h>
66d217d4d9SSepherosa Ziehau
67b5b6e4f4SSepherosa Ziehau #include "miibus_if.h"
68d217d4d9SSepherosa Ziehau
69d217d4d9SSepherosa Ziehau static int et_probe(device_t);
70d217d4d9SSepherosa Ziehau static int et_attach(device_t);
71d217d4d9SSepherosa Ziehau static int et_detach(device_t);
72d217d4d9SSepherosa Ziehau static int et_shutdown(device_t);
73d217d4d9SSepherosa Ziehau
74d217d4d9SSepherosa Ziehau static int et_miibus_readreg(device_t, int, int);
75d217d4d9SSepherosa Ziehau static int et_miibus_writereg(device_t, int, int, int);
76d217d4d9SSepherosa Ziehau static void et_miibus_statchg(device_t);
77d217d4d9SSepherosa Ziehau
78d217d4d9SSepherosa Ziehau static void et_init(void *);
79d217d4d9SSepherosa Ziehau static int et_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
80f0a26983SSepherosa Ziehau static void et_start(struct ifnet *, struct ifaltq_subque *);
81d217d4d9SSepherosa Ziehau static void et_watchdog(struct ifnet *);
82d217d4d9SSepherosa Ziehau static int et_ifmedia_upd(struct ifnet *);
83d217d4d9SSepherosa Ziehau static void et_ifmedia_sts(struct ifnet *, struct ifmediareq *);
84d217d4d9SSepherosa Ziehau
85d217d4d9SSepherosa Ziehau static int et_sysctl_rx_intr_npkts(SYSCTL_HANDLER_ARGS);
86d217d4d9SSepherosa Ziehau static int et_sysctl_rx_intr_delay(SYSCTL_HANDLER_ARGS);
87d217d4d9SSepherosa Ziehau
88d217d4d9SSepherosa Ziehau static void et_intr(void *);
89d217d4d9SSepherosa Ziehau static void et_enable_intrs(struct et_softc *, uint32_t);
90d217d4d9SSepherosa Ziehau static void et_disable_intrs(struct et_softc *);
91d217d4d9SSepherosa Ziehau static void et_rxeof(struct et_softc *);
92136e59ffSSepherosa Ziehau static void et_txeof(struct et_softc *, int);
93d217d4d9SSepherosa Ziehau
94d217d4d9SSepherosa Ziehau static int et_dma_alloc(device_t);
95d217d4d9SSepherosa Ziehau static void et_dma_free(device_t);
96d217d4d9SSepherosa Ziehau static void et_dma_mem_destroy(bus_dma_tag_t, void *, bus_dmamap_t);
97d217d4d9SSepherosa Ziehau static int et_dma_mbuf_create(device_t);
98d217d4d9SSepherosa Ziehau static void et_dma_mbuf_destroy(device_t, int, const int[]);
993effc1bfSSepherosa Ziehau static int et_jumbo_mem_alloc(device_t);
1003effc1bfSSepherosa Ziehau static void et_jumbo_mem_free(device_t);
101d217d4d9SSepherosa Ziehau static int et_init_tx_ring(struct et_softc *);
102d217d4d9SSepherosa Ziehau static int et_init_rx_ring(struct et_softc *);
103d217d4d9SSepherosa Ziehau static void et_free_tx_ring(struct et_softc *);
104d217d4d9SSepherosa Ziehau static void et_free_rx_ring(struct et_softc *);
105d217d4d9SSepherosa Ziehau static int et_encap(struct et_softc *, struct mbuf **);
1063effc1bfSSepherosa Ziehau static struct et_jslot *
1073effc1bfSSepherosa Ziehau et_jalloc(struct et_jumbo_data *);
1083effc1bfSSepherosa Ziehau static void et_jfree(void *);
1093effc1bfSSepherosa Ziehau static void et_jref(void *);
110d217d4d9SSepherosa Ziehau static int et_newbuf(struct et_rxbuf_data *, int, int, int);
111d217d4d9SSepherosa Ziehau static int et_newbuf_cluster(struct et_rxbuf_data *, int, int);
112d217d4d9SSepherosa Ziehau static int et_newbuf_hdr(struct et_rxbuf_data *, int, int);
1133effc1bfSSepherosa Ziehau static int et_newbuf_jumbo(struct et_rxbuf_data *, int, int);
114d217d4d9SSepherosa Ziehau
115d217d4d9SSepherosa Ziehau static void et_stop(struct et_softc *);
116d217d4d9SSepherosa Ziehau static int et_chip_init(struct et_softc *);
117d217d4d9SSepherosa Ziehau static void et_chip_attach(struct et_softc *);
118d217d4d9SSepherosa Ziehau static void et_init_mac(struct et_softc *);
119d217d4d9SSepherosa Ziehau static void et_init_rxmac(struct et_softc *);
120d217d4d9SSepherosa Ziehau static void et_init_txmac(struct et_softc *);
121d217d4d9SSepherosa Ziehau static int et_init_rxdma(struct et_softc *);
122d217d4d9SSepherosa Ziehau static int et_init_txdma(struct et_softc *);
123d217d4d9SSepherosa Ziehau static int et_start_rxdma(struct et_softc *);
124d217d4d9SSepherosa Ziehau static int et_start_txdma(struct et_softc *);
125d217d4d9SSepherosa Ziehau static int et_stop_rxdma(struct et_softc *);
126d217d4d9SSepherosa Ziehau static int et_stop_txdma(struct et_softc *);
12760d2de1fSSepherosa Ziehau static int et_enable_txrx(struct et_softc *, int);
128d217d4d9SSepherosa Ziehau static void et_reset(struct et_softc *);
129d217d4d9SSepherosa Ziehau static int et_bus_config(device_t);
130d217d4d9SSepherosa Ziehau static void et_get_eaddr(device_t, uint8_t[]);
131d217d4d9SSepherosa Ziehau static void et_setmulti(struct et_softc *);
132d217d4d9SSepherosa Ziehau static void et_tick(void *);
13360d2de1fSSepherosa Ziehau static void et_setmedia(struct et_softc *);
1343effc1bfSSepherosa Ziehau static void et_setup_rxdesc(struct et_rxbuf_data *, int, bus_addr_t);
135d217d4d9SSepherosa Ziehau
136d217d4d9SSepherosa Ziehau static const struct et_dev {
137d217d4d9SSepherosa Ziehau uint16_t vid;
138d217d4d9SSepherosa Ziehau uint16_t did;
139d217d4d9SSepherosa Ziehau const char *desc;
140d217d4d9SSepherosa Ziehau } et_devices[] = {
141d217d4d9SSepherosa Ziehau { PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_ET1310,
142d217d4d9SSepherosa Ziehau "Agere ET1310 Gigabit Ethernet" },
143d217d4d9SSepherosa Ziehau { PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_ET1310_FAST,
144d217d4d9SSepherosa Ziehau "Agere ET1310 Fast Ethernet" },
145d217d4d9SSepherosa Ziehau { 0, 0, NULL }
146d217d4d9SSepherosa Ziehau };
147d217d4d9SSepherosa Ziehau
148d217d4d9SSepherosa Ziehau static device_method_t et_methods[] = {
149d217d4d9SSepherosa Ziehau DEVMETHOD(device_probe, et_probe),
150d217d4d9SSepherosa Ziehau DEVMETHOD(device_attach, et_attach),
151d217d4d9SSepherosa Ziehau DEVMETHOD(device_detach, et_detach),
152d217d4d9SSepherosa Ziehau DEVMETHOD(device_shutdown, et_shutdown),
153d217d4d9SSepherosa Ziehau #if 0
154d217d4d9SSepherosa Ziehau DEVMETHOD(device_suspend, et_suspend),
155d217d4d9SSepherosa Ziehau DEVMETHOD(device_resume, et_resume),
156d217d4d9SSepherosa Ziehau #endif
157d217d4d9SSepherosa Ziehau
158d217d4d9SSepherosa Ziehau DEVMETHOD(bus_print_child, bus_generic_print_child),
159d217d4d9SSepherosa Ziehau DEVMETHOD(bus_driver_added, bus_generic_driver_added),
160d217d4d9SSepherosa Ziehau
161d217d4d9SSepherosa Ziehau DEVMETHOD(miibus_readreg, et_miibus_readreg),
162d217d4d9SSepherosa Ziehau DEVMETHOD(miibus_writereg, et_miibus_writereg),
163d217d4d9SSepherosa Ziehau DEVMETHOD(miibus_statchg, et_miibus_statchg),
164d217d4d9SSepherosa Ziehau
165d3c9c58eSSascha Wildner DEVMETHOD_END
166d217d4d9SSepherosa Ziehau };
167d217d4d9SSepherosa Ziehau
168d217d4d9SSepherosa Ziehau static driver_t et_driver = {
169d217d4d9SSepherosa Ziehau "et",
170d217d4d9SSepherosa Ziehau et_methods,
171d217d4d9SSepherosa Ziehau sizeof(struct et_softc)
172d217d4d9SSepherosa Ziehau };
173d217d4d9SSepherosa Ziehau
174d217d4d9SSepherosa Ziehau static devclass_t et_devclass;
175d217d4d9SSepherosa Ziehau
176d217d4d9SSepherosa Ziehau DECLARE_DUMMY_MODULE(if_et);
177d217d4d9SSepherosa Ziehau MODULE_DEPEND(if_et, miibus, 1, 1, 1);
178aa2b9d05SSascha Wildner DRIVER_MODULE(if_et, pci, et_driver, et_devclass, NULL, NULL);
179aa2b9d05SSascha Wildner DRIVER_MODULE(miibus, et, miibus_driver, miibus_devclass, NULL, NULL);
180d217d4d9SSepherosa Ziehau
1811ebf7512SSepherosa Ziehau static int et_rx_intr_npkts = 129;
1821ebf7512SSepherosa Ziehau static int et_rx_intr_delay = 25; /* x4 usec */
183136e59ffSSepherosa Ziehau static int et_tx_intr_nsegs = 256;
184d217d4d9SSepherosa Ziehau static uint32_t et_timer = 1000 * 1000 * 1000; /* nanosec */
185d217d4d9SSepherosa Ziehau
1867f28a608SSepherosa Ziehau static int et_msi_enable = 1;
1877f28a608SSepherosa Ziehau
188d217d4d9SSepherosa Ziehau TUNABLE_INT("hw.et.timer", &et_timer);
189d217d4d9SSepherosa Ziehau TUNABLE_INT("hw.et.rx_intr_npkts", &et_rx_intr_npkts);
190f285c685SSascha Wildner TUNABLE_INT("hw.et.rx_intr_delay", &et_rx_intr_delay);
191af6a2c2aSSascha Wildner TUNABLE_INT("hw.et.tx_intr_nsegs", &et_tx_intr_nsegs);
1927f28a608SSepherosa Ziehau TUNABLE_INT("hw.et.msi.enable", &et_msi_enable);
193d217d4d9SSepherosa Ziehau
194d217d4d9SSepherosa Ziehau struct et_bsize {
195d217d4d9SSepherosa Ziehau int bufsize;
1963effc1bfSSepherosa Ziehau int jumbo;
197d217d4d9SSepherosa Ziehau et_newbuf_t newbuf;
198d217d4d9SSepherosa Ziehau };
199d217d4d9SSepherosa Ziehau
2003effc1bfSSepherosa Ziehau static const struct et_bsize et_bufsize_std[ET_RX_NRING] = {
2013effc1bfSSepherosa Ziehau { .bufsize = ET_RXDMA_CTRL_RING0_128, .jumbo = 0,
2023effc1bfSSepherosa Ziehau .newbuf = et_newbuf_hdr },
2033effc1bfSSepherosa Ziehau { .bufsize = ET_RXDMA_CTRL_RING1_2048, .jumbo = 0,
2043effc1bfSSepherosa Ziehau .newbuf = et_newbuf_cluster },
2053effc1bfSSepherosa Ziehau };
2063effc1bfSSepherosa Ziehau
2073effc1bfSSepherosa Ziehau static const struct et_bsize et_bufsize_jumbo[ET_RX_NRING] = {
2083effc1bfSSepherosa Ziehau { .bufsize = ET_RXDMA_CTRL_RING0_128, .jumbo = 0,
2093effc1bfSSepherosa Ziehau .newbuf = et_newbuf_hdr },
2103effc1bfSSepherosa Ziehau { .bufsize = ET_RXDMA_CTRL_RING1_16384, .jumbo = 1,
2113effc1bfSSepherosa Ziehau .newbuf = et_newbuf_jumbo },
212d217d4d9SSepherosa Ziehau };
213d217d4d9SSepherosa Ziehau
214d217d4d9SSepherosa Ziehau static int
et_probe(device_t dev)215d217d4d9SSepherosa Ziehau et_probe(device_t dev)
216d217d4d9SSepherosa Ziehau {
217d217d4d9SSepherosa Ziehau const struct et_dev *d;
218d217d4d9SSepherosa Ziehau uint16_t did, vid;
219d217d4d9SSepherosa Ziehau
220d217d4d9SSepherosa Ziehau vid = pci_get_vendor(dev);
221d217d4d9SSepherosa Ziehau did = pci_get_device(dev);
222d217d4d9SSepherosa Ziehau
223d217d4d9SSepherosa Ziehau for (d = et_devices; d->desc != NULL; ++d) {
224d217d4d9SSepherosa Ziehau if (vid == d->vid && did == d->did) {
225d217d4d9SSepherosa Ziehau device_set_desc(dev, d->desc);
226d217d4d9SSepherosa Ziehau return 0;
227d217d4d9SSepherosa Ziehau }
228d217d4d9SSepherosa Ziehau }
229d217d4d9SSepherosa Ziehau return ENXIO;
230d217d4d9SSepherosa Ziehau }
231d217d4d9SSepherosa Ziehau
232d217d4d9SSepherosa Ziehau static int
et_attach(device_t dev)233d217d4d9SSepherosa Ziehau et_attach(device_t dev)
234d217d4d9SSepherosa Ziehau {
235d217d4d9SSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
236d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
23726595b18SSascha Wildner struct sysctl_ctx_list *ctx;
23826595b18SSascha Wildner struct sysctl_oid *tree;
239d217d4d9SSepherosa Ziehau uint8_t eaddr[ETHER_ADDR_LEN];
240d217d4d9SSepherosa Ziehau int error;
2417f28a608SSepherosa Ziehau u_int irq_flags;
242d217d4d9SSepherosa Ziehau
243d217d4d9SSepherosa Ziehau if_initname(ifp, device_get_name(dev), device_get_unit(dev));
244d217d4d9SSepherosa Ziehau callout_init(&sc->sc_tick);
245d217d4d9SSepherosa Ziehau
246d217d4d9SSepherosa Ziehau /*
247d217d4d9SSepherosa Ziehau * Initialize tunables
248d217d4d9SSepherosa Ziehau */
249d217d4d9SSepherosa Ziehau sc->sc_rx_intr_npkts = et_rx_intr_npkts;
250d217d4d9SSepherosa Ziehau sc->sc_rx_intr_delay = et_rx_intr_delay;
251d217d4d9SSepherosa Ziehau sc->sc_tx_intr_nsegs = et_tx_intr_nsegs;
252d217d4d9SSepherosa Ziehau sc->sc_timer = et_timer;
253d217d4d9SSepherosa Ziehau
254d217d4d9SSepherosa Ziehau #ifndef BURN_BRIDGES
255d217d4d9SSepherosa Ziehau if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
256d217d4d9SSepherosa Ziehau uint32_t irq, mem;
257d217d4d9SSepherosa Ziehau
258d217d4d9SSepherosa Ziehau irq = pci_read_config(dev, PCIR_INTLINE, 4);
259d217d4d9SSepherosa Ziehau mem = pci_read_config(dev, ET_PCIR_BAR, 4);
260d217d4d9SSepherosa Ziehau
261d217d4d9SSepherosa Ziehau device_printf(dev, "chip is in D%d power mode "
262d217d4d9SSepherosa Ziehau "-- setting to D0\n", pci_get_powerstate(dev));
263d217d4d9SSepherosa Ziehau
264d217d4d9SSepherosa Ziehau pci_set_powerstate(dev, PCI_POWERSTATE_D0);
265d217d4d9SSepherosa Ziehau
266d217d4d9SSepherosa Ziehau pci_write_config(dev, PCIR_INTLINE, irq, 4);
267d217d4d9SSepherosa Ziehau pci_write_config(dev, ET_PCIR_BAR, mem, 4);
268d217d4d9SSepherosa Ziehau }
269d217d4d9SSepherosa Ziehau #endif /* !BURN_BRIDGE */
270d217d4d9SSepherosa Ziehau
271d217d4d9SSepherosa Ziehau /* Enable bus mastering */
272d217d4d9SSepherosa Ziehau pci_enable_busmaster(dev);
273d217d4d9SSepherosa Ziehau
274d217d4d9SSepherosa Ziehau /*
275d217d4d9SSepherosa Ziehau * Allocate IO memory
276d217d4d9SSepherosa Ziehau */
277d217d4d9SSepherosa Ziehau sc->sc_mem_rid = ET_PCIR_BAR;
278d217d4d9SSepherosa Ziehau sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
279d217d4d9SSepherosa Ziehau &sc->sc_mem_rid, RF_ACTIVE);
280d217d4d9SSepherosa Ziehau if (sc->sc_mem_res == NULL) {
281d217d4d9SSepherosa Ziehau device_printf(dev, "can't allocate IO memory\n");
282d217d4d9SSepherosa Ziehau return ENXIO;
283d217d4d9SSepherosa Ziehau }
284d217d4d9SSepherosa Ziehau sc->sc_mem_bt = rman_get_bustag(sc->sc_mem_res);
285d217d4d9SSepherosa Ziehau sc->sc_mem_bh = rman_get_bushandle(sc->sc_mem_res);
286d217d4d9SSepherosa Ziehau
287d217d4d9SSepherosa Ziehau /*
288d217d4d9SSepherosa Ziehau * Allocate IRQ
289d217d4d9SSepherosa Ziehau */
2907f28a608SSepherosa Ziehau sc->sc_irq_type = pci_alloc_1intr(dev, et_msi_enable,
2917f28a608SSepherosa Ziehau &sc->sc_irq_rid, &irq_flags);
292d217d4d9SSepherosa Ziehau sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2937f28a608SSepherosa Ziehau &sc->sc_irq_rid, irq_flags);
294d217d4d9SSepherosa Ziehau if (sc->sc_irq_res == NULL) {
295d217d4d9SSepherosa Ziehau device_printf(dev, "can't allocate irq\n");
296d217d4d9SSepherosa Ziehau error = ENXIO;
297d217d4d9SSepherosa Ziehau goto fail;
298d217d4d9SSepherosa Ziehau }
299d217d4d9SSepherosa Ziehau
300d217d4d9SSepherosa Ziehau /*
301d217d4d9SSepherosa Ziehau * Create sysctl tree
302d217d4d9SSepherosa Ziehau */
30326595b18SSascha Wildner ctx = device_get_sysctl_ctx(dev);
30426595b18SSascha Wildner tree = device_get_sysctl_tree(dev);
30526595b18SSascha Wildner SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
306d217d4d9SSepherosa Ziehau OID_AUTO, "rx_intr_npkts", CTLTYPE_INT | CTLFLAG_RW,
307d217d4d9SSepherosa Ziehau sc, 0, et_sysctl_rx_intr_npkts, "I",
308d217d4d9SSepherosa Ziehau "RX IM, # packets per RX interrupt");
30926595b18SSascha Wildner SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
310d217d4d9SSepherosa Ziehau OID_AUTO, "rx_intr_delay", CTLTYPE_INT | CTLFLAG_RW,
311d217d4d9SSepherosa Ziehau sc, 0, et_sysctl_rx_intr_delay, "I",
312d217d4d9SSepherosa Ziehau "RX IM, RX interrupt delay (x10 usec)");
31326595b18SSascha Wildner SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
314d217d4d9SSepherosa Ziehau "tx_intr_nsegs", CTLFLAG_RW, &sc->sc_tx_intr_nsegs, 0,
315d217d4d9SSepherosa Ziehau "TX IM, # segments per TX interrupt");
31626595b18SSascha Wildner SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
317d217d4d9SSepherosa Ziehau "timer", CTLFLAG_RW, &sc->sc_timer, 0,
318d217d4d9SSepherosa Ziehau "TX timer");
319d217d4d9SSepherosa Ziehau
320d217d4d9SSepherosa Ziehau error = et_bus_config(dev);
321d217d4d9SSepherosa Ziehau if (error)
322d217d4d9SSepherosa Ziehau goto fail;
323d217d4d9SSepherosa Ziehau
324d217d4d9SSepherosa Ziehau et_get_eaddr(dev, eaddr);
325d217d4d9SSepherosa Ziehau
326d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_PM,
327d217d4d9SSepherosa Ziehau ET_PM_SYSCLK_GATE | ET_PM_TXCLK_GATE | ET_PM_RXCLK_GATE);
328d217d4d9SSepherosa Ziehau
329d217d4d9SSepherosa Ziehau et_reset(sc);
330d217d4d9SSepherosa Ziehau
331d217d4d9SSepherosa Ziehau et_disable_intrs(sc);
332d217d4d9SSepherosa Ziehau
333d217d4d9SSepherosa Ziehau error = et_dma_alloc(dev);
334d217d4d9SSepherosa Ziehau if (error)
335d217d4d9SSepherosa Ziehau goto fail;
336d217d4d9SSepherosa Ziehau
337d217d4d9SSepherosa Ziehau ifp->if_softc = sc;
338d217d4d9SSepherosa Ziehau ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
339d217d4d9SSepherosa Ziehau ifp->if_init = et_init;
340d217d4d9SSepherosa Ziehau ifp->if_ioctl = et_ioctl;
341d217d4d9SSepherosa Ziehau ifp->if_start = et_start;
342d217d4d9SSepherosa Ziehau ifp->if_watchdog = et_watchdog;
343d217d4d9SSepherosa Ziehau ifp->if_mtu = ETHERMTU;
34439fdb7b3SSepherosa Ziehau ifp->if_capabilities = IFCAP_VLAN_MTU;
34539fdb7b3SSepherosa Ziehau ifp->if_capenable = ifp->if_capabilities;
346*14929979SSepherosa Ziehau ifp->if_nmbclusters = ET_RX_NDESC;
347d217d4d9SSepherosa Ziehau ifq_set_maxlen(&ifp->if_snd, ET_TX_NDESC);
348d217d4d9SSepherosa Ziehau ifq_set_ready(&ifp->if_snd);
349d217d4d9SSepherosa Ziehau
350d217d4d9SSepherosa Ziehau et_chip_attach(sc);
351d217d4d9SSepherosa Ziehau
352d217d4d9SSepherosa Ziehau error = mii_phy_probe(dev, &sc->sc_miibus,
353d217d4d9SSepherosa Ziehau et_ifmedia_upd, et_ifmedia_sts);
354d217d4d9SSepherosa Ziehau if (error) {
355d217d4d9SSepherosa Ziehau device_printf(dev, "can't probe any PHY\n");
356d217d4d9SSepherosa Ziehau goto fail;
357d217d4d9SSepherosa Ziehau }
358d217d4d9SSepherosa Ziehau
359d217d4d9SSepherosa Ziehau ether_ifattach(ifp, eaddr, NULL);
360d217d4d9SSepherosa Ziehau
3614c77af2dSSepherosa Ziehau ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(sc->sc_irq_res));
3624c77af2dSSepherosa Ziehau
363d217d4d9SSepherosa Ziehau error = bus_setup_intr(dev, sc->sc_irq_res, INTR_MPSAFE, et_intr, sc,
364d217d4d9SSepherosa Ziehau &sc->sc_irq_handle, ifp->if_serializer);
365d217d4d9SSepherosa Ziehau if (error) {
366d217d4d9SSepherosa Ziehau ether_ifdetach(ifp);
367d217d4d9SSepherosa Ziehau device_printf(dev, "can't setup intr\n");
368d217d4d9SSepherosa Ziehau goto fail;
369d217d4d9SSepherosa Ziehau }
3709db4b353SSepherosa Ziehau
371*14929979SSepherosa Ziehau /* Increase non-cluster mbuf limit; used by tiny RX ring */
372*14929979SSepherosa Ziehau mb_inclimit(ET_RX_NDESC);
373*14929979SSepherosa Ziehau
374d217d4d9SSepherosa Ziehau return 0;
375d217d4d9SSepherosa Ziehau fail:
376d217d4d9SSepherosa Ziehau et_detach(dev);
377d217d4d9SSepherosa Ziehau return error;
378d217d4d9SSepherosa Ziehau }
379d217d4d9SSepherosa Ziehau
380d217d4d9SSepherosa Ziehau static int
et_detach(device_t dev)381d217d4d9SSepherosa Ziehau et_detach(device_t dev)
382d217d4d9SSepherosa Ziehau {
383d217d4d9SSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
384d217d4d9SSepherosa Ziehau
385d217d4d9SSepherosa Ziehau if (device_is_attached(dev)) {
386d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
387d217d4d9SSepherosa Ziehau
388d217d4d9SSepherosa Ziehau lwkt_serialize_enter(ifp->if_serializer);
389d217d4d9SSepherosa Ziehau et_stop(sc);
390d217d4d9SSepherosa Ziehau bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_handle);
391d217d4d9SSepherosa Ziehau lwkt_serialize_exit(ifp->if_serializer);
392d217d4d9SSepherosa Ziehau
393d217d4d9SSepherosa Ziehau ether_ifdetach(ifp);
394*14929979SSepherosa Ziehau
395*14929979SSepherosa Ziehau /* Decrease non-cluster mbuf limit increased by us */
396*14929979SSepherosa Ziehau mb_inclimit(-ET_RX_NDESC);
397d217d4d9SSepherosa Ziehau }
398d217d4d9SSepherosa Ziehau
399d217d4d9SSepherosa Ziehau if (sc->sc_miibus != NULL)
400d217d4d9SSepherosa Ziehau device_delete_child(dev, sc->sc_miibus);
401d217d4d9SSepherosa Ziehau bus_generic_detach(dev);
402d217d4d9SSepherosa Ziehau
403d217d4d9SSepherosa Ziehau if (sc->sc_irq_res != NULL) {
404d217d4d9SSepherosa Ziehau bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
405d217d4d9SSepherosa Ziehau sc->sc_irq_res);
406d217d4d9SSepherosa Ziehau }
4077f28a608SSepherosa Ziehau if (sc->sc_irq_type == PCI_INTR_TYPE_MSI)
4087f28a608SSepherosa Ziehau pci_release_msi(dev);
409d217d4d9SSepherosa Ziehau
410d217d4d9SSepherosa Ziehau if (sc->sc_mem_res != NULL) {
411d217d4d9SSepherosa Ziehau bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid,
412d217d4d9SSepherosa Ziehau sc->sc_mem_res);
413d217d4d9SSepherosa Ziehau }
414d217d4d9SSepherosa Ziehau
415d217d4d9SSepherosa Ziehau et_dma_free(dev);
416d217d4d9SSepherosa Ziehau
417d217d4d9SSepherosa Ziehau return 0;
418d217d4d9SSepherosa Ziehau }
419d217d4d9SSepherosa Ziehau
420d217d4d9SSepherosa Ziehau static int
et_shutdown(device_t dev)421d217d4d9SSepherosa Ziehau et_shutdown(device_t dev)
422d217d4d9SSepherosa Ziehau {
423d217d4d9SSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
424d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
425d217d4d9SSepherosa Ziehau
426d217d4d9SSepherosa Ziehau lwkt_serialize_enter(ifp->if_serializer);
427d217d4d9SSepherosa Ziehau et_stop(sc);
428d217d4d9SSepherosa Ziehau lwkt_serialize_exit(ifp->if_serializer);
429d217d4d9SSepherosa Ziehau return 0;
430d217d4d9SSepherosa Ziehau }
431d217d4d9SSepherosa Ziehau
432d217d4d9SSepherosa Ziehau static int
et_miibus_readreg(device_t dev,int phy,int reg)433d217d4d9SSepherosa Ziehau et_miibus_readreg(device_t dev, int phy, int reg)
434d217d4d9SSepherosa Ziehau {
435d217d4d9SSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
436d217d4d9SSepherosa Ziehau uint32_t val;
437d217d4d9SSepherosa Ziehau int i, ret;
438d217d4d9SSepherosa Ziehau
439d217d4d9SSepherosa Ziehau /* Stop any pending operations */
440d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_CMD, 0);
441d217d4d9SSepherosa Ziehau
442d217d4d9SSepherosa Ziehau val = __SHIFTIN(phy, ET_MII_ADDR_PHY) |
443d217d4d9SSepherosa Ziehau __SHIFTIN(reg, ET_MII_ADDR_REG);
444d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_ADDR, val);
445d217d4d9SSepherosa Ziehau
446d217d4d9SSepherosa Ziehau /* Start reading */
447d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_CMD, ET_MII_CMD_READ);
448d217d4d9SSepherosa Ziehau
449d217d4d9SSepherosa Ziehau #define NRETRY 50
450d217d4d9SSepherosa Ziehau
451d217d4d9SSepherosa Ziehau for (i = 0; i < NRETRY; ++i) {
452d217d4d9SSepherosa Ziehau val = CSR_READ_4(sc, ET_MII_IND);
453d217d4d9SSepherosa Ziehau if ((val & (ET_MII_IND_BUSY | ET_MII_IND_INVALID)) == 0)
454d217d4d9SSepherosa Ziehau break;
455d217d4d9SSepherosa Ziehau DELAY(50);
456d217d4d9SSepherosa Ziehau }
457d217d4d9SSepherosa Ziehau if (i == NRETRY) {
458d217d4d9SSepherosa Ziehau if_printf(&sc->arpcom.ac_if,
459d217d4d9SSepherosa Ziehau "read phy %d, reg %d timed out\n", phy, reg);
460d217d4d9SSepherosa Ziehau ret = 0;
461d217d4d9SSepherosa Ziehau goto back;
462d217d4d9SSepherosa Ziehau }
463d217d4d9SSepherosa Ziehau
464d217d4d9SSepherosa Ziehau #undef NRETRY
465d217d4d9SSepherosa Ziehau
466d217d4d9SSepherosa Ziehau val = CSR_READ_4(sc, ET_MII_STAT);
467d217d4d9SSepherosa Ziehau ret = __SHIFTOUT(val, ET_MII_STAT_VALUE);
468d217d4d9SSepherosa Ziehau
469d217d4d9SSepherosa Ziehau back:
470d217d4d9SSepherosa Ziehau /* Make sure that the current operation is stopped */
471d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_CMD, 0);
472d217d4d9SSepherosa Ziehau return ret;
473d217d4d9SSepherosa Ziehau }
474d217d4d9SSepherosa Ziehau
475d217d4d9SSepherosa Ziehau static int
et_miibus_writereg(device_t dev,int phy,int reg,int val0)476d217d4d9SSepherosa Ziehau et_miibus_writereg(device_t dev, int phy, int reg, int val0)
477d217d4d9SSepherosa Ziehau {
478d217d4d9SSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
479d217d4d9SSepherosa Ziehau uint32_t val;
480d217d4d9SSepherosa Ziehau int i;
481d217d4d9SSepherosa Ziehau
482d217d4d9SSepherosa Ziehau /* Stop any pending operations */
483d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_CMD, 0);
484d217d4d9SSepherosa Ziehau
485d217d4d9SSepherosa Ziehau val = __SHIFTIN(phy, ET_MII_ADDR_PHY) |
486d217d4d9SSepherosa Ziehau __SHIFTIN(reg, ET_MII_ADDR_REG);
487d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_ADDR, val);
488d217d4d9SSepherosa Ziehau
489d217d4d9SSepherosa Ziehau /* Start writing */
490d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_CTRL, __SHIFTIN(val0, ET_MII_CTRL_VALUE));
491d217d4d9SSepherosa Ziehau
492d217d4d9SSepherosa Ziehau #define NRETRY 100
493d217d4d9SSepherosa Ziehau
494d217d4d9SSepherosa Ziehau for (i = 0; i < NRETRY; ++i) {
495d217d4d9SSepherosa Ziehau val = CSR_READ_4(sc, ET_MII_IND);
496d217d4d9SSepherosa Ziehau if ((val & ET_MII_IND_BUSY) == 0)
497d217d4d9SSepherosa Ziehau break;
498d217d4d9SSepherosa Ziehau DELAY(50);
499d217d4d9SSepherosa Ziehau }
500d217d4d9SSepherosa Ziehau if (i == NRETRY) {
501d217d4d9SSepherosa Ziehau if_printf(&sc->arpcom.ac_if,
502d217d4d9SSepherosa Ziehau "write phy %d, reg %d timed out\n", phy, reg);
503d217d4d9SSepherosa Ziehau et_miibus_readreg(dev, phy, reg);
504d217d4d9SSepherosa Ziehau }
505d217d4d9SSepherosa Ziehau
506d217d4d9SSepherosa Ziehau #undef NRETRY
507d217d4d9SSepherosa Ziehau
508d217d4d9SSepherosa Ziehau /* Make sure that the current operation is stopped */
509d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_CMD, 0);
510d217d4d9SSepherosa Ziehau return 0;
511d217d4d9SSepherosa Ziehau }
512d217d4d9SSepherosa Ziehau
513d217d4d9SSepherosa Ziehau static void
et_miibus_statchg(device_t dev)514d217d4d9SSepherosa Ziehau et_miibus_statchg(device_t dev)
515d217d4d9SSepherosa Ziehau {
51660d2de1fSSepherosa Ziehau et_setmedia(device_get_softc(dev));
517d217d4d9SSepherosa Ziehau }
518d217d4d9SSepherosa Ziehau
519d217d4d9SSepherosa Ziehau static int
et_ifmedia_upd(struct ifnet * ifp)520d217d4d9SSepherosa Ziehau et_ifmedia_upd(struct ifnet *ifp)
521d217d4d9SSepherosa Ziehau {
522d217d4d9SSepherosa Ziehau struct et_softc *sc = ifp->if_softc;
523d217d4d9SSepherosa Ziehau struct mii_data *mii = device_get_softc(sc->sc_miibus);
524d217d4d9SSepherosa Ziehau
525d217d4d9SSepherosa Ziehau if (mii->mii_instance != 0) {
526d217d4d9SSepherosa Ziehau struct mii_softc *miisc;
527d217d4d9SSepherosa Ziehau
528d217d4d9SSepherosa Ziehau LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
529d217d4d9SSepherosa Ziehau mii_phy_reset(miisc);
530d217d4d9SSepherosa Ziehau }
531d217d4d9SSepherosa Ziehau mii_mediachg(mii);
532d217d4d9SSepherosa Ziehau
533d217d4d9SSepherosa Ziehau return 0;
534d217d4d9SSepherosa Ziehau }
535d217d4d9SSepherosa Ziehau
536d217d4d9SSepherosa Ziehau static void
et_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)537d217d4d9SSepherosa Ziehau et_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
538d217d4d9SSepherosa Ziehau {
539d217d4d9SSepherosa Ziehau struct et_softc *sc = ifp->if_softc;
540d217d4d9SSepherosa Ziehau struct mii_data *mii = device_get_softc(sc->sc_miibus);
541d217d4d9SSepherosa Ziehau
542d217d4d9SSepherosa Ziehau mii_pollstat(mii);
543d217d4d9SSepherosa Ziehau ifmr->ifm_active = mii->mii_media_active;
544d217d4d9SSepherosa Ziehau ifmr->ifm_status = mii->mii_media_status;
545d217d4d9SSepherosa Ziehau }
546d217d4d9SSepherosa Ziehau
547d217d4d9SSepherosa Ziehau static void
et_stop(struct et_softc * sc)548d217d4d9SSepherosa Ziehau et_stop(struct et_softc *sc)
549d217d4d9SSepherosa Ziehau {
550d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
551d217d4d9SSepherosa Ziehau
552d217d4d9SSepherosa Ziehau ASSERT_SERIALIZED(ifp->if_serializer);
553d217d4d9SSepherosa Ziehau
554d217d4d9SSepherosa Ziehau callout_stop(&sc->sc_tick);
555d217d4d9SSepherosa Ziehau
556d217d4d9SSepherosa Ziehau et_stop_rxdma(sc);
557d217d4d9SSepherosa Ziehau et_stop_txdma(sc);
558d217d4d9SSepherosa Ziehau
559d217d4d9SSepherosa Ziehau et_disable_intrs(sc);
560d217d4d9SSepherosa Ziehau
561d217d4d9SSepherosa Ziehau et_free_tx_ring(sc);
562d217d4d9SSepherosa Ziehau et_free_rx_ring(sc);
563d217d4d9SSepherosa Ziehau
564d217d4d9SSepherosa Ziehau et_reset(sc);
565d217d4d9SSepherosa Ziehau
566d217d4d9SSepherosa Ziehau sc->sc_tx = 0;
567d217d4d9SSepherosa Ziehau sc->sc_tx_intr = 0;
5683effc1bfSSepherosa Ziehau sc->sc_flags &= ~ET_FLAG_TXRX_ENABLED;
569d217d4d9SSepherosa Ziehau
570d217d4d9SSepherosa Ziehau ifp->if_timer = 0;
5719ed293e0SSepherosa Ziehau ifp->if_flags &= ~IFF_RUNNING;
5729ed293e0SSepherosa Ziehau ifq_clr_oactive(&ifp->if_snd);
573d217d4d9SSepherosa Ziehau }
574d217d4d9SSepherosa Ziehau
575d217d4d9SSepherosa Ziehau static int
et_bus_config(device_t dev)576d217d4d9SSepherosa Ziehau et_bus_config(device_t dev)
577d217d4d9SSepherosa Ziehau {
578d217d4d9SSepherosa Ziehau uint32_t val, max_plsz;
579d217d4d9SSepherosa Ziehau uint16_t ack_latency, replay_timer;
580d217d4d9SSepherosa Ziehau
581d217d4d9SSepherosa Ziehau /*
582d217d4d9SSepherosa Ziehau * Test whether EEPROM is valid
583d217d4d9SSepherosa Ziehau * NOTE: Read twice to get the correct value
584d217d4d9SSepherosa Ziehau */
585d217d4d9SSepherosa Ziehau pci_read_config(dev, ET_PCIR_EEPROM_STATUS, 1);
586d217d4d9SSepherosa Ziehau val = pci_read_config(dev, ET_PCIR_EEPROM_STATUS, 1);
587d217d4d9SSepherosa Ziehau if (val & ET_PCIM_EEPROM_STATUS_ERROR) {
588d217d4d9SSepherosa Ziehau device_printf(dev, "EEPROM status error 0x%02x\n", val);
589d217d4d9SSepherosa Ziehau return ENXIO;
590d217d4d9SSepherosa Ziehau }
591d217d4d9SSepherosa Ziehau
592d217d4d9SSepherosa Ziehau /* TODO: LED */
593d217d4d9SSepherosa Ziehau
594d217d4d9SSepherosa Ziehau /*
595d217d4d9SSepherosa Ziehau * Configure ACK latency and replay timer according to
596d217d4d9SSepherosa Ziehau * max playload size
597d217d4d9SSepherosa Ziehau */
598d217d4d9SSepherosa Ziehau val = pci_read_config(dev, ET_PCIR_DEVICE_CAPS, 4);
599d217d4d9SSepherosa Ziehau max_plsz = val & ET_PCIM_DEVICE_CAPS_MAX_PLSZ;
600d217d4d9SSepherosa Ziehau
601d217d4d9SSepherosa Ziehau switch (max_plsz) {
602d217d4d9SSepherosa Ziehau case ET_PCIV_DEVICE_CAPS_PLSZ_128:
603d217d4d9SSepherosa Ziehau ack_latency = ET_PCIV_ACK_LATENCY_128;
604d217d4d9SSepherosa Ziehau replay_timer = ET_PCIV_REPLAY_TIMER_128;
605d217d4d9SSepherosa Ziehau break;
606d217d4d9SSepherosa Ziehau
607d217d4d9SSepherosa Ziehau case ET_PCIV_DEVICE_CAPS_PLSZ_256:
608d217d4d9SSepherosa Ziehau ack_latency = ET_PCIV_ACK_LATENCY_256;
609d217d4d9SSepherosa Ziehau replay_timer = ET_PCIV_REPLAY_TIMER_256;
610d217d4d9SSepherosa Ziehau break;
611d217d4d9SSepherosa Ziehau
612d217d4d9SSepherosa Ziehau default:
613d217d4d9SSepherosa Ziehau ack_latency = pci_read_config(dev, ET_PCIR_ACK_LATENCY, 2);
614d217d4d9SSepherosa Ziehau replay_timer = pci_read_config(dev, ET_PCIR_REPLAY_TIMER, 2);
615d217d4d9SSepherosa Ziehau device_printf(dev, "ack latency %u, replay timer %u\n",
616d217d4d9SSepherosa Ziehau ack_latency, replay_timer);
617d217d4d9SSepherosa Ziehau break;
618d217d4d9SSepherosa Ziehau }
619d217d4d9SSepherosa Ziehau if (ack_latency != 0) {
620d217d4d9SSepherosa Ziehau pci_write_config(dev, ET_PCIR_ACK_LATENCY, ack_latency, 2);
621d217d4d9SSepherosa Ziehau pci_write_config(dev, ET_PCIR_REPLAY_TIMER, replay_timer, 2);
622d217d4d9SSepherosa Ziehau }
623d217d4d9SSepherosa Ziehau
624d217d4d9SSepherosa Ziehau /*
625d217d4d9SSepherosa Ziehau * Set L0s and L1 latency timer to 2us
626d217d4d9SSepherosa Ziehau */
627d217d4d9SSepherosa Ziehau val = ET_PCIV_L0S_LATENCY(2) | ET_PCIV_L1_LATENCY(2);
628d217d4d9SSepherosa Ziehau pci_write_config(dev, ET_PCIR_L0S_L1_LATENCY, val, 1);
629d217d4d9SSepherosa Ziehau
630d217d4d9SSepherosa Ziehau /*
631d217d4d9SSepherosa Ziehau * Set max read request size to 2048 bytes
632d217d4d9SSepherosa Ziehau */
633d217d4d9SSepherosa Ziehau val = pci_read_config(dev, ET_PCIR_DEVICE_CTRL, 2);
634d217d4d9SSepherosa Ziehau val &= ~ET_PCIM_DEVICE_CTRL_MAX_RRSZ;
635d217d4d9SSepherosa Ziehau val |= ET_PCIV_DEVICE_CTRL_RRSZ_2K;
636d217d4d9SSepherosa Ziehau pci_write_config(dev, ET_PCIR_DEVICE_CTRL, val, 2);
637d217d4d9SSepherosa Ziehau
638d217d4d9SSepherosa Ziehau return 0;
639d217d4d9SSepherosa Ziehau }
640d217d4d9SSepherosa Ziehau
641d217d4d9SSepherosa Ziehau static void
et_get_eaddr(device_t dev,uint8_t eaddr[])642d217d4d9SSepherosa Ziehau et_get_eaddr(device_t dev, uint8_t eaddr[])
643d217d4d9SSepherosa Ziehau {
644d217d4d9SSepherosa Ziehau uint32_t val;
645d217d4d9SSepherosa Ziehau int i;
646d217d4d9SSepherosa Ziehau
647d217d4d9SSepherosa Ziehau val = pci_read_config(dev, ET_PCIR_MAC_ADDR0, 4);
648d217d4d9SSepherosa Ziehau for (i = 0; i < 4; ++i)
649d217d4d9SSepherosa Ziehau eaddr[i] = (val >> (8 * i)) & 0xff;
650d217d4d9SSepherosa Ziehau
651d217d4d9SSepherosa Ziehau val = pci_read_config(dev, ET_PCIR_MAC_ADDR1, 2);
652d217d4d9SSepherosa Ziehau for (; i < ETHER_ADDR_LEN; ++i)
653d217d4d9SSepherosa Ziehau eaddr[i] = (val >> (8 * (i - 4))) & 0xff;
654d217d4d9SSepherosa Ziehau }
655d217d4d9SSepherosa Ziehau
656d217d4d9SSepherosa Ziehau static void
et_reset(struct et_softc * sc)657d217d4d9SSepherosa Ziehau et_reset(struct et_softc *sc)
658d217d4d9SSepherosa Ziehau {
659d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CFG1,
660d217d4d9SSepherosa Ziehau ET_MAC_CFG1_RST_TXFUNC | ET_MAC_CFG1_RST_RXFUNC |
661d217d4d9SSepherosa Ziehau ET_MAC_CFG1_RST_TXMC | ET_MAC_CFG1_RST_RXMC |
662d217d4d9SSepherosa Ziehau ET_MAC_CFG1_SIM_RST | ET_MAC_CFG1_SOFT_RST);
663d217d4d9SSepherosa Ziehau
664d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_SWRST,
665d217d4d9SSepherosa Ziehau ET_SWRST_TXDMA | ET_SWRST_RXDMA |
666d217d4d9SSepherosa Ziehau ET_SWRST_TXMAC | ET_SWRST_RXMAC |
667d217d4d9SSepherosa Ziehau ET_SWRST_MAC | ET_SWRST_MAC_STAT | ET_SWRST_MMC);
668d217d4d9SSepherosa Ziehau
669d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CFG1,
670d217d4d9SSepherosa Ziehau ET_MAC_CFG1_RST_TXFUNC | ET_MAC_CFG1_RST_RXFUNC |
671d217d4d9SSepherosa Ziehau ET_MAC_CFG1_RST_TXMC | ET_MAC_CFG1_RST_RXMC);
672d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CFG1, 0);
673d217d4d9SSepherosa Ziehau }
674d217d4d9SSepherosa Ziehau
675d217d4d9SSepherosa Ziehau static void
et_disable_intrs(struct et_softc * sc)676d217d4d9SSepherosa Ziehau et_disable_intrs(struct et_softc *sc)
677d217d4d9SSepherosa Ziehau {
678d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_INTR_MASK, 0xffffffff);
679d217d4d9SSepherosa Ziehau }
680d217d4d9SSepherosa Ziehau
681d217d4d9SSepherosa Ziehau static void
et_enable_intrs(struct et_softc * sc,uint32_t intrs)682d217d4d9SSepherosa Ziehau et_enable_intrs(struct et_softc *sc, uint32_t intrs)
683d217d4d9SSepherosa Ziehau {
684d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_INTR_MASK, ~intrs);
685d217d4d9SSepherosa Ziehau }
686d217d4d9SSepherosa Ziehau
687d217d4d9SSepherosa Ziehau static int
et_dma_alloc(device_t dev)688d217d4d9SSepherosa Ziehau et_dma_alloc(device_t dev)
689d217d4d9SSepherosa Ziehau {
690d217d4d9SSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
691d217d4d9SSepherosa Ziehau struct et_txdesc_ring *tx_ring = &sc->sc_tx_ring;
692d217d4d9SSepherosa Ziehau struct et_txstatus_data *txsd = &sc->sc_tx_status;
693d217d4d9SSepherosa Ziehau struct et_rxstat_ring *rxst_ring = &sc->sc_rxstat_ring;
694d217d4d9SSepherosa Ziehau struct et_rxstatus_data *rxsd = &sc->sc_rx_status;
695d217d4d9SSepherosa Ziehau int i, error;
696d217d4d9SSepherosa Ziehau
697d217d4d9SSepherosa Ziehau /*
698d217d4d9SSepherosa Ziehau * Create top level DMA tag
699d217d4d9SSepherosa Ziehau */
700d217d4d9SSepherosa Ziehau error = bus_dma_tag_create(NULL, 1, 0,
7014c749635SSepherosa Ziehau BUS_SPACE_MAXADDR,
702d217d4d9SSepherosa Ziehau BUS_SPACE_MAXADDR,
7034c749635SSepherosa Ziehau BUS_SPACE_MAXSIZE_32BIT,
7044c749635SSepherosa Ziehau 0,
705d217d4d9SSepherosa Ziehau BUS_SPACE_MAXSIZE_32BIT,
706d217d4d9SSepherosa Ziehau 0, &sc->sc_dtag);
707d217d4d9SSepherosa Ziehau if (error) {
708d217d4d9SSepherosa Ziehau device_printf(dev, "can't create DMA tag\n");
709d217d4d9SSepherosa Ziehau return error;
710d217d4d9SSepherosa Ziehau }
711d217d4d9SSepherosa Ziehau
712d217d4d9SSepherosa Ziehau /*
713d217d4d9SSepherosa Ziehau * Create TX ring DMA stuffs
714d217d4d9SSepherosa Ziehau */
715c7f73cc7SSepherosa Ziehau tx_ring->tr_desc = bus_dmamem_coherent_any(sc->sc_dtag,
716c7f73cc7SSepherosa Ziehau ET_ALIGN, ET_TX_RING_SIZE,
717c7f73cc7SSepherosa Ziehau BUS_DMA_WAITOK | BUS_DMA_ZERO,
718c7f73cc7SSepherosa Ziehau &tx_ring->tr_dtag, &tx_ring->tr_dmap,
719c7f73cc7SSepherosa Ziehau &tx_ring->tr_paddr);
720c7f73cc7SSepherosa Ziehau if (tx_ring->tr_desc == NULL) {
721d217d4d9SSepherosa Ziehau device_printf(dev, "can't create TX ring DMA stuffs\n");
722c7f73cc7SSepherosa Ziehau return ENOMEM;
723d217d4d9SSepherosa Ziehau }
724d217d4d9SSepherosa Ziehau
725d217d4d9SSepherosa Ziehau /*
726d217d4d9SSepherosa Ziehau * Create TX status DMA stuffs
727d217d4d9SSepherosa Ziehau */
728c7f73cc7SSepherosa Ziehau txsd->txsd_status = bus_dmamem_coherent_any(sc->sc_dtag,
729c7f73cc7SSepherosa Ziehau ET_ALIGN, sizeof(uint32_t),
730c7f73cc7SSepherosa Ziehau BUS_DMA_WAITOK | BUS_DMA_ZERO,
731c7f73cc7SSepherosa Ziehau &txsd->txsd_dtag, &txsd->txsd_dmap,
732c7f73cc7SSepherosa Ziehau &txsd->txsd_paddr);
733c7f73cc7SSepherosa Ziehau if (txsd->txsd_status == NULL) {
734d217d4d9SSepherosa Ziehau device_printf(dev, "can't create TX status DMA stuffs\n");
735c7f73cc7SSepherosa Ziehau return ENOMEM;
736d217d4d9SSepherosa Ziehau }
737d217d4d9SSepherosa Ziehau
738d217d4d9SSepherosa Ziehau /*
739d217d4d9SSepherosa Ziehau * Create DMA stuffs for RX rings
740d217d4d9SSepherosa Ziehau */
741d217d4d9SSepherosa Ziehau for (i = 0; i < ET_RX_NRING; ++i) {
742d217d4d9SSepherosa Ziehau static const uint32_t rx_ring_posreg[ET_RX_NRING] =
743d217d4d9SSepherosa Ziehau { ET_RX_RING0_POS, ET_RX_RING1_POS };
744d217d4d9SSepherosa Ziehau
745d217d4d9SSepherosa Ziehau struct et_rxdesc_ring *rx_ring = &sc->sc_rx_ring[i];
746d217d4d9SSepherosa Ziehau
747c7f73cc7SSepherosa Ziehau rx_ring->rr_desc = bus_dmamem_coherent_any(sc->sc_dtag,
748c7f73cc7SSepherosa Ziehau ET_ALIGN, ET_RX_RING_SIZE,
749c7f73cc7SSepherosa Ziehau BUS_DMA_WAITOK | BUS_DMA_ZERO,
750c7f73cc7SSepherosa Ziehau &rx_ring->rr_dtag, &rx_ring->rr_dmap,
751c7f73cc7SSepherosa Ziehau &rx_ring->rr_paddr);
752c7f73cc7SSepherosa Ziehau if (rx_ring->rr_desc == NULL) {
753d217d4d9SSepherosa Ziehau device_printf(dev, "can't create DMA stuffs for "
754d217d4d9SSepherosa Ziehau "the %d RX ring\n", i);
755c7f73cc7SSepherosa Ziehau return ENOMEM;
756d217d4d9SSepherosa Ziehau }
757d217d4d9SSepherosa Ziehau rx_ring->rr_posreg = rx_ring_posreg[i];
758d217d4d9SSepherosa Ziehau }
759d217d4d9SSepherosa Ziehau
760d217d4d9SSepherosa Ziehau /*
761d217d4d9SSepherosa Ziehau * Create RX stat ring DMA stuffs
762d217d4d9SSepherosa Ziehau */
763c7f73cc7SSepherosa Ziehau rxst_ring->rsr_stat = bus_dmamem_coherent_any(sc->sc_dtag,
764c7f73cc7SSepherosa Ziehau ET_ALIGN, ET_RXSTAT_RING_SIZE,
765c7f73cc7SSepherosa Ziehau BUS_DMA_WAITOK | BUS_DMA_ZERO,
766c7f73cc7SSepherosa Ziehau &rxst_ring->rsr_dtag, &rxst_ring->rsr_dmap,
767c7f73cc7SSepherosa Ziehau &rxst_ring->rsr_paddr);
768c7f73cc7SSepherosa Ziehau if (rxst_ring->rsr_stat == NULL) {
769d217d4d9SSepherosa Ziehau device_printf(dev, "can't create RX stat ring DMA stuffs\n");
770c7f73cc7SSepherosa Ziehau return ENOMEM;
771d217d4d9SSepherosa Ziehau }
772d217d4d9SSepherosa Ziehau
773d217d4d9SSepherosa Ziehau /*
774d217d4d9SSepherosa Ziehau * Create RX status DMA stuffs
775d217d4d9SSepherosa Ziehau */
776c7f73cc7SSepherosa Ziehau rxsd->rxsd_status = bus_dmamem_coherent_any(sc->sc_dtag,
777c7f73cc7SSepherosa Ziehau ET_ALIGN, sizeof(struct et_rxstatus),
778c7f73cc7SSepherosa Ziehau BUS_DMA_WAITOK | BUS_DMA_ZERO,
779c7f73cc7SSepherosa Ziehau &rxsd->rxsd_dtag, &rxsd->rxsd_dmap,
780c7f73cc7SSepherosa Ziehau &rxsd->rxsd_paddr);
781c7f73cc7SSepherosa Ziehau if (rxsd->rxsd_status == NULL) {
782d217d4d9SSepherosa Ziehau device_printf(dev, "can't create RX status DMA stuffs\n");
783c7f73cc7SSepherosa Ziehau return ENOMEM;
784d217d4d9SSepherosa Ziehau }
785d217d4d9SSepherosa Ziehau
786d217d4d9SSepherosa Ziehau /*
787d217d4d9SSepherosa Ziehau * Create mbuf DMA stuffs
788d217d4d9SSepherosa Ziehau */
789d217d4d9SSepherosa Ziehau error = et_dma_mbuf_create(dev);
790d217d4d9SSepherosa Ziehau if (error)
791d217d4d9SSepherosa Ziehau return error;
792d217d4d9SSepherosa Ziehau
7933effc1bfSSepherosa Ziehau /*
7943effc1bfSSepherosa Ziehau * Create jumbo buffer DMA stuffs
7953effc1bfSSepherosa Ziehau * NOTE: Allow it to fail
7963effc1bfSSepherosa Ziehau */
7973effc1bfSSepherosa Ziehau if (et_jumbo_mem_alloc(dev) == 0)
7983effc1bfSSepherosa Ziehau sc->sc_flags |= ET_FLAG_JUMBO;
7993effc1bfSSepherosa Ziehau
800d217d4d9SSepherosa Ziehau return 0;
801d217d4d9SSepherosa Ziehau }
802d217d4d9SSepherosa Ziehau
803d217d4d9SSepherosa Ziehau static void
et_dma_free(device_t dev)804d217d4d9SSepherosa Ziehau et_dma_free(device_t dev)
805d217d4d9SSepherosa Ziehau {
806d217d4d9SSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
807d217d4d9SSepherosa Ziehau struct et_txdesc_ring *tx_ring = &sc->sc_tx_ring;
808d217d4d9SSepherosa Ziehau struct et_txstatus_data *txsd = &sc->sc_tx_status;
809d217d4d9SSepherosa Ziehau struct et_rxstat_ring *rxst_ring = &sc->sc_rxstat_ring;
810d217d4d9SSepherosa Ziehau struct et_rxstatus_data *rxsd = &sc->sc_rx_status;
811d217d4d9SSepherosa Ziehau int i, rx_done[ET_RX_NRING];
812d217d4d9SSepherosa Ziehau
813d217d4d9SSepherosa Ziehau /*
814d217d4d9SSepherosa Ziehau * Destroy TX ring DMA stuffs
815d217d4d9SSepherosa Ziehau */
816d217d4d9SSepherosa Ziehau et_dma_mem_destroy(tx_ring->tr_dtag, tx_ring->tr_desc,
817d217d4d9SSepherosa Ziehau tx_ring->tr_dmap);
818d217d4d9SSepherosa Ziehau
819d217d4d9SSepherosa Ziehau /*
820d217d4d9SSepherosa Ziehau * Destroy TX status DMA stuffs
821d217d4d9SSepherosa Ziehau */
822d217d4d9SSepherosa Ziehau et_dma_mem_destroy(txsd->txsd_dtag, txsd->txsd_status,
823d217d4d9SSepherosa Ziehau txsd->txsd_dmap);
824d217d4d9SSepherosa Ziehau
825d217d4d9SSepherosa Ziehau /*
826d217d4d9SSepherosa Ziehau * Destroy DMA stuffs for RX rings
827d217d4d9SSepherosa Ziehau */
828d217d4d9SSepherosa Ziehau for (i = 0; i < ET_RX_NRING; ++i) {
829d217d4d9SSepherosa Ziehau struct et_rxdesc_ring *rx_ring = &sc->sc_rx_ring[i];
830d217d4d9SSepherosa Ziehau
831d217d4d9SSepherosa Ziehau et_dma_mem_destroy(rx_ring->rr_dtag, rx_ring->rr_desc,
832d217d4d9SSepherosa Ziehau rx_ring->rr_dmap);
833d217d4d9SSepherosa Ziehau }
834d217d4d9SSepherosa Ziehau
835d217d4d9SSepherosa Ziehau /*
836d217d4d9SSepherosa Ziehau * Destroy RX stat ring DMA stuffs
837d217d4d9SSepherosa Ziehau */
838d217d4d9SSepherosa Ziehau et_dma_mem_destroy(rxst_ring->rsr_dtag, rxst_ring->rsr_stat,
839d217d4d9SSepherosa Ziehau rxst_ring->rsr_dmap);
840d217d4d9SSepherosa Ziehau
841d217d4d9SSepherosa Ziehau /*
842d217d4d9SSepherosa Ziehau * Destroy RX status DMA stuffs
843d217d4d9SSepherosa Ziehau */
844d217d4d9SSepherosa Ziehau et_dma_mem_destroy(rxsd->rxsd_dtag, rxsd->rxsd_status,
845d217d4d9SSepherosa Ziehau rxsd->rxsd_dmap);
846d217d4d9SSepherosa Ziehau
847d217d4d9SSepherosa Ziehau /*
848d217d4d9SSepherosa Ziehau * Destroy mbuf DMA stuffs
849d217d4d9SSepherosa Ziehau */
850d217d4d9SSepherosa Ziehau for (i = 0; i < ET_RX_NRING; ++i)
851d217d4d9SSepherosa Ziehau rx_done[i] = ET_RX_NDESC;
852d217d4d9SSepherosa Ziehau et_dma_mbuf_destroy(dev, ET_TX_NDESC, rx_done);
853d217d4d9SSepherosa Ziehau
854d217d4d9SSepherosa Ziehau /*
8553effc1bfSSepherosa Ziehau * Destroy jumbo buffer DMA stuffs
8563effc1bfSSepherosa Ziehau */
8573effc1bfSSepherosa Ziehau if (sc->sc_flags & ET_FLAG_JUMBO)
8583effc1bfSSepherosa Ziehau et_jumbo_mem_free(dev);
8593effc1bfSSepherosa Ziehau
8603effc1bfSSepherosa Ziehau /*
861d217d4d9SSepherosa Ziehau * Destroy top level DMA tag
862d217d4d9SSepherosa Ziehau */
863d217d4d9SSepherosa Ziehau if (sc->sc_dtag != NULL)
864d217d4d9SSepherosa Ziehau bus_dma_tag_destroy(sc->sc_dtag);
865d217d4d9SSepherosa Ziehau }
866d217d4d9SSepherosa Ziehau
867d217d4d9SSepherosa Ziehau static int
et_dma_mbuf_create(device_t dev)868d217d4d9SSepherosa Ziehau et_dma_mbuf_create(device_t dev)
869d217d4d9SSepherosa Ziehau {
870d217d4d9SSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
871d217d4d9SSepherosa Ziehau struct et_txbuf_data *tbd = &sc->sc_tx_data;
872d217d4d9SSepherosa Ziehau int i, error, rx_done[ET_RX_NRING];
873d217d4d9SSepherosa Ziehau
874d217d4d9SSepherosa Ziehau /*
8750fe5209eSSepherosa Ziehau * Create RX mbuf DMA tag
876d217d4d9SSepherosa Ziehau */
877d217d4d9SSepherosa Ziehau error = bus_dma_tag_create(sc->sc_dtag, 1, 0,
878d217d4d9SSepherosa Ziehau BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
8790fe5209eSSepherosa Ziehau MCLBYTES, 1, MCLBYTES,
8804c749635SSepherosa Ziehau BUS_DMA_ALLOCNOW | BUS_DMA_WAITOK,
8810fe5209eSSepherosa Ziehau &sc->sc_rxbuf_dtag);
882d217d4d9SSepherosa Ziehau if (error) {
8830fe5209eSSepherosa Ziehau device_printf(dev, "can't create RX mbuf DMA tag\n");
884d217d4d9SSepherosa Ziehau return error;
885d217d4d9SSepherosa Ziehau }
886d217d4d9SSepherosa Ziehau
887d217d4d9SSepherosa Ziehau /*
888d217d4d9SSepherosa Ziehau * Create spare DMA map for RX mbufs
889d217d4d9SSepherosa Ziehau */
8900fe5209eSSepherosa Ziehau error = bus_dmamap_create(sc->sc_rxbuf_dtag, BUS_DMA_WAITOK,
8910fe5209eSSepherosa Ziehau &sc->sc_rxbuf_tmp_dmap);
892d217d4d9SSepherosa Ziehau if (error) {
893d217d4d9SSepherosa Ziehau device_printf(dev, "can't create spare mbuf DMA map\n");
8940fe5209eSSepherosa Ziehau bus_dma_tag_destroy(sc->sc_rxbuf_dtag);
8950fe5209eSSepherosa Ziehau sc->sc_rxbuf_dtag = NULL;
896d217d4d9SSepherosa Ziehau return error;
897d217d4d9SSepherosa Ziehau }
898d217d4d9SSepherosa Ziehau
899d217d4d9SSepherosa Ziehau /*
900d217d4d9SSepherosa Ziehau * Create DMA maps for RX mbufs
901d217d4d9SSepherosa Ziehau */
902d217d4d9SSepherosa Ziehau bzero(rx_done, sizeof(rx_done));
903d217d4d9SSepherosa Ziehau for (i = 0; i < ET_RX_NRING; ++i) {
904d217d4d9SSepherosa Ziehau struct et_rxbuf_data *rbd = &sc->sc_rx_data[i];
905d217d4d9SSepherosa Ziehau int j;
906d217d4d9SSepherosa Ziehau
907d217d4d9SSepherosa Ziehau for (j = 0; j < ET_RX_NDESC; ++j) {
9080fe5209eSSepherosa Ziehau error = bus_dmamap_create(sc->sc_rxbuf_dtag,
9094c749635SSepherosa Ziehau BUS_DMA_WAITOK,
910d217d4d9SSepherosa Ziehau &rbd->rbd_buf[j].rb_dmap);
911d217d4d9SSepherosa Ziehau if (error) {
912d217d4d9SSepherosa Ziehau device_printf(dev, "can't create %d RX mbuf "
913d217d4d9SSepherosa Ziehau "for %d RX ring\n", j, i);
914d217d4d9SSepherosa Ziehau rx_done[i] = j;
915d217d4d9SSepherosa Ziehau et_dma_mbuf_destroy(dev, 0, rx_done);
916d217d4d9SSepherosa Ziehau return error;
917d217d4d9SSepherosa Ziehau }
918d217d4d9SSepherosa Ziehau }
919d217d4d9SSepherosa Ziehau rx_done[i] = ET_RX_NDESC;
920d217d4d9SSepherosa Ziehau
921d217d4d9SSepherosa Ziehau rbd->rbd_softc = sc;
922d217d4d9SSepherosa Ziehau rbd->rbd_ring = &sc->sc_rx_ring[i];
923d217d4d9SSepherosa Ziehau }
924d217d4d9SSepherosa Ziehau
925d217d4d9SSepherosa Ziehau /*
9260fe5209eSSepherosa Ziehau * Create TX mbuf DMA tag
9270fe5209eSSepherosa Ziehau */
9280fe5209eSSepherosa Ziehau error = bus_dma_tag_create(sc->sc_dtag, 1, 0,
9290fe5209eSSepherosa Ziehau BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
9300fe5209eSSepherosa Ziehau ET_JUMBO_FRAMELEN, ET_NSEG_MAX, MCLBYTES,
9310fe5209eSSepherosa Ziehau BUS_DMA_ALLOCNOW | BUS_DMA_WAITOK |
9320fe5209eSSepherosa Ziehau BUS_DMA_ONEBPAGE,
9330fe5209eSSepherosa Ziehau &sc->sc_txbuf_dtag);
9340fe5209eSSepherosa Ziehau if (error) {
9350fe5209eSSepherosa Ziehau device_printf(dev, "can't create TX mbuf DMA tag\n");
9360fe5209eSSepherosa Ziehau return error;
9370fe5209eSSepherosa Ziehau }
9380fe5209eSSepherosa Ziehau
9390fe5209eSSepherosa Ziehau /*
940d217d4d9SSepherosa Ziehau * Create DMA maps for TX mbufs
941d217d4d9SSepherosa Ziehau */
942d217d4d9SSepherosa Ziehau for (i = 0; i < ET_TX_NDESC; ++i) {
9430fe5209eSSepherosa Ziehau error = bus_dmamap_create(sc->sc_txbuf_dtag,
9440fe5209eSSepherosa Ziehau BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
945d217d4d9SSepherosa Ziehau &tbd->tbd_buf[i].tb_dmap);
946d217d4d9SSepherosa Ziehau if (error) {
947d217d4d9SSepherosa Ziehau device_printf(dev, "can't create %d TX mbuf "
948d217d4d9SSepherosa Ziehau "DMA map\n", i);
949d217d4d9SSepherosa Ziehau et_dma_mbuf_destroy(dev, i, rx_done);
950d217d4d9SSepherosa Ziehau return error;
951d217d4d9SSepherosa Ziehau }
952d217d4d9SSepherosa Ziehau }
953d217d4d9SSepherosa Ziehau
954d217d4d9SSepherosa Ziehau return 0;
955d217d4d9SSepherosa Ziehau }
956d217d4d9SSepherosa Ziehau
957d217d4d9SSepherosa Ziehau static void
et_dma_mbuf_destroy(device_t dev,int tx_done,const int rx_done[])958d217d4d9SSepherosa Ziehau et_dma_mbuf_destroy(device_t dev, int tx_done, const int rx_done[])
959d217d4d9SSepherosa Ziehau {
960d217d4d9SSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
961d217d4d9SSepherosa Ziehau struct et_txbuf_data *tbd = &sc->sc_tx_data;
962d217d4d9SSepherosa Ziehau int i;
963d217d4d9SSepherosa Ziehau
964d217d4d9SSepherosa Ziehau /*
9650fe5209eSSepherosa Ziehau * Destroy DMA tag and maps for RX mbufs
966d217d4d9SSepherosa Ziehau */
9670fe5209eSSepherosa Ziehau if (sc->sc_rxbuf_dtag) {
968d217d4d9SSepherosa Ziehau for (i = 0; i < ET_RX_NRING; ++i) {
969d217d4d9SSepherosa Ziehau struct et_rxbuf_data *rbd = &sc->sc_rx_data[i];
970d217d4d9SSepherosa Ziehau int j;
971d217d4d9SSepherosa Ziehau
972d217d4d9SSepherosa Ziehau for (j = 0; j < rx_done[i]; ++j) {
973d217d4d9SSepherosa Ziehau struct et_rxbuf *rb = &rbd->rbd_buf[j];
974d217d4d9SSepherosa Ziehau
975d217d4d9SSepherosa Ziehau KASSERT(rb->rb_mbuf == NULL,
9760fe5209eSSepherosa Ziehau ("RX mbuf in %d RX ring is "
977ed20d0e3SSascha Wildner "not freed yet", i));
9780fe5209eSSepherosa Ziehau bus_dmamap_destroy(sc->sc_rxbuf_dtag,
9790fe5209eSSepherosa Ziehau rb->rb_dmap);
980d217d4d9SSepherosa Ziehau }
981d217d4d9SSepherosa Ziehau }
9820fe5209eSSepherosa Ziehau bus_dmamap_destroy(sc->sc_rxbuf_dtag, sc->sc_rxbuf_tmp_dmap);
9830fe5209eSSepherosa Ziehau bus_dma_tag_destroy(sc->sc_rxbuf_dtag);
9840fe5209eSSepherosa Ziehau sc->sc_rxbuf_dtag = NULL;
9850fe5209eSSepherosa Ziehau }
986d217d4d9SSepherosa Ziehau
987d217d4d9SSepherosa Ziehau /*
9880fe5209eSSepherosa Ziehau * Destroy DMA tag and maps for TX mbufs
989d217d4d9SSepherosa Ziehau */
9900fe5209eSSepherosa Ziehau if (sc->sc_txbuf_dtag) {
991d217d4d9SSepherosa Ziehau for (i = 0; i < tx_done; ++i) {
992d217d4d9SSepherosa Ziehau struct et_txbuf *tb = &tbd->tbd_buf[i];
993d217d4d9SSepherosa Ziehau
9940fe5209eSSepherosa Ziehau KASSERT(tb->tb_mbuf == NULL,
995ed20d0e3SSascha Wildner ("TX mbuf is not freed yet"));
9960fe5209eSSepherosa Ziehau bus_dmamap_destroy(sc->sc_txbuf_dtag, tb->tb_dmap);
997d217d4d9SSepherosa Ziehau }
9980fe5209eSSepherosa Ziehau bus_dma_tag_destroy(sc->sc_txbuf_dtag);
9990fe5209eSSepherosa Ziehau sc->sc_txbuf_dtag = NULL;
10000fe5209eSSepherosa Ziehau }
1001d217d4d9SSepherosa Ziehau }
1002d217d4d9SSepherosa Ziehau
1003d217d4d9SSepherosa Ziehau static void
et_dma_mem_destroy(bus_dma_tag_t dtag,void * addr,bus_dmamap_t dmap)1004d217d4d9SSepherosa Ziehau et_dma_mem_destroy(bus_dma_tag_t dtag, void *addr, bus_dmamap_t dmap)
1005d217d4d9SSepherosa Ziehau {
1006d217d4d9SSepherosa Ziehau if (dtag != NULL) {
1007d217d4d9SSepherosa Ziehau bus_dmamap_unload(dtag, dmap);
1008d217d4d9SSepherosa Ziehau bus_dmamem_free(dtag, addr, dmap);
1009d217d4d9SSepherosa Ziehau bus_dma_tag_destroy(dtag);
1010d217d4d9SSepherosa Ziehau }
1011d217d4d9SSepherosa Ziehau }
1012d217d4d9SSepherosa Ziehau
1013d217d4d9SSepherosa Ziehau static void
et_chip_attach(struct et_softc * sc)1014d217d4d9SSepherosa Ziehau et_chip_attach(struct et_softc *sc)
1015d217d4d9SSepherosa Ziehau {
1016d217d4d9SSepherosa Ziehau uint32_t val;
1017d217d4d9SSepherosa Ziehau
1018d217d4d9SSepherosa Ziehau /*
1019d217d4d9SSepherosa Ziehau * Perform minimal initialization
1020d217d4d9SSepherosa Ziehau */
1021d217d4d9SSepherosa Ziehau
1022d217d4d9SSepherosa Ziehau /* Disable loopback */
1023d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_LOOPBACK, 0);
1024d217d4d9SSepherosa Ziehau
1025d217d4d9SSepherosa Ziehau /* Reset MAC */
1026d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CFG1,
1027d217d4d9SSepherosa Ziehau ET_MAC_CFG1_RST_TXFUNC | ET_MAC_CFG1_RST_RXFUNC |
1028d217d4d9SSepherosa Ziehau ET_MAC_CFG1_RST_TXMC | ET_MAC_CFG1_RST_RXMC |
1029d217d4d9SSepherosa Ziehau ET_MAC_CFG1_SIM_RST | ET_MAC_CFG1_SOFT_RST);
1030d217d4d9SSepherosa Ziehau
1031d217d4d9SSepherosa Ziehau /*
1032d217d4d9SSepherosa Ziehau * Setup half duplex mode
1033d217d4d9SSepherosa Ziehau */
1034d217d4d9SSepherosa Ziehau val = __SHIFTIN(10, ET_MAC_HDX_ALT_BEB_TRUNC) |
1035d217d4d9SSepherosa Ziehau __SHIFTIN(15, ET_MAC_HDX_REXMIT_MAX) |
1036d217d4d9SSepherosa Ziehau __SHIFTIN(55, ET_MAC_HDX_COLLWIN) |
1037d217d4d9SSepherosa Ziehau ET_MAC_HDX_EXC_DEFER;
1038d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_HDX, val);
1039d217d4d9SSepherosa Ziehau
1040d217d4d9SSepherosa Ziehau /* Clear MAC control */
1041d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CTRL, 0);
1042d217d4d9SSepherosa Ziehau
1043d217d4d9SSepherosa Ziehau /* Reset MII */
1044d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_CFG, ET_MII_CFG_CLKRST);
1045d217d4d9SSepherosa Ziehau
1046d217d4d9SSepherosa Ziehau /* Bring MAC out of reset state */
1047d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CFG1, 0);
1048d217d4d9SSepherosa Ziehau
1049d217d4d9SSepherosa Ziehau /* Enable memory controllers */
1050d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MMC_CTRL, ET_MMC_CTRL_ENABLE);
1051d217d4d9SSepherosa Ziehau }
1052d217d4d9SSepherosa Ziehau
1053d217d4d9SSepherosa Ziehau static void
et_intr(void * xsc)1054d217d4d9SSepherosa Ziehau et_intr(void *xsc)
1055d217d4d9SSepherosa Ziehau {
1056d217d4d9SSepherosa Ziehau struct et_softc *sc = xsc;
1057d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
1058d217d4d9SSepherosa Ziehau uint32_t intrs;
1059d217d4d9SSepherosa Ziehau
1060d217d4d9SSepherosa Ziehau ASSERT_SERIALIZED(ifp->if_serializer);
1061d217d4d9SSepherosa Ziehau
1062d217d4d9SSepherosa Ziehau if ((ifp->if_flags & IFF_RUNNING) == 0)
1063d217d4d9SSepherosa Ziehau return;
1064d217d4d9SSepherosa Ziehau
1065d217d4d9SSepherosa Ziehau et_disable_intrs(sc);
1066d217d4d9SSepherosa Ziehau
1067d217d4d9SSepherosa Ziehau intrs = CSR_READ_4(sc, ET_INTR_STATUS);
1068d217d4d9SSepherosa Ziehau intrs &= ET_INTRS;
1069d217d4d9SSepherosa Ziehau if (intrs == 0) /* Not interested */
1070d217d4d9SSepherosa Ziehau goto back;
1071d217d4d9SSepherosa Ziehau
1072d217d4d9SSepherosa Ziehau if (intrs & ET_INTR_RXEOF)
1073d217d4d9SSepherosa Ziehau et_rxeof(sc);
1074d217d4d9SSepherosa Ziehau if (intrs & (ET_INTR_TXEOF | ET_INTR_TIMER))
1075136e59ffSSepherosa Ziehau et_txeof(sc, 1);
1076d217d4d9SSepherosa Ziehau if (intrs & ET_INTR_TIMER)
1077d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TIMER, sc->sc_timer);
1078d217d4d9SSepherosa Ziehau back:
1079d217d4d9SSepherosa Ziehau et_enable_intrs(sc, ET_INTRS);
1080d217d4d9SSepherosa Ziehau }
1081d217d4d9SSepherosa Ziehau
1082d217d4d9SSepherosa Ziehau static void
et_init(void * xsc)1083d217d4d9SSepherosa Ziehau et_init(void *xsc)
1084d217d4d9SSepherosa Ziehau {
1085d217d4d9SSepherosa Ziehau struct et_softc *sc = xsc;
1086d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
1087d217d4d9SSepherosa Ziehau const struct et_bsize *arr;
1088d217d4d9SSepherosa Ziehau int error, i;
1089d217d4d9SSepherosa Ziehau
1090d217d4d9SSepherosa Ziehau ASSERT_SERIALIZED(ifp->if_serializer);
1091d217d4d9SSepherosa Ziehau
1092d217d4d9SSepherosa Ziehau et_stop(sc);
1093d217d4d9SSepherosa Ziehau
10943effc1bfSSepherosa Ziehau arr = ET_FRAMELEN(ifp->if_mtu) < MCLBYTES ?
10953effc1bfSSepherosa Ziehau et_bufsize_std : et_bufsize_jumbo;
1096d217d4d9SSepherosa Ziehau for (i = 0; i < ET_RX_NRING; ++i) {
1097d217d4d9SSepherosa Ziehau sc->sc_rx_data[i].rbd_bufsize = arr[i].bufsize;
1098d217d4d9SSepherosa Ziehau sc->sc_rx_data[i].rbd_newbuf = arr[i].newbuf;
10993effc1bfSSepherosa Ziehau sc->sc_rx_data[i].rbd_jumbo = arr[i].jumbo;
1100d217d4d9SSepherosa Ziehau }
1101d217d4d9SSepherosa Ziehau
1102d217d4d9SSepherosa Ziehau error = et_init_tx_ring(sc);
1103d217d4d9SSepherosa Ziehau if (error)
1104d217d4d9SSepherosa Ziehau goto back;
1105d217d4d9SSepherosa Ziehau
1106d217d4d9SSepherosa Ziehau error = et_init_rx_ring(sc);
1107d217d4d9SSepherosa Ziehau if (error)
1108d217d4d9SSepherosa Ziehau goto back;
1109d217d4d9SSepherosa Ziehau
1110d217d4d9SSepherosa Ziehau error = et_chip_init(sc);
1111d217d4d9SSepherosa Ziehau if (error)
1112d217d4d9SSepherosa Ziehau goto back;
1113d217d4d9SSepherosa Ziehau
111460d2de1fSSepherosa Ziehau error = et_enable_txrx(sc, 1);
1115d217d4d9SSepherosa Ziehau if (error)
1116d217d4d9SSepherosa Ziehau goto back;
1117d217d4d9SSepherosa Ziehau
1118d217d4d9SSepherosa Ziehau et_enable_intrs(sc, ET_INTRS);
1119d217d4d9SSepherosa Ziehau
1120d217d4d9SSepherosa Ziehau callout_reset(&sc->sc_tick, hz, et_tick, sc);
1121d217d4d9SSepherosa Ziehau
1122d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TIMER, sc->sc_timer);
1123d217d4d9SSepherosa Ziehau
1124d217d4d9SSepherosa Ziehau ifp->if_flags |= IFF_RUNNING;
11259ed293e0SSepherosa Ziehau ifq_clr_oactive(&ifp->if_snd);
1126d217d4d9SSepherosa Ziehau back:
1127d217d4d9SSepherosa Ziehau if (error)
1128d217d4d9SSepherosa Ziehau et_stop(sc);
1129d217d4d9SSepherosa Ziehau }
1130d217d4d9SSepherosa Ziehau
1131d217d4d9SSepherosa Ziehau static int
et_ioctl(struct ifnet * ifp,u_long cmd,caddr_t data,struct ucred * cr)1132d217d4d9SSepherosa Ziehau et_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1133d217d4d9SSepherosa Ziehau {
1134d217d4d9SSepherosa Ziehau struct et_softc *sc = ifp->if_softc;
1135d217d4d9SSepherosa Ziehau struct mii_data *mii = device_get_softc(sc->sc_miibus);
1136d217d4d9SSepherosa Ziehau struct ifreq *ifr = (struct ifreq *)data;
11373effc1bfSSepherosa Ziehau int error = 0, max_framelen;
1138d217d4d9SSepherosa Ziehau
1139d217d4d9SSepherosa Ziehau ASSERT_SERIALIZED(ifp->if_serializer);
1140d217d4d9SSepherosa Ziehau
1141d217d4d9SSepherosa Ziehau switch (cmd) {
1142d217d4d9SSepherosa Ziehau case SIOCSIFFLAGS:
1143d217d4d9SSepherosa Ziehau if (ifp->if_flags & IFF_UP) {
1144d217d4d9SSepherosa Ziehau if (ifp->if_flags & IFF_RUNNING) {
1145d217d4d9SSepherosa Ziehau if ((ifp->if_flags ^ sc->sc_if_flags) &
11465a5f28f3SSepherosa Ziehau (IFF_ALLMULTI | IFF_PROMISC))
1147d217d4d9SSepherosa Ziehau et_setmulti(sc);
1148d217d4d9SSepherosa Ziehau } else {
1149d217d4d9SSepherosa Ziehau et_init(sc);
1150d217d4d9SSepherosa Ziehau }
1151d217d4d9SSepherosa Ziehau } else {
1152d217d4d9SSepherosa Ziehau if (ifp->if_flags & IFF_RUNNING)
1153d217d4d9SSepherosa Ziehau et_stop(sc);
1154d217d4d9SSepherosa Ziehau }
1155d217d4d9SSepherosa Ziehau sc->sc_if_flags = ifp->if_flags;
1156d217d4d9SSepherosa Ziehau break;
1157d217d4d9SSepherosa Ziehau
1158d217d4d9SSepherosa Ziehau case SIOCSIFMEDIA:
1159d217d4d9SSepherosa Ziehau case SIOCGIFMEDIA:
1160d217d4d9SSepherosa Ziehau error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, cmd);
1161d217d4d9SSepherosa Ziehau break;
1162d217d4d9SSepherosa Ziehau
1163d217d4d9SSepherosa Ziehau case SIOCADDMULTI:
1164d217d4d9SSepherosa Ziehau case SIOCDELMULTI:
1165d217d4d9SSepherosa Ziehau if (ifp->if_flags & IFF_RUNNING)
1166d217d4d9SSepherosa Ziehau et_setmulti(sc);
1167d217d4d9SSepherosa Ziehau break;
1168d217d4d9SSepherosa Ziehau
1169d217d4d9SSepherosa Ziehau case SIOCSIFMTU:
11703effc1bfSSepherosa Ziehau if (sc->sc_flags & ET_FLAG_JUMBO)
11713effc1bfSSepherosa Ziehau max_framelen = ET_JUMBO_FRAMELEN;
11723effc1bfSSepherosa Ziehau else
11733effc1bfSSepherosa Ziehau max_framelen = MCLBYTES - 1;
11743effc1bfSSepherosa Ziehau
11753effc1bfSSepherosa Ziehau if (ET_FRAMELEN(ifr->ifr_mtu) > max_framelen) {
1176d217d4d9SSepherosa Ziehau error = EOPNOTSUPP;
1177d217d4d9SSepherosa Ziehau break;
11780fd7469eSSepherosa Ziehau }
11790fd7469eSSepherosa Ziehau
11800fd7469eSSepherosa Ziehau ifp->if_mtu = ifr->ifr_mtu;
11810fd7469eSSepherosa Ziehau if (ifp->if_flags & IFF_RUNNING)
11820fd7469eSSepherosa Ziehau et_init(sc);
11830fd7469eSSepherosa Ziehau break;
1184d217d4d9SSepherosa Ziehau
1185d217d4d9SSepherosa Ziehau default:
1186d217d4d9SSepherosa Ziehau error = ether_ioctl(ifp, cmd, data);
1187d217d4d9SSepherosa Ziehau break;
1188d217d4d9SSepherosa Ziehau }
1189d217d4d9SSepherosa Ziehau return error;
1190d217d4d9SSepherosa Ziehau }
1191d217d4d9SSepherosa Ziehau
1192d217d4d9SSepherosa Ziehau static void
et_start(struct ifnet * ifp,struct ifaltq_subque * ifsq)1193f0a26983SSepherosa Ziehau et_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
1194d217d4d9SSepherosa Ziehau {
1195d217d4d9SSepherosa Ziehau struct et_softc *sc = ifp->if_softc;
1196d217d4d9SSepherosa Ziehau struct et_txbuf_data *tbd = &sc->sc_tx_data;
1197136e59ffSSepherosa Ziehau int trans, oactive;
1198d217d4d9SSepherosa Ziehau
1199f0a26983SSepherosa Ziehau ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1200d217d4d9SSepherosa Ziehau ASSERT_SERIALIZED(ifp->if_serializer);
1201d217d4d9SSepherosa Ziehau
12029db4b353SSepherosa Ziehau if ((sc->sc_flags & ET_FLAG_TXRX_ENABLED) == 0) {
12039db4b353SSepherosa Ziehau ifq_purge(&ifp->if_snd);
120460d2de1fSSepherosa Ziehau return;
12059db4b353SSepherosa Ziehau }
120660d2de1fSSepherosa Ziehau
12079ed293e0SSepherosa Ziehau if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
1208d217d4d9SSepherosa Ziehau return;
1209d217d4d9SSepherosa Ziehau
1210136e59ffSSepherosa Ziehau oactive = 0;
1211d217d4d9SSepherosa Ziehau trans = 0;
1212d217d4d9SSepherosa Ziehau for (;;) {
1213d217d4d9SSepherosa Ziehau struct mbuf *m;
1214136e59ffSSepherosa Ziehau int error;
1215d217d4d9SSepherosa Ziehau
1216d217d4d9SSepherosa Ziehau if ((tbd->tbd_used + ET_NSEG_SPARE) > ET_TX_NDESC) {
1217136e59ffSSepherosa Ziehau if (oactive) {
12189ed293e0SSepherosa Ziehau ifq_set_oactive(&ifp->if_snd);
1219d217d4d9SSepherosa Ziehau break;
1220d217d4d9SSepherosa Ziehau }
1221d217d4d9SSepherosa Ziehau
1222136e59ffSSepherosa Ziehau et_txeof(sc, 0);
1223136e59ffSSepherosa Ziehau oactive = 1;
1224136e59ffSSepherosa Ziehau continue;
1225136e59ffSSepherosa Ziehau }
1226136e59ffSSepherosa Ziehau
1227ac9843a1SSepherosa Ziehau m = ifq_dequeue(&ifp->if_snd);
1228d217d4d9SSepherosa Ziehau if (m == NULL)
1229d217d4d9SSepherosa Ziehau break;
1230d217d4d9SSepherosa Ziehau
1231136e59ffSSepherosa Ziehau error = et_encap(sc, &m);
1232136e59ffSSepherosa Ziehau if (error) {
1233d40991efSSepherosa Ziehau IFNET_STAT_INC(ifp, oerrors, 1);
1234136e59ffSSepherosa Ziehau KKASSERT(m == NULL);
1235136e59ffSSepherosa Ziehau
1236136e59ffSSepherosa Ziehau if (error == EFBIG) {
1237136e59ffSSepherosa Ziehau /*
1238136e59ffSSepherosa Ziehau * Excessive fragmented packets
1239136e59ffSSepherosa Ziehau */
1240136e59ffSSepherosa Ziehau if (oactive) {
12419ed293e0SSepherosa Ziehau ifq_set_oactive(&ifp->if_snd);
1242d217d4d9SSepherosa Ziehau break;
1243d217d4d9SSepherosa Ziehau }
1244136e59ffSSepherosa Ziehau et_txeof(sc, 0);
1245136e59ffSSepherosa Ziehau oactive = 1;
1246136e59ffSSepherosa Ziehau }
1247136e59ffSSepherosa Ziehau continue;
1248136e59ffSSepherosa Ziehau } else {
1249136e59ffSSepherosa Ziehau oactive = 0;
1250136e59ffSSepherosa Ziehau }
1251d217d4d9SSepherosa Ziehau trans = 1;
1252d217d4d9SSepherosa Ziehau
1253d217d4d9SSepherosa Ziehau BPF_MTAP(ifp, m);
1254d217d4d9SSepherosa Ziehau }
1255d217d4d9SSepherosa Ziehau
1256d217d4d9SSepherosa Ziehau if (trans)
1257d217d4d9SSepherosa Ziehau ifp->if_timer = 5;
1258d217d4d9SSepherosa Ziehau }
1259d217d4d9SSepherosa Ziehau
1260d217d4d9SSepherosa Ziehau static void
et_watchdog(struct ifnet * ifp)1261d217d4d9SSepherosa Ziehau et_watchdog(struct ifnet *ifp)
1262d217d4d9SSepherosa Ziehau {
1263d217d4d9SSepherosa Ziehau ASSERT_SERIALIZED(ifp->if_serializer);
1264d217d4d9SSepherosa Ziehau
1265d217d4d9SSepherosa Ziehau if_printf(ifp, "watchdog timed out\n");
1266d217d4d9SSepherosa Ziehau
1267d217d4d9SSepherosa Ziehau ifp->if_init(ifp->if_softc);
12689db4b353SSepherosa Ziehau if_devstart(ifp);
1269d217d4d9SSepherosa Ziehau }
1270d217d4d9SSepherosa Ziehau
1271d217d4d9SSepherosa Ziehau static int
et_stop_rxdma(struct et_softc * sc)1272d217d4d9SSepherosa Ziehau et_stop_rxdma(struct et_softc *sc)
1273d217d4d9SSepherosa Ziehau {
1274d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXDMA_CTRL,
1275d217d4d9SSepherosa Ziehau ET_RXDMA_CTRL_HALT | ET_RXDMA_CTRL_RING1_ENABLE);
1276d217d4d9SSepherosa Ziehau
1277d217d4d9SSepherosa Ziehau DELAY(5);
1278d217d4d9SSepherosa Ziehau if ((CSR_READ_4(sc, ET_RXDMA_CTRL) & ET_RXDMA_CTRL_HALTED) == 0) {
1279d217d4d9SSepherosa Ziehau if_printf(&sc->arpcom.ac_if, "can't stop RX DMA engine\n");
1280d217d4d9SSepherosa Ziehau return ETIMEDOUT;
1281d217d4d9SSepherosa Ziehau }
1282d217d4d9SSepherosa Ziehau return 0;
1283d217d4d9SSepherosa Ziehau }
1284d217d4d9SSepherosa Ziehau
1285d217d4d9SSepherosa Ziehau static int
et_stop_txdma(struct et_softc * sc)1286d217d4d9SSepherosa Ziehau et_stop_txdma(struct et_softc *sc)
1287d217d4d9SSepherosa Ziehau {
1288d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TXDMA_CTRL,
1289d217d4d9SSepherosa Ziehau ET_TXDMA_CTRL_HALT | ET_TXDMA_CTRL_SINGLE_EPKT);
1290d217d4d9SSepherosa Ziehau return 0;
1291d217d4d9SSepherosa Ziehau }
1292d217d4d9SSepherosa Ziehau
1293d217d4d9SSepherosa Ziehau static void
et_free_tx_ring(struct et_softc * sc)1294d217d4d9SSepherosa Ziehau et_free_tx_ring(struct et_softc *sc)
1295d217d4d9SSepherosa Ziehau {
1296d217d4d9SSepherosa Ziehau struct et_txbuf_data *tbd = &sc->sc_tx_data;
1297d217d4d9SSepherosa Ziehau struct et_txdesc_ring *tx_ring = &sc->sc_tx_ring;
1298d217d4d9SSepherosa Ziehau int i;
1299d217d4d9SSepherosa Ziehau
1300d217d4d9SSepherosa Ziehau for (i = 0; i < ET_TX_NDESC; ++i) {
1301d217d4d9SSepherosa Ziehau struct et_txbuf *tb = &tbd->tbd_buf[i];
1302d217d4d9SSepherosa Ziehau
1303d217d4d9SSepherosa Ziehau if (tb->tb_mbuf != NULL) {
13040fe5209eSSepherosa Ziehau bus_dmamap_unload(sc->sc_txbuf_dtag, tb->tb_dmap);
1305d217d4d9SSepherosa Ziehau m_freem(tb->tb_mbuf);
1306d217d4d9SSepherosa Ziehau tb->tb_mbuf = NULL;
1307d217d4d9SSepherosa Ziehau }
1308d217d4d9SSepherosa Ziehau }
1309d217d4d9SSepherosa Ziehau bzero(tx_ring->tr_desc, ET_TX_RING_SIZE);
1310d217d4d9SSepherosa Ziehau }
1311d217d4d9SSepherosa Ziehau
1312d217d4d9SSepherosa Ziehau static void
et_free_rx_ring(struct et_softc * sc)1313d217d4d9SSepherosa Ziehau et_free_rx_ring(struct et_softc *sc)
1314d217d4d9SSepherosa Ziehau {
1315d217d4d9SSepherosa Ziehau int n;
1316d217d4d9SSepherosa Ziehau
1317d217d4d9SSepherosa Ziehau for (n = 0; n < ET_RX_NRING; ++n) {
1318d217d4d9SSepherosa Ziehau struct et_rxbuf_data *rbd = &sc->sc_rx_data[n];
1319d217d4d9SSepherosa Ziehau struct et_rxdesc_ring *rx_ring = &sc->sc_rx_ring[n];
1320d217d4d9SSepherosa Ziehau int i;
1321d217d4d9SSepherosa Ziehau
1322d217d4d9SSepherosa Ziehau for (i = 0; i < ET_RX_NDESC; ++i) {
1323d217d4d9SSepherosa Ziehau struct et_rxbuf *rb = &rbd->rbd_buf[i];
1324d217d4d9SSepherosa Ziehau
1325d217d4d9SSepherosa Ziehau if (rb->rb_mbuf != NULL) {
13263effc1bfSSepherosa Ziehau if (!rbd->rbd_jumbo) {
13270fe5209eSSepherosa Ziehau bus_dmamap_unload(sc->sc_rxbuf_dtag,
1328d217d4d9SSepherosa Ziehau rb->rb_dmap);
13293effc1bfSSepherosa Ziehau }
1330d217d4d9SSepherosa Ziehau m_freem(rb->rb_mbuf);
1331d217d4d9SSepherosa Ziehau rb->rb_mbuf = NULL;
1332d217d4d9SSepherosa Ziehau }
1333d217d4d9SSepherosa Ziehau }
1334d217d4d9SSepherosa Ziehau bzero(rx_ring->rr_desc, ET_RX_RING_SIZE);
1335d217d4d9SSepherosa Ziehau }
1336d217d4d9SSepherosa Ziehau }
1337d217d4d9SSepherosa Ziehau
1338d217d4d9SSepherosa Ziehau static void
et_setmulti(struct et_softc * sc)1339d217d4d9SSepherosa Ziehau et_setmulti(struct et_softc *sc)
1340d217d4d9SSepherosa Ziehau {
1341d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
1342d217d4d9SSepherosa Ziehau uint32_t hash[4] = { 0, 0, 0, 0 };
1343d217d4d9SSepherosa Ziehau uint32_t rxmac_ctrl, pktfilt;
1344d217d4d9SSepherosa Ziehau struct ifmultiaddr *ifma;
1345d217d4d9SSepherosa Ziehau int i, count;
1346d217d4d9SSepherosa Ziehau
1347d217d4d9SSepherosa Ziehau pktfilt = CSR_READ_4(sc, ET_PKTFILT);
1348d217d4d9SSepherosa Ziehau rxmac_ctrl = CSR_READ_4(sc, ET_RXMAC_CTRL);
1349d217d4d9SSepherosa Ziehau
1350d217d4d9SSepherosa Ziehau pktfilt &= ~(ET_PKTFILT_BCAST | ET_PKTFILT_MCAST | ET_PKTFILT_UCAST);
1351d217d4d9SSepherosa Ziehau if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) {
1352d217d4d9SSepherosa Ziehau rxmac_ctrl |= ET_RXMAC_CTRL_NO_PKTFILT;
1353d217d4d9SSepherosa Ziehau goto back;
1354d217d4d9SSepherosa Ziehau }
1355d217d4d9SSepherosa Ziehau
1356d217d4d9SSepherosa Ziehau count = 0;
1357441d34b2SSascha Wildner TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1358d217d4d9SSepherosa Ziehau uint32_t *hp, h;
1359d217d4d9SSepherosa Ziehau
1360d217d4d9SSepherosa Ziehau if (ifma->ifma_addr->sa_family != AF_LINK)
1361d217d4d9SSepherosa Ziehau continue;
1362d217d4d9SSepherosa Ziehau
1363d217d4d9SSepherosa Ziehau h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
1364d217d4d9SSepherosa Ziehau ifma->ifma_addr), ETHER_ADDR_LEN);
1365d217d4d9SSepherosa Ziehau h = (h & 0x3f800000) >> 23;
1366d217d4d9SSepherosa Ziehau
1367d217d4d9SSepherosa Ziehau hp = &hash[0];
1368d217d4d9SSepherosa Ziehau if (h >= 32 && h < 64) {
1369d217d4d9SSepherosa Ziehau h -= 32;
1370d217d4d9SSepherosa Ziehau hp = &hash[1];
1371d217d4d9SSepherosa Ziehau } else if (h >= 64 && h < 96) {
1372d217d4d9SSepherosa Ziehau h -= 64;
1373d217d4d9SSepherosa Ziehau hp = &hash[2];
1374d217d4d9SSepherosa Ziehau } else if (h >= 96) {
1375d217d4d9SSepherosa Ziehau h -= 96;
1376d217d4d9SSepherosa Ziehau hp = &hash[3];
1377d217d4d9SSepherosa Ziehau }
1378d217d4d9SSepherosa Ziehau *hp |= (1 << h);
1379d217d4d9SSepherosa Ziehau
1380d217d4d9SSepherosa Ziehau ++count;
1381d217d4d9SSepherosa Ziehau }
1382d217d4d9SSepherosa Ziehau
1383d217d4d9SSepherosa Ziehau for (i = 0; i < 4; ++i)
1384d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MULTI_HASH + (i * 4), hash[i]);
1385d217d4d9SSepherosa Ziehau
1386d217d4d9SSepherosa Ziehau if (count > 0)
1387d217d4d9SSepherosa Ziehau pktfilt |= ET_PKTFILT_MCAST;
1388d217d4d9SSepherosa Ziehau rxmac_ctrl &= ~ET_RXMAC_CTRL_NO_PKTFILT;
1389d217d4d9SSepherosa Ziehau back:
1390d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_PKTFILT, pktfilt);
1391d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXMAC_CTRL, rxmac_ctrl);
1392d217d4d9SSepherosa Ziehau }
1393d217d4d9SSepherosa Ziehau
1394d217d4d9SSepherosa Ziehau static int
et_chip_init(struct et_softc * sc)1395d217d4d9SSepherosa Ziehau et_chip_init(struct et_softc *sc)
1396d217d4d9SSepherosa Ziehau {
1397d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
1398d217d4d9SSepherosa Ziehau uint32_t rxq_end;
13993effc1bfSSepherosa Ziehau int error, frame_len, rxmem_size;
1400d217d4d9SSepherosa Ziehau
1401d217d4d9SSepherosa Ziehau /*
14023effc1bfSSepherosa Ziehau * Split 16Kbytes internal memory between TX and RX
14033effc1bfSSepherosa Ziehau * according to frame length.
1404d217d4d9SSepherosa Ziehau */
14053effc1bfSSepherosa Ziehau frame_len = ET_FRAMELEN(ifp->if_mtu);
14063effc1bfSSepherosa Ziehau if (frame_len < 2048) {
14073effc1bfSSepherosa Ziehau rxmem_size = ET_MEM_RXSIZE_DEFAULT;
14083effc1bfSSepherosa Ziehau } else if (frame_len <= ET_RXMAC_CUT_THRU_FRMLEN) {
14093effc1bfSSepherosa Ziehau rxmem_size = ET_MEM_SIZE / 2;
14103effc1bfSSepherosa Ziehau } else {
14113effc1bfSSepherosa Ziehau rxmem_size = ET_MEM_SIZE -
14123effc1bfSSepherosa Ziehau roundup(frame_len + ET_MEM_TXSIZE_EX, ET_MEM_UNIT);
14133effc1bfSSepherosa Ziehau }
14143effc1bfSSepherosa Ziehau rxq_end = ET_QUEUE_ADDR(rxmem_size);
14153effc1bfSSepherosa Ziehau
14163effc1bfSSepherosa Ziehau CSR_WRITE_4(sc, ET_RXQUEUE_START, ET_QUEUE_ADDR_START);
14173effc1bfSSepherosa Ziehau CSR_WRITE_4(sc, ET_RXQUEUE_END, rxq_end);
14183effc1bfSSepherosa Ziehau CSR_WRITE_4(sc, ET_TXQUEUE_START, rxq_end + 1);
14193effc1bfSSepherosa Ziehau CSR_WRITE_4(sc, ET_TXQUEUE_END, ET_QUEUE_ADDR_END);
1420d217d4d9SSepherosa Ziehau
1421d217d4d9SSepherosa Ziehau /* No loopback */
1422d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_LOOPBACK, 0);
1423d217d4d9SSepherosa Ziehau
1424d217d4d9SSepherosa Ziehau /* Clear MSI configure */
1425d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MSI_CFG, 0);
1426d217d4d9SSepherosa Ziehau
1427d217d4d9SSepherosa Ziehau /* Disable timer */
1428d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TIMER, 0);
1429d217d4d9SSepherosa Ziehau
1430d217d4d9SSepherosa Ziehau /* Initialize MAC */
1431d217d4d9SSepherosa Ziehau et_init_mac(sc);
1432d217d4d9SSepherosa Ziehau
1433d217d4d9SSepherosa Ziehau /* Enable memory controllers */
1434d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MMC_CTRL, ET_MMC_CTRL_ENABLE);
1435d217d4d9SSepherosa Ziehau
1436d217d4d9SSepherosa Ziehau /* Initialize RX MAC */
1437d217d4d9SSepherosa Ziehau et_init_rxmac(sc);
1438d217d4d9SSepherosa Ziehau
1439d217d4d9SSepherosa Ziehau /* Initialize TX MAC */
1440d217d4d9SSepherosa Ziehau et_init_txmac(sc);
1441d217d4d9SSepherosa Ziehau
1442d217d4d9SSepherosa Ziehau /* Initialize RX DMA engine */
1443d217d4d9SSepherosa Ziehau error = et_init_rxdma(sc);
1444d217d4d9SSepherosa Ziehau if (error)
1445d217d4d9SSepherosa Ziehau return error;
1446d217d4d9SSepherosa Ziehau
1447d217d4d9SSepherosa Ziehau /* Initialize TX DMA engine */
1448d217d4d9SSepherosa Ziehau error = et_init_txdma(sc);
1449d217d4d9SSepherosa Ziehau if (error)
1450d217d4d9SSepherosa Ziehau return error;
1451d217d4d9SSepherosa Ziehau
1452d217d4d9SSepherosa Ziehau return 0;
1453d217d4d9SSepherosa Ziehau }
1454d217d4d9SSepherosa Ziehau
1455d217d4d9SSepherosa Ziehau static int
et_init_tx_ring(struct et_softc * sc)1456d217d4d9SSepherosa Ziehau et_init_tx_ring(struct et_softc *sc)
1457d217d4d9SSepherosa Ziehau {
1458d217d4d9SSepherosa Ziehau struct et_txdesc_ring *tx_ring = &sc->sc_tx_ring;
1459d217d4d9SSepherosa Ziehau struct et_txstatus_data *txsd = &sc->sc_tx_status;
1460d217d4d9SSepherosa Ziehau struct et_txbuf_data *tbd = &sc->sc_tx_data;
1461d217d4d9SSepherosa Ziehau
1462d217d4d9SSepherosa Ziehau bzero(tx_ring->tr_desc, ET_TX_RING_SIZE);
1463d217d4d9SSepherosa Ziehau
1464d217d4d9SSepherosa Ziehau tbd->tbd_start_index = 0;
1465d217d4d9SSepherosa Ziehau tbd->tbd_start_wrap = 0;
1466d217d4d9SSepherosa Ziehau tbd->tbd_used = 0;
1467d217d4d9SSepherosa Ziehau
1468d217d4d9SSepherosa Ziehau bzero(txsd->txsd_status, sizeof(uint32_t));
1469c2ebe33eSSepherosa Ziehau
1470d217d4d9SSepherosa Ziehau return 0;
1471d217d4d9SSepherosa Ziehau }
1472d217d4d9SSepherosa Ziehau
1473d217d4d9SSepherosa Ziehau static int
et_init_rx_ring(struct et_softc * sc)1474d217d4d9SSepherosa Ziehau et_init_rx_ring(struct et_softc *sc)
1475d217d4d9SSepherosa Ziehau {
1476d217d4d9SSepherosa Ziehau struct et_rxstatus_data *rxsd = &sc->sc_rx_status;
1477d217d4d9SSepherosa Ziehau struct et_rxstat_ring *rxst_ring = &sc->sc_rxstat_ring;
1478d217d4d9SSepherosa Ziehau int n;
1479d217d4d9SSepherosa Ziehau
1480d217d4d9SSepherosa Ziehau for (n = 0; n < ET_RX_NRING; ++n) {
1481d217d4d9SSepherosa Ziehau struct et_rxbuf_data *rbd = &sc->sc_rx_data[n];
1482d217d4d9SSepherosa Ziehau int i, error;
1483d217d4d9SSepherosa Ziehau
1484d217d4d9SSepherosa Ziehau for (i = 0; i < ET_RX_NDESC; ++i) {
1485d217d4d9SSepherosa Ziehau error = rbd->rbd_newbuf(rbd, i, 1);
1486d217d4d9SSepherosa Ziehau if (error) {
1487d217d4d9SSepherosa Ziehau if_printf(&sc->arpcom.ac_if, "%d ring %d buf, "
1488d217d4d9SSepherosa Ziehau "newbuf failed: %d\n", n, i, error);
1489d217d4d9SSepherosa Ziehau return error;
1490d217d4d9SSepherosa Ziehau }
1491d217d4d9SSepherosa Ziehau }
1492d217d4d9SSepherosa Ziehau }
1493d217d4d9SSepherosa Ziehau
1494d217d4d9SSepherosa Ziehau bzero(rxsd->rxsd_status, sizeof(struct et_rxstatus));
1495d217d4d9SSepherosa Ziehau bzero(rxst_ring->rsr_stat, ET_RXSTAT_RING_SIZE);
1496d217d4d9SSepherosa Ziehau
1497d217d4d9SSepherosa Ziehau return 0;
1498d217d4d9SSepherosa Ziehau }
1499d217d4d9SSepherosa Ziehau
1500d217d4d9SSepherosa Ziehau static int
et_init_rxdma(struct et_softc * sc)1501d217d4d9SSepherosa Ziehau et_init_rxdma(struct et_softc *sc)
1502d217d4d9SSepherosa Ziehau {
1503d217d4d9SSepherosa Ziehau struct et_rxstatus_data *rxsd = &sc->sc_rx_status;
1504d217d4d9SSepherosa Ziehau struct et_rxstat_ring *rxst_ring = &sc->sc_rxstat_ring;
1505d217d4d9SSepherosa Ziehau struct et_rxdesc_ring *rx_ring;
1506d217d4d9SSepherosa Ziehau int error;
1507d217d4d9SSepherosa Ziehau
1508d217d4d9SSepherosa Ziehau error = et_stop_rxdma(sc);
1509d217d4d9SSepherosa Ziehau if (error) {
1510d217d4d9SSepherosa Ziehau if_printf(&sc->arpcom.ac_if, "can't init RX DMA engine\n");
1511d217d4d9SSepherosa Ziehau return error;
1512d217d4d9SSepherosa Ziehau }
1513d217d4d9SSepherosa Ziehau
1514d217d4d9SSepherosa Ziehau /*
1515d217d4d9SSepherosa Ziehau * Install RX status
1516d217d4d9SSepherosa Ziehau */
1517d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_STATUS_HI, ET_ADDR_HI(rxsd->rxsd_paddr));
1518d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_STATUS_LO, ET_ADDR_LO(rxsd->rxsd_paddr));
1519d217d4d9SSepherosa Ziehau
1520d217d4d9SSepherosa Ziehau /*
1521d217d4d9SSepherosa Ziehau * Install RX stat ring
1522d217d4d9SSepherosa Ziehau */
1523d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXSTAT_HI, ET_ADDR_HI(rxst_ring->rsr_paddr));
1524d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXSTAT_LO, ET_ADDR_LO(rxst_ring->rsr_paddr));
1525d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXSTAT_CNT, ET_RX_NSTAT - 1);
1526d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXSTAT_POS, 0);
1527d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXSTAT_MINCNT, ((ET_RX_NSTAT * 15) / 100) - 1);
1528d217d4d9SSepherosa Ziehau
1529d217d4d9SSepherosa Ziehau /* Match ET_RXSTAT_POS */
1530d217d4d9SSepherosa Ziehau rxst_ring->rsr_index = 0;
1531d217d4d9SSepherosa Ziehau rxst_ring->rsr_wrap = 0;
1532d217d4d9SSepherosa Ziehau
1533d217d4d9SSepherosa Ziehau /*
1534d217d4d9SSepherosa Ziehau * Install the 2nd RX descriptor ring
1535d217d4d9SSepherosa Ziehau */
1536d217d4d9SSepherosa Ziehau rx_ring = &sc->sc_rx_ring[1];
1537d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING1_HI, ET_ADDR_HI(rx_ring->rr_paddr));
1538d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING1_LO, ET_ADDR_LO(rx_ring->rr_paddr));
1539d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING1_CNT, ET_RX_NDESC - 1);
1540d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING1_POS, ET_RX_RING1_POS_WRAP);
1541d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING1_MINCNT, ((ET_RX_NDESC * 15) / 100) - 1);
1542d217d4d9SSepherosa Ziehau
1543d217d4d9SSepherosa Ziehau /* Match ET_RX_RING1_POS */
1544d217d4d9SSepherosa Ziehau rx_ring->rr_index = 0;
1545d217d4d9SSepherosa Ziehau rx_ring->rr_wrap = 1;
1546d217d4d9SSepherosa Ziehau
1547d217d4d9SSepherosa Ziehau /*
1548d217d4d9SSepherosa Ziehau * Install the 1st RX descriptor ring
1549d217d4d9SSepherosa Ziehau */
1550d217d4d9SSepherosa Ziehau rx_ring = &sc->sc_rx_ring[0];
1551d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING0_HI, ET_ADDR_HI(rx_ring->rr_paddr));
1552d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING0_LO, ET_ADDR_LO(rx_ring->rr_paddr));
1553d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING0_CNT, ET_RX_NDESC - 1);
1554d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING0_POS, ET_RX_RING0_POS_WRAP);
1555d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_RING0_MINCNT, ((ET_RX_NDESC * 15) / 100) - 1);
1556d217d4d9SSepherosa Ziehau
1557d217d4d9SSepherosa Ziehau /* Match ET_RX_RING0_POS */
1558d217d4d9SSepherosa Ziehau rx_ring->rr_index = 0;
1559d217d4d9SSepherosa Ziehau rx_ring->rr_wrap = 1;
1560d217d4d9SSepherosa Ziehau
1561d217d4d9SSepherosa Ziehau /*
1562d217d4d9SSepherosa Ziehau * RX intr moderation
1563d217d4d9SSepherosa Ziehau */
1564d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_INTR_NPKTS, sc->sc_rx_intr_npkts);
1565d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_INTR_DELAY, sc->sc_rx_intr_delay);
1566d217d4d9SSepherosa Ziehau
1567d217d4d9SSepherosa Ziehau return 0;
1568d217d4d9SSepherosa Ziehau }
1569d217d4d9SSepherosa Ziehau
1570d217d4d9SSepherosa Ziehau static int
et_init_txdma(struct et_softc * sc)1571d217d4d9SSepherosa Ziehau et_init_txdma(struct et_softc *sc)
1572d217d4d9SSepherosa Ziehau {
1573d217d4d9SSepherosa Ziehau struct et_txdesc_ring *tx_ring = &sc->sc_tx_ring;
1574d217d4d9SSepherosa Ziehau struct et_txstatus_data *txsd = &sc->sc_tx_status;
1575d217d4d9SSepherosa Ziehau int error;
1576d217d4d9SSepherosa Ziehau
1577d217d4d9SSepherosa Ziehau error = et_stop_txdma(sc);
1578d217d4d9SSepherosa Ziehau if (error) {
1579d217d4d9SSepherosa Ziehau if_printf(&sc->arpcom.ac_if, "can't init TX DMA engine\n");
1580d217d4d9SSepherosa Ziehau return error;
1581d217d4d9SSepherosa Ziehau }
1582d217d4d9SSepherosa Ziehau
1583d217d4d9SSepherosa Ziehau /*
1584d217d4d9SSepherosa Ziehau * Install TX descriptor ring
1585d217d4d9SSepherosa Ziehau */
1586d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TX_RING_HI, ET_ADDR_HI(tx_ring->tr_paddr));
1587d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TX_RING_LO, ET_ADDR_LO(tx_ring->tr_paddr));
1588d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TX_RING_CNT, ET_TX_NDESC - 1);
1589d217d4d9SSepherosa Ziehau
1590d217d4d9SSepherosa Ziehau /*
1591d217d4d9SSepherosa Ziehau * Install TX status
1592d217d4d9SSepherosa Ziehau */
1593d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TX_STATUS_HI, ET_ADDR_HI(txsd->txsd_paddr));
1594d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TX_STATUS_LO, ET_ADDR_LO(txsd->txsd_paddr));
1595d217d4d9SSepherosa Ziehau
1596d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TX_READY_POS, 0);
1597d217d4d9SSepherosa Ziehau
1598d217d4d9SSepherosa Ziehau /* Match ET_TX_READY_POS */
1599d217d4d9SSepherosa Ziehau tx_ring->tr_ready_index = 0;
1600d217d4d9SSepherosa Ziehau tx_ring->tr_ready_wrap = 0;
1601d217d4d9SSepherosa Ziehau
1602d217d4d9SSepherosa Ziehau return 0;
1603d217d4d9SSepherosa Ziehau }
1604d217d4d9SSepherosa Ziehau
1605d217d4d9SSepherosa Ziehau static void
et_init_mac(struct et_softc * sc)1606d217d4d9SSepherosa Ziehau et_init_mac(struct et_softc *sc)
1607d217d4d9SSepherosa Ziehau {
1608d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
1609d217d4d9SSepherosa Ziehau const uint8_t *eaddr = IF_LLADDR(ifp);
1610d217d4d9SSepherosa Ziehau uint32_t val;
1611d217d4d9SSepherosa Ziehau
1612d217d4d9SSepherosa Ziehau /* Reset MAC */
1613d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CFG1,
1614d217d4d9SSepherosa Ziehau ET_MAC_CFG1_RST_TXFUNC | ET_MAC_CFG1_RST_RXFUNC |
1615d217d4d9SSepherosa Ziehau ET_MAC_CFG1_RST_TXMC | ET_MAC_CFG1_RST_RXMC |
1616d217d4d9SSepherosa Ziehau ET_MAC_CFG1_SIM_RST | ET_MAC_CFG1_SOFT_RST);
1617d217d4d9SSepherosa Ziehau
1618d217d4d9SSepherosa Ziehau /*
1619d217d4d9SSepherosa Ziehau * Setup inter packet gap
1620d217d4d9SSepherosa Ziehau */
1621d217d4d9SSepherosa Ziehau val = __SHIFTIN(56, ET_IPG_NONB2B_1) |
1622d217d4d9SSepherosa Ziehau __SHIFTIN(88, ET_IPG_NONB2B_2) |
1623d217d4d9SSepherosa Ziehau __SHIFTIN(80, ET_IPG_MINIFG) |
1624d217d4d9SSepherosa Ziehau __SHIFTIN(96, ET_IPG_B2B);
1625d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_IPG, val);
1626d217d4d9SSepherosa Ziehau
1627d217d4d9SSepherosa Ziehau /*
1628d217d4d9SSepherosa Ziehau * Setup half duplex mode
1629d217d4d9SSepherosa Ziehau */
1630d217d4d9SSepherosa Ziehau val = __SHIFTIN(10, ET_MAC_HDX_ALT_BEB_TRUNC) |
1631d217d4d9SSepherosa Ziehau __SHIFTIN(15, ET_MAC_HDX_REXMIT_MAX) |
1632d217d4d9SSepherosa Ziehau __SHIFTIN(55, ET_MAC_HDX_COLLWIN) |
1633d217d4d9SSepherosa Ziehau ET_MAC_HDX_EXC_DEFER;
1634d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_HDX, val);
1635d217d4d9SSepherosa Ziehau
1636d217d4d9SSepherosa Ziehau /* Clear MAC control */
1637d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CTRL, 0);
1638d217d4d9SSepherosa Ziehau
1639d217d4d9SSepherosa Ziehau /* Reset MII */
1640d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MII_CFG, ET_MII_CFG_CLKRST);
1641d217d4d9SSepherosa Ziehau
1642d217d4d9SSepherosa Ziehau /*
1643d217d4d9SSepherosa Ziehau * Set MAC address
1644d217d4d9SSepherosa Ziehau */
1645d217d4d9SSepherosa Ziehau val = eaddr[2] | (eaddr[3] << 8) | (eaddr[4] << 16) | (eaddr[5] << 24);
1646d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_ADDR1, val);
1647d217d4d9SSepherosa Ziehau val = (eaddr[0] << 16) | (eaddr[1] << 24);
1648d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_ADDR2, val);
1649d217d4d9SSepherosa Ziehau
1650d217d4d9SSepherosa Ziehau /* Set max frame length */
16510fd7469eSSepherosa Ziehau CSR_WRITE_4(sc, ET_MAX_FRMLEN, ET_FRAMELEN(ifp->if_mtu));
1652d217d4d9SSepherosa Ziehau
1653d217d4d9SSepherosa Ziehau /* Bring MAC out of reset state */
1654d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CFG1, 0);
1655d217d4d9SSepherosa Ziehau }
1656d217d4d9SSepherosa Ziehau
1657d217d4d9SSepherosa Ziehau static void
et_init_rxmac(struct et_softc * sc)1658d217d4d9SSepherosa Ziehau et_init_rxmac(struct et_softc *sc)
1659d217d4d9SSepherosa Ziehau {
1660d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
1661d217d4d9SSepherosa Ziehau const uint8_t *eaddr = IF_LLADDR(ifp);
1662d217d4d9SSepherosa Ziehau uint32_t val;
1663d217d4d9SSepherosa Ziehau int i;
1664d217d4d9SSepherosa Ziehau
1665d217d4d9SSepherosa Ziehau /* Disable RX MAC and WOL */
1666d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXMAC_CTRL, ET_RXMAC_CTRL_WOL_DISABLE);
1667d217d4d9SSepherosa Ziehau
1668d217d4d9SSepherosa Ziehau /*
1669d217d4d9SSepherosa Ziehau * Clear all WOL related registers
1670d217d4d9SSepherosa Ziehau */
1671d217d4d9SSepherosa Ziehau for (i = 0; i < 3; ++i)
1672d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_WOL_CRC + (i * 4), 0);
1673d217d4d9SSepherosa Ziehau for (i = 0; i < 20; ++i)
1674d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_WOL_MASK + (i * 4), 0);
1675d217d4d9SSepherosa Ziehau
1676d217d4d9SSepherosa Ziehau /*
1677d217d4d9SSepherosa Ziehau * Set WOL source address. XXX is this necessary?
1678d217d4d9SSepherosa Ziehau */
1679d217d4d9SSepherosa Ziehau val = (eaddr[2] << 24) | (eaddr[3] << 16) | (eaddr[4] << 8) | eaddr[5];
1680d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_WOL_SA_LO, val);
1681d217d4d9SSepherosa Ziehau val = (eaddr[0] << 8) | eaddr[1];
1682d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_WOL_SA_HI, val);
1683d217d4d9SSepherosa Ziehau
1684d217d4d9SSepherosa Ziehau /* Clear packet filters */
1685d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_PKTFILT, 0);
1686d217d4d9SSepherosa Ziehau
1687d217d4d9SSepherosa Ziehau /* No ucast filtering */
1688d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_UCAST_FILTADDR1, 0);
1689d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_UCAST_FILTADDR2, 0);
1690d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_UCAST_FILTADDR3, 0);
1691d217d4d9SSepherosa Ziehau
16923effc1bfSSepherosa Ziehau if (ET_FRAMELEN(ifp->if_mtu) > ET_RXMAC_CUT_THRU_FRMLEN) {
1693d217d4d9SSepherosa Ziehau /*
16943effc1bfSSepherosa Ziehau * In order to transmit jumbo packets greater than
16953effc1bfSSepherosa Ziehau * ET_RXMAC_CUT_THRU_FRMLEN bytes, the FIFO between
16963effc1bfSSepherosa Ziehau * RX MAC and RX DMA needs to be reduced in size to
16973effc1bfSSepherosa Ziehau * (ET_MEM_SIZE - ET_MEM_TXSIZE_EX - framelen). In
16983effc1bfSSepherosa Ziehau * order to implement this, we must use "cut through"
16993effc1bfSSepherosa Ziehau * mode in the RX MAC, which chops packets down into
17003effc1bfSSepherosa Ziehau * segments. In this case we selected 256 bytes,
17013effc1bfSSepherosa Ziehau * since this is the size of the PCI-Express TLP's
17023effc1bfSSepherosa Ziehau * that the ET1310 uses.
1703d217d4d9SSepherosa Ziehau */
17043effc1bfSSepherosa Ziehau val = __SHIFTIN(ET_RXMAC_SEGSZ(256), ET_RXMAC_MC_SEGSZ_MAX) |
1705d217d4d9SSepherosa Ziehau ET_RXMAC_MC_SEGSZ_ENABLE;
1706d217d4d9SSepherosa Ziehau } else {
1707d217d4d9SSepherosa Ziehau val = 0;
1708d217d4d9SSepherosa Ziehau }
1709d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXMAC_MC_SEGSZ, val);
1710d217d4d9SSepherosa Ziehau
1711d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXMAC_MC_WATERMARK, 0);
1712d217d4d9SSepherosa Ziehau
1713d217d4d9SSepherosa Ziehau /* Initialize RX MAC management register */
1714d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXMAC_MGT, 0);
1715d217d4d9SSepherosa Ziehau
1716d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXMAC_SPACE_AVL, 0);
1717d217d4d9SSepherosa Ziehau
1718d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXMAC_MGT,
1719d217d4d9SSepherosa Ziehau ET_RXMAC_MGT_PASS_ECRC |
1720d217d4d9SSepherosa Ziehau ET_RXMAC_MGT_PASS_ELEN |
1721d217d4d9SSepherosa Ziehau ET_RXMAC_MGT_PASS_ETRUNC |
1722d217d4d9SSepherosa Ziehau ET_RXMAC_MGT_CHECK_PKT);
1723d217d4d9SSepherosa Ziehau
1724d217d4d9SSepherosa Ziehau /*
1725d217d4d9SSepherosa Ziehau * Configure runt filtering (may not work on certain chip generation)
1726d217d4d9SSepherosa Ziehau */
1727d217d4d9SSepherosa Ziehau val = __SHIFTIN(ETHER_MIN_LEN, ET_PKTFILT_MINLEN) | ET_PKTFILT_FRAG;
1728d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_PKTFILT, val);
1729d217d4d9SSepherosa Ziehau
1730d217d4d9SSepherosa Ziehau /* Enable RX MAC but leave WOL disabled */
1731d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXMAC_CTRL,
1732d217d4d9SSepherosa Ziehau ET_RXMAC_CTRL_WOL_DISABLE | ET_RXMAC_CTRL_ENABLE);
1733d217d4d9SSepherosa Ziehau
1734d217d4d9SSepherosa Ziehau /*
1735d217d4d9SSepherosa Ziehau * Setup multicast hash and allmulti/promisc mode
1736d217d4d9SSepherosa Ziehau */
1737d217d4d9SSepherosa Ziehau et_setmulti(sc);
1738d217d4d9SSepherosa Ziehau }
1739d217d4d9SSepherosa Ziehau
1740d217d4d9SSepherosa Ziehau static void
et_init_txmac(struct et_softc * sc)1741d217d4d9SSepherosa Ziehau et_init_txmac(struct et_softc *sc)
1742d217d4d9SSepherosa Ziehau {
1743d217d4d9SSepherosa Ziehau /* Disable TX MAC and FC(?) */
1744d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TXMAC_CTRL, ET_TXMAC_CTRL_FC_DISABLE);
1745d217d4d9SSepherosa Ziehau
1746d217d4d9SSepherosa Ziehau /* No flow control yet */
1747d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TXMAC_FLOWCTRL, 0);
1748d217d4d9SSepherosa Ziehau
1749d217d4d9SSepherosa Ziehau /* Enable TX MAC but leave FC(?) diabled */
1750d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TXMAC_CTRL,
1751d217d4d9SSepherosa Ziehau ET_TXMAC_CTRL_ENABLE | ET_TXMAC_CTRL_FC_DISABLE);
1752d217d4d9SSepherosa Ziehau }
1753d217d4d9SSepherosa Ziehau
1754d217d4d9SSepherosa Ziehau static int
et_start_rxdma(struct et_softc * sc)1755d217d4d9SSepherosa Ziehau et_start_rxdma(struct et_softc *sc)
1756d217d4d9SSepherosa Ziehau {
1757d217d4d9SSepherosa Ziehau uint32_t val = 0;
1758d217d4d9SSepherosa Ziehau
1759d217d4d9SSepherosa Ziehau val |= __SHIFTIN(sc->sc_rx_data[0].rbd_bufsize,
1760d217d4d9SSepherosa Ziehau ET_RXDMA_CTRL_RING0_SIZE) |
1761d217d4d9SSepherosa Ziehau ET_RXDMA_CTRL_RING0_ENABLE;
1762d217d4d9SSepherosa Ziehau val |= __SHIFTIN(sc->sc_rx_data[1].rbd_bufsize,
1763d217d4d9SSepherosa Ziehau ET_RXDMA_CTRL_RING1_SIZE) |
1764d217d4d9SSepherosa Ziehau ET_RXDMA_CTRL_RING1_ENABLE;
1765d217d4d9SSepherosa Ziehau
1766d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXDMA_CTRL, val);
1767d217d4d9SSepherosa Ziehau
1768d217d4d9SSepherosa Ziehau DELAY(5);
1769d217d4d9SSepherosa Ziehau
1770d217d4d9SSepherosa Ziehau if (CSR_READ_4(sc, ET_RXDMA_CTRL) & ET_RXDMA_CTRL_HALTED) {
1771d217d4d9SSepherosa Ziehau if_printf(&sc->arpcom.ac_if, "can't start RX DMA engine\n");
1772d217d4d9SSepherosa Ziehau return ETIMEDOUT;
1773d217d4d9SSepherosa Ziehau }
1774d217d4d9SSepherosa Ziehau return 0;
1775d217d4d9SSepherosa Ziehau }
1776d217d4d9SSepherosa Ziehau
1777d217d4d9SSepherosa Ziehau static int
et_start_txdma(struct et_softc * sc)1778d217d4d9SSepherosa Ziehau et_start_txdma(struct et_softc *sc)
1779d217d4d9SSepherosa Ziehau {
1780d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TXDMA_CTRL, ET_TXDMA_CTRL_SINGLE_EPKT);
1781d217d4d9SSepherosa Ziehau return 0;
1782d217d4d9SSepherosa Ziehau }
1783d217d4d9SSepherosa Ziehau
1784d217d4d9SSepherosa Ziehau static int
et_enable_txrx(struct et_softc * sc,int media_upd)178560d2de1fSSepherosa Ziehau et_enable_txrx(struct et_softc *sc, int media_upd)
1786d217d4d9SSepherosa Ziehau {
1787d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
1788d217d4d9SSepherosa Ziehau uint32_t val;
178960d2de1fSSepherosa Ziehau int i, error;
1790d217d4d9SSepherosa Ziehau
1791d217d4d9SSepherosa Ziehau val = CSR_READ_4(sc, ET_MAC_CFG1);
1792d217d4d9SSepherosa Ziehau val |= ET_MAC_CFG1_TXEN | ET_MAC_CFG1_RXEN;
1793d217d4d9SSepherosa Ziehau val &= ~(ET_MAC_CFG1_TXFLOW | ET_MAC_CFG1_RXFLOW |
1794d217d4d9SSepherosa Ziehau ET_MAC_CFG1_LOOPBACK);
1795d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CFG1, val);
1796d217d4d9SSepherosa Ziehau
179760d2de1fSSepherosa Ziehau if (media_upd)
1798d217d4d9SSepherosa Ziehau et_ifmedia_upd(ifp);
179960d2de1fSSepherosa Ziehau else
180060d2de1fSSepherosa Ziehau et_setmedia(sc);
1801d217d4d9SSepherosa Ziehau
1802d217d4d9SSepherosa Ziehau #define NRETRY 100
1803d217d4d9SSepherosa Ziehau
1804d217d4d9SSepherosa Ziehau for (i = 0; i < NRETRY; ++i) {
1805d217d4d9SSepherosa Ziehau val = CSR_READ_4(sc, ET_MAC_CFG1);
1806d217d4d9SSepherosa Ziehau if ((val & (ET_MAC_CFG1_SYNC_TXEN | ET_MAC_CFG1_SYNC_RXEN)) ==
1807d217d4d9SSepherosa Ziehau (ET_MAC_CFG1_SYNC_TXEN | ET_MAC_CFG1_SYNC_RXEN))
1808d217d4d9SSepherosa Ziehau break;
1809d217d4d9SSepherosa Ziehau
1810d217d4d9SSepherosa Ziehau DELAY(10);
1811d217d4d9SSepherosa Ziehau }
1812d217d4d9SSepherosa Ziehau if (i == NRETRY) {
1813d217d4d9SSepherosa Ziehau if_printf(ifp, "can't enable RX/TX\n");
181460d2de1fSSepherosa Ziehau return 0;
1815d217d4d9SSepherosa Ziehau }
18163effc1bfSSepherosa Ziehau sc->sc_flags |= ET_FLAG_TXRX_ENABLED;
1817d217d4d9SSepherosa Ziehau
1818d217d4d9SSepherosa Ziehau #undef NRETRY
181960d2de1fSSepherosa Ziehau
182060d2de1fSSepherosa Ziehau /*
182160d2de1fSSepherosa Ziehau * Start TX/RX DMA engine
182260d2de1fSSepherosa Ziehau */
182360d2de1fSSepherosa Ziehau error = et_start_rxdma(sc);
182460d2de1fSSepherosa Ziehau if (error)
182560d2de1fSSepherosa Ziehau return error;
182660d2de1fSSepherosa Ziehau
182760d2de1fSSepherosa Ziehau error = et_start_txdma(sc);
182860d2de1fSSepherosa Ziehau if (error)
182960d2de1fSSepherosa Ziehau return error;
183060d2de1fSSepherosa Ziehau
1831d217d4d9SSepherosa Ziehau return 0;
1832d217d4d9SSepherosa Ziehau }
1833d217d4d9SSepherosa Ziehau
1834d217d4d9SSepherosa Ziehau static void
et_rxeof(struct et_softc * sc)1835d217d4d9SSepherosa Ziehau et_rxeof(struct et_softc *sc)
1836d217d4d9SSepherosa Ziehau {
1837d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
1838d217d4d9SSepherosa Ziehau struct et_rxstatus_data *rxsd = &sc->sc_rx_status;
1839d217d4d9SSepherosa Ziehau struct et_rxstat_ring *rxst_ring = &sc->sc_rxstat_ring;
1840d217d4d9SSepherosa Ziehau uint32_t rxs_stat_ring;
1841d217d4d9SSepherosa Ziehau int rxst_wrap, rxst_index;
1842d217d4d9SSepherosa Ziehau
18433effc1bfSSepherosa Ziehau if ((sc->sc_flags & ET_FLAG_TXRX_ENABLED) == 0)
184460d2de1fSSepherosa Ziehau return;
184560d2de1fSSepherosa Ziehau
1846d217d4d9SSepherosa Ziehau rxs_stat_ring = rxsd->rxsd_status->rxs_stat_ring;
1847d217d4d9SSepherosa Ziehau rxst_wrap = (rxs_stat_ring & ET_RXS_STATRING_WRAP) ? 1 : 0;
1848d217d4d9SSepherosa Ziehau rxst_index = __SHIFTOUT(rxs_stat_ring, ET_RXS_STATRING_INDEX);
1849d217d4d9SSepherosa Ziehau
1850d217d4d9SSepherosa Ziehau while (rxst_index != rxst_ring->rsr_index ||
1851d217d4d9SSepherosa Ziehau rxst_wrap != rxst_ring->rsr_wrap) {
1852d217d4d9SSepherosa Ziehau struct et_rxbuf_data *rbd;
1853d217d4d9SSepherosa Ziehau struct et_rxdesc_ring *rx_ring;
1854d217d4d9SSepherosa Ziehau struct et_rxstat *st;
1855d217d4d9SSepherosa Ziehau struct mbuf *m;
1856d217d4d9SSepherosa Ziehau int buflen, buf_idx, ring_idx;
1857d217d4d9SSepherosa Ziehau uint32_t rxstat_pos, rxring_pos;
1858d217d4d9SSepherosa Ziehau
1859d217d4d9SSepherosa Ziehau KKASSERT(rxst_ring->rsr_index < ET_RX_NSTAT);
1860d217d4d9SSepherosa Ziehau st = &rxst_ring->rsr_stat[rxst_ring->rsr_index];
1861d217d4d9SSepherosa Ziehau
1862d217d4d9SSepherosa Ziehau buflen = __SHIFTOUT(st->rxst_info2, ET_RXST_INFO2_LEN);
1863d217d4d9SSepherosa Ziehau buf_idx = __SHIFTOUT(st->rxst_info2, ET_RXST_INFO2_BUFIDX);
1864d217d4d9SSepherosa Ziehau ring_idx = __SHIFTOUT(st->rxst_info2, ET_RXST_INFO2_RINGIDX);
1865d217d4d9SSepherosa Ziehau
1866d217d4d9SSepherosa Ziehau if (++rxst_ring->rsr_index == ET_RX_NSTAT) {
1867d217d4d9SSepherosa Ziehau rxst_ring->rsr_index = 0;
1868d217d4d9SSepherosa Ziehau rxst_ring->rsr_wrap ^= 1;
1869d217d4d9SSepherosa Ziehau }
1870d217d4d9SSepherosa Ziehau rxstat_pos = __SHIFTIN(rxst_ring->rsr_index,
1871d217d4d9SSepherosa Ziehau ET_RXSTAT_POS_INDEX);
1872d217d4d9SSepherosa Ziehau if (rxst_ring->rsr_wrap)
1873d217d4d9SSepherosa Ziehau rxstat_pos |= ET_RXSTAT_POS_WRAP;
1874d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RXSTAT_POS, rxstat_pos);
1875d217d4d9SSepherosa Ziehau
1876d217d4d9SSepherosa Ziehau if (ring_idx >= ET_RX_NRING) {
1877d40991efSSepherosa Ziehau IFNET_STAT_INC(ifp, ierrors, 1);
1878d217d4d9SSepherosa Ziehau if_printf(ifp, "invalid ring index %d\n", ring_idx);
1879d217d4d9SSepherosa Ziehau continue;
1880d217d4d9SSepherosa Ziehau }
1881d217d4d9SSepherosa Ziehau if (buf_idx >= ET_RX_NDESC) {
1882d40991efSSepherosa Ziehau IFNET_STAT_INC(ifp, ierrors, 1);
1883d217d4d9SSepherosa Ziehau if_printf(ifp, "invalid buf index %d\n", buf_idx);
1884d217d4d9SSepherosa Ziehau continue;
1885d217d4d9SSepherosa Ziehau }
1886d217d4d9SSepherosa Ziehau
1887d217d4d9SSepherosa Ziehau rbd = &sc->sc_rx_data[ring_idx];
18883effc1bfSSepherosa Ziehau m = rbd->rbd_buf[buf_idx].rb_mbuf;
1889d217d4d9SSepherosa Ziehau
1890d217d4d9SSepherosa Ziehau if (rbd->rbd_newbuf(rbd, buf_idx, 0) == 0) {
18910fd7469eSSepherosa Ziehau if (buflen < ETHER_CRC_LEN) {
18920fd7469eSSepherosa Ziehau m_freem(m);
1893d40991efSSepherosa Ziehau IFNET_STAT_INC(ifp, ierrors, 1);
18940fd7469eSSepherosa Ziehau } else {
1895d217d4d9SSepherosa Ziehau m->m_pkthdr.len = m->m_len = buflen;
1896d217d4d9SSepherosa Ziehau m->m_pkthdr.rcvif = ifp;
1897d217d4d9SSepherosa Ziehau
18980fd7469eSSepherosa Ziehau m_adj(m, -ETHER_CRC_LEN);
18990fd7469eSSepherosa Ziehau
1900d40991efSSepherosa Ziehau IFNET_STAT_INC(ifp, ipackets, 1);
190173029d08SFranco Fichtner ifp->if_input(ifp, m, NULL, -1);
19020fd7469eSSepherosa Ziehau }
1903d217d4d9SSepherosa Ziehau } else {
1904d40991efSSepherosa Ziehau IFNET_STAT_INC(ifp, ierrors, 1);
1905d217d4d9SSepherosa Ziehau }
19060fd7469eSSepherosa Ziehau m = NULL; /* Catch invalid reference */
1907d217d4d9SSepherosa Ziehau
1908d217d4d9SSepherosa Ziehau rx_ring = &sc->sc_rx_ring[ring_idx];
1909d217d4d9SSepherosa Ziehau
1910d217d4d9SSepherosa Ziehau if (buf_idx != rx_ring->rr_index) {
1911d217d4d9SSepherosa Ziehau if_printf(ifp, "WARNING!! ring %d, "
1912d217d4d9SSepherosa Ziehau "buf_idx %d, rr_idx %d\n",
1913d217d4d9SSepherosa Ziehau ring_idx, buf_idx, rx_ring->rr_index);
1914d217d4d9SSepherosa Ziehau }
1915d217d4d9SSepherosa Ziehau
1916d217d4d9SSepherosa Ziehau KKASSERT(rx_ring->rr_index < ET_RX_NDESC);
1917d217d4d9SSepherosa Ziehau if (++rx_ring->rr_index == ET_RX_NDESC) {
1918d217d4d9SSepherosa Ziehau rx_ring->rr_index = 0;
1919d217d4d9SSepherosa Ziehau rx_ring->rr_wrap ^= 1;
1920d217d4d9SSepherosa Ziehau }
1921d217d4d9SSepherosa Ziehau rxring_pos = __SHIFTIN(rx_ring->rr_index, ET_RX_RING_POS_INDEX);
1922d217d4d9SSepherosa Ziehau if (rx_ring->rr_wrap)
1923d217d4d9SSepherosa Ziehau rxring_pos |= ET_RX_RING_POS_WRAP;
1924d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, rx_ring->rr_posreg, rxring_pos);
1925d217d4d9SSepherosa Ziehau }
1926d217d4d9SSepherosa Ziehau }
1927d217d4d9SSepherosa Ziehau
1928d217d4d9SSepherosa Ziehau static int
et_encap(struct et_softc * sc,struct mbuf ** m0)1929d217d4d9SSepherosa Ziehau et_encap(struct et_softc *sc, struct mbuf **m0)
1930d217d4d9SSepherosa Ziehau {
1931d217d4d9SSepherosa Ziehau bus_dma_segment_t segs[ET_NSEG_MAX];
1932d217d4d9SSepherosa Ziehau struct et_txdesc_ring *tx_ring = &sc->sc_tx_ring;
1933d217d4d9SSepherosa Ziehau struct et_txbuf_data *tbd = &sc->sc_tx_data;
1934d217d4d9SSepherosa Ziehau struct et_txdesc *td;
1935d217d4d9SSepherosa Ziehau bus_dmamap_t map;
19367479ff0bSSepherosa Ziehau int error, maxsegs, nsegs, first_idx, last_idx, i;
1937d217d4d9SSepherosa Ziehau uint32_t tx_ready_pos, last_td_ctrl2;
1938d217d4d9SSepherosa Ziehau
1939d217d4d9SSepherosa Ziehau maxsegs = ET_TX_NDESC - tbd->tbd_used;
1940d217d4d9SSepherosa Ziehau if (maxsegs > ET_NSEG_MAX)
1941d217d4d9SSepherosa Ziehau maxsegs = ET_NSEG_MAX;
1942d217d4d9SSepherosa Ziehau KASSERT(maxsegs >= ET_NSEG_SPARE,
1943ed20d0e3SSascha Wildner ("not enough spare TX desc (%d)", maxsegs));
1944d217d4d9SSepherosa Ziehau
1945d217d4d9SSepherosa Ziehau KKASSERT(tx_ring->tr_ready_index < ET_TX_NDESC);
1946d217d4d9SSepherosa Ziehau first_idx = tx_ring->tr_ready_index;
1947d217d4d9SSepherosa Ziehau map = tbd->tbd_buf[first_idx].tb_dmap;
1948d217d4d9SSepherosa Ziehau
19497479ff0bSSepherosa Ziehau error = bus_dmamap_load_mbuf_defrag(sc->sc_txbuf_dtag, map, m0,
19507479ff0bSSepherosa Ziehau segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
19517479ff0bSSepherosa Ziehau if (error)
1952d217d4d9SSepherosa Ziehau goto back;
19530fe5209eSSepherosa Ziehau bus_dmamap_sync(sc->sc_txbuf_dtag, map, BUS_DMASYNC_PREWRITE);
1954d217d4d9SSepherosa Ziehau
1955d217d4d9SSepherosa Ziehau last_td_ctrl2 = ET_TDCTRL2_LAST_FRAG;
19567479ff0bSSepherosa Ziehau sc->sc_tx += nsegs;
1957d217d4d9SSepherosa Ziehau if (sc->sc_tx / sc->sc_tx_intr_nsegs != sc->sc_tx_intr) {
1958d217d4d9SSepherosa Ziehau sc->sc_tx_intr = sc->sc_tx / sc->sc_tx_intr_nsegs;
1959d217d4d9SSepherosa Ziehau last_td_ctrl2 |= ET_TDCTRL2_INTR;
1960d217d4d9SSepherosa Ziehau }
1961d217d4d9SSepherosa Ziehau
1962d217d4d9SSepherosa Ziehau last_idx = -1;
19637479ff0bSSepherosa Ziehau for (i = 0; i < nsegs; ++i) {
1964d217d4d9SSepherosa Ziehau int idx;
1965d217d4d9SSepherosa Ziehau
1966d217d4d9SSepherosa Ziehau idx = (first_idx + i) % ET_TX_NDESC;
1967d217d4d9SSepherosa Ziehau td = &tx_ring->tr_desc[idx];
1968d217d4d9SSepherosa Ziehau td->td_addr_hi = ET_ADDR_HI(segs[i].ds_addr);
1969d217d4d9SSepherosa Ziehau td->td_addr_lo = ET_ADDR_LO(segs[i].ds_addr);
1970d217d4d9SSepherosa Ziehau td->td_ctrl1 = __SHIFTIN(segs[i].ds_len, ET_TDCTRL1_LEN);
1971d217d4d9SSepherosa Ziehau
19727479ff0bSSepherosa Ziehau if (i == nsegs - 1) { /* Last frag */
1973d217d4d9SSepherosa Ziehau td->td_ctrl2 = last_td_ctrl2;
1974d217d4d9SSepherosa Ziehau last_idx = idx;
1975d217d4d9SSepherosa Ziehau }
1976d217d4d9SSepherosa Ziehau
1977d217d4d9SSepherosa Ziehau KKASSERT(tx_ring->tr_ready_index < ET_TX_NDESC);
1978d217d4d9SSepherosa Ziehau if (++tx_ring->tr_ready_index == ET_TX_NDESC) {
1979d217d4d9SSepherosa Ziehau tx_ring->tr_ready_index = 0;
1980d217d4d9SSepherosa Ziehau tx_ring->tr_ready_wrap ^= 1;
1981d217d4d9SSepherosa Ziehau }
1982d217d4d9SSepherosa Ziehau }
1983d217d4d9SSepherosa Ziehau td = &tx_ring->tr_desc[first_idx];
1984d217d4d9SSepherosa Ziehau td->td_ctrl2 |= ET_TDCTRL2_FIRST_FRAG; /* First frag */
1985d217d4d9SSepherosa Ziehau
1986d217d4d9SSepherosa Ziehau KKASSERT(last_idx >= 0);
1987d217d4d9SSepherosa Ziehau tbd->tbd_buf[first_idx].tb_dmap = tbd->tbd_buf[last_idx].tb_dmap;
1988d217d4d9SSepherosa Ziehau tbd->tbd_buf[last_idx].tb_dmap = map;
19897479ff0bSSepherosa Ziehau tbd->tbd_buf[last_idx].tb_mbuf = *m0;
1990d217d4d9SSepherosa Ziehau
19917479ff0bSSepherosa Ziehau tbd->tbd_used += nsegs;
1992d217d4d9SSepherosa Ziehau KKASSERT(tbd->tbd_used <= ET_TX_NDESC);
1993d217d4d9SSepherosa Ziehau
1994d217d4d9SSepherosa Ziehau tx_ready_pos = __SHIFTIN(tx_ring->tr_ready_index,
1995d217d4d9SSepherosa Ziehau ET_TX_READY_POS_INDEX);
1996d217d4d9SSepherosa Ziehau if (tx_ring->tr_ready_wrap)
1997d217d4d9SSepherosa Ziehau tx_ready_pos |= ET_TX_READY_POS_WRAP;
1998d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_TX_READY_POS, tx_ready_pos);
1999d217d4d9SSepherosa Ziehau
2000d217d4d9SSepherosa Ziehau error = 0;
2001d217d4d9SSepherosa Ziehau back:
2002d217d4d9SSepherosa Ziehau if (error) {
20037479ff0bSSepherosa Ziehau m_freem(*m0);
2004d217d4d9SSepherosa Ziehau *m0 = NULL;
2005d217d4d9SSepherosa Ziehau }
2006d217d4d9SSepherosa Ziehau return error;
2007d217d4d9SSepherosa Ziehau }
2008d217d4d9SSepherosa Ziehau
2009d217d4d9SSepherosa Ziehau static void
et_txeof(struct et_softc * sc,int start)2010136e59ffSSepherosa Ziehau et_txeof(struct et_softc *sc, int start)
2011d217d4d9SSepherosa Ziehau {
2012d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
2013d217d4d9SSepherosa Ziehau struct et_txdesc_ring *tx_ring = &sc->sc_tx_ring;
2014d217d4d9SSepherosa Ziehau struct et_txbuf_data *tbd = &sc->sc_tx_data;
2015d217d4d9SSepherosa Ziehau uint32_t tx_done;
2016d217d4d9SSepherosa Ziehau int end, wrap;
2017d217d4d9SSepherosa Ziehau
20183effc1bfSSepherosa Ziehau if ((sc->sc_flags & ET_FLAG_TXRX_ENABLED) == 0)
201960d2de1fSSepherosa Ziehau return;
202060d2de1fSSepherosa Ziehau
2021d217d4d9SSepherosa Ziehau if (tbd->tbd_used == 0)
2022d217d4d9SSepherosa Ziehau return;
2023d217d4d9SSepherosa Ziehau
2024d217d4d9SSepherosa Ziehau tx_done = CSR_READ_4(sc, ET_TX_DONE_POS);
2025d217d4d9SSepherosa Ziehau end = __SHIFTOUT(tx_done, ET_TX_DONE_POS_INDEX);
2026d217d4d9SSepherosa Ziehau wrap = (tx_done & ET_TX_DONE_POS_WRAP) ? 1 : 0;
2027d217d4d9SSepherosa Ziehau
2028d217d4d9SSepherosa Ziehau while (tbd->tbd_start_index != end || tbd->tbd_start_wrap != wrap) {
2029d217d4d9SSepherosa Ziehau struct et_txbuf *tb;
2030d217d4d9SSepherosa Ziehau
2031d217d4d9SSepherosa Ziehau KKASSERT(tbd->tbd_start_index < ET_TX_NDESC);
2032d217d4d9SSepherosa Ziehau tb = &tbd->tbd_buf[tbd->tbd_start_index];
2033d217d4d9SSepherosa Ziehau
2034d217d4d9SSepherosa Ziehau bzero(&tx_ring->tr_desc[tbd->tbd_start_index],
2035d217d4d9SSepherosa Ziehau sizeof(struct et_txdesc));
2036d217d4d9SSepherosa Ziehau
2037d217d4d9SSepherosa Ziehau if (tb->tb_mbuf != NULL) {
20380fe5209eSSepherosa Ziehau bus_dmamap_unload(sc->sc_txbuf_dtag, tb->tb_dmap);
2039d217d4d9SSepherosa Ziehau m_freem(tb->tb_mbuf);
2040d217d4d9SSepherosa Ziehau tb->tb_mbuf = NULL;
2041d40991efSSepherosa Ziehau IFNET_STAT_INC(ifp, opackets, 1);
2042d217d4d9SSepherosa Ziehau }
2043d217d4d9SSepherosa Ziehau
2044d217d4d9SSepherosa Ziehau if (++tbd->tbd_start_index == ET_TX_NDESC) {
2045d217d4d9SSepherosa Ziehau tbd->tbd_start_index = 0;
2046d217d4d9SSepherosa Ziehau tbd->tbd_start_wrap ^= 1;
2047d217d4d9SSepherosa Ziehau }
2048d217d4d9SSepherosa Ziehau
2049d217d4d9SSepherosa Ziehau KKASSERT(tbd->tbd_used > 0);
2050d217d4d9SSepherosa Ziehau tbd->tbd_used--;
2051d217d4d9SSepherosa Ziehau }
2052d217d4d9SSepherosa Ziehau
2053d217d4d9SSepherosa Ziehau if (tbd->tbd_used == 0)
2054d217d4d9SSepherosa Ziehau ifp->if_timer = 0;
2055d217d4d9SSepherosa Ziehau if (tbd->tbd_used + ET_NSEG_SPARE <= ET_TX_NDESC)
20569ed293e0SSepherosa Ziehau ifq_clr_oactive(&ifp->if_snd);
2057d217d4d9SSepherosa Ziehau
2058136e59ffSSepherosa Ziehau if (start)
20599db4b353SSepherosa Ziehau if_devstart(ifp);
2060d217d4d9SSepherosa Ziehau }
2061d217d4d9SSepherosa Ziehau
2062d217d4d9SSepherosa Ziehau static void
et_tick(void * xsc)2063d217d4d9SSepherosa Ziehau et_tick(void *xsc)
2064d217d4d9SSepherosa Ziehau {
2065d217d4d9SSepherosa Ziehau struct et_softc *sc = xsc;
2066d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
206760d2de1fSSepherosa Ziehau struct mii_data *mii = device_get_softc(sc->sc_miibus);
2068d217d4d9SSepherosa Ziehau
2069d217d4d9SSepherosa Ziehau lwkt_serialize_enter(ifp->if_serializer);
2070d217d4d9SSepherosa Ziehau
207160d2de1fSSepherosa Ziehau mii_tick(mii);
20723effc1bfSSepherosa Ziehau if ((sc->sc_flags & ET_FLAG_TXRX_ENABLED) == 0 &&
20733effc1bfSSepherosa Ziehau (mii->mii_media_status & IFM_ACTIVE) &&
207460d2de1fSSepherosa Ziehau IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
207560d2de1fSSepherosa Ziehau if_printf(ifp, "Link up, enable TX/RX\n");
207660d2de1fSSepherosa Ziehau if (et_enable_txrx(sc, 0) == 0)
20779db4b353SSepherosa Ziehau if_devstart(ifp);
207860d2de1fSSepherosa Ziehau }
2079d217d4d9SSepherosa Ziehau callout_reset(&sc->sc_tick, hz, et_tick, sc);
2080d217d4d9SSepherosa Ziehau
2081d217d4d9SSepherosa Ziehau lwkt_serialize_exit(ifp->if_serializer);
2082d217d4d9SSepherosa Ziehau }
2083d217d4d9SSepherosa Ziehau
2084d217d4d9SSepherosa Ziehau static int
et_newbuf_cluster(struct et_rxbuf_data * rbd,int buf_idx,int init)2085d217d4d9SSepherosa Ziehau et_newbuf_cluster(struct et_rxbuf_data *rbd, int buf_idx, int init)
2086d217d4d9SSepherosa Ziehau {
2087d217d4d9SSepherosa Ziehau return et_newbuf(rbd, buf_idx, init, MCLBYTES);
2088d217d4d9SSepherosa Ziehau }
2089d217d4d9SSepherosa Ziehau
2090d217d4d9SSepherosa Ziehau static int
et_newbuf_hdr(struct et_rxbuf_data * rbd,int buf_idx,int init)2091d217d4d9SSepherosa Ziehau et_newbuf_hdr(struct et_rxbuf_data *rbd, int buf_idx, int init)
2092d217d4d9SSepherosa Ziehau {
2093d217d4d9SSepherosa Ziehau return et_newbuf(rbd, buf_idx, init, MHLEN);
2094d217d4d9SSepherosa Ziehau }
2095d217d4d9SSepherosa Ziehau
2096d217d4d9SSepherosa Ziehau static int
et_newbuf(struct et_rxbuf_data * rbd,int buf_idx,int init,int len0)2097d217d4d9SSepherosa Ziehau et_newbuf(struct et_rxbuf_data *rbd, int buf_idx, int init, int len0)
2098d217d4d9SSepherosa Ziehau {
2099d217d4d9SSepherosa Ziehau struct et_softc *sc = rbd->rbd_softc;
2100d217d4d9SSepherosa Ziehau struct et_rxbuf *rb;
2101d217d4d9SSepherosa Ziehau struct mbuf *m;
2102d217d4d9SSepherosa Ziehau bus_dma_segment_t seg;
2103d217d4d9SSepherosa Ziehau bus_dmamap_t dmap;
21047479ff0bSSepherosa Ziehau int error, len, nseg;
2105d217d4d9SSepherosa Ziehau
2106ed20d0e3SSascha Wildner KASSERT(!rbd->rbd_jumbo, ("calling %s with jumbo ring", __func__));
21073effc1bfSSepherosa Ziehau
2108d217d4d9SSepherosa Ziehau KKASSERT(buf_idx < ET_RX_NDESC);
2109d217d4d9SSepherosa Ziehau rb = &rbd->rbd_buf[buf_idx];
2110d217d4d9SSepherosa Ziehau
2111b5523eacSSascha Wildner m = m_getl(len0, init ? M_WAITOK : M_NOWAIT, MT_DATA, M_PKTHDR, &len);
2112d217d4d9SSepherosa Ziehau if (m == NULL) {
2113d217d4d9SSepherosa Ziehau error = ENOBUFS;
2114d217d4d9SSepherosa Ziehau
21150fd7469eSSepherosa Ziehau if (init) {
2116d217d4d9SSepherosa Ziehau if_printf(&sc->arpcom.ac_if,
2117d217d4d9SSepherosa Ziehau "m_getl failed, size %d\n", len0);
2118d217d4d9SSepherosa Ziehau return error;
2119d217d4d9SSepherosa Ziehau } else {
2120d217d4d9SSepherosa Ziehau goto back;
2121d217d4d9SSepherosa Ziehau }
2122d217d4d9SSepherosa Ziehau }
2123d217d4d9SSepherosa Ziehau m->m_len = m->m_pkthdr.len = len;
2124d217d4d9SSepherosa Ziehau
2125d217d4d9SSepherosa Ziehau /*
2126d217d4d9SSepherosa Ziehau * Try load RX mbuf into temporary DMA tag
2127d217d4d9SSepherosa Ziehau */
21287479ff0bSSepherosa Ziehau error = bus_dmamap_load_mbuf_segment(sc->sc_rxbuf_dtag,
21297479ff0bSSepherosa Ziehau sc->sc_rxbuf_tmp_dmap, m, &seg, 1, &nseg,
21307479ff0bSSepherosa Ziehau BUS_DMA_NOWAIT);
21317479ff0bSSepherosa Ziehau if (error) {
2132d217d4d9SSepherosa Ziehau m_freem(m);
2133d217d4d9SSepherosa Ziehau if (init) {
21340fd7469eSSepherosa Ziehau if_printf(&sc->arpcom.ac_if, "can't load RX mbuf\n");
2135d217d4d9SSepherosa Ziehau return error;
2136d217d4d9SSepherosa Ziehau } else {
2137d217d4d9SSepherosa Ziehau goto back;
2138d217d4d9SSepherosa Ziehau }
2139d217d4d9SSepherosa Ziehau }
2140d217d4d9SSepherosa Ziehau
21413effc1bfSSepherosa Ziehau if (!init) {
21420fe5209eSSepherosa Ziehau bus_dmamap_sync(sc->sc_rxbuf_dtag, rb->rb_dmap,
21433effc1bfSSepherosa Ziehau BUS_DMASYNC_POSTREAD);
21440fe5209eSSepherosa Ziehau bus_dmamap_unload(sc->sc_rxbuf_dtag, rb->rb_dmap);
21453effc1bfSSepherosa Ziehau }
2146d217d4d9SSepherosa Ziehau rb->rb_mbuf = m;
2147d217d4d9SSepherosa Ziehau rb->rb_paddr = seg.ds_addr;
2148d217d4d9SSepherosa Ziehau
2149d217d4d9SSepherosa Ziehau /*
2150d217d4d9SSepherosa Ziehau * Swap RX buf's DMA map with the loaded temporary one
2151d217d4d9SSepherosa Ziehau */
2152d217d4d9SSepherosa Ziehau dmap = rb->rb_dmap;
21530fe5209eSSepherosa Ziehau rb->rb_dmap = sc->sc_rxbuf_tmp_dmap;
21540fe5209eSSepherosa Ziehau sc->sc_rxbuf_tmp_dmap = dmap;
2155d217d4d9SSepherosa Ziehau
2156d217d4d9SSepherosa Ziehau error = 0;
2157d217d4d9SSepherosa Ziehau back:
21583effc1bfSSepherosa Ziehau et_setup_rxdesc(rbd, buf_idx, rb->rb_paddr);
2159d217d4d9SSepherosa Ziehau return error;
2160d217d4d9SSepherosa Ziehau }
2161d217d4d9SSepherosa Ziehau
2162d217d4d9SSepherosa Ziehau static int
et_sysctl_rx_intr_npkts(SYSCTL_HANDLER_ARGS)2163d217d4d9SSepherosa Ziehau et_sysctl_rx_intr_npkts(SYSCTL_HANDLER_ARGS)
2164d217d4d9SSepherosa Ziehau {
2165d217d4d9SSepherosa Ziehau struct et_softc *sc = arg1;
2166d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
2167d217d4d9SSepherosa Ziehau int error = 0, v;
2168d217d4d9SSepherosa Ziehau
2169d217d4d9SSepherosa Ziehau lwkt_serialize_enter(ifp->if_serializer);
2170d217d4d9SSepherosa Ziehau
2171d217d4d9SSepherosa Ziehau v = sc->sc_rx_intr_npkts;
2172d217d4d9SSepherosa Ziehau error = sysctl_handle_int(oidp, &v, 0, req);
2173d217d4d9SSepherosa Ziehau if (error || req->newptr == NULL)
2174d217d4d9SSepherosa Ziehau goto back;
2175d217d4d9SSepherosa Ziehau if (v <= 0) {
2176d217d4d9SSepherosa Ziehau error = EINVAL;
2177d217d4d9SSepherosa Ziehau goto back;
2178d217d4d9SSepherosa Ziehau }
2179d217d4d9SSepherosa Ziehau
2180d217d4d9SSepherosa Ziehau if (sc->sc_rx_intr_npkts != v) {
2181d217d4d9SSepherosa Ziehau if (ifp->if_flags & IFF_RUNNING)
2182d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_INTR_NPKTS, v);
2183d217d4d9SSepherosa Ziehau sc->sc_rx_intr_npkts = v;
2184d217d4d9SSepherosa Ziehau }
2185d217d4d9SSepherosa Ziehau back:
2186d217d4d9SSepherosa Ziehau lwkt_serialize_exit(ifp->if_serializer);
2187d217d4d9SSepherosa Ziehau return error;
2188d217d4d9SSepherosa Ziehau }
2189d217d4d9SSepherosa Ziehau
2190d217d4d9SSepherosa Ziehau static int
et_sysctl_rx_intr_delay(SYSCTL_HANDLER_ARGS)2191d217d4d9SSepherosa Ziehau et_sysctl_rx_intr_delay(SYSCTL_HANDLER_ARGS)
2192d217d4d9SSepherosa Ziehau {
2193d217d4d9SSepherosa Ziehau struct et_softc *sc = arg1;
2194d217d4d9SSepherosa Ziehau struct ifnet *ifp = &sc->arpcom.ac_if;
2195d217d4d9SSepherosa Ziehau int error = 0, v;
2196d217d4d9SSepherosa Ziehau
2197d217d4d9SSepherosa Ziehau lwkt_serialize_enter(ifp->if_serializer);
2198d217d4d9SSepherosa Ziehau
2199d217d4d9SSepherosa Ziehau v = sc->sc_rx_intr_delay;
2200d217d4d9SSepherosa Ziehau error = sysctl_handle_int(oidp, &v, 0, req);
2201d217d4d9SSepherosa Ziehau if (error || req->newptr == NULL)
2202d217d4d9SSepherosa Ziehau goto back;
2203d217d4d9SSepherosa Ziehau if (v <= 0) {
2204d217d4d9SSepherosa Ziehau error = EINVAL;
2205d217d4d9SSepherosa Ziehau goto back;
2206d217d4d9SSepherosa Ziehau }
2207d217d4d9SSepherosa Ziehau
2208d217d4d9SSepherosa Ziehau if (sc->sc_rx_intr_delay != v) {
2209d217d4d9SSepherosa Ziehau if (ifp->if_flags & IFF_RUNNING)
2210d217d4d9SSepherosa Ziehau CSR_WRITE_4(sc, ET_RX_INTR_DELAY, v);
2211d217d4d9SSepherosa Ziehau sc->sc_rx_intr_delay = v;
2212d217d4d9SSepherosa Ziehau }
2213d217d4d9SSepherosa Ziehau back:
2214d217d4d9SSepherosa Ziehau lwkt_serialize_exit(ifp->if_serializer);
2215d217d4d9SSepherosa Ziehau return error;
2216d217d4d9SSepherosa Ziehau }
221760d2de1fSSepherosa Ziehau
221860d2de1fSSepherosa Ziehau static void
et_setmedia(struct et_softc * sc)221960d2de1fSSepherosa Ziehau et_setmedia(struct et_softc *sc)
222060d2de1fSSepherosa Ziehau {
222160d2de1fSSepherosa Ziehau struct mii_data *mii = device_get_softc(sc->sc_miibus);
222260d2de1fSSepherosa Ziehau uint32_t cfg2, ctrl;
222360d2de1fSSepherosa Ziehau
222460d2de1fSSepherosa Ziehau cfg2 = CSR_READ_4(sc, ET_MAC_CFG2);
222560d2de1fSSepherosa Ziehau cfg2 &= ~(ET_MAC_CFG2_MODE_MII | ET_MAC_CFG2_MODE_GMII |
222660d2de1fSSepherosa Ziehau ET_MAC_CFG2_FDX | ET_MAC_CFG2_BIGFRM);
222760d2de1fSSepherosa Ziehau cfg2 |= ET_MAC_CFG2_LENCHK | ET_MAC_CFG2_CRC | ET_MAC_CFG2_PADCRC |
222860d2de1fSSepherosa Ziehau __SHIFTIN(7, ET_MAC_CFG2_PREAMBLE_LEN);
222960d2de1fSSepherosa Ziehau
223060d2de1fSSepherosa Ziehau ctrl = CSR_READ_4(sc, ET_MAC_CTRL);
223160d2de1fSSepherosa Ziehau ctrl &= ~(ET_MAC_CTRL_GHDX | ET_MAC_CTRL_MODE_MII);
223260d2de1fSSepherosa Ziehau
223360d2de1fSSepherosa Ziehau if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
223460d2de1fSSepherosa Ziehau cfg2 |= ET_MAC_CFG2_MODE_GMII;
223560d2de1fSSepherosa Ziehau } else {
223660d2de1fSSepherosa Ziehau cfg2 |= ET_MAC_CFG2_MODE_MII;
223760d2de1fSSepherosa Ziehau ctrl |= ET_MAC_CTRL_MODE_MII;
223860d2de1fSSepherosa Ziehau }
223960d2de1fSSepherosa Ziehau
224060d2de1fSSepherosa Ziehau if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
224160d2de1fSSepherosa Ziehau cfg2 |= ET_MAC_CFG2_FDX;
224260d2de1fSSepherosa Ziehau else
224360d2de1fSSepherosa Ziehau ctrl |= ET_MAC_CTRL_GHDX;
224460d2de1fSSepherosa Ziehau
224560d2de1fSSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CTRL, ctrl);
224660d2de1fSSepherosa Ziehau CSR_WRITE_4(sc, ET_MAC_CFG2, cfg2);
224760d2de1fSSepherosa Ziehau }
22483effc1bfSSepherosa Ziehau
22493effc1bfSSepherosa Ziehau static int
et_jumbo_mem_alloc(device_t dev)22503effc1bfSSepherosa Ziehau et_jumbo_mem_alloc(device_t dev)
22513effc1bfSSepherosa Ziehau {
22523effc1bfSSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
22533effc1bfSSepherosa Ziehau struct et_jumbo_data *jd = &sc->sc_jumbo_data;
22543effc1bfSSepherosa Ziehau bus_addr_t paddr;
22553effc1bfSSepherosa Ziehau uint8_t *buf;
2256c7f73cc7SSepherosa Ziehau int i;
22573effc1bfSSepherosa Ziehau
2258c7f73cc7SSepherosa Ziehau jd->jd_buf = bus_dmamem_coherent_any(sc->sc_dtag,
2259c2ebe33eSSepherosa Ziehau ET_JUMBO_ALIGN, ET_JUMBO_MEM_SIZE, BUS_DMA_WAITOK,
2260c7f73cc7SSepherosa Ziehau &jd->jd_dtag, &jd->jd_dmap, &paddr);
2261c7f73cc7SSepherosa Ziehau if (jd->jd_buf == NULL) {
22623effc1bfSSepherosa Ziehau device_printf(dev, "can't create jumbo DMA stuffs\n");
2263c7f73cc7SSepherosa Ziehau return ENOMEM;
22643effc1bfSSepherosa Ziehau }
22653effc1bfSSepherosa Ziehau
22663effc1bfSSepherosa Ziehau jd->jd_slots = kmalloc(sizeof(*jd->jd_slots) * ET_JSLOTS, M_DEVBUF,
22673effc1bfSSepherosa Ziehau M_WAITOK | M_ZERO);
22683effc1bfSSepherosa Ziehau lwkt_serialize_init(&jd->jd_serializer);
22693effc1bfSSepherosa Ziehau SLIST_INIT(&jd->jd_free_slots);
22703effc1bfSSepherosa Ziehau
22713effc1bfSSepherosa Ziehau buf = jd->jd_buf;
22723effc1bfSSepherosa Ziehau for (i = 0; i < ET_JSLOTS; ++i) {
22733effc1bfSSepherosa Ziehau struct et_jslot *jslot = &jd->jd_slots[i];
22743effc1bfSSepherosa Ziehau
22753effc1bfSSepherosa Ziehau jslot->jslot_data = jd;
22763effc1bfSSepherosa Ziehau jslot->jslot_buf = buf;
22773effc1bfSSepherosa Ziehau jslot->jslot_paddr = paddr;
22783effc1bfSSepherosa Ziehau jslot->jslot_inuse = 0;
22793effc1bfSSepherosa Ziehau jslot->jslot_index = i;
22803effc1bfSSepherosa Ziehau SLIST_INSERT_HEAD(&jd->jd_free_slots, jslot, jslot_link);
22813effc1bfSSepherosa Ziehau
22823effc1bfSSepherosa Ziehau buf += ET_JLEN;
22833effc1bfSSepherosa Ziehau paddr += ET_JLEN;
22843effc1bfSSepherosa Ziehau }
22853effc1bfSSepherosa Ziehau return 0;
22863effc1bfSSepherosa Ziehau }
22873effc1bfSSepherosa Ziehau
22883effc1bfSSepherosa Ziehau static void
et_jumbo_mem_free(device_t dev)22893effc1bfSSepherosa Ziehau et_jumbo_mem_free(device_t dev)
22903effc1bfSSepherosa Ziehau {
22913effc1bfSSepherosa Ziehau struct et_softc *sc = device_get_softc(dev);
22923effc1bfSSepherosa Ziehau struct et_jumbo_data *jd = &sc->sc_jumbo_data;
22933effc1bfSSepherosa Ziehau
22943effc1bfSSepherosa Ziehau KKASSERT(sc->sc_flags & ET_FLAG_JUMBO);
22953effc1bfSSepherosa Ziehau
22963effc1bfSSepherosa Ziehau kfree(jd->jd_slots, M_DEVBUF);
22973effc1bfSSepherosa Ziehau et_dma_mem_destroy(jd->jd_dtag, jd->jd_buf, jd->jd_dmap);
22983effc1bfSSepherosa Ziehau }
22993effc1bfSSepherosa Ziehau
23003effc1bfSSepherosa Ziehau static struct et_jslot *
et_jalloc(struct et_jumbo_data * jd)23013effc1bfSSepherosa Ziehau et_jalloc(struct et_jumbo_data *jd)
23023effc1bfSSepherosa Ziehau {
23033effc1bfSSepherosa Ziehau struct et_jslot *jslot;
23043effc1bfSSepherosa Ziehau
23053effc1bfSSepherosa Ziehau lwkt_serialize_enter(&jd->jd_serializer);
23063effc1bfSSepherosa Ziehau
23073effc1bfSSepherosa Ziehau jslot = SLIST_FIRST(&jd->jd_free_slots);
23083effc1bfSSepherosa Ziehau if (jslot) {
23093effc1bfSSepherosa Ziehau SLIST_REMOVE_HEAD(&jd->jd_free_slots, jslot_link);
23103effc1bfSSepherosa Ziehau jslot->jslot_inuse = 1;
23113effc1bfSSepherosa Ziehau }
23123effc1bfSSepherosa Ziehau
23133effc1bfSSepherosa Ziehau lwkt_serialize_exit(&jd->jd_serializer);
23143effc1bfSSepherosa Ziehau return jslot;
23153effc1bfSSepherosa Ziehau }
23163effc1bfSSepherosa Ziehau
23173effc1bfSSepherosa Ziehau static void
et_jfree(void * xjslot)23183effc1bfSSepherosa Ziehau et_jfree(void *xjslot)
23193effc1bfSSepherosa Ziehau {
23203effc1bfSSepherosa Ziehau struct et_jslot *jslot = xjslot;
23213effc1bfSSepherosa Ziehau struct et_jumbo_data *jd = jslot->jslot_data;
23223effc1bfSSepherosa Ziehau
23233effc1bfSSepherosa Ziehau if (&jd->jd_slots[jslot->jslot_index] != jslot) {
2324ed20d0e3SSascha Wildner panic("%s wrong jslot!?", __func__);
23253effc1bfSSepherosa Ziehau } else if (jslot->jslot_inuse == 0) {
2326ed20d0e3SSascha Wildner panic("%s jslot already freed", __func__);
23273effc1bfSSepherosa Ziehau } else {
23283effc1bfSSepherosa Ziehau lwkt_serialize_enter(&jd->jd_serializer);
23293effc1bfSSepherosa Ziehau
23303effc1bfSSepherosa Ziehau atomic_subtract_int(&jslot->jslot_inuse, 1);
23313effc1bfSSepherosa Ziehau if (jslot->jslot_inuse == 0) {
23323effc1bfSSepherosa Ziehau SLIST_INSERT_HEAD(&jd->jd_free_slots, jslot,
23333effc1bfSSepherosa Ziehau jslot_link);
23343effc1bfSSepherosa Ziehau }
23353effc1bfSSepherosa Ziehau
23363effc1bfSSepherosa Ziehau lwkt_serialize_exit(&jd->jd_serializer);
23373effc1bfSSepherosa Ziehau }
23383effc1bfSSepherosa Ziehau }
23393effc1bfSSepherosa Ziehau
23403effc1bfSSepherosa Ziehau static void
et_jref(void * xjslot)23413effc1bfSSepherosa Ziehau et_jref(void *xjslot)
23423effc1bfSSepherosa Ziehau {
23433effc1bfSSepherosa Ziehau struct et_jslot *jslot = xjslot;
23443effc1bfSSepherosa Ziehau struct et_jumbo_data *jd = jslot->jslot_data;
23453effc1bfSSepherosa Ziehau
23463effc1bfSSepherosa Ziehau if (&jd->jd_slots[jslot->jslot_index] != jslot)
2347ed20d0e3SSascha Wildner panic("%s wrong jslot!?", __func__);
23483effc1bfSSepherosa Ziehau else if (jslot->jslot_inuse == 0)
2349ed20d0e3SSascha Wildner panic("%s jslot already freed", __func__);
23503effc1bfSSepherosa Ziehau else
23513effc1bfSSepherosa Ziehau atomic_add_int(&jslot->jslot_inuse, 1);
23523effc1bfSSepherosa Ziehau }
23533effc1bfSSepherosa Ziehau
23543effc1bfSSepherosa Ziehau static int
et_newbuf_jumbo(struct et_rxbuf_data * rbd,int buf_idx,int init)23553effc1bfSSepherosa Ziehau et_newbuf_jumbo(struct et_rxbuf_data *rbd, int buf_idx, int init)
23563effc1bfSSepherosa Ziehau {
23573effc1bfSSepherosa Ziehau struct et_softc *sc = rbd->rbd_softc;
23583effc1bfSSepherosa Ziehau struct et_rxbuf *rb;
23593effc1bfSSepherosa Ziehau struct mbuf *m;
23603effc1bfSSepherosa Ziehau struct et_jslot *jslot;
23613effc1bfSSepherosa Ziehau int error;
23623effc1bfSSepherosa Ziehau
2363ed20d0e3SSascha Wildner KASSERT(rbd->rbd_jumbo, ("calling %s with non-jumbo ring", __func__));
23643effc1bfSSepherosa Ziehau
23653effc1bfSSepherosa Ziehau KKASSERT(buf_idx < ET_RX_NDESC);
23663effc1bfSSepherosa Ziehau rb = &rbd->rbd_buf[buf_idx];
23673effc1bfSSepherosa Ziehau
23683effc1bfSSepherosa Ziehau error = ENOBUFS;
23693effc1bfSSepherosa Ziehau
2370b5523eacSSascha Wildner MGETHDR(m, init ? M_WAITOK : M_NOWAIT, MT_DATA);
23713effc1bfSSepherosa Ziehau if (m == NULL) {
23723effc1bfSSepherosa Ziehau if (init) {
23733effc1bfSSepherosa Ziehau if_printf(&sc->arpcom.ac_if, "MGETHDR failed\n");
23743effc1bfSSepherosa Ziehau return error;
23753effc1bfSSepherosa Ziehau } else {
23763effc1bfSSepherosa Ziehau goto back;
23773effc1bfSSepherosa Ziehau }
23783effc1bfSSepherosa Ziehau }
23793effc1bfSSepherosa Ziehau
23803effc1bfSSepherosa Ziehau jslot = et_jalloc(&sc->sc_jumbo_data);
23813effc1bfSSepherosa Ziehau if (jslot == NULL) {
23823effc1bfSSepherosa Ziehau m_freem(m);
23833effc1bfSSepherosa Ziehau
23843effc1bfSSepherosa Ziehau if (init) {
23853effc1bfSSepherosa Ziehau if_printf(&sc->arpcom.ac_if,
23863effc1bfSSepherosa Ziehau "jslot allocation failed\n");
23873effc1bfSSepherosa Ziehau return error;
23883effc1bfSSepherosa Ziehau } else {
23893effc1bfSSepherosa Ziehau goto back;
23903effc1bfSSepherosa Ziehau }
23913effc1bfSSepherosa Ziehau }
23923effc1bfSSepherosa Ziehau
23933effc1bfSSepherosa Ziehau m->m_ext.ext_arg = jslot;
23943effc1bfSSepherosa Ziehau m->m_ext.ext_buf = jslot->jslot_buf;
23953effc1bfSSepherosa Ziehau m->m_ext.ext_free = et_jfree;
23963effc1bfSSepherosa Ziehau m->m_ext.ext_ref = et_jref;
23973effc1bfSSepherosa Ziehau m->m_ext.ext_size = ET_JUMBO_FRAMELEN;
23983effc1bfSSepherosa Ziehau m->m_flags |= M_EXT;
23993effc1bfSSepherosa Ziehau m->m_data = m->m_ext.ext_buf;
24003effc1bfSSepherosa Ziehau m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
24013effc1bfSSepherosa Ziehau
24023effc1bfSSepherosa Ziehau rb->rb_mbuf = m;
24033effc1bfSSepherosa Ziehau rb->rb_paddr = jslot->jslot_paddr;
24043effc1bfSSepherosa Ziehau
24053effc1bfSSepherosa Ziehau error = 0;
24063effc1bfSSepherosa Ziehau back:
24073effc1bfSSepherosa Ziehau et_setup_rxdesc(rbd, buf_idx, rb->rb_paddr);
24083effc1bfSSepherosa Ziehau return error;
24093effc1bfSSepherosa Ziehau }
24103effc1bfSSepherosa Ziehau
24113effc1bfSSepherosa Ziehau static void
et_setup_rxdesc(struct et_rxbuf_data * rbd,int buf_idx,bus_addr_t paddr)24123effc1bfSSepherosa Ziehau et_setup_rxdesc(struct et_rxbuf_data *rbd, int buf_idx, bus_addr_t paddr)
24133effc1bfSSepherosa Ziehau {
24143effc1bfSSepherosa Ziehau struct et_rxdesc_ring *rx_ring = rbd->rbd_ring;
24153effc1bfSSepherosa Ziehau struct et_rxdesc *desc;
24163effc1bfSSepherosa Ziehau
24173effc1bfSSepherosa Ziehau KKASSERT(buf_idx < ET_RX_NDESC);
24183effc1bfSSepherosa Ziehau desc = &rx_ring->rr_desc[buf_idx];
24193effc1bfSSepherosa Ziehau
24203effc1bfSSepherosa Ziehau desc->rd_addr_hi = ET_ADDR_HI(paddr);
24213effc1bfSSepherosa Ziehau desc->rd_addr_lo = ET_ADDR_LO(paddr);
24223effc1bfSSepherosa Ziehau desc->rd_ctrl = __SHIFTIN(buf_idx, ET_RDCTRL_BUFIDX);
24233effc1bfSSepherosa Ziehau }
2424