xref: /dflybsd-src/sys/dev/netif/ae/if_aevar.h (revision 26595b188cbe468e3b07a13e2a5cfaa3de0d7843)
1*f85e0762SSepherosa Ziehau /*-
2*f85e0762SSepherosa Ziehau  * Copyright (c) 2008 Stanislav Sedov <stas@FreeBSD.org>.
3*f85e0762SSepherosa Ziehau  * All rights reserved.
4*f85e0762SSepherosa Ziehau  *
5*f85e0762SSepherosa Ziehau  * Redistribution and use in source and binary forms, with or without
6*f85e0762SSepherosa Ziehau  * modification, are permitted provided that the following conditions
7*f85e0762SSepherosa Ziehau  * are met:
8*f85e0762SSepherosa Ziehau  * 1. Redistributions of source code must retain the above copyright
9*f85e0762SSepherosa Ziehau  *    notice, this list of conditions and the following disclaimer.
10*f85e0762SSepherosa Ziehau  * 2. Redistributions in binary form must reproduce the above copyright
11*f85e0762SSepherosa Ziehau  *    notice, this list of conditions and the following disclaimer in the
12*f85e0762SSepherosa Ziehau  *    documentation and/or other materials provided with the distribution.
13*f85e0762SSepherosa Ziehau  *
14*f85e0762SSepherosa Ziehau  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15*f85e0762SSepherosa Ziehau  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16*f85e0762SSepherosa Ziehau  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17*f85e0762SSepherosa Ziehau  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18*f85e0762SSepherosa Ziehau  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19*f85e0762SSepherosa Ziehau  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20*f85e0762SSepherosa Ziehau  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21*f85e0762SSepherosa Ziehau  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22*f85e0762SSepherosa Ziehau  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23*f85e0762SSepherosa Ziehau  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24*f85e0762SSepherosa Ziehau  *
25*f85e0762SSepherosa Ziehau  * $FreeBSD: src/sys/dev/ae/if_aevar.h,v 1.1.2.1.4.1 2009/04/15 03:14:26 kensmith Exp $
26*f85e0762SSepherosa Ziehau  */
27*f85e0762SSepherosa Ziehau 
28*f85e0762SSepherosa Ziehau #ifndef IF_AEVAR_H
29*f85e0762SSepherosa Ziehau #define IF_AEVAR_H
30*f85e0762SSepherosa Ziehau 
31*f85e0762SSepherosa Ziehau /*
32*f85e0762SSepherosa Ziehau  * Supported chips identifiers.
33*f85e0762SSepherosa Ziehau */
34*f85e0762SSepherosa Ziehau #define	VENDORID_ATTANSIC	0x1969
35*f85e0762SSepherosa Ziehau #define	DEVICEID_ATTANSIC_L2	0x2048
36*f85e0762SSepherosa Ziehau 
37*f85e0762SSepherosa Ziehau /* How much to wait for reset to complete (10 microsecond units). */
38*f85e0762SSepherosa Ziehau #define	AE_RESET_TIMEOUT	100
39*f85e0762SSepherosa Ziehau 
40*f85e0762SSepherosa Ziehau /* How much to wait for device to enter idle state (100 microsecond units). */
41*f85e0762SSepherosa Ziehau #define	AE_IDLE_TIMEOUT		100
42*f85e0762SSepherosa Ziehau 
43*f85e0762SSepherosa Ziehau /* How much to wait for MDIO to do the work (2 microsecond units). */
44*f85e0762SSepherosa Ziehau #define	AE_MDIO_TIMEOUT		10
45*f85e0762SSepherosa Ziehau 
46*f85e0762SSepherosa Ziehau /* How much to wait for VPD reading operation to complete (2 ms units). */
47*f85e0762SSepherosa Ziehau #define AE_VPD_TIMEOUT		10
48*f85e0762SSepherosa Ziehau 
49*f85e0762SSepherosa Ziehau /* How much to wait for send operation to complete (HZ units). */
50*f85e0762SSepherosa Ziehau #define	AE_TX_TIMEOUT		5
51*f85e0762SSepherosa Ziehau 
52*f85e0762SSepherosa Ziehau /* Default PHY address. */
53*f85e0762SSepherosa Ziehau #define	AE_PHYADDR_DEFAULT	0
54*f85e0762SSepherosa Ziehau 
55*f85e0762SSepherosa Ziehau /* Tx packet descriptor header format. */
56*f85e0762SSepherosa Ziehau struct ae_txd {
57*f85e0762SSepherosa Ziehau 	uint16_t	len;
58*f85e0762SSepherosa Ziehau 	uint16_t	vlan;
59*f85e0762SSepherosa Ziehau } __packed;
60*f85e0762SSepherosa Ziehau 
61*f85e0762SSepherosa Ziehau /* Tx status descriptor format. */
62*f85e0762SSepherosa Ziehau struct ae_txs {
63*f85e0762SSepherosa Ziehau 	uint16_t	len;
64*f85e0762SSepherosa Ziehau 	uint16_t	flags;
65*f85e0762SSepherosa Ziehau } __packed;
66*f85e0762SSepherosa Ziehau 
67*f85e0762SSepherosa Ziehau /* Rx packet descriptor format. */
68*f85e0762SSepherosa Ziehau struct ae_rxd {
69*f85e0762SSepherosa Ziehau 	uint16_t	len;
70*f85e0762SSepherosa Ziehau 	uint16_t	flags;
71*f85e0762SSepherosa Ziehau 	uint16_t	vlan;
72*f85e0762SSepherosa Ziehau 	uint16_t	__pad;
73*f85e0762SSepherosa Ziehau 	uint8_t		data[1528];
74*f85e0762SSepherosa Ziehau } __packed;
75*f85e0762SSepherosa Ziehau 
76*f85e0762SSepherosa Ziehau /* Statistics. */
77*f85e0762SSepherosa Ziehau struct ae_stats {
78*f85e0762SSepherosa Ziehau 	uint32_t	rx_bcast;
79*f85e0762SSepherosa Ziehau 	uint32_t	rx_mcast;
80*f85e0762SSepherosa Ziehau 	uint32_t	rx_pause;
81*f85e0762SSepherosa Ziehau 	uint32_t	rx_ctrl;
82*f85e0762SSepherosa Ziehau 	uint32_t	rx_crcerr;
83*f85e0762SSepherosa Ziehau 	uint32_t	rx_codeerr;
84*f85e0762SSepherosa Ziehau 	uint32_t	rx_runt;
85*f85e0762SSepherosa Ziehau 	uint32_t	rx_frag;
86*f85e0762SSepherosa Ziehau 	uint32_t	rx_trunc;
87*f85e0762SSepherosa Ziehau 	uint32_t	rx_align;
88*f85e0762SSepherosa Ziehau 	uint32_t	tx_bcast;
89*f85e0762SSepherosa Ziehau 	uint32_t	tx_mcast;
90*f85e0762SSepherosa Ziehau 	uint32_t	tx_pause;
91*f85e0762SSepherosa Ziehau 	uint32_t	tx_ctrl;
92*f85e0762SSepherosa Ziehau 	uint32_t	tx_defer;
93*f85e0762SSepherosa Ziehau 	uint32_t	tx_excdefer;
94*f85e0762SSepherosa Ziehau 	uint32_t	tx_singlecol;
95*f85e0762SSepherosa Ziehau 	uint32_t	tx_multicol;
96*f85e0762SSepherosa Ziehau 	uint32_t	tx_latecol;
97*f85e0762SSepherosa Ziehau 	uint32_t	tx_abortcol;
98*f85e0762SSepherosa Ziehau 	uint32_t	tx_underrun;
99*f85e0762SSepherosa Ziehau };
100*f85e0762SSepherosa Ziehau 
101*f85e0762SSepherosa Ziehau /* Software state structure. */
102*f85e0762SSepherosa Ziehau struct ae_softc	{
103*f85e0762SSepherosa Ziehau 	struct arpcom		arpcom;
104*f85e0762SSepherosa Ziehau 	device_t		ae_dev;
105*f85e0762SSepherosa Ziehau 
106*f85e0762SSepherosa Ziehau 	int			ae_mem_rid;
107*f85e0762SSepherosa Ziehau 	struct resource		*ae_mem_res;
108*f85e0762SSepherosa Ziehau         bus_space_tag_t		ae_mem_bt;
109*f85e0762SSepherosa Ziehau         bus_space_handle_t	ae_mem_bh;
110*f85e0762SSepherosa Ziehau 
111*f85e0762SSepherosa Ziehau 	int			ae_irq_rid;
112*f85e0762SSepherosa Ziehau 	struct resource		*ae_irq_res;
113*f85e0762SSepherosa Ziehau 	void			*ae_irq_handle;
114*f85e0762SSepherosa Ziehau 
115*f85e0762SSepherosa Ziehau 	int			ae_phyaddr;
116*f85e0762SSepherosa Ziehau 	device_t                ae_miibus;
117*f85e0762SSepherosa Ziehau 
118*f85e0762SSepherosa Ziehau 	int			ae_rev;
119*f85e0762SSepherosa Ziehau 	int			ae_chip_rev;
120*f85e0762SSepherosa Ziehau 	uint8_t			ae_eaddr[ETHER_ADDR_LEN];
121*f85e0762SSepherosa Ziehau 	uint8_t			ae_flags;
122*f85e0762SSepherosa Ziehau 	int			ae_if_flags;
123*f85e0762SSepherosa Ziehau 
124*f85e0762SSepherosa Ziehau 	struct callout		ae_tick_ch;
125*f85e0762SSepherosa Ziehau 
126*f85e0762SSepherosa Ziehau 	/* DMA tags. */
127*f85e0762SSepherosa Ziehau 	bus_dma_tag_t		dma_parent_tag;
128*f85e0762SSepherosa Ziehau 	bus_dma_tag_t		dma_rxd_tag;
129*f85e0762SSepherosa Ziehau 	bus_dma_tag_t		dma_txd_tag;
130*f85e0762SSepherosa Ziehau 	bus_dma_tag_t		dma_txs_tag;
131*f85e0762SSepherosa Ziehau 	bus_dmamap_t		dma_rxd_map;
132*f85e0762SSepherosa Ziehau 	bus_dmamap_t		dma_txd_map;
133*f85e0762SSepherosa Ziehau 	bus_dmamap_t		dma_txs_map;
134*f85e0762SSepherosa Ziehau 
135*f85e0762SSepherosa Ziehau 	bus_addr_t		dma_rxd_busaddr;
136*f85e0762SSepherosa Ziehau 	bus_addr_t		dma_txd_busaddr;
137*f85e0762SSepherosa Ziehau 	bus_addr_t		dma_txs_busaddr;
138*f85e0762SSepherosa Ziehau 
139*f85e0762SSepherosa Ziehau 	uint8_t			*rxd_base_dma;	/* Start of allocated area. */
140*f85e0762SSepherosa Ziehau 	struct ae_rxd		*rxd_base;	/* Start of RxD ring. */
141*f85e0762SSepherosa Ziehau 	uint8_t			*txd_base;	/* Start of TxD ring. */
142*f85e0762SSepherosa Ziehau 	struct ae_txs		*txs_base;	/* Start of TxS ring. */
143*f85e0762SSepherosa Ziehau 
144*f85e0762SSepherosa Ziehau 	/* Ring pointers. */
145*f85e0762SSepherosa Ziehau 	unsigned int		rxd_cur;
146*f85e0762SSepherosa Ziehau 	unsigned int		txd_cur;
147*f85e0762SSepherosa Ziehau 	unsigned int		txs_cur;
148*f85e0762SSepherosa Ziehau 	unsigned int		txs_ack;
149*f85e0762SSepherosa Ziehau 	unsigned int		txd_ack;
150*f85e0762SSepherosa Ziehau 
151*f85e0762SSepherosa Ziehau 	int			tx_inproc;	/* Active Tx frames in ring. */
152*f85e0762SSepherosa Ziehau 	int			wd_timer;	/* XXX remove */
153*f85e0762SSepherosa Ziehau 
154*f85e0762SSepherosa Ziehau 	struct ae_stats		stats;
155*f85e0762SSepherosa Ziehau };
156*f85e0762SSepherosa Ziehau 
157*f85e0762SSepherosa Ziehau #define	BUS_ADDR_LO(x)		((uint64_t) (x) & 0xFFFFFFFF)
158*f85e0762SSepherosa Ziehau #define	BUS_ADDR_HI(x)		((uint64_t) (x) >> 32)
159*f85e0762SSepherosa Ziehau 
160*f85e0762SSepherosa Ziehau #define	AE_FLAG_LINK		0x01	/* Has link. */
161*f85e0762SSepherosa Ziehau #define	AE_FLAG_DETACH		0x02	/* Is detaching. */
162*f85e0762SSepherosa Ziehau #define	AE_FLAG_TXAVAIL		0x04	/* Tx'es available. */
163*f85e0762SSepherosa Ziehau #define	AE_FLAG_MSI		0x08	/* Using MSI. */
164*f85e0762SSepherosa Ziehau #define	AE_FLAG_PMG		0x10	/* Supports PCI power management. */
165*f85e0762SSepherosa Ziehau 
166*f85e0762SSepherosa Ziehau #endif	/* IF_AEVAR_H */
167