1926deccbSFrançois Tigeot /*
2926deccbSFrançois Tigeot * Copyright 2008 Advanced Micro Devices, Inc.
3926deccbSFrançois Tigeot * Copyright 2008 Red Hat Inc.
4926deccbSFrançois Tigeot * Copyright 2009 Jerome Glisse.
5926deccbSFrançois Tigeot *
6926deccbSFrançois Tigeot * Permission is hereby granted, free of charge, to any person obtaining a
7926deccbSFrançois Tigeot * copy of this software and associated documentation files (the "Software"),
8926deccbSFrançois Tigeot * to deal in the Software without restriction, including without limitation
9926deccbSFrançois Tigeot * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10926deccbSFrançois Tigeot * and/or sell copies of the Software, and to permit persons to whom the
11926deccbSFrançois Tigeot * Software is furnished to do so, subject to the following conditions:
12926deccbSFrançois Tigeot *
13926deccbSFrançois Tigeot * The above copyright notice and this permission notice shall be included in
14926deccbSFrançois Tigeot * all copies or substantial portions of the Software.
15926deccbSFrançois Tigeot *
16926deccbSFrançois Tigeot * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17926deccbSFrançois Tigeot * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18926deccbSFrançois Tigeot * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19926deccbSFrançois Tigeot * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20926deccbSFrançois Tigeot * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21926deccbSFrançois Tigeot * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22926deccbSFrançois Tigeot * OTHER DEALINGS IN THE SOFTWARE.
23926deccbSFrançois Tigeot *
24926deccbSFrançois Tigeot * Authors: Dave Airlie
25926deccbSFrançois Tigeot * Alex Deucher
26926deccbSFrançois Tigeot * Jerome Glisse
27926deccbSFrançois Tigeot */
28926deccbSFrançois Tigeot #ifndef __RADEON_OBJECT_H__
29926deccbSFrançois Tigeot #define __RADEON_OBJECT_H__
30926deccbSFrançois Tigeot
3183b4b9b9SFrançois Tigeot #include <drm/radeon_drm.h>
32926deccbSFrançois Tigeot #include "radeon.h"
33926deccbSFrançois Tigeot
34926deccbSFrançois Tigeot /**
35926deccbSFrançois Tigeot * radeon_mem_type_to_domain - return domain corresponding to mem_type
36926deccbSFrançois Tigeot * @mem_type: ttm memory type
37926deccbSFrançois Tigeot *
38926deccbSFrançois Tigeot * Returns corresponding domain of the ttm mem_type
39926deccbSFrançois Tigeot */
radeon_mem_type_to_domain(u32 mem_type)40926deccbSFrançois Tigeot static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
41926deccbSFrançois Tigeot {
42926deccbSFrançois Tigeot switch (mem_type) {
43926deccbSFrançois Tigeot case TTM_PL_VRAM:
44926deccbSFrançois Tigeot return RADEON_GEM_DOMAIN_VRAM;
45926deccbSFrançois Tigeot case TTM_PL_TT:
46926deccbSFrançois Tigeot return RADEON_GEM_DOMAIN_GTT;
47926deccbSFrançois Tigeot case TTM_PL_SYSTEM:
48926deccbSFrançois Tigeot return RADEON_GEM_DOMAIN_CPU;
49926deccbSFrançois Tigeot default:
50926deccbSFrançois Tigeot break;
51926deccbSFrançois Tigeot }
52926deccbSFrançois Tigeot return 0;
53926deccbSFrançois Tigeot }
54926deccbSFrançois Tigeot
557dcf36dcSFrançois Tigeot /**
567dcf36dcSFrançois Tigeot * radeon_bo_reserve - reserve bo
577dcf36dcSFrançois Tigeot * @bo: bo structure
587dcf36dcSFrançois Tigeot * @no_intr: don't return -ERESTARTSYS on pending signal
597dcf36dcSFrançois Tigeot *
607dcf36dcSFrançois Tigeot * Returns:
617dcf36dcSFrançois Tigeot * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
627dcf36dcSFrançois Tigeot * a signal. Release all buffer reservations and return to user-space.
637dcf36dcSFrançois Tigeot */
radeon_bo_reserve(struct radeon_bo * bo,bool no_intr)647dcf36dcSFrançois Tigeot static inline int radeon_bo_reserve(struct radeon_bo *bo, bool no_intr)
657dcf36dcSFrançois Tigeot {
667dcf36dcSFrançois Tigeot int r;
677dcf36dcSFrançois Tigeot
68d78d3a22SFrançois Tigeot r = ttm_bo_reserve(&bo->tbo, !no_intr, false, NULL);
697dcf36dcSFrançois Tigeot if (unlikely(r != 0)) {
707dcf36dcSFrançois Tigeot if (r != -ERESTARTSYS)
717dcf36dcSFrançois Tigeot dev_err(bo->rdev->dev, "%p reserve failed\n", bo);
727dcf36dcSFrançois Tigeot return r;
737dcf36dcSFrançois Tigeot }
747dcf36dcSFrançois Tigeot return 0;
757dcf36dcSFrançois Tigeot }
76926deccbSFrançois Tigeot
radeon_bo_unreserve(struct radeon_bo * bo)77926deccbSFrançois Tigeot static inline void radeon_bo_unreserve(struct radeon_bo *bo)
78926deccbSFrançois Tigeot {
79926deccbSFrançois Tigeot ttm_bo_unreserve(&bo->tbo);
80926deccbSFrançois Tigeot }
81926deccbSFrançois Tigeot
82926deccbSFrançois Tigeot /**
83926deccbSFrançois Tigeot * radeon_bo_gpu_offset - return GPU offset of bo
84926deccbSFrançois Tigeot * @bo: radeon object for which we query the offset
85926deccbSFrançois Tigeot *
86926deccbSFrançois Tigeot * Returns current GPU offset of the object.
87926deccbSFrançois Tigeot *
88926deccbSFrançois Tigeot * Note: object should either be pinned or reserved when calling this
89926deccbSFrançois Tigeot * function, it might be useful to add check for this for debugging.
90926deccbSFrançois Tigeot */
radeon_bo_gpu_offset(struct radeon_bo * bo)91926deccbSFrançois Tigeot static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
92926deccbSFrançois Tigeot {
93926deccbSFrançois Tigeot return bo->tbo.offset;
94926deccbSFrançois Tigeot }
95926deccbSFrançois Tigeot
radeon_bo_size(struct radeon_bo * bo)96926deccbSFrançois Tigeot static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
97926deccbSFrançois Tigeot {
98926deccbSFrançois Tigeot return bo->tbo.num_pages << PAGE_SHIFT;
99926deccbSFrançois Tigeot }
100926deccbSFrançois Tigeot
radeon_bo_ngpu_pages(struct radeon_bo * bo)101926deccbSFrançois Tigeot static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo)
102926deccbSFrançois Tigeot {
103926deccbSFrançois Tigeot return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
104926deccbSFrançois Tigeot }
105926deccbSFrançois Tigeot
radeon_bo_gpu_page_alignment(struct radeon_bo * bo)106926deccbSFrançois Tigeot static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)
107926deccbSFrançois Tigeot {
108926deccbSFrançois Tigeot return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
109926deccbSFrançois Tigeot }
110926deccbSFrançois Tigeot
111926deccbSFrançois Tigeot /**
112926deccbSFrançois Tigeot * radeon_bo_mmap_offset - return mmap offset of bo
113926deccbSFrançois Tigeot * @bo: radeon object for which we query the offset
114926deccbSFrançois Tigeot *
115926deccbSFrançois Tigeot * Returns mmap offset of the object.
116926deccbSFrançois Tigeot */
radeon_bo_mmap_offset(struct radeon_bo * bo)117926deccbSFrançois Tigeot static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
118926deccbSFrançois Tigeot {
119a34b4168SMatthew Dillon return drm_vma_node_offset_addr(&bo->tbo.vma_node);
120926deccbSFrançois Tigeot }
121926deccbSFrançois Tigeot
122926deccbSFrançois Tigeot extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
123926deccbSFrançois Tigeot bool no_wait);
124926deccbSFrançois Tigeot
125926deccbSFrançois Tigeot extern int radeon_bo_create(struct radeon_device *rdev,
126926deccbSFrançois Tigeot unsigned long size, int byte_align,
127c6f73aabSFrançois Tigeot bool kernel, u32 domain, u32 flags,
128926deccbSFrançois Tigeot struct sg_table *sg,
1297dcf36dcSFrançois Tigeot struct reservation_object *resv,
130926deccbSFrançois Tigeot struct radeon_bo **bo_ptr);
131926deccbSFrançois Tigeot extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
132926deccbSFrançois Tigeot extern void radeon_bo_kunmap(struct radeon_bo *bo);
133c6f73aabSFrançois Tigeot extern struct radeon_bo *radeon_bo_ref(struct radeon_bo *bo);
134926deccbSFrançois Tigeot extern void radeon_bo_unref(struct radeon_bo **bo);
135926deccbSFrançois Tigeot extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
136926deccbSFrançois Tigeot extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
137926deccbSFrançois Tigeot u64 max_offset, u64 *gpu_addr);
138926deccbSFrançois Tigeot extern int radeon_bo_unpin(struct radeon_bo *bo);
139926deccbSFrançois Tigeot extern int radeon_bo_evict_vram(struct radeon_device *rdev);
140926deccbSFrançois Tigeot extern void radeon_bo_force_delete(struct radeon_device *rdev);
141926deccbSFrançois Tigeot extern int radeon_bo_init(struct radeon_device *rdev);
142926deccbSFrançois Tigeot extern void radeon_bo_fini(struct radeon_device *rdev);
143c6f73aabSFrançois Tigeot extern int radeon_bo_list_validate(struct radeon_device *rdev,
144c6f73aabSFrançois Tigeot struct ww_acquire_ctx *ticket,
1454cd92098Szrj struct list_head *head, int ring);
146926deccbSFrançois Tigeot extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
147926deccbSFrançois Tigeot u32 tiling_flags, u32 pitch);
148926deccbSFrançois Tigeot extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
149926deccbSFrançois Tigeot u32 *tiling_flags, u32 *pitch);
150926deccbSFrançois Tigeot extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
151926deccbSFrançois Tigeot bool force_drop);
152926deccbSFrançois Tigeot extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
153*a85cb24fSFrançois Tigeot bool evict,
154c6f73aabSFrançois Tigeot struct ttm_mem_reg *new_mem);
155926deccbSFrançois Tigeot extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
156926deccbSFrançois Tigeot extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
1577dcf36dcSFrançois Tigeot extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
1587dcf36dcSFrançois Tigeot bool shared);
159926deccbSFrançois Tigeot
160926deccbSFrançois Tigeot /*
161926deccbSFrançois Tigeot * sub allocation
162926deccbSFrançois Tigeot */
163926deccbSFrançois Tigeot
radeon_sa_bo_gpu_addr(struct radeon_sa_bo * sa_bo)164926deccbSFrançois Tigeot static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
165926deccbSFrançois Tigeot {
166926deccbSFrançois Tigeot return sa_bo->manager->gpu_addr + sa_bo->soffset;
167926deccbSFrançois Tigeot }
168926deccbSFrançois Tigeot
radeon_sa_bo_cpu_addr(struct radeon_sa_bo * sa_bo)169926deccbSFrançois Tigeot static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
170926deccbSFrançois Tigeot {
171*a85cb24fSFrançois Tigeot return sa_bo->manager->cpu_ptr + sa_bo->soffset;
172926deccbSFrançois Tigeot }
173926deccbSFrançois Tigeot
174926deccbSFrançois Tigeot extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
175926deccbSFrançois Tigeot struct radeon_sa_manager *sa_manager,
176c6f73aabSFrançois Tigeot unsigned size, u32 align, u32 domain,
177c6f73aabSFrançois Tigeot u32 flags);
178926deccbSFrançois Tigeot extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
179926deccbSFrançois Tigeot struct radeon_sa_manager *sa_manager);
180926deccbSFrançois Tigeot extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
181926deccbSFrançois Tigeot struct radeon_sa_manager *sa_manager);
182926deccbSFrançois Tigeot extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
183926deccbSFrançois Tigeot struct radeon_sa_manager *sa_manager);
184926deccbSFrançois Tigeot extern int radeon_sa_bo_new(struct radeon_device *rdev,
185926deccbSFrançois Tigeot struct radeon_sa_manager *sa_manager,
186926deccbSFrançois Tigeot struct radeon_sa_bo **sa_bo,
187c6f73aabSFrançois Tigeot unsigned size, unsigned align);
188926deccbSFrançois Tigeot extern void radeon_sa_bo_free(struct radeon_device *rdev,
189926deccbSFrançois Tigeot struct radeon_sa_bo **sa_bo,
190926deccbSFrançois Tigeot struct radeon_fence *fence);
191926deccbSFrançois Tigeot #if defined(CONFIG_DEBUG_FS)
192926deccbSFrançois Tigeot extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
193926deccbSFrançois Tigeot struct seq_file *m);
194926deccbSFrançois Tigeot #endif
195926deccbSFrançois Tigeot
196926deccbSFrançois Tigeot
197926deccbSFrançois Tigeot #endif
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