xref: /dflybsd-src/sys/dev/drm/amd/display/dc/inc/hw_sequencer.h (revision b843c749addef9340ee7d4e250b09fdd492602a1)
1*b843c749SSergey Zigachev /*
2*b843c749SSergey Zigachev  * Copyright 2015 Advanced Micro Devices, Inc.
3*b843c749SSergey Zigachev  *
4*b843c749SSergey Zigachev  * Permission is hereby granted, free of charge, to any person obtaining a
5*b843c749SSergey Zigachev  * copy of this software and associated documentation files (the "Software"),
6*b843c749SSergey Zigachev  * to deal in the Software without restriction, including without limitation
7*b843c749SSergey Zigachev  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*b843c749SSergey Zigachev  * and/or sell copies of the Software, and to permit persons to whom the
9*b843c749SSergey Zigachev  * Software is furnished to do so, subject to the following conditions:
10*b843c749SSergey Zigachev  *
11*b843c749SSergey Zigachev  * The above copyright notice and this permission notice shall be included in
12*b843c749SSergey Zigachev  * all copies or substantial portions of the Software.
13*b843c749SSergey Zigachev  *
14*b843c749SSergey Zigachev  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*b843c749SSergey Zigachev  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*b843c749SSergey Zigachev  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*b843c749SSergey Zigachev  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*b843c749SSergey Zigachev  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*b843c749SSergey Zigachev  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*b843c749SSergey Zigachev  * OTHER DEALINGS IN THE SOFTWARE.
21*b843c749SSergey Zigachev  *
22*b843c749SSergey Zigachev  * Authors: AMD
23*b843c749SSergey Zigachev  *
24*b843c749SSergey Zigachev  */
25*b843c749SSergey Zigachev 
26*b843c749SSergey Zigachev #ifndef __DC_HW_SEQUENCER_H__
27*b843c749SSergey Zigachev #define __DC_HW_SEQUENCER_H__
28*b843c749SSergey Zigachev #include "dc_types.h"
29*b843c749SSergey Zigachev #include "clock_source.h"
30*b843c749SSergey Zigachev #include "inc/hw/timing_generator.h"
31*b843c749SSergey Zigachev #include "inc/hw/opp.h"
32*b843c749SSergey Zigachev #include "inc/hw/link_encoder.h"
33*b843c749SSergey Zigachev #include "core_status.h"
34*b843c749SSergey Zigachev 
35*b843c749SSergey Zigachev #define EDP_BACKLIGHT_RAMP_DISABLE_LEVEL 0xFFFFFFFF
36*b843c749SSergey Zigachev 
37*b843c749SSergey Zigachev enum pipe_gating_control {
38*b843c749SSergey Zigachev 	PIPE_GATING_CONTROL_DISABLE = 0,
39*b843c749SSergey Zigachev 	PIPE_GATING_CONTROL_ENABLE,
40*b843c749SSergey Zigachev 	PIPE_GATING_CONTROL_INIT
41*b843c749SSergey Zigachev };
42*b843c749SSergey Zigachev 
43*b843c749SSergey Zigachev struct dce_hwseq_wa {
44*b843c749SSergey Zigachev 	bool blnd_crtc_trigger;
45*b843c749SSergey Zigachev 	bool DEGVIDCN10_253;
46*b843c749SSergey Zigachev 	bool false_optc_underflow;
47*b843c749SSergey Zigachev 	bool DEGVIDCN10_254;
48*b843c749SSergey Zigachev };
49*b843c749SSergey Zigachev 
50*b843c749SSergey Zigachev struct hwseq_wa_state {
51*b843c749SSergey Zigachev 	bool DEGVIDCN10_253_applied;
52*b843c749SSergey Zigachev };
53*b843c749SSergey Zigachev 
54*b843c749SSergey Zigachev struct dce_hwseq {
55*b843c749SSergey Zigachev 	struct dc_context *ctx;
56*b843c749SSergey Zigachev 	const struct dce_hwseq_registers *regs;
57*b843c749SSergey Zigachev 	const struct dce_hwseq_shift *shifts;
58*b843c749SSergey Zigachev 	const struct dce_hwseq_mask *masks;
59*b843c749SSergey Zigachev 	struct dce_hwseq_wa wa;
60*b843c749SSergey Zigachev 	struct hwseq_wa_state wa_state;
61*b843c749SSergey Zigachev };
62*b843c749SSergey Zigachev 
63*b843c749SSergey Zigachev struct pipe_ctx;
64*b843c749SSergey Zigachev struct dc_state;
65*b843c749SSergey Zigachev struct dchub_init_data;
66*b843c749SSergey Zigachev struct dc_static_screen_events;
67*b843c749SSergey Zigachev struct resource_pool;
68*b843c749SSergey Zigachev struct resource_context;
69*b843c749SSergey Zigachev struct stream_resource;
70*b843c749SSergey Zigachev 
71*b843c749SSergey Zigachev struct hw_sequencer_funcs {
72*b843c749SSergey Zigachev 
73*b843c749SSergey Zigachev 	void (*init_hw)(struct dc *dc);
74*b843c749SSergey Zigachev 
75*b843c749SSergey Zigachev 	enum dc_status (*apply_ctx_to_hw)(
76*b843c749SSergey Zigachev 			struct dc *dc, struct dc_state *context);
77*b843c749SSergey Zigachev 
78*b843c749SSergey Zigachev 	void (*reset_hw_ctx_wrap)(
79*b843c749SSergey Zigachev 			struct dc *dc, struct dc_state *context);
80*b843c749SSergey Zigachev 
81*b843c749SSergey Zigachev 	void (*apply_ctx_for_surface)(
82*b843c749SSergey Zigachev 			struct dc *dc,
83*b843c749SSergey Zigachev 			const struct dc_stream_state *stream,
84*b843c749SSergey Zigachev 			int num_planes,
85*b843c749SSergey Zigachev 			struct dc_state *context);
86*b843c749SSergey Zigachev 
87*b843c749SSergey Zigachev 	void (*program_gamut_remap)(
88*b843c749SSergey Zigachev 			struct pipe_ctx *pipe_ctx);
89*b843c749SSergey Zigachev 
90*b843c749SSergey Zigachev 	void (*program_csc_matrix)(
91*b843c749SSergey Zigachev 			struct pipe_ctx *pipe_ctx,
92*b843c749SSergey Zigachev 			enum dc_color_space colorspace,
93*b843c749SSergey Zigachev 			uint16_t *matrix);
94*b843c749SSergey Zigachev 
95*b843c749SSergey Zigachev 	void (*program_output_csc)(struct dc *dc,
96*b843c749SSergey Zigachev 			struct pipe_ctx *pipe_ctx,
97*b843c749SSergey Zigachev 			enum dc_color_space colorspace,
98*b843c749SSergey Zigachev 			uint16_t *matrix,
99*b843c749SSergey Zigachev 			int opp_id);
100*b843c749SSergey Zigachev 
101*b843c749SSergey Zigachev 	void (*update_plane_addr)(
102*b843c749SSergey Zigachev 		const struct dc *dc,
103*b843c749SSergey Zigachev 		struct pipe_ctx *pipe_ctx);
104*b843c749SSergey Zigachev 
105*b843c749SSergey Zigachev 	void (*plane_atomic_disconnect)(
106*b843c749SSergey Zigachev 		struct dc *dc,
107*b843c749SSergey Zigachev 		struct pipe_ctx *pipe_ctx);
108*b843c749SSergey Zigachev 
109*b843c749SSergey Zigachev 	void (*update_dchub)(
110*b843c749SSergey Zigachev 		struct dce_hwseq *hws,
111*b843c749SSergey Zigachev 		struct dchub_init_data *dh_data);
112*b843c749SSergey Zigachev 
113*b843c749SSergey Zigachev 	void (*update_mpcc)(
114*b843c749SSergey Zigachev 		struct dc *dc,
115*b843c749SSergey Zigachev 		struct pipe_ctx *pipe_ctx);
116*b843c749SSergey Zigachev 
117*b843c749SSergey Zigachev 	void (*update_pending_status)(
118*b843c749SSergey Zigachev 			struct pipe_ctx *pipe_ctx);
119*b843c749SSergey Zigachev 
120*b843c749SSergey Zigachev 	bool (*set_input_transfer_func)(
121*b843c749SSergey Zigachev 				struct pipe_ctx *pipe_ctx,
122*b843c749SSergey Zigachev 				const struct dc_plane_state *plane_state);
123*b843c749SSergey Zigachev 
124*b843c749SSergey Zigachev 	bool (*set_output_transfer_func)(
125*b843c749SSergey Zigachev 				struct pipe_ctx *pipe_ctx,
126*b843c749SSergey Zigachev 				const struct dc_stream_state *stream);
127*b843c749SSergey Zigachev 
128*b843c749SSergey Zigachev 	void (*power_down)(struct dc *dc);
129*b843c749SSergey Zigachev 
130*b843c749SSergey Zigachev 	void (*enable_accelerated_mode)(struct dc *dc, struct dc_state *context);
131*b843c749SSergey Zigachev 
132*b843c749SSergey Zigachev 	void (*enable_timing_synchronization)(
133*b843c749SSergey Zigachev 			struct dc *dc,
134*b843c749SSergey Zigachev 			int group_index,
135*b843c749SSergey Zigachev 			int group_size,
136*b843c749SSergey Zigachev 			struct pipe_ctx *grouped_pipes[]);
137*b843c749SSergey Zigachev 
138*b843c749SSergey Zigachev 	void (*enable_per_frame_crtc_position_reset)(
139*b843c749SSergey Zigachev 			struct dc *dc,
140*b843c749SSergey Zigachev 			int group_size,
141*b843c749SSergey Zigachev 			struct pipe_ctx *grouped_pipes[]);
142*b843c749SSergey Zigachev 
143*b843c749SSergey Zigachev 	void (*enable_display_pipe_clock_gating)(
144*b843c749SSergey Zigachev 					struct dc_context *ctx,
145*b843c749SSergey Zigachev 					bool clock_gating);
146*b843c749SSergey Zigachev 
147*b843c749SSergey Zigachev 	bool (*enable_display_power_gating)(
148*b843c749SSergey Zigachev 					struct dc *dc,
149*b843c749SSergey Zigachev 					uint8_t controller_id,
150*b843c749SSergey Zigachev 					struct dc_bios *dcb,
151*b843c749SSergey Zigachev 					enum pipe_gating_control power_gating);
152*b843c749SSergey Zigachev 
153*b843c749SSergey Zigachev 	void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
154*b843c749SSergey Zigachev 
155*b843c749SSergey Zigachev 	void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
156*b843c749SSergey Zigachev 
157*b843c749SSergey Zigachev 	void (*enable_stream)(struct pipe_ctx *pipe_ctx);
158*b843c749SSergey Zigachev 
159*b843c749SSergey Zigachev 	void (*disable_stream)(struct pipe_ctx *pipe_ctx,
160*b843c749SSergey Zigachev 			int option);
161*b843c749SSergey Zigachev 
162*b843c749SSergey Zigachev 	void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
163*b843c749SSergey Zigachev 			struct dc_link_settings *link_settings);
164*b843c749SSergey Zigachev 
165*b843c749SSergey Zigachev 	void (*blank_stream)(struct pipe_ctx *pipe_ctx);
166*b843c749SSergey Zigachev 
167*b843c749SSergey Zigachev 	void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
168*b843c749SSergey Zigachev 
169*b843c749SSergey Zigachev 	void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx, int option);
170*b843c749SSergey Zigachev 
171*b843c749SSergey Zigachev 	void (*pipe_control_lock)(
172*b843c749SSergey Zigachev 				struct dc *dc,
173*b843c749SSergey Zigachev 				struct pipe_ctx *pipe,
174*b843c749SSergey Zigachev 				bool lock);
175*b843c749SSergey Zigachev 	void (*blank_pixel_data)(
176*b843c749SSergey Zigachev 			struct dc *dc,
177*b843c749SSergey Zigachev 			struct pipe_ctx *pipe_ctx,
178*b843c749SSergey Zigachev 			bool blank);
179*b843c749SSergey Zigachev 
180*b843c749SSergey Zigachev 	void (*set_bandwidth)(
181*b843c749SSergey Zigachev 			struct dc *dc,
182*b843c749SSergey Zigachev 			struct dc_state *context,
183*b843c749SSergey Zigachev 			bool safe_to_lower);
184*b843c749SSergey Zigachev 
185*b843c749SSergey Zigachev 	void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
186*b843c749SSergey Zigachev 			int vmin, int vmax);
187*b843c749SSergey Zigachev 
188*b843c749SSergey Zigachev 	void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
189*b843c749SSergey Zigachev 			struct crtc_position *position);
190*b843c749SSergey Zigachev 
191*b843c749SSergey Zigachev 	void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
192*b843c749SSergey Zigachev 			int num_pipes, const struct dc_static_screen_events *events);
193*b843c749SSergey Zigachev 
194*b843c749SSergey Zigachev 	enum dc_status (*enable_stream_timing)(
195*b843c749SSergey Zigachev 			struct pipe_ctx *pipe_ctx,
196*b843c749SSergey Zigachev 			struct dc_state *context,
197*b843c749SSergey Zigachev 			struct dc *dc);
198*b843c749SSergey Zigachev 
199*b843c749SSergey Zigachev 	void (*setup_stereo)(
200*b843c749SSergey Zigachev 			struct pipe_ctx *pipe_ctx,
201*b843c749SSergey Zigachev 			struct dc *dc);
202*b843c749SSergey Zigachev 
203*b843c749SSergey Zigachev 	void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
204*b843c749SSergey Zigachev 
205*b843c749SSergey Zigachev 	void (*log_hw_state)(struct dc *dc);
206*b843c749SSergey Zigachev 
207*b843c749SSergey Zigachev 	void (*wait_for_mpcc_disconnect)(struct dc *dc,
208*b843c749SSergey Zigachev 			struct resource_pool *res_pool,
209*b843c749SSergey Zigachev 			struct pipe_ctx *pipe_ctx);
210*b843c749SSergey Zigachev 
211*b843c749SSergey Zigachev 	void (*ready_shared_resources)(struct dc *dc, struct dc_state *context);
212*b843c749SSergey Zigachev 	void (*optimize_shared_resources)(struct dc *dc);
213*b843c749SSergey Zigachev 	void (*pplib_apply_display_requirements)(
214*b843c749SSergey Zigachev 			struct dc *dc,
215*b843c749SSergey Zigachev 			struct dc_state *context);
216*b843c749SSergey Zigachev 	void (*edp_power_control)(
217*b843c749SSergey Zigachev 			struct dc_link *link,
218*b843c749SSergey Zigachev 			bool enable);
219*b843c749SSergey Zigachev 	void (*edp_backlight_control)(
220*b843c749SSergey Zigachev 			struct dc_link *link,
221*b843c749SSergey Zigachev 			bool enable);
222*b843c749SSergey Zigachev 	void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
223*b843c749SSergey Zigachev 
224*b843c749SSergey Zigachev 	void (*set_cursor_position)(struct pipe_ctx *pipe);
225*b843c749SSergey Zigachev 	void (*set_cursor_attribute)(struct pipe_ctx *pipe);
226*b843c749SSergey Zigachev 	void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
227*b843c749SSergey Zigachev 
228*b843c749SSergey Zigachev };
229*b843c749SSergey Zigachev 
230*b843c749SSergey Zigachev void color_space_to_black_color(
231*b843c749SSergey Zigachev 	const struct dc *dc,
232*b843c749SSergey Zigachev 	enum dc_color_space colorspace,
233*b843c749SSergey Zigachev 	struct tg_color *black_color);
234*b843c749SSergey Zigachev 
235*b843c749SSergey Zigachev bool hwss_wait_for_blank_complete(
236*b843c749SSergey Zigachev 		struct timing_generator *tg);
237*b843c749SSergey Zigachev 
238*b843c749SSergey Zigachev const uint16_t *find_color_matrix(
239*b843c749SSergey Zigachev 		enum dc_color_space color_space,
240*b843c749SSergey Zigachev 		uint32_t *array_size);
241*b843c749SSergey Zigachev 
242*b843c749SSergey Zigachev #endif /* __DC_HW_SEQUENCER_H__ */
243