1*b843c749SSergey Zigachev /* 2*b843c749SSergey Zigachev * Copyright 2012-15 Advanced Micro Devices, Inc. 3*b843c749SSergey Zigachev * 4*b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a 5*b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"), 6*b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation 7*b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the 9*b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions: 10*b843c749SSergey Zigachev * 11*b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in 12*b843c749SSergey Zigachev * all copies or substantial portions of the Software. 13*b843c749SSergey Zigachev * 14*b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE. 21*b843c749SSergey Zigachev * 22*b843c749SSergey Zigachev * Authors: AMD 23*b843c749SSergey Zigachev * 24*b843c749SSergey Zigachev */ 25*b843c749SSergey Zigachev 26*b843c749SSergey Zigachev #ifndef __DAL_COMPRESSOR_H__ 27*b843c749SSergey Zigachev #define __DAL_COMPRESSOR_H__ 28*b843c749SSergey Zigachev 29*b843c749SSergey Zigachev #include "include/grph_object_id.h" 30*b843c749SSergey Zigachev #include "bios_parser_interface.h" 31*b843c749SSergey Zigachev 32*b843c749SSergey Zigachev enum fbc_compress_ratio { 33*b843c749SSergey Zigachev FBC_COMPRESS_RATIO_INVALID = 0, 34*b843c749SSergey Zigachev FBC_COMPRESS_RATIO_1TO1 = 1, 35*b843c749SSergey Zigachev FBC_COMPRESS_RATIO_2TO1 = 2, 36*b843c749SSergey Zigachev FBC_COMPRESS_RATIO_4TO1 = 4, 37*b843c749SSergey Zigachev FBC_COMPRESS_RATIO_8TO1 = 8, 38*b843c749SSergey Zigachev }; 39*b843c749SSergey Zigachev 40*b843c749SSergey Zigachev union fbc_physical_address { 41*b843c749SSergey Zigachev struct { 42*b843c749SSergey Zigachev uint32_t low_part; 43*b843c749SSergey Zigachev int32_t high_part; 44*b843c749SSergey Zigachev } addr; 45*b843c749SSergey Zigachev uint64_t quad_part; 46*b843c749SSergey Zigachev }; 47*b843c749SSergey Zigachev 48*b843c749SSergey Zigachev struct compr_addr_and_pitch_params { 49*b843c749SSergey Zigachev /* enum controller_id controller_id; */ 50*b843c749SSergey Zigachev uint32_t inst; 51*b843c749SSergey Zigachev uint32_t source_view_width; 52*b843c749SSergey Zigachev uint32_t source_view_height; 53*b843c749SSergey Zigachev }; 54*b843c749SSergey Zigachev 55*b843c749SSergey Zigachev enum fbc_hw_max_resolution_supported { 56*b843c749SSergey Zigachev FBC_MAX_X = 3840, 57*b843c749SSergey Zigachev FBC_MAX_Y = 2400, 58*b843c749SSergey Zigachev FBC_MAX_X_SG = 1920, 59*b843c749SSergey Zigachev FBC_MAX_Y_SG = 1080, 60*b843c749SSergey Zigachev }; 61*b843c749SSergey Zigachev 62*b843c749SSergey Zigachev struct compressor; 63*b843c749SSergey Zigachev 64*b843c749SSergey Zigachev struct compressor_funcs { 65*b843c749SSergey Zigachev 66*b843c749SSergey Zigachev void (*power_up_fbc)(struct compressor *cp); 67*b843c749SSergey Zigachev void (*enable_fbc)(struct compressor *cp, 68*b843c749SSergey Zigachev struct compr_addr_and_pitch_params *params); 69*b843c749SSergey Zigachev void (*disable_fbc)(struct compressor *cp); 70*b843c749SSergey Zigachev void (*set_fbc_invalidation_triggers)(struct compressor *cp, 71*b843c749SSergey Zigachev uint32_t fbc_trigger); 72*b843c749SSergey Zigachev void (*surface_address_and_pitch)( 73*b843c749SSergey Zigachev struct compressor *cp, 74*b843c749SSergey Zigachev struct compr_addr_and_pitch_params *params); 75*b843c749SSergey Zigachev bool (*is_fbc_enabled_in_hw)(struct compressor *cp, 76*b843c749SSergey Zigachev uint32_t *fbc_mapped_crtc_id); 77*b843c749SSergey Zigachev }; 78*b843c749SSergey Zigachev struct compressor { 79*b843c749SSergey Zigachev struct dc_context *ctx; 80*b843c749SSergey Zigachev uint32_t attached_inst; 81*b843c749SSergey Zigachev bool is_enabled; 82*b843c749SSergey Zigachev const struct compressor_funcs *funcs; 83*b843c749SSergey Zigachev union { 84*b843c749SSergey Zigachev uint32_t raw; 85*b843c749SSergey Zigachev struct { 86*b843c749SSergey Zigachev uint32_t FBC_SUPPORT:1; 87*b843c749SSergey Zigachev uint32_t FB_POOL:1; 88*b843c749SSergey Zigachev uint32_t DYNAMIC_ALLOC:1; 89*b843c749SSergey Zigachev uint32_t LPT_SUPPORT:1; 90*b843c749SSergey Zigachev uint32_t LPT_MC_CONFIG:1; 91*b843c749SSergey Zigachev uint32_t DUMMY_BACKEND:1; 92*b843c749SSergey Zigachev uint32_t CLK_GATING_DISABLED:1; 93*b843c749SSergey Zigachev 94*b843c749SSergey Zigachev } bits; 95*b843c749SSergey Zigachev } options; 96*b843c749SSergey Zigachev 97*b843c749SSergey Zigachev union fbc_physical_address compr_surface_address; 98*b843c749SSergey Zigachev 99*b843c749SSergey Zigachev uint32_t embedded_panel_h_size; 100*b843c749SSergey Zigachev uint32_t embedded_panel_v_size; 101*b843c749SSergey Zigachev uint32_t memory_bus_width; 102*b843c749SSergey Zigachev uint32_t banks_num; 103*b843c749SSergey Zigachev uint32_t raw_size; 104*b843c749SSergey Zigachev uint32_t channel_interleave_size; 105*b843c749SSergey Zigachev uint32_t dram_channels_num; 106*b843c749SSergey Zigachev 107*b843c749SSergey Zigachev uint32_t allocated_size; 108*b843c749SSergey Zigachev uint32_t preferred_requested_size; 109*b843c749SSergey Zigachev uint32_t lpt_channels_num; 110*b843c749SSergey Zigachev enum fbc_compress_ratio min_compress_ratio; 111*b843c749SSergey Zigachev }; 112*b843c749SSergey Zigachev 113*b843c749SSergey Zigachev struct fbc_input_info { 114*b843c749SSergey Zigachev bool dynamic_fbc_buffer_alloc; 115*b843c749SSergey Zigachev unsigned int source_view_width; 116*b843c749SSergey Zigachev unsigned int source_view_height; 117*b843c749SSergey Zigachev unsigned int num_of_active_targets; 118*b843c749SSergey Zigachev }; 119*b843c749SSergey Zigachev 120*b843c749SSergey Zigachev 121*b843c749SSergey Zigachev struct fbc_requested_compressed_size { 122*b843c749SSergey Zigachev unsigned int preferred_size; 123*b843c749SSergey Zigachev unsigned int preferred_size_alignment; 124*b843c749SSergey Zigachev unsigned int min_size; 125*b843c749SSergey Zigachev unsigned int min_size_alignment; 126*b843c749SSergey Zigachev union { 127*b843c749SSergey Zigachev struct { 128*b843c749SSergey Zigachev /* Above preferedSize must be allocated in FB pool */ 129*b843c749SSergey Zigachev unsigned int preferred_must_be_framebuffer_pool : 1; 130*b843c749SSergey Zigachev /* Above minSize must be allocated in FB pool */ 131*b843c749SSergey Zigachev unsigned int min_must_be_framebuffer_pool : 1; 132*b843c749SSergey Zigachev } bits; 133*b843c749SSergey Zigachev unsigned int flags; 134*b843c749SSergey Zigachev }; 135*b843c749SSergey Zigachev }; 136*b843c749SSergey Zigachev #endif 137