1*b843c749SSergey Zigachev /*
2*b843c749SSergey Zigachev * Copyright 2017 Advanced Micro Devices, Inc.
3*b843c749SSergey Zigachev *
4*b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a
5*b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"),
6*b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation
7*b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the
9*b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions:
10*b843c749SSergey Zigachev *
11*b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in
12*b843c749SSergey Zigachev * all copies or substantial portions of the Software.
13*b843c749SSergey Zigachev *
14*b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE.
21*b843c749SSergey Zigachev *
22*b843c749SSergey Zigachev */
23*b843c749SSergey Zigachev
24*b843c749SSergey Zigachev #include "amdgpu.h"
25*b843c749SSergey Zigachev #include "amdgpu_vf_error.h"
26*b843c749SSergey Zigachev #include "mxgpu_ai.h"
27*b843c749SSergey Zigachev
amdgpu_vf_error_put(struct amdgpu_device * adev,uint16_t sub_error_code,uint16_t error_flags,uint64_t error_data)28*b843c749SSergey Zigachev void amdgpu_vf_error_put(struct amdgpu_device *adev,
29*b843c749SSergey Zigachev uint16_t sub_error_code,
30*b843c749SSergey Zigachev uint16_t error_flags,
31*b843c749SSergey Zigachev uint64_t error_data)
32*b843c749SSergey Zigachev {
33*b843c749SSergey Zigachev int index;
34*b843c749SSergey Zigachev uint16_t error_code;
35*b843c749SSergey Zigachev
36*b843c749SSergey Zigachev if (!amdgpu_sriov_vf(adev))
37*b843c749SSergey Zigachev return;
38*b843c749SSergey Zigachev
39*b843c749SSergey Zigachev error_code = AMDGIM_ERROR_CODE(AMDGIM_ERROR_CATEGORY_VF, sub_error_code);
40*b843c749SSergey Zigachev
41*b843c749SSergey Zigachev mutex_lock(&adev->virt.vf_errors.lock);
42*b843c749SSergey Zigachev index = adev->virt.vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
43*b843c749SSergey Zigachev adev->virt.vf_errors.code [index] = error_code;
44*b843c749SSergey Zigachev adev->virt.vf_errors.flags [index] = error_flags;
45*b843c749SSergey Zigachev adev->virt.vf_errors.data [index] = error_data;
46*b843c749SSergey Zigachev adev->virt.vf_errors.write_count ++;
47*b843c749SSergey Zigachev mutex_unlock(&adev->virt.vf_errors.lock);
48*b843c749SSergey Zigachev }
49*b843c749SSergey Zigachev
50*b843c749SSergey Zigachev
amdgpu_vf_error_trans_all(struct amdgpu_device * adev)51*b843c749SSergey Zigachev void amdgpu_vf_error_trans_all(struct amdgpu_device *adev)
52*b843c749SSergey Zigachev {
53*b843c749SSergey Zigachev /* u32 pf2vf_flags = 0; */
54*b843c749SSergey Zigachev u32 data1, data2, data3;
55*b843c749SSergey Zigachev int index;
56*b843c749SSergey Zigachev
57*b843c749SSergey Zigachev if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) ||
58*b843c749SSergey Zigachev (!adev->virt.ops) || (!adev->virt.ops->trans_msg)) {
59*b843c749SSergey Zigachev return;
60*b843c749SSergey Zigachev }
61*b843c749SSergey Zigachev /*
62*b843c749SSergey Zigachev TODO: Enable these code when pv2vf_info is merged
63*b843c749SSergey Zigachev AMDGPU_FW_VRAM_PF2VF_READ (adev, feature_flags, &pf2vf_flags);
64*b843c749SSergey Zigachev if (!(pf2vf_flags & AMDGIM_FEATURE_ERROR_LOG_COLLECT)) {
65*b843c749SSergey Zigachev return;
66*b843c749SSergey Zigachev }
67*b843c749SSergey Zigachev */
68*b843c749SSergey Zigachev
69*b843c749SSergey Zigachev mutex_lock(&adev->virt.vf_errors.lock);
70*b843c749SSergey Zigachev /* The errors are overlay of array, correct read_count as full. */
71*b843c749SSergey Zigachev if (adev->virt.vf_errors.write_count - adev->virt.vf_errors.read_count > AMDGPU_VF_ERROR_ENTRY_SIZE) {
72*b843c749SSergey Zigachev adev->virt.vf_errors.read_count = adev->virt.vf_errors.write_count - AMDGPU_VF_ERROR_ENTRY_SIZE;
73*b843c749SSergey Zigachev }
74*b843c749SSergey Zigachev
75*b843c749SSergey Zigachev while (adev->virt.vf_errors.read_count < adev->virt.vf_errors.write_count) {
76*b843c749SSergey Zigachev index =adev->virt.vf_errors.read_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
77*b843c749SSergey Zigachev data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX(adev->virt.vf_errors.code[index],
78*b843c749SSergey Zigachev adev->virt.vf_errors.flags[index]);
79*b843c749SSergey Zigachev data2 = adev->virt.vf_errors.data[index] & 0xFFFFFFFF;
80*b843c749SSergey Zigachev data3 = (adev->virt.vf_errors.data[index] >> 32) & 0xFFFFFFFF;
81*b843c749SSergey Zigachev
82*b843c749SSergey Zigachev adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3);
83*b843c749SSergey Zigachev adev->virt.vf_errors.read_count ++;
84*b843c749SSergey Zigachev }
85*b843c749SSergey Zigachev mutex_unlock(&adev->virt.vf_errors.lock);
86*b843c749SSergey Zigachev }
87