1b843c749SSergey Zigachev /* 2b843c749SSergey Zigachev * Copyright 2016 Advanced Micro Devices, Inc. 3b843c749SSergey Zigachev * 4b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a 5b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"), 6b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation 7b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the 9b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions: 10b843c749SSergey Zigachev * 11b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in 12b843c749SSergey Zigachev * all copies or substantial portions of the Software. 13b843c749SSergey Zigachev * 14b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE. 21b843c749SSergey Zigachev * 22b843c749SSergey Zigachev */ 23b843c749SSergey Zigachev 24b843c749SSergey Zigachev #ifndef __AMDGPU_TTM_H__ 25b843c749SSergey Zigachev #define __AMDGPU_TTM_H__ 26b843c749SSergey Zigachev 27b843c749SSergey Zigachev #include "amdgpu.h" 28b843c749SSergey Zigachev #include <drm/gpu_scheduler.h> 29b843c749SSergey Zigachev 30b843c749SSergey Zigachev #define AMDGPU_PL_GDS (TTM_PL_PRIV + 0) 31b843c749SSergey Zigachev #define AMDGPU_PL_GWS (TTM_PL_PRIV + 1) 32b843c749SSergey Zigachev #define AMDGPU_PL_OA (TTM_PL_PRIV + 2) 33b843c749SSergey Zigachev 34b843c749SSergey Zigachev #define AMDGPU_PL_FLAG_GDS (TTM_PL_FLAG_PRIV << 0) 35b843c749SSergey Zigachev #define AMDGPU_PL_FLAG_GWS (TTM_PL_FLAG_PRIV << 1) 36b843c749SSergey Zigachev #define AMDGPU_PL_FLAG_OA (TTM_PL_FLAG_PRIV << 2) 37b843c749SSergey Zigachev 38b843c749SSergey Zigachev #define AMDGPU_GTT_MAX_TRANSFER_SIZE 512 39b843c749SSergey Zigachev #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2 40b843c749SSergey Zigachev 41b843c749SSergey Zigachev struct amdgpu_mman { 42b843c749SSergey Zigachev struct ttm_bo_global_ref bo_global_ref; 43b843c749SSergey Zigachev struct drm_global_reference mem_global_ref; 44b843c749SSergey Zigachev struct ttm_bo_device bdev; 45b843c749SSergey Zigachev bool mem_global_referenced; 46b843c749SSergey Zigachev bool initialized; 47b843c749SSergey Zigachev void __iomem *aper_base_kaddr; 48b843c749SSergey Zigachev 49b843c749SSergey Zigachev #if defined(CONFIG_DEBUG_FS) 50b843c749SSergey Zigachev struct dentry *debugfs_entries[8]; 51b843c749SSergey Zigachev #endif 52b843c749SSergey Zigachev 53b843c749SSergey Zigachev /* buffer handling */ 54b843c749SSergey Zigachev const struct amdgpu_buffer_funcs *buffer_funcs; 55b843c749SSergey Zigachev struct amdgpu_ring *buffer_funcs_ring; 56b843c749SSergey Zigachev bool buffer_funcs_enabled; 57b843c749SSergey Zigachev 58*78973132SSergey Zigachev struct lock gtt_window_lock; 59b843c749SSergey Zigachev /* Scheduler entity for buffer moves */ 60b843c749SSergey Zigachev struct drm_sched_entity entity; 61b843c749SSergey Zigachev }; 62b843c749SSergey Zigachev 63b843c749SSergey Zigachev struct amdgpu_copy_mem { 64b843c749SSergey Zigachev struct ttm_buffer_object *bo; 65b843c749SSergey Zigachev struct ttm_mem_reg *mem; 66b843c749SSergey Zigachev unsigned long offset; 67b843c749SSergey Zigachev }; 68b843c749SSergey Zigachev 69b843c749SSergey Zigachev extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func; 70b843c749SSergey Zigachev extern const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func; 71b843c749SSergey Zigachev 72b843c749SSergey Zigachev bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_mem_reg *mem); 73b843c749SSergey Zigachev uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man); 74b843c749SSergey Zigachev int amdgpu_gtt_mgr_recover(struct ttm_mem_type_manager *man); 75b843c749SSergey Zigachev 76b843c749SSergey Zigachev u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo); 77b843c749SSergey Zigachev uint64_t amdgpu_vram_mgr_usage(struct ttm_mem_type_manager *man); 78b843c749SSergey Zigachev uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_mem_type_manager *man); 79b843c749SSergey Zigachev 80b843c749SSergey Zigachev int amdgpu_ttm_init(struct amdgpu_device *adev); 81b843c749SSergey Zigachev void amdgpu_ttm_late_init(struct amdgpu_device *adev); 82b843c749SSergey Zigachev void amdgpu_ttm_fini(struct amdgpu_device *adev); 83b843c749SSergey Zigachev void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, 84b843c749SSergey Zigachev bool enable); 85b843c749SSergey Zigachev 86b843c749SSergey Zigachev int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, 87b843c749SSergey Zigachev uint64_t dst_offset, uint32_t byte_count, 88b843c749SSergey Zigachev struct reservation_object *resv, 89b843c749SSergey Zigachev struct dma_fence **fence, bool direct_submit, 90b843c749SSergey Zigachev bool vm_needs_flush); 91b843c749SSergey Zigachev int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, 92b843c749SSergey Zigachev struct amdgpu_copy_mem *src, 93b843c749SSergey Zigachev struct amdgpu_copy_mem *dst, 94b843c749SSergey Zigachev uint64_t size, 95b843c749SSergey Zigachev struct reservation_object *resv, 96b843c749SSergey Zigachev struct dma_fence **f); 97b843c749SSergey Zigachev int amdgpu_fill_buffer(struct amdgpu_bo *bo, 98b843c749SSergey Zigachev uint32_t src_data, 99b843c749SSergey Zigachev struct reservation_object *resv, 100b843c749SSergey Zigachev struct dma_fence **fence); 101b843c749SSergey Zigachev 102b843c749SSergey Zigachev int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma); 103b843c749SSergey Zigachev int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); 104b843c749SSergey Zigachev int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); 105b843c749SSergey Zigachev 106b843c749SSergey Zigachev int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages); 107b843c749SSergey Zigachev void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages); 108b843c749SSergey Zigachev void amdgpu_ttm_tt_mark_user_pages(struct ttm_tt *ttm); 109b843c749SSergey Zigachev int amdgpu_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr, 110b843c749SSergey Zigachev uint32_t flags); 111b843c749SSergey Zigachev bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm); 112b843c749SSergey Zigachev struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm); 113b843c749SSergey Zigachev bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start, 114b843c749SSergey Zigachev unsigned long end); 115b843c749SSergey Zigachev bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm, 116b843c749SSergey Zigachev int *last_invalidated); 117b843c749SSergey Zigachev bool amdgpu_ttm_tt_userptr_needs_pages(struct ttm_tt *ttm); 118b843c749SSergey Zigachev bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm); 119b843c749SSergey Zigachev uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm, 120b843c749SSergey Zigachev struct ttm_mem_reg *mem); 121b843c749SSergey Zigachev 122b843c749SSergey Zigachev #endif 123