1d6644679SSascha Wildner /*- 2d6644679SSascha Wildner * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3d6644679SSascha Wildner * 4d6644679SSascha Wildner * Redistribution and use in source and binary forms, with or without 5d6644679SSascha Wildner * modification, are permitted provided that the following conditions 6d6644679SSascha Wildner * are met: 7d6644679SSascha Wildner * 1. Redistributions of source code must retain the above copyright 8d6644679SSascha Wildner * notice, this list of conditions and the following disclaimer. 9d6644679SSascha Wildner * 2. Redistributions in binary form must reproduce the above copyright 10d6644679SSascha Wildner * notice, this list of conditions and the following disclaimer in the 11d6644679SSascha Wildner * documentation and/or other materials provided with the distribution. 12d6644679SSascha Wildner * 13d6644679SSascha Wildner * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14d6644679SSascha Wildner * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15d6644679SSascha Wildner * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16d6644679SSascha Wildner * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17d6644679SSascha Wildner * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18d6644679SSascha Wildner * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19d6644679SSascha Wildner * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20d6644679SSascha Wildner * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21d6644679SSascha Wildner * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22d6644679SSascha Wildner * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23d6644679SSascha Wildner * 24d6644679SSascha Wildner * Portions of this software may have been developed with reference to 25d6644679SSascha Wildner * the SD Simplified Specification. The following disclaimer may apply: 26d6644679SSascha Wildner * 27d6644679SSascha Wildner * The following conditions apply to the release of the simplified 28d6644679SSascha Wildner * specification ("Simplified Specification") by the SD Card Association and 29d6644679SSascha Wildner * the SD Group. The Simplified Specification is a subset of the complete SD 30d6644679SSascha Wildner * Specification which is owned by the SD Card Association and the SD 31d6644679SSascha Wildner * Group. This Simplified Specification is provided on a non-confidential 32d6644679SSascha Wildner * basis subject to the disclaimers below. Any implementation of the 33d6644679SSascha Wildner * Simplified Specification may require a license from the SD Card 34d6644679SSascha Wildner * Association, SD Group, SD-3C LLC or other third parties. 35d6644679SSascha Wildner * 36d6644679SSascha Wildner * Disclaimers: 37d6644679SSascha Wildner * 38d6644679SSascha Wildner * The information contained in the Simplified Specification is presented only 39d6644679SSascha Wildner * as a standard specification for SD Cards and SD Host/Ancillary products and 40d6644679SSascha Wildner * is provided "AS-IS" without any representations or warranties of any 41d6644679SSascha Wildner * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 42d6644679SSascha Wildner * Card Association for any damages, any infringements of patents or other 43d6644679SSascha Wildner * right of the SD Group, SD-3C LLC, the SD Card Association or any third 44d6644679SSascha Wildner * parties, which may result from its use. No license is granted by 45d6644679SSascha Wildner * implication, estoppel or otherwise under any patent or other rights of the 46d6644679SSascha Wildner * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 47d6644679SSascha Wildner * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 48d6644679SSascha Wildner * or the SD Card Association to disclose or distribute any technical 49d6644679SSascha Wildner * information, know-how or other confidential information to any third party. 50d6644679SSascha Wildner * 51d6644679SSascha Wildner * $FreeBSD: src/sys/dev/mmc/bridge.h,v 1.3 2008/10/08 17:35:41 mav Exp $ 52d6644679SSascha Wildner */ 53d6644679SSascha Wildner 54d6644679SSascha Wildner #ifndef BUS_MMC_BRIDGE_H 55d6644679SSascha Wildner #define BUS_MMC_BRIDGE_H 56d6644679SSascha Wildner 57d6644679SSascha Wildner /* 58d6644679SSascha Wildner * This file defines interfaces for the mmc bridge. The names chosen 59d6644679SSascha Wildner * are similar to or the same as the names used in Linux to allow for 60d6644679SSascha Wildner * easy porting of what Linux calls mmc host drivers. I use the 614d3ae590SImre Vadász * FreeBSD terminology of bridge and bus for consistency with other 62d6644679SSascha Wildner * drivers in the system. This file corresponds roughly to the Linux 63d6644679SSascha Wildner * linux/mmc/host.h file. 64d6644679SSascha Wildner * 65d6644679SSascha Wildner * A mmc bridge is a chipset that can have one or more mmc and/or sd 66d6644679SSascha Wildner * cards attached to it. mmc cards are attached on a bus topology, 67d6644679SSascha Wildner * while sd and sdio cards are attached using a star topology (meaning 68d6644679SSascha Wildner * in practice each sd card has its own, independent slot). Each 69d6644679SSascha Wildner * mmcbr is assumed to be derived from the mmcbr. This is done to 70d6644679SSascha Wildner * allow for easier addition of bridges (as each bridge does not need 71d6644679SSascha Wildner * to be added to the mmcbus file). 72d6644679SSascha Wildner * 73d6644679SSascha Wildner * Attached to the mmc bridge is an mmcbus. The mmcbus is described 744d3ae590SImre Vadász * in bus/mmc/mmcbus_if.m. 75d6644679SSascha Wildner */ 76d6644679SSascha Wildner 77d6644679SSascha Wildner 78d6644679SSascha Wildner /* 79d6644679SSascha Wildner * mmc_ios is a structure that is used to store the state of the mmc/sd 80d6644679SSascha Wildner * bus configuration. This include the bus' clock speed, its voltage, 81d6644679SSascha Wildner * the bus mode for command output, the SPI chip select, some power 82d6644679SSascha Wildner * states and the bus width. 83d6644679SSascha Wildner */ 84d6644679SSascha Wildner enum mmc_vdd { 85d6644679SSascha Wildner vdd_150 = 0, vdd_155, vdd_160, vdd_165, vdd_170, vdd_180, 86d6644679SSascha Wildner vdd_190, vdd_200, vdd_210, vdd_220, vdd_230, vdd_240, vdd_250, 87d6644679SSascha Wildner vdd_260, vdd_270, vdd_280, vdd_290, vdd_300, vdd_310, vdd_320, 88d6644679SSascha Wildner vdd_330, vdd_340, vdd_350, vdd_360 89d6644679SSascha Wildner }; 90d6644679SSascha Wildner 91*7ba10b88SImre Vadász enum mmc_vccq { 92*7ba10b88SImre Vadász vccq_120 = 0, vccq_180, vccq_330 93*7ba10b88SImre Vadász }; 94*7ba10b88SImre Vadász 95d6644679SSascha Wildner enum mmc_power_mode { 96d6644679SSascha Wildner power_off = 0, power_up, power_on 97d6644679SSascha Wildner }; 98d6644679SSascha Wildner 99d6644679SSascha Wildner enum mmc_bus_mode { 100d6644679SSascha Wildner opendrain = 1, pushpull 101d6644679SSascha Wildner }; 102d6644679SSascha Wildner 103d6644679SSascha Wildner enum mmc_chip_select { 104d6644679SSascha Wildner cs_dontcare = 0, cs_high, cs_low 105d6644679SSascha Wildner }; 106d6644679SSascha Wildner 107d6644679SSascha Wildner enum mmc_bus_width { 108d6644679SSascha Wildner bus_width_1 = 0, bus_width_4 = 2, bus_width_8 = 3 109d6644679SSascha Wildner }; 110d6644679SSascha Wildner 111*7ba10b88SImre Vadász enum mmc_drv_type { 112*7ba10b88SImre Vadász drv_type_b = 0, drv_type_a, drv_type_c, drv_type_d 113*7ba10b88SImre Vadász }; 114*7ba10b88SImre Vadász 115d6644679SSascha Wildner enum mmc_bus_timing { 116*7ba10b88SImre Vadász bus_timing_normal = 0, bus_timing_hs, bus_timing_uhs_sdr12, 117*7ba10b88SImre Vadász bus_timing_uhs_sdr25, bus_timing_uhs_sdr50, bus_timing_uhs_ddr50, 118*7ba10b88SImre Vadász bus_timing_uhs_sdr104, bus_timing_mmc_ddr52, bus_timing_mmc_hs200, 119*7ba10b88SImre Vadász bus_timing_mmc_hs400, bus_timing_mmc_hs400es, bus_timing_max = 120*7ba10b88SImre Vadász bus_timing_mmc_hs400es 121d6644679SSascha Wildner }; 122d6644679SSascha Wildner 123d6644679SSascha Wildner struct mmc_ios { 124d6644679SSascha Wildner uint32_t clock; /* Speed of the clock in Hz to move data */ 12570a02aadSImre Vadász enum mmc_vdd vdd; /* Voltage to apply to the power pins */ 126*7ba10b88SImre Vadász enum mmc_vccq vccq; /* Voltage to use for signaling */ 127d6644679SSascha Wildner enum mmc_bus_mode bus_mode; 128d6644679SSascha Wildner enum mmc_chip_select chip_select; 129d6644679SSascha Wildner enum mmc_bus_width bus_width; 130d6644679SSascha Wildner enum mmc_power_mode power_mode; 131d6644679SSascha Wildner enum mmc_bus_timing timing; 132*7ba10b88SImre Vadász enum mmc_drv_type drv_type; 133d6644679SSascha Wildner }; 134d6644679SSascha Wildner 135d6644679SSascha Wildner enum mmc_card_mode { 136d6644679SSascha Wildner mode_mmc, mode_sd 137d6644679SSascha Wildner }; 138d6644679SSascha Wildner 139d6644679SSascha Wildner struct mmc_host { 140d6644679SSascha Wildner int f_min; 141d6644679SSascha Wildner int f_max; 142d6644679SSascha Wildner uint32_t host_ocr; 143d6644679SSascha Wildner uint32_t ocr; 144d6644679SSascha Wildner uint32_t caps; 145d6644679SSascha Wildner #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can do 4-bit data transfers */ 146d6644679SSascha Wildner #define MMC_CAP_8_BIT_DATA (1 << 1) /* Can do 8-bit data transfers */ 147d6644679SSascha Wildner #define MMC_CAP_HSPEED (1 << 2) /* Can do High Speed transfers */ 14885ccd313SImre Vadász #define MMC_CAP_WAIT_WHILE_BUSY (1 << 3) /* Host waits for busy responses */ 149*7ba10b88SImre Vadász #define MMC_CAP_UHS_SDR12 (1 << 6) /* Can do UHS SDR12 */ 150*7ba10b88SImre Vadász #define MMC_CAP_UHS_SDR25 (1 << 7) /* Can do UHS SDR25 */ 151*7ba10b88SImre Vadász #define MMC_CAP_UHS_SDR50 (1 << 8) /* Can do UHS SDR50 */ 152*7ba10b88SImre Vadász #define MMC_CAP_UHS_SDR104 (1 << 9) /* Can do UHS SDR104 */ 153*7ba10b88SImre Vadász #define MMC_CAP_UHS_DDR50 (1 << 10) /* Can do UHS DDR50 */ 154*7ba10b88SImre Vadász #define MMC_CAP_MMC_DDR52_120 (1 << 11) /* Can do eMMC DDR52 at 1.2 V */ 155*7ba10b88SImre Vadász #define MMC_CAP_MMC_DDR52_180 (1 << 12) /* Can do eMMC DDR52 at 1.8 V */ 156*7ba10b88SImre Vadász #define MMC_CAP_MMC_DDR52 (MMC_CAP_MMC_DDR52_120 | MMC_CAP_MMC_DDR52_180) 157*7ba10b88SImre Vadász #define MMC_CAP_MMC_HS200_120 (1 << 13) /* Can do eMMC HS200 at 1.2 V */ 158*7ba10b88SImre Vadász #define MMC_CAP_MMC_HS200_180 (1 << 14) /* Can do eMMC HS200 at 1.8 V */ 159*7ba10b88SImre Vadász #define MMC_CAP_MMC_HS200 (MMC_CAP_MMC_HS200_120| MMC_CAP_MMC_HS200_180) 160*7ba10b88SImre Vadász #define MMC_CAP_MMC_HS400_120 (1 << 15) /* Can do eMMC HS400 at 1.2 V */ 161*7ba10b88SImre Vadász #define MMC_CAP_MMC_HS400_180 (1 << 16) /* Can do eMMC HS400 at 1.8 V */ 162*7ba10b88SImre Vadász #define MMC_CAP_MMC_HS400 (MMC_CAP_MMC_HS400_120 | MMC_CAP_MMC_HS400_180) 163*7ba10b88SImre Vadász #define MMC_CAP_MMC_HSX00_120 (MMC_CAP_MMC_HS200_120 | MMC_CAP_MMC_HS400_120) 164*7ba10b88SImre Vadász #define MMC_CAP_MMC_ENH_STROBE (1 << 17) /* Can do eMMC Enhanced Strobe */ 165*7ba10b88SImre Vadász #define MMC_CAP_SIGNALING_120 (1 << 18) /* Can do signaling at 1.2 V */ 166*7ba10b88SImre Vadász #define MMC_CAP_SIGNALING_180 (1 << 19) /* Can do signaling at 1.8 V */ 167*7ba10b88SImre Vadász #define MMC_CAP_SIGNALING_330 (1 << 20) /* Can do signaling at 3.3 V */ 168*7ba10b88SImre Vadász #define MMC_CAP_DRIVER_TYPE_A (1 << 21) /* Can do Driver Type A */ 169*7ba10b88SImre Vadász #define MMC_CAP_DRIVER_TYPE_C (1 << 22) /* Can do Driver Type C */ 170*7ba10b88SImre Vadász #define MMC_CAP_DRIVER_TYPE_D (1 << 23) /* Can do Driver Type D */ 171d6644679SSascha Wildner enum mmc_card_mode mode; 172d6644679SSascha Wildner struct mmc_ios ios; /* Current state of the host */ 173d6644679SSascha Wildner }; 174d6644679SSascha Wildner 175d6644679SSascha Wildner #endif /* BUS_MMC_BRIDGE_H */ 176