xref: /dflybsd-src/share/man/man4/sdhci.4 (revision 7ba10b88109826f7f4b59e318458760d74f2452e)

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.\" $FreeBSD: src/share/man/man4/sdhci.4,v 1.2 2009/01/16 19:28:25 mav Exp $
.\"
.Dd May 13, 2017
.Dt SDHCI 4
.Os
.Sh NAME
.Nm sdhci
.Nd PCI SD Host Controller bridge driver
.Sh SYNOPSIS
To compile this driver into the kernel, place the following lines in your
kernel configuration file:
.Bd -ragged -offset indent
.Cd "device mmc"
.Cd "device mmcsd"
.Cd "device sdhci"
.Ed
.Pp
Alternatively, to load the driver as a module at boot time, place the
following lines in
.Xr loader.conf 5 :
.Bd -literal -offset indent
mmc_load="YES"
mmcsd_load="YES"
sdhci_pci_load="YES"
.Ed
.Sh DESCRIPTION
The
.Nm
driver supports PCI devices with class 8 and subclass 5 according to
SD Host Controller Specification.
Driver supports up to six high speed 4bit MMC/SD slots per controller.
Driver attaches mmc bus to the respective slot on card insertion and
detaches it on card removing.
.Sh HARDWARE
The
.Nm
driver supports different specification compatible chips. The following
chips have been verified to work:
.Pp
.Bl -bullet -compact
.It
ENE CB712
.It
ENE CB714
.It
RICOH R5C822
.It
RICOH R5CE823
.It
TI PCIXX21/XX11
.El
.Sh LOADER TUNABLES
.Bl -tag -width indent
.It Va hw.sdhci.debug
Set verbose debugging level.
Levels 0 to 3 are currently used.
.It Va hw.sdhci.adma2_test
Set to 1 to allow using ADMA2 transfer mode on untested controller models.
.It Va hw.sdhci.sdma_disable
Set to 1 to disable the SDMA transfer mode.
.It Va hw.sdhci.adma2_disable
Set to 1 to disable the ADMA2 transfer mode.
.It Va hw.sdhci.quirk_clear
Set bit mask of quirks to clear.
.It Va hw.sdhci.quirk_set
Set bit mask of quirks to set, this is applied after the clearing mask.
.El
.Sh SEE ALSO
.Xr mmc 4 ,
.Xr mmcsd 4
.Rs
.%T "SD Specifications, Part 2, SD Host Controller, Simplified Specification"
.Re
.Sh HISTORY
The
.Nm
driver was imported from
.Fx
into
.Dx 2.7
and updated by
.An Markus Pfeiffer Aq Mt profmakx@dragonflybsd.org .
.Sh AUTHORS
.An Alexander Motin Aq Mt mav@FreeBSD.org
.Sh BUGS
Many of existing SD controller chips have some nonstandard requirements,
proprietary registers and hardware bugs, requiring additional handling.
ENE chips are handled to work fine, while some revisions of RICOH and TI
controllers still do not see cards without some additional initialization.