1*86d7f5d3SJohn Marino.\" Copyright (c) 1998, 1999, Nicolas Souchu 2*86d7f5d3SJohn Marino.\" All rights reserved. 3*86d7f5d3SJohn Marino.\" 4*86d7f5d3SJohn Marino.\" Redistribution and use in source and binary forms, with or without 5*86d7f5d3SJohn Marino.\" modification, are permitted provided that the following conditions 6*86d7f5d3SJohn Marino.\" are met: 7*86d7f5d3SJohn Marino.\" 1. Redistributions of source code must retain the above copyright 8*86d7f5d3SJohn Marino.\" notice, this list of conditions and the following disclaimer. 9*86d7f5d3SJohn Marino.\" 2. Redistributions in binary form must reproduce the above copyright 10*86d7f5d3SJohn Marino.\" notice, this list of conditions and the following disclaimer in the 11*86d7f5d3SJohn Marino.\" documentation and/or other materials provided with the distribution. 12*86d7f5d3SJohn Marino.\" 13*86d7f5d3SJohn Marino.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14*86d7f5d3SJohn Marino.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15*86d7f5d3SJohn Marino.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16*86d7f5d3SJohn Marino.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17*86d7f5d3SJohn Marino.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18*86d7f5d3SJohn Marino.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19*86d7f5d3SJohn Marino.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20*86d7f5d3SJohn Marino.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21*86d7f5d3SJohn Marino.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22*86d7f5d3SJohn Marino.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23*86d7f5d3SJohn Marino.\" SUCH DAMAGE. 24*86d7f5d3SJohn Marino.\" 25*86d7f5d3SJohn Marino.\" $FreeBSD: src/share/man/man4/ppc.4,v 1.13.4.4 2001/08/17 13:08:39 ru Exp $ 26*86d7f5d3SJohn Marino.\" $DragonFly: src/share/man/man4/ppc.4,v 1.4 2007/05/27 23:06:33 swildner Exp $ 27*86d7f5d3SJohn Marino.\" 28*86d7f5d3SJohn Marino.Dd March 5, 1998 29*86d7f5d3SJohn Marino.Dt PPC 4 30*86d7f5d3SJohn Marino.Os 31*86d7f5d3SJohn Marino.Sh NAME 32*86d7f5d3SJohn Marino.Nm ppc 33*86d7f5d3SJohn Marino.Nd Parallel Port Chipset driver 34*86d7f5d3SJohn Marino.Sh SYNOPSIS 35*86d7f5d3SJohn Marino.Cd "device ppc0 at isa? port? flags 0xXX irq 7" 36*86d7f5d3SJohn Marino.Pp 37*86d7f5d3SJohn MarinoFor one or more PPBUS busses: 38*86d7f5d3SJohn Marino.Cd "device ppbus at ppc0" 39*86d7f5d3SJohn Marino.Sh DESCRIPTION 40*86d7f5d3SJohn MarinoThe 41*86d7f5d3SJohn Marino.Nm 42*86d7f5d3SJohn Marinodriver provides low level support to various parallel port chipsets for the 43*86d7f5d3SJohn Marino.Xr ppbus 4 44*86d7f5d3SJohn Marinosystem. 45*86d7f5d3SJohn Marino.Pp 46*86d7f5d3SJohn MarinoDuring the probe phase, 47*86d7f5d3SJohn Marino.Nm 48*86d7f5d3SJohn Marinodetects parallel port chipsets and initializes 49*86d7f5d3SJohn Marinoprivate data according to their operating mode: COMPATIBLE, 50*86d7f5d3SJohn MarinoNIBBLE, PS/2, EPP, ECP and other mixed modes. 51*86d7f5d3SJohn MarinoIf a mode is provided at startup through the 52*86d7f5d3SJohn Marino.Va flags 53*86d7f5d3SJohn Marinovariable of the boot 54*86d7f5d3SJohn Marinointerface, the operating mode of the chipset is forced according to 55*86d7f5d3SJohn Marino.Va flags 56*86d7f5d3SJohn Marinoand the hardware supported modes. 57*86d7f5d3SJohn Marino.Pp 58*86d7f5d3SJohn MarinoDuring the attach phase, 59*86d7f5d3SJohn Marino.Nm 60*86d7f5d3SJohn Marinoallocates a ppbus structure, initializes it and calls the ppbus 61*86d7f5d3SJohn Marinoattach function. 62*86d7f5d3SJohn Marino.Ss Supported flags 63*86d7f5d3SJohn Marino.Bl -item -offset indent 64*86d7f5d3SJohn Marino.It 65*86d7f5d3SJohn Marinobits 0-3: chipset forced mode(s) 66*86d7f5d3SJohn Marino.Bd -literal 67*86d7f5d3SJohn MarinoPPB_COMPATIBLE 0x0 /* Centronics compatible mode */ 68*86d7f5d3SJohn MarinoPPB_NIBBLE 0x1 /* reverse 4 bit mode */ 69*86d7f5d3SJohn MarinoPPB_PS2 0x2 /* PS/2 byte mode */ 70*86d7f5d3SJohn MarinoPPB_EPP 0x4 /* EPP mode, 32 bit */ 71*86d7f5d3SJohn MarinoPPB_ECP 0x8 /* ECP mode */ 72*86d7f5d3SJohn Marino.Ed 73*86d7f5d3SJohn Marino.Pp 74*86d7f5d3SJohn MarinoAnd any mixed values. 75*86d7f5d3SJohn Marino.It 76*86d7f5d3SJohn Marinobit 4: EPP protocol (0 EPP 1.9, 1 EPP 1.7) 77*86d7f5d3SJohn Marino.It 78*86d7f5d3SJohn Marinobit 5: activate IRQ (1 IRQ disabled, 0 IRQ enabled) 79*86d7f5d3SJohn Marino.It 80*86d7f5d3SJohn Marinobit 6: disable chipset specific detection 81*86d7f5d3SJohn Marino.It 82*86d7f5d3SJohn Marinobit 7: disable FIFO detection 83*86d7f5d3SJohn Marino.El 84*86d7f5d3SJohn Marino.Ss Supported chipsets 85*86d7f5d3SJohn MarinoSome parallel port chipsets are explicitly supported: 86*86d7f5d3SJohn Marinodetection and initialisation code has been written according to 87*86d7f5d3SJohn Marinotheir datasheets. 88*86d7f5d3SJohn Marino.Bl -bullet -offset indent 89*86d7f5d3SJohn Marino.It 90*86d7f5d3SJohn MarinoSMC FDC37C665GT and FDC37C666GT chipsets 91*86d7f5d3SJohn Marino.It 92*86d7f5d3SJohn MarinoNatsemi PC873xx-family (PC87332 and PC87306) 93*86d7f5d3SJohn Marino.It 94*86d7f5d3SJohn MarinoWinbond W83877xx-family (W83877F and W83877AF) 95*86d7f5d3SJohn Marino.It 96*86d7f5d3SJohn MarinoSMC-like chipsets with mixed modes (see 97*86d7f5d3SJohn Marino.Xr ppbus 4 ) 98*86d7f5d3SJohn Marino.El 99*86d7f5d3SJohn Marino.Ss Adding support to a new chipset 100*86d7f5d3SJohn MarinoYou may want to add support for the newest chipset your motherboard was 101*86d7f5d3SJohn Marinosold with. 102*86d7f5d3SJohn MarinoFor the ISA bus, just retrieve the specs of the chipset and write the 103*86d7f5d3SJohn Marinocorresponding 104*86d7f5d3SJohn Marino.Fn ppc_mychipset_detect 105*86d7f5d3SJohn Marinofunction. 106*86d7f5d3SJohn MarinoThen add an entry to the general purpose 107*86d7f5d3SJohn Marino.Fn ppc_detect 108*86d7f5d3SJohn Marinofunction. 109*86d7f5d3SJohn Marino.Pp 110*86d7f5d3SJohn MarinoYour 111*86d7f5d3SJohn Marino.Fn ppc_mychipset_detect 112*86d7f5d3SJohn Marinofunction should ensure that if the mode field of the 113*86d7f5d3SJohn Marino.Va flags 114*86d7f5d3SJohn Marinoboot variable is not null, then the operating 115*86d7f5d3SJohn Marinomode is forced to the given mode and no other mode is available and 116*86d7f5d3SJohn Marinoppb->ppb_avm field contains the available modes of the chipset. 117*86d7f5d3SJohn Marino.Sh SEE ALSO 118*86d7f5d3SJohn Marino.Xr ppbus 4 , 119*86d7f5d3SJohn Marino.Xr ppi 4 120*86d7f5d3SJohn Marino.Sh HISTORY 121*86d7f5d3SJohn MarinoThe 122*86d7f5d3SJohn Marino.Nm 123*86d7f5d3SJohn Marinomanual page first appeared in 124*86d7f5d3SJohn Marino.Fx 3.0 . 125*86d7f5d3SJohn Marino.Sh AUTHORS 126*86d7f5d3SJohn MarinoThis manual page was written by 127*86d7f5d3SJohn Marino.An Nicolas Souchu . 128*86d7f5d3SJohn Marino.Sh BUGS 129*86d7f5d3SJohn MarinoThe chipset detection process may corrupt your chipset configuration. 130*86d7f5d3SJohn MarinoYou may 131*86d7f5d3SJohn Marinodisable chipset specific detection by using the above flags. 132