139990074SConstantine A. Murenin.\" $OpenBSD: kate.4,v 1.1 2008/03/27 01:54:44 cnst Exp $ 239990074SConstantine A. Murenin.\" 339990074SConstantine A. Murenin.\" Copyright (c) 2008/2010 Constantine A. Murenin <cnst+dfly@bugmail.mojo.ru> 439990074SConstantine A. Murenin.\" 539990074SConstantine A. Murenin.\" Permission to use, copy, modify, and distribute this software for any 639990074SConstantine A. Murenin.\" purpose with or without fee is hereby granted, provided that the above 739990074SConstantine A. Murenin.\" copyright notice and this permission notice appear in all copies. 839990074SConstantine A. Murenin.\" 939990074SConstantine A. Murenin.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 1039990074SConstantine A. Murenin.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 1139990074SConstantine A. Murenin.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 1239990074SConstantine A. Murenin.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 1339990074SConstantine A. Murenin.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 1439990074SConstantine A. Murenin.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 1539990074SConstantine A. Murenin.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 1639990074SConstantine A. Murenin.\" 170f7e851bSSascha Wildner.Dd August 2, 2020 1839990074SConstantine A. Murenin.Dt KATE 4 1939990074SConstantine A. Murenin.Os 2039990074SConstantine A. Murenin.Sh NAME 2139990074SConstantine A. Murenin.Nm kate 2239990074SConstantine A. Murenin.Nd AMD K8 temperature sensor 2339990074SConstantine A. Murenin.Sh SYNOPSIS 2439990074SConstantine A. MureninTo compile this driver into the kernel, 2539990074SConstantine A. Mureninplace the following lines in your 2639990074SConstantine A. Mureninkernel configuration file: 2739990074SConstantine A. Murenin.Bd -ragged -offset indent 283d348ee9SConstantine A. Murenin.Cd "device pci" 2939990074SConstantine A. Murenin.Cd "device kate" 3039990074SConstantine A. Murenin.Ed 3139990074SConstantine A. Murenin.Pp 3239990074SConstantine A. MureninAlternatively, to load the driver as a 333d348ee9SConstantine A. Mureninmodule at boot time, place the following line in 3439990074SConstantine A. Murenin.Xr loader.conf 5 : 3539990074SConstantine A. Murenin.Bd -literal -offset indent 3639990074SConstantine A. Mureninkate_load="YES" 3739990074SConstantine A. Murenin.Ed 3839990074SConstantine A. Murenin.Sh DESCRIPTION 3939990074SConstantine A. MureninThe 4039990074SConstantine A. Murenin.Nm 4139990074SConstantine A. Murenindriver provides support for the temperature sensors available in the 4239990074SConstantine A. MureninAMD K8 family of processors. 4339990074SConstantine A. Murenin(Subsequent AMD families are supported by 4439990074SConstantine A. Murenin.Xr km 4 . ) 4539990074SConstantine A. Murenin.Pp 4639990074SConstantine A. MureninThese sensors were officially introduced with 4739990074SConstantine A. MureninRevision F Family 0Fh processors, 4839990074SConstantine A. Mureninand provide 1 degC accuracy. 4939990074SConstantine A. MureninPrecision was improved in Revision G chips, 5039990074SConstantine A. Mureninwhich provide two more bits for 0.25 degC steppings. 5139990074SConstantine A. MureninEach core may have two temperature sensors, and 5239990074SConstantine A. Mureninthere may be up to two cores per package. 5339990074SConstantine A. Murenin.Pp 5439990074SConstantine A. MureninMultiprocessor systems would have one instance of 5539990074SConstantine A. Murenin.Nm 5639990074SConstantine A. Mureninper each chip. 5739990074SConstantine A. MureninIn each instance, 5839990074SConstantine A. Murenin.Va temp0 5939990074SConstantine A. Mureninand 6039990074SConstantine A. Murenin.Va temp1 6139990074SConstantine A. Mureninsensors 6239990074SConstantine A. Murenincorrespond to the temperature sensors on the first core, 6339990074SConstantine A. Mureninwhereas 6439990074SConstantine A. Murenin.Va temp2 6539990074SConstantine A. Mureninand 6639990074SConstantine A. Murenin.Va temp3 6739990074SConstantine A. Murenincorrespond to the temperature sensors on the second core. 6839990074SConstantine A. MureninAs such, single core chips may have two sensors, 6939990074SConstantine A. Mureninand dual-core dual-processor systems may have as many as 8 7039990074SConstantine A. Murenintemperature sensors in total. 7139990074SConstantine A. Murenin.Pp 7239990074SConstantine A. MureninSince many prior revisions of the chips appear to have 7339990074SConstantine A. Mureninvalid readings for at least some temperature sensors 7439990074SConstantine A. Mureninin the same address space as the abovementioned revisions, 7539990074SConstantine A. Mureninthe driver may also attach on such older revisions provided 7639990074SConstantine A. Mureninthat it finds some sensor readings that appear valid. 7739990074SConstantine A. MureninHowever, in such cases 7839990074SConstantine A. Murenin.Nm 7939990074SConstantine A. Mureninwould not print the core revision information into the dmesg. 8039990074SConstantine A. Murenin.Pp 8139990074SConstantine A. MureninSensor values are made available through the 8239990074SConstantine A. Murenin.Dv HW_SENSORS 8339990074SConstantine A. Murenin.Xr sysctl 3 8439990074SConstantine A. Murenininterface, 8539990074SConstantine A. Mureninand can be monitored with the 8639990074SConstantine A. Murenin.Xr systat 1 8739990074SConstantine A. Murenin.Ar sensors 8839990074SConstantine A. Murenindisplay, 8939990074SConstantine A. Murenin.Xr sensorsd 8 9039990074SConstantine A. Mureninand 9139990074SConstantine A. Murenin.Xr sysctl 8 9239990074SConstantine A. Murenin.Ar hw.sensors . 9339990074SConstantine A. Murenin.Sh SEE ALSO 9439990074SConstantine A. Murenin.Xr systat 1 , 9539990074SConstantine A. Murenin.Xr sysctl 3 , 960f7e851bSSascha Wildner.Xr amdtemp 4 , 972e6c72b5SSascha Wildner.Xr intro 4 , 9839990074SConstantine A. Murenin.Xr km 4 , 9939990074SConstantine A. Murenin.Xr pci 4 , 10039990074SConstantine A. Murenin.Xr sensorsd 8 , 10139990074SConstantine A. Murenin.Xr sysctl 8 10239990074SConstantine A. Murenin.Rs 10339990074SConstantine A. Murenin.%T "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors" 10439990074SConstantine A. Murenin.%D July 2007 10539990074SConstantine A. Murenin.%R Publication # 32559 10639990074SConstantine A. Murenin.%P pp. 21--23 and pp. 179--184 107*92db1a35SSascha Wildner.\" .%U http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf 10839990074SConstantine A. Murenin.Re 10939990074SConstantine A. Murenin.Rs 11039990074SConstantine A. Murenin.%T "Revision Guide for AMD NPT Family 0Fh Processors" 11139990074SConstantine A. Murenin.%D February 2008 11239990074SConstantine A. Murenin.%R Publication # 33610 113*92db1a35SSascha Wildner.\" .%U http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf 11439990074SConstantine A. Murenin.Re 11539990074SConstantine A. Murenin.Sh HISTORY 11639990074SConstantine A. MureninThe 11739990074SConstantine A. Murenin.Nm 11839990074SConstantine A. Murenindriver first appeared in 11939990074SConstantine A. Murenin.Ox 4.4 12039990074SConstantine A. Mureninand 12184010a4bSSascha Wildner.Dx 2.5 . 12239990074SConstantine A. Murenin.Sh AUTHORS 12339990074SConstantine A. MureninThe 12439990074SConstantine A. Murenin.Nm 12539990074SConstantine A. Murenindriver was written for 12639990074SConstantine A. Murenin.Ox 12739990074SConstantine A. Mureninand 12839990074SConstantine A. Murenin.Dx 12939990074SConstantine A. Mureninby 13039990074SConstantine A. Murenin.An Constantine A. Murenin 13139990074SConstantine A. Mureninwhilst at the University of Waterloo. 132