18bbfb24fSSascha Wildner.\" Copyright (c) 2001-2003, Intel Corporation 28bbfb24fSSascha Wildner.\" All rights reserved. 38bbfb24fSSascha Wildner.\" 48bbfb24fSSascha Wildner.\" Redistribution and use in source and binary forms, with or without 58bbfb24fSSascha Wildner.\" modification, are permitted provided that the following conditions are met: 68bbfb24fSSascha Wildner.\" 78bbfb24fSSascha Wildner.\" 1. Redistributions of source code must retain the above copyright notice, 88bbfb24fSSascha Wildner.\" this list of conditions and the following disclaimer. 98bbfb24fSSascha Wildner.\" 108bbfb24fSSascha Wildner.\" 2. Redistributions in binary form must reproduce the above copyright 118bbfb24fSSascha Wildner.\" notice, this list of conditions and the following disclaimer in the 128bbfb24fSSascha Wildner.\" documentation and/or other materials provided with the distribution. 138bbfb24fSSascha Wildner.\" 148bbfb24fSSascha Wildner.\" 3. Neither the name of the Intel Corporation nor the names of its 158bbfb24fSSascha Wildner.\" contributors may be used to endorse or promote products derived from 168bbfb24fSSascha Wildner.\" this software without specific prior written permission. 178bbfb24fSSascha Wildner.\" 188bbfb24fSSascha Wildner.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 198bbfb24fSSascha Wildner.\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 208bbfb24fSSascha Wildner.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 218bbfb24fSSascha Wildner.\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 228bbfb24fSSascha Wildner.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 238bbfb24fSSascha Wildner.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 248bbfb24fSSascha Wildner.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 258bbfb24fSSascha Wildner.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 268bbfb24fSSascha Wildner.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 278bbfb24fSSascha Wildner.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 288bbfb24fSSascha Wildner.\" POSSIBILITY OF SUCH DAMAGE. 298bbfb24fSSascha Wildner.\" 308bbfb24fSSascha Wildner.\" * Other names and brands may be claimed as the property of others. 318bbfb24fSSascha Wildner.\" 328bbfb24fSSascha Wildner.\" $FreeBSD: src/share/man/man4/igb.4,v 1.2 2010/05/14 20:11:30 marius Exp $ 338bbfb24fSSascha Wildner.\" 34*61ebbe47SSepherosa Ziehau.Dd December 17, 2017 358bbfb24fSSascha Wildner.Dt IGB 4 368bbfb24fSSascha Wildner.Os 378bbfb24fSSascha Wildner.Sh NAME 388bbfb24fSSascha Wildner.Nm igb 398bbfb24fSSascha Wildner.Nd "Intel(R) PRO/1000 PCI Express Gigabit Ethernet adapter driver" 408bbfb24fSSascha Wildner.Sh SYNOPSIS 418bbfb24fSSascha WildnerTo compile this driver into the kernel, 428bbfb24fSSascha Wildnerplace the following line in your 438bbfb24fSSascha Wildnerkernel configuration file: 448bbfb24fSSascha Wildner.Bd -ragged -offset indent 454b5e043dSSepherosa Ziehau.Cd "device ig_hal" 468bbfb24fSSascha Wildner.Cd "device igb" 478bbfb24fSSascha Wildner.Ed 488bbfb24fSSascha Wildner.Pp 498bbfb24fSSascha WildnerAlternatively, to load the driver as a 508bbfb24fSSascha Wildnermodule at boot time, place the following line in 518bbfb24fSSascha Wildner.Xr loader.conf 5 : 528bbfb24fSSascha Wildner.Bd -literal -offset indent 534b5e043dSSepherosa Ziehauig_hal_load="YES" 548bbfb24fSSascha Wildnerif_igb_load="YES" 558bbfb24fSSascha Wildner.Ed 568bbfb24fSSascha Wildner.Sh DESCRIPTION 578bbfb24fSSascha WildnerThe 588bbfb24fSSascha Wildner.Nm 594b5e043dSSepherosa Ziehaudriver provides support for PCI Express Gigabit Ethernet adapters based on 604b5e043dSSepherosa Ziehauthe Intel 614b5e043dSSepherosa Ziehau82575, 624b5e043dSSepherosa Ziehau82576, 634b5e043dSSepherosa Ziehau82580, 644b5e043dSSepherosa ZiehauI210, 654b5e043dSSepherosa ZiehauI211, 669d7859fcSSepherosa ZiehauI350 and I354 674b5e043dSSepherosa ZiehauEthernet controller chips. 684b5e043dSSepherosa ZiehauThe 694b5e043dSSepherosa Ziehau.Nm 704b5e043dSSepherosa Ziehaudriver supports: 718bbfb24fSSascha Wildner.Pp 724b5e043dSSepherosa Ziehau.Bl -item -offset indent -compact 734b5e043dSSepherosa Ziehau.It 744b5e043dSSepherosa ZiehauTransmit/Receive checksum offload for IP/UDP/TCP. 754b5e043dSSepherosa Ziehau.\"Jumbo Frames. 764b5e043dSSepherosa Ziehau.It 774b5e043dSSepherosa ZiehauInterrupt moderation 784b5e043dSSepherosa Ziehau.It 794b5e043dSSepherosa ZiehauTCP segmentation offload (TSO) 804b5e043dSSepherosa Ziehau.It 814b5e043dSSepherosa ZiehauReceive side scaling (RSS) 824b5e043dSSepherosa Ziehau.It 834b5e043dSSepherosa ZiehauMultiple tranmission queues 844b5e043dSSepherosa Ziehau.It 854b5e043dSSepherosa ZiehauMultiple vector MSI-X 864b5e043dSSepherosa Ziehau.It 874b5e043dSSepherosa ZiehauVLAN tag stripping and inserting 884b5e043dSSepherosa Ziehau.El 898bbfb24fSSascha Wildner.Pp 904b5e043dSSepherosa ZiehauIf 914b5e043dSSepherosa Ziehau.Xr polling 4 924b5e043dSSepherosa Ziehauor MSI-X is used, 934b5e043dSSepherosa Ziehauby default, 944b5e043dSSepherosa Ziehauthe 954b5e043dSSepherosa Ziehau.Nm 964b5e043dSSepherosa Ziehaudriver will try enabling as many reception queues and transmission queues 974b5e043dSSepherosa Ziehauas are allowed by the number of CPUs in the system. 988bbfb24fSSascha Wildner.Pp 99e264b12aSSepherosa ZiehauIf multiple transmission queues are used, 100e264b12aSSepherosa Ziehauthe round-robin arbitration is performed among the transmission queues. 101e264b12aSSepherosa ZiehauIt should be noted that 102e264b12aSSepherosa Ziehauif both TSO and multiple transmission queues are used, 103e264b12aSSepherosa Ziehaufor 82575, the round-robin arbitration between transmission queues is done 104e264b12aSSepherosa Ziehauat the TSO packet boundary; 105f734ea4bSSascha Wildnerfor the reset of the hardware, the round-robin arbitration 106e264b12aSSepherosa Ziehaubetween transmission queues is done at the TCP segment boundary after 107e264b12aSSepherosa Ziehauthe hardware segmentation is performed. 108e264b12aSSepherosa Ziehau.Pp 1094b5e043dSSepherosa Ziehau82575 supports 4 reception queues and 4 transmission queues. 1104b5e043dSSepherosa ZiehauMSI-X is not enabled due to hardware errata. 1114b5e043dSSepherosa ZiehauUnder MSI or legacy interrupt mode, 1124b5e043dSSepherosa Ziehau2 reception queues are enabled for hardware RSS hash 1134b5e043dSSepherosa Ziehauand only 1 transmission queue is enable. 1144b5e043dSSepherosa Ziehau.Pp 1154b5e043dSSepherosa Ziehau82576 supports 16 reception queues and 16 transmission queues. 1164b5e043dSSepherosa ZiehauMSI-X is enable by default. 1174b5e043dSSepherosa ZiehauHowever, 1184b5e043dSSepherosa Ziehaudue to the number of MSI-X vectors is 10, 1194b5e043dSSepherosa Ziehauat most 8 reception queues and 8 transmission queues will be enabled 1204b5e043dSSepherosa Ziehauunder MSI-X mode. 1214b5e043dSSepherosa ZiehauWhen 1224b5e043dSSepherosa Ziehau.Xr polling 4 1234b5e043dSSepherosa Ziehauis enabled on the devices, 1244b5e043dSSepherosa Ziehauat most 16 reception queues and 16 transmission queues will be enabled. 1254b5e043dSSepherosa Ziehau.Pp 1269d7859fcSSepherosa Ziehau82580, 1279d7859fcSSepherosa ZiehauI350 and I354 support 8 reception queues and 8 transmission queues. 1284b5e043dSSepherosa ZiehauMSI-X is enabled by default. 1294b5e043dSSepherosa Ziehau.Pp 1304b5e043dSSepherosa ZiehauI210 supports 4 reception queues and 4 transmission queues. 1314b5e043dSSepherosa ZiehauMSI-X is enabled by default. 1324b5e043dSSepherosa Ziehau.Pp 1334b5e043dSSepherosa ZiehauI211 supports 2 reception queues and 2 transmission queues. 1344b5e043dSSepherosa ZiehauMSI-X is enabled by default. 1354b5e043dSSepherosa Ziehau.Pp 1364b5e043dSSepherosa Ziehau.\"For questions related to hardware requirements, refer to the 1374b5e043dSSepherosa Ziehau.\"documentation supplied with your Intel PRO/1000 adapter. 1384b5e043dSSepherosa Ziehau.\"All hardware requirements listed apply to use with 1394b5e043dSSepherosa Ziehau.\".Dx . 1404b5e043dSSepherosa Ziehau.\".Pp 1414b5e043dSSepherosa Ziehau.\"Support for Jumbo Frames is provided via the interface MTU setting. 1424b5e043dSSepherosa Ziehau.\"Selecting an MTU larger than 1500 bytes with the 1434b5e043dSSepherosa Ziehau.\".Xr ifconfig 8 1444b5e043dSSepherosa Ziehau.\"utility configures the adapter to receive and transmit Jumbo Frames. 1454b5e043dSSepherosa Ziehau.\"The maximum MTU size for Jumbo Frames is 9216. 1464b5e043dSSepherosa Ziehau.\".Pp 1478bbfb24fSSascha WildnerThe 1488bbfb24fSSascha Wildner.Nm 1498bbfb24fSSascha Wildnerdriver supports the following media types: 1508bbfb24fSSascha Wildner.Bl -tag -width ".Cm 10baseT/UTP" 1518bbfb24fSSascha Wildner.It Cm autoselect 1528bbfb24fSSascha WildnerEnables auto-negotiation for speed and duplex. 1538bbfb24fSSascha Wildner.It Cm 10baseT/UTP 1548bbfb24fSSascha WildnerSets 10Mbps operation. 1558bbfb24fSSascha WildnerUse the 1568bbfb24fSSascha Wildner.Cm mediaopt 1578bbfb24fSSascha Wildneroption to select 1588bbfb24fSSascha Wildner.Cm full-duplex 1598bbfb24fSSascha Wildnermode. 1608bbfb24fSSascha Wildner.It Cm 100baseTX 1618bbfb24fSSascha WildnerSets 100Mbps operation. 1628bbfb24fSSascha WildnerUse the 1638bbfb24fSSascha Wildner.Cm mediaopt 1648bbfb24fSSascha Wildneroption to select 1658bbfb24fSSascha Wildner.Cm full-duplex 1668bbfb24fSSascha Wildnermode. 1678bbfb24fSSascha Wildner.It Cm 1000baseSX 1688bbfb24fSSascha WildnerSets 1000Mbps operation. 1698bbfb24fSSascha WildnerOnly 1708bbfb24fSSascha Wildner.Cm full-duplex 1718bbfb24fSSascha Wildnermode is supported at this speed. 1724b5e043dSSepherosa Ziehau.It Cm 1000baseT 1738bbfb24fSSascha WildnerSets 1000Mbps operation. 1748bbfb24fSSascha WildnerOnly 1758bbfb24fSSascha Wildner.Cm full-duplex 1768bbfb24fSSascha Wildnermode is supported at this speed. 1778bbfb24fSSascha Wildner.El 1788bbfb24fSSascha Wildner.Pp 1798bbfb24fSSascha WildnerThe 1808bbfb24fSSascha Wildner.Nm 1818bbfb24fSSascha Wildnerdriver supports the following media options: 1828bbfb24fSSascha Wildner.Bl -tag -width ".Cm full-duplex" 1838bbfb24fSSascha Wildner.It Cm full-duplex 1848bbfb24fSSascha WildnerForces full-duplex operation 1858bbfb24fSSascha Wildner.It Cm half-duplex 1868bbfb24fSSascha WildnerForces half-duplex operation. 187d2f385fbSSepherosa Ziehau.It Cm rxpause 188d2f385fbSSepherosa ZiehauEnable flow control PAUSE reception. 189d2f385fbSSepherosa ZiehauThis is only supported by 190d2f385fbSSepherosa Ziehau.Cm autoselect 191d2f385fbSSepherosa Ziehauand 192d2f385fbSSepherosa Ziehau.Cm full-duplex 193d2f385fbSSepherosa Ziehaumode. 194d2f385fbSSepherosa Ziehau.It Cm txpause 195d2f385fbSSepherosa ZiehauEnable flow control PAUSE transmission. 196d2f385fbSSepherosa ZiehauThis is only supported by 197d2f385fbSSepherosa Ziehau.Cm autoselect 198d2f385fbSSepherosa Ziehauand 199d2f385fbSSepherosa Ziehau.Cm full-duplex 200d2f385fbSSepherosa Ziehaumode. 201d2f385fbSSepherosa Ziehau.It Cm forcepause 202d2f385fbSSepherosa ZiehauForce flow control PAUSE operation as configured by 203d2f385fbSSepherosa Ziehau.Cm rxpause 204d2f385fbSSepherosa Ziehauand 205d2f385fbSSepherosa Ziehau.Cm txpause 206d2f385fbSSepherosa Ziehaumedia options. 2078bbfb24fSSascha Wildner.El 2088bbfb24fSSascha Wildner.Pp 2098bbfb24fSSascha WildnerOnly use 2108bbfb24fSSascha Wildner.Cm mediaopt 2118bbfb24fSSascha Wildnerto set the driver to 2128bbfb24fSSascha Wildner.Cm full-duplex . 2138bbfb24fSSascha WildnerIf 2148bbfb24fSSascha Wildner.Cm mediaopt 2158bbfb24fSSascha Wildneris not specified, the driver defaults to 2168bbfb24fSSascha Wildner.Cm half-duplex . 2178bbfb24fSSascha Wildner.Pp 2188bbfb24fSSascha WildnerFor more information on configuring this device, see 2198bbfb24fSSascha Wildner.Xr ifconfig 8 . 2204b5e043dSSepherosa ZiehauThe 2214b5e043dSSepherosa Ziehau.Nm 2224b5e043dSSepherosa Ziehaudriver supports 2234b5e043dSSepherosa Ziehau.Xr polling 4 . 2248bbfb24fSSascha Wildner.Sh HARDWARE 2258bbfb24fSSascha WildnerThe 2268bbfb24fSSascha Wildner.Nm 2274b5e043dSSepherosa Ziehaudriver supports Gigabit Ethernet adapters based on the Intel 2284b5e043dSSepherosa Ziehau82575, 2294b5e043dSSepherosa Ziehau82576, 2304b5e043dSSepherosa Ziehau82580, 2314b5e043dSSepherosa ZiehauI210, 2324b5e043dSSepherosa ZiehauI211, 2339d7859fcSSepherosa ZiehauI350 and I354 2344b5e043dSSepherosa Ziehaucontroller chips: 2358bbfb24fSSascha Wildner.Pp 2368bbfb24fSSascha Wildner.Bl -bullet -compact 2378bbfb24fSSascha Wildner.It 238*61ebbe47SSepherosa ZiehauIntel 82575EB Gigabit Ethernet Controller 239*61ebbe47SSepherosa Ziehau.It 240ba0123e0SSepherosa ZiehauIntel 82576EB Gigabit Ethernet Controller 2418bbfb24fSSascha Wildner.It 242ba0123e0SSepherosa ZiehauIntel 82576NS Gigabit Ethernet Controller 2434b5e043dSSepherosa Ziehau.It 2444b5e043dSSepherosa ZiehauIntel 82580EB Gigabit Ethernet Controller 2454b5e043dSSepherosa Ziehau.It 246*61ebbe47SSepherosa ZiehauIntel Ethernet Controller I350-AM2 2474b5e043dSSepherosa Ziehau.It 248ba0123e0SSepherosa ZiehauIntel Ethernet Controller I350-AM4 2494b5e043dSSepherosa Ziehau.It 250ba0123e0SSepherosa ZiehauIntel Ethernet Controller I350-BT2 251ba0123e0SSepherosa Ziehau.It 252*61ebbe47SSepherosa ZiehauIntel Ethernet Controller I210-AS 253ba0123e0SSepherosa Ziehau.It 254ba0123e0SSepherosa ZiehauIntel Ethernet Controller I210-AT 255ba0123e0SSepherosa Ziehau.It 256*61ebbe47SSepherosa ZiehauIntel Ethernet Controller I210-CS 257*61ebbe47SSepherosa Ziehau.It 258ba0123e0SSepherosa ZiehauIntel Ethernet Controller I210-IS 259ba0123e0SSepherosa Ziehau.It 260ba0123e0SSepherosa ZiehauIntel Ethernet Controller I210-IT 261ba0123e0SSepherosa Ziehau.It 262ba0123e0SSepherosa ZiehauIntel Ethernet Controller I211-AT 263ba0123e0SSepherosa Ziehau.It 264ba0123e0SSepherosa ZiehauIntel Ethernet Server Adapter I210-T1 265ba0123e0SSepherosa Ziehau.It 266*61ebbe47SSepherosa ZiehauIntel Ethernet Server Adapter I340-F4 267ba0123e0SSepherosa Ziehau.It 268*61ebbe47SSepherosa ZiehauIntel Ethernet Server Adapter I340-T4 269*61ebbe47SSepherosa Ziehau.It 270*61ebbe47SSepherosa ZiehauIntel Ethernet Server Adapter I350-F2 271*61ebbe47SSepherosa Ziehau.It 272*61ebbe47SSepherosa ZiehauIntel Ethernet Server Adapter I350-F4 273*61ebbe47SSepherosa Ziehau.It 274*61ebbe47SSepherosa ZiehauIntel Ethernet Server Adapter I350-T2 275*61ebbe47SSepherosa Ziehau.It 276*61ebbe47SSepherosa ZiehauIntel Ethernet Server Adapter I350-T4 277*61ebbe47SSepherosa Ziehau.It 278*61ebbe47SSepherosa ZiehauIntel Gigabit EF Dual Port Server Adapter 279*61ebbe47SSepherosa Ziehau.It 280*61ebbe47SSepherosa ZiehauIntel Gigabit ET Dual Port Server Adapter 281*61ebbe47SSepherosa Ziehau.It 282*61ebbe47SSepherosa ZiehauIntel Gigabit ET Quad Port Server Adapter 283*61ebbe47SSepherosa Ziehau.It 284*61ebbe47SSepherosa ZiehauIntel Gigabit ET2 Quad Port Server Adapter 285*61ebbe47SSepherosa Ziehau.It 286*61ebbe47SSepherosa ZiehauIntel Gigabit VT Quad Port Server Adapter 2878bbfb24fSSascha Wildner.El 2884b5e043dSSepherosa Ziehau.Sh TUNABLES 2898bbfb24fSSascha WildnerTunables can be set at the 2908bbfb24fSSascha Wildner.Xr loader 8 2918bbfb24fSSascha Wildnerprompt before booting the kernel or stored in 2928bbfb24fSSascha Wildner.Xr loader.conf 5 . 2934b5e043dSSepherosa Ziehau.Em X 2944b5e043dSSepherosa Ziehauis the device unit number. 2954b5e043dSSepherosa Ziehau.Bl -tag -width ".Va hw.igbX.irq.unshared" 2964b5e043dSSepherosa Ziehau.It Va hw.igb.rxd Va hw.igbX.rxd 2978bbfb24fSSascha WildnerNumber of receive descriptors allocated by the driver. 2984b5e043dSSepherosa ZiehauThe default value is 512. 2994b5e043dSSepherosa ZiehauThe minimum is 256, 3004b5e043dSSepherosa Ziehauand the maximum is 4096. 3014b5e043dSSepherosa Ziehau.It Va hw.igb.txd Va hw.igbX.txd 3028bbfb24fSSascha WildnerNumber of transmit descriptors allocated by the driver. 3034b5e043dSSepherosa ZiehauThe default value is 1024. 3044b5e043dSSepherosa ZiehauThe minimum is 256, 3054b5e043dSSepherosa Ziehauand the maximum is 4096. 3064b5e043dSSepherosa Ziehau.It Va hw.igb.rxr Va hw.igbX.rxr 3074b5e043dSSepherosa ZiehauThis tunable specifies the number of reception queues could be enabled. 3084b5e043dSSepherosa ZiehauMaximum allowed value for these tunables is device specific 3094b5e043dSSepherosa Ziehauand it must be power of 2 aligned. 3104b5e043dSSepherosa ZiehauSetting these tunables to 0 allows the driver to make 3114b5e043dSSepherosa Ziehauas many reception queues ready-for-use as allowed by the number of CPUs. 3124b5e043dSSepherosa Ziehau.It Va hw.igb.txr Va hw.igbX.txr 3134b5e043dSSepherosa ZiehauThis tunable specifies the number of transmission queues could be enabled. 3144b5e043dSSepherosa ZiehauMaximum allowed value for these tunables is device specific 3154b5e043dSSepherosa Ziehauand it must be power of 2 aligned. 3164b5e043dSSepherosa ZiehauSetting these tunables to 0 allows the driver to make 3174b5e043dSSepherosa Ziehauas many transmission queues ready-for-use as allowed by the number of CPUs. 3184b5e043dSSepherosa Ziehau.It Va hw.igb.msix.enable Va hw.igbX.msix.enable 3194b5e043dSSepherosa ZiehauBy default, 3204b5e043dSSepherosa Ziehauthe driver will use MSI-X if it is supported. 3214b5e043dSSepherosa ZiehauThis behaviour can be turned off by setting this tunable to 0. 3224b5e043dSSepherosa Ziehau.It Va hw.igb.msi.enable Va hw.igbX.msi.enable 3234b5e043dSSepherosa ZiehauIf MSI-X is disabled and MSI is supported, 3244b5e043dSSepherosa Ziehauthe driver will use MSI. 3254b5e043dSSepherosa ZiehauThis behavior can be turned off by setting this tunable to 0. 3264b5e043dSSepherosa Ziehau.It Va hw.igbX.msi.cpu 3274b5e043dSSepherosa ZiehauIf MSI is used, 3284b5e043dSSepherosa Ziehauit specifies the MSI's target CPU. 3294b5e043dSSepherosa Ziehau.It Va hw.igbX.irq.unshared 3304b5e043dSSepherosa ZiehauIf legacy interrupt is used, 3314b5e043dSSepherosa Ziehauby default, 3324b5e043dSSepherosa Ziehauthe driver assumes the interrupt could be shared. 3334b5e043dSSepherosa ZiehauSetting this tunable to 1 allows the driver to perform certain 3344b5e043dSSepherosa Ziehauoptimization based on the knowledge that the interrupt is not shared. 335d2f385fbSSepherosa Ziehau.It Va hw.igb.flow_ctrl Va hw.igbX.flow_ctrl 336d2f385fbSSepherosa ZiehauThe default flow control settings. 337d2f385fbSSepherosa ZiehauSupported values are: 338d2f385fbSSepherosa Ziehaurxpause (only enable PAUSE reception), 339d2f385fbSSepherosa Ziehautxpause (only enable PAUSE transmission), 340d2f385fbSSepherosa Ziehaufull (enable PAUSE reception and transmission), 341d2f385fbSSepherosa Ziehaunone (disable flow control PAUSE operation), 342d2f385fbSSepherosa Ziehauforce-rxpause (force PAUSE reception), 343d2f385fbSSepherosa Ziehauforce-txpause (force PAUSE transmission), 344d2f385fbSSepherosa Ziehauforce-full (forcefully enable PAUSE reception and transmission), 345d2f385fbSSepherosa Ziehauforce-none (forcefully disable flow control PAUSE operation). 3469aeb87bbSSepherosa ZiehauDefault is none. 3478bbfb24fSSascha Wildner.El 3484b5e043dSSepherosa Ziehau.Sh MIB Variables 3494b5e043dSSepherosa ZiehauA number of per-interface variables are implemented in the 35026595b18SSascha Wildner.Va dev.igb. Ns Em X 3514b5e043dSSepherosa Ziehaubranch of the 3524b5e043dSSepherosa Ziehau.Xr sysctl 3 3534b5e043dSSepherosa ZiehauMIB. 35423ab6510SSepherosa Ziehau.Bl -tag -width "rxtx_intr_rate" 3554b5e043dSSepherosa Ziehau.It Va rxr 3564b5e043dSSepherosa ZiehauNumber of reception queues could be enabled (read-only). 3574b5e043dSSepherosa ZiehauUse the tunable 3584b5e043dSSepherosa Ziehau.Va hw.igb.rxr 3594b5e043dSSepherosa Ziehauor 3604b5e043dSSepherosa Ziehau.Va hw.igbX.rxr 3614b5e043dSSepherosa Ziehauto configure it. 3624b5e043dSSepherosa Ziehau.It Va rxr_inuse 3634b5e043dSSepherosa ZiehauNumber of reception queues being used (read-only). 3644b5e043dSSepherosa Ziehau.It Va txr 3654b5e043dSSepherosa ZiehauNumber of transmission queues could be enabled (read-only). 3664b5e043dSSepherosa ZiehauUse the tunable 3674b5e043dSSepherosa Ziehau.Va hw.igb.txr 3684b5e043dSSepherosa Ziehauor 3694b5e043dSSepherosa Ziehau.Va hw.igbX.txr 3704b5e043dSSepherosa Ziehauto configure it. 3714b5e043dSSepherosa Ziehau.It Va txr_inuse 3724b5e043dSSepherosa ZiehauNumber of transmission queues being used (read-only). 3734b5e043dSSepherosa Ziehau.It Va rxd 3744b5e043dSSepherosa ZiehauNumber of descriptors per reception queue (read-only). 3754b5e043dSSepherosa ZiehauUse the tunable 3764b5e043dSSepherosa Ziehau.Va hw.igb.rxd 3774b5e043dSSepherosa Ziehauor 3784b5e043dSSepherosa Ziehau.Va hw.igbX.rxd 3794b5e043dSSepherosa Ziehauto configure it. 3804b5e043dSSepherosa Ziehau.It Va txd 3814b5e043dSSepherosa ZiehauNumber of descriptors per transmission queue (read-only). 3824b5e043dSSepherosa ZiehauUse the tunable 3834b5e043dSSepherosa Ziehau.Va hw.igb.txd 3844b5e043dSSepherosa Ziehauor 3854b5e043dSSepherosa Ziehau.Va hw.igbX.txd 3864b5e043dSSepherosa Ziehauto configure it. 38723ab6510SSepherosa Ziehau.It Va rxtx_intr_rate 3884b5e043dSSepherosa ZiehauIf MSI or legacy interrupt is used, 3894b5e043dSSepherosa Ziehauthis sysctl controls the highest possible frequency 3904b5e043dSSepherosa Ziehauthat interrupt could be generated by the device. 3914b5e043dSSepherosa ZiehauIf MSI-X is used, 3924b5e043dSSepherosa Ziehauthis sysctl controls the highest possible frequency 39323ab6510SSepherosa Ziehauthat interrupt could be generated by the MSI-X vectors, 39423ab6510SSepherosa Ziehauwhich aggregate transmission queue and reception queue procecssing. 39523ab6510SSepherosa ZiehauIt is 6000 by default (~150us). 39623ab6510SSepherosa Ziehau.It Va rx_intr_rate 39723ab6510SSepherosa ZiehauIf MSI-X is used, 39823ab6510SSepherosa Ziehauthis sysctl controls the highest possible frequency 39923ab6510SSepherosa Ziehauthat interrupt could be generated by the MSI-X vectors, 40023ab6510SSepherosa Ziehauwhich only process reception queue. 40123ab6510SSepherosa ZiehauIt is 6000 by default (~150us). 40223ab6510SSepherosa Ziehau.It Va tx_intr_rate 40323ab6510SSepherosa ZiehauIf MSI-X is used, 40423ab6510SSepherosa Ziehauthis sysctl controls the highest possible frequency 40523ab6510SSepherosa Ziehauthat interrupt could be generated by the MSI-X vectors, 40623ab6510SSepherosa Ziehauwhich only process transmission queue. 40723ab6510SSepherosa ZiehauIt is 4000 by default (250us). 40823ab6510SSepherosa Ziehau.It Va sts_intr_rate 40923ab6510SSepherosa ZiehauIf MSI-X is used, 41023ab6510SSepherosa Ziehauthis sysctl controls the highest possible frequency 41123ab6510SSepherosa Ziehauthat interrupt could be generated by the MSI-X vectors, 41223ab6510SSepherosa Ziehauwhich only process chip status changes. 41323ab6510SSepherosa ZiehauIt is 6000 by default (~150us). 4144b5e043dSSepherosa Ziehau.It Va tx_intr_nsegs 4154b5e043dSSepherosa ZiehauTransmission interrupt is asked to be generated upon every 4164b5e043dSSepherosa Ziehau.Va tx_intr_nsegs 4174b5e043dSSepherosa Ziehautransmission descritors having been setup. 4184b5e043dSSepherosa ZiehauThe default value is 1/16 of the number of transmission descriptors per queue. 4194b5e043dSSepherosa Ziehau.It Va tx_wreg_nsegs 4204b5e043dSSepherosa ZiehauThe number of transmission descriptors should be setup 4214b5e043dSSepherosa Ziehaubefore the hardware register is written. 4224b5e043dSSepherosa ZiehauSetting this value too high will have negative effect 4234b5e043dSSepherosa Ziehauon transmission timeliness. 4244b5e043dSSepherosa ZiehauSetting this value too low will hurt overall transmission performance 4254b5e043dSSepherosa Ziehaudue to the frequent hardware register writing. 4264b5e043dSSepherosa ZiehauThe default value is 8. 4274b5e043dSSepherosa Ziehau.It Va rx_wreg_nsegs 4284b5e043dSSepherosa ZiehauThe number of reception descriptors should be setup 4294b5e043dSSepherosa Ziehaubefore the hardware register is written. 4304b5e043dSSepherosa ZiehauSetting this value too high will make device drop incoming packets. 4314b5e043dSSepherosa ZiehauSetting this value too low will hurt overall reception performance 4324b5e043dSSepherosa Ziehaudue to the frequent hardware register writing. 4334b5e043dSSepherosa ZiehauThe default value is 32. 4348bbfb24fSSascha Wildner.El 4354b5e043dSSepherosa Ziehau.\".Sh SUPPORT 4364b5e043dSSepherosa Ziehau.\"For general information and support, 4374b5e043dSSepherosa Ziehau.\"go to the Intel support website at: 4384b5e043dSSepherosa Ziehau.\".Pa http://support.intel.com . 4398bbfb24fSSascha Wildner.\".Pp 4404b5e043dSSepherosa Ziehau.\"If an issue is identified with the released source code on the supported kernel 4414b5e043dSSepherosa Ziehau.\"with a supported adapter, email the specific information related to the 4424b5e043dSSepherosa Ziehau.\"issue to 443b2a6f486SFranco Fichtner.\".Aq Mt freebsdnic@mailbox.intel.com . 4448bbfb24fSSascha Wildner.Sh SEE ALSO 4458bbfb24fSSascha Wildner.Xr altq 4 , 4468bbfb24fSSascha Wildner.Xr arp 4 , 4478bbfb24fSSascha Wildner.Xr ifmedia 4 , 4488bbfb24fSSascha Wildner.Xr netintro 4 , 4498bbfb24fSSascha Wildner.Xr ng_ether 4 , 4508bbfb24fSSascha Wildner.Xr polling 4 , 4518bbfb24fSSascha Wildner.Xr vlan 4 , 4528bbfb24fSSascha Wildner.Xr ifconfig 8 4538bbfb24fSSascha Wildner.Sh HISTORY 4548bbfb24fSSascha WildnerThe 4558bbfb24fSSascha Wildner.Nm 4568bbfb24fSSascha Wildnerdevice driver first appeared in 4578bbfb24fSSascha Wildner.Fx 7.1 . 4588bbfb24fSSascha Wildner.Sh AUTHORS 4598bbfb24fSSascha WildnerThe 4608bbfb24fSSascha Wildner.Nm 4618bbfb24fSSascha Wildnerdriver was written by 462b2a6f486SFranco Fichtner.An Intel Corporation Aq Mt freebsdnic@mailbox.intel.com . 463