xref: /dflybsd-src/share/man/man4/ecc.4 (revision fb3c2c0caaaa0e5d800e088b7dd7983e9ab009ec)

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.Dd May 24, 2015
.Dt ECC 4
.Os
.Sh NAME
.Nm ecc
.Nd ECC memory controller support
.Sh SYNOPSIS
To compile this driver into the kernel,
place the following lines in your
kernel configuration file:
.Bd -ragged -offset indent
.Cd "device dimm"
.Cd "device coremctl"
.Cd "device ecc"
.Ed
.Pp
Alternatively, to load the driver as a
module at boot time, place the following line in
.Xr loader.conf 5 :
.Bd -literal -offset indent
ecc_load="YES"
.Ed
.Sh DESCRIPTION
The
.Nm
provides support for ECC memory controllers.
If ECC support is enabled in the BIOS,
the number of ECC errors is exposed through
.Dv HW_SENSORS
.Xr sysctl 8
tree.
For example:
.Bd -literal -offset indent
% sysctl hw.sensors
hw.sensors.dimm0.ecc0: 0 (node0 chan0 DIMM0 ecc), OK
hw.sensors.dimm1.ecc0: 0 (node0 chan1 DIMM0 ecc), OK
.Ed
.Pp
The DIMM location and configurable threshold of ECC errors
is exposed through hw.dimminfo
.Xr sysctl 3
tree.
For example:
.Bd -literal -offset indent
% sysctl hw.dimminfo
hw.dimminfo.dimm0.node: 0
hw.dimminfo.dimm0.chan: 0
hw.dimminfo.dimm0.slot: 0
hw.dimminfo.dimm0.ecc_thresh: 10
hw.dimminfo.dimm1.node: 0
hw.dimminfo.dimm1.chan: 1
hw.dimminfo.dimm1.slot: 0
hw.dimminfo.dimm1.ecc_thresh: 10
.Ed
.Pp
If the number of ECC errors goes above the configured threshold
(ecc_thresh),
a notify event will be sent using
.Xr devctl 4 .
.Sh HARDWARE
The
.Nm
driver supports the following memory controllers:
.Pp
.Bl -bullet -compact
.It
AMD 8000 memory controller
.It
AMD 8151 memory controller
.It
Intel E3 memory controller
.It
Intel E3 v2 memory controller
.It
Intel E3 v3 memory controller
.\".It
.\"Intel X3400 memory controller
.It
Intel E5 v2 memory controller
.It
Intel E5 v3 memory controller
.El
.Sh SEE ALSO
.Xr systat 1 ,
.Xr sysctl 3 ,
.Xr devctl 4 ,
.Xr devd 8 ,
.Xr sensorsd 8 ,
.Xr sysctl 8
.Sh HISTORY
The
.Nm
device driver first appeared in
.Dx 1.7 .
.Sh AUTHORS
The
.Nm
driver was written by
.An Matthew Dillon .