1*fae548d3Szrj /* M32C ELF support for BFD. 2*fae548d3Szrj Copyright (C) 2004-2020 Free Software Foundation, Inc. 3*fae548d3Szrj 4*fae548d3Szrj This file is part of BFD, the Binary File Descriptor library. 5*fae548d3Szrj 6*fae548d3Szrj This program is free software; you can redistribute it and/or modify 7*fae548d3Szrj it under the terms of the GNU General Public License as published by 8*fae548d3Szrj the Free Software Foundation; either version 3 of the License, or 9*fae548d3Szrj (at your option) any later version. 10*fae548d3Szrj 11*fae548d3Szrj This program is distributed in the hope that it will be useful, 12*fae548d3Szrj but WITHOUT ANY WARRANTY; without even the implied warranty of 13*fae548d3Szrj MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*fae548d3Szrj GNU General Public License for more details. 15*fae548d3Szrj 16*fae548d3Szrj You should have received a copy of the GNU General Public License 17*fae548d3Szrj along with this program; if not, write to the Free Software Foundation, 18*fae548d3Szrj Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 19*fae548d3Szrj 20*fae548d3Szrj #ifndef _ELF_M32C_H 21*fae548d3Szrj #define _ELF_M32C_H 22*fae548d3Szrj 23*fae548d3Szrj #include "elf/reloc-macros.h" 24*fae548d3Szrj 25*fae548d3Szrj /* Relocations. */ 26*fae548d3Szrj START_RELOC_NUMBERS (elf_m32c_reloc_type) 27*fae548d3Szrj RELOC_NUMBER (R_M32C_NONE, 0) 28*fae548d3Szrj RELOC_NUMBER (R_M32C_16, 1) 29*fae548d3Szrj RELOC_NUMBER (R_M32C_24, 2) 30*fae548d3Szrj RELOC_NUMBER (R_M32C_32, 3) 31*fae548d3Szrj RELOC_NUMBER (R_M32C_8_PCREL, 4) 32*fae548d3Szrj RELOC_NUMBER (R_M32C_16_PCREL, 5) 33*fae548d3Szrj 34*fae548d3Szrj /* 8 bit unsigned address, used for dsp8[a0] etc */ 35*fae548d3Szrj RELOC_NUMBER (R_M32C_8, 6) 36*fae548d3Szrj /* Bits 0..15 of an address, for SMOVF's A0, A1A0, etc. */ 37*fae548d3Szrj RELOC_NUMBER (R_M32C_LO16, 7) 38*fae548d3Szrj /* Bits 16..23 of an address, for SMOVF's R1H etc. */ 39*fae548d3Szrj RELOC_NUMBER (R_M32C_HI8, 8) 40*fae548d3Szrj /* Bits 16..31 of an address, for LDE's A1A0 etc. */ 41*fae548d3Szrj RELOC_NUMBER (R_M32C_HI16, 9) 42*fae548d3Szrj 43*fae548d3Szrj /* These are relocs we need when relaxing. */ 44*fae548d3Szrj /* Marks various jump opcodes. */ 45*fae548d3Szrj RELOC_NUMBER (R_M32C_RL_JUMP, 10) 46*fae548d3Szrj /* Marks standard one-address form. */ 47*fae548d3Szrj RELOC_NUMBER (R_M32C_RL_1ADDR, 11) 48*fae548d3Szrj /* Marks standard two-address form. */ 49*fae548d3Szrj RELOC_NUMBER (R_M32C_RL_2ADDR, 12) 50*fae548d3Szrj 51*fae548d3Szrj END_RELOC_NUMBERS (R_M32C_max) 52*fae548d3Szrj 53*fae548d3Szrj #define EF_M32C_CPU_M16C 0x00000075 /* default */ 54*fae548d3Szrj #define EF_M32C_CPU_M32C 0x00000078 /* m32c */ 55*fae548d3Szrj #define EF_M32C_CPU_MASK 0x0000007F /* specific cpu bits */ 56*fae548d3Szrj #define EF_M32C_ALL_FLAGS (EF_M32C_CPU_MASK) 57*fae548d3Szrj 58*fae548d3Szrj /* Define the data & instruction memory discriminator. In a linked 59*fae548d3Szrj executable, an symbol should be deemed to point to an instruction 60*fae548d3Szrj if ((address & M16C_INSN_MASK) == M16C_INSN_VALUE), and similarly 61*fae548d3Szrj for the data space. See also `ld/emulparams/elf32m32c.sh'. */ 62*fae548d3Szrj #define M32C_DATA_MASK 0xffc00000 63*fae548d3Szrj #define M32C_DATA_VALUE 0x00000000 64*fae548d3Szrj #define M32C_INSN_MASK 0xffc00000 65*fae548d3Szrj #define M32C_INSN_VALUE 0x00400000 66*fae548d3Szrj 67*fae548d3Szrj #endif /* _ELF_M32C_H */ 68