xref: /dflybsd-src/contrib/binutils-2.27/include/dis-asm.h (revision e656dc90e3d65d744d534af2f5ea88cf8101ebcf)
1*a9fa9459Szrj /* Interface between the opcode library and its callers.
2*a9fa9459Szrj 
3*a9fa9459Szrj    Copyright (C) 1999-2016 Free Software Foundation, Inc.
4*a9fa9459Szrj 
5*a9fa9459Szrj    This program is free software; you can redistribute it and/or modify
6*a9fa9459Szrj    it under the terms of the GNU General Public License as published by
7*a9fa9459Szrj    the Free Software Foundation; either version 3, or (at your option)
8*a9fa9459Szrj    any later version.
9*a9fa9459Szrj 
10*a9fa9459Szrj    This program is distributed in the hope that it will be useful,
11*a9fa9459Szrj    but WITHOUT ANY WARRANTY; without even the implied warranty of
12*a9fa9459Szrj    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13*a9fa9459Szrj    GNU General Public License for more details.
14*a9fa9459Szrj 
15*a9fa9459Szrj    You should have received a copy of the GNU General Public License
16*a9fa9459Szrj    along with this program; if not, write to the Free Software
17*a9fa9459Szrj    Foundation, Inc., 51 Franklin Street - Fifth Floor,
18*a9fa9459Szrj    Boston, MA 02110-1301, USA.
19*a9fa9459Szrj 
20*a9fa9459Szrj    Written by Cygnus Support, 1993.
21*a9fa9459Szrj 
22*a9fa9459Szrj    The opcode library (libopcodes.a) provides instruction decoders for
23*a9fa9459Szrj    a large variety of instruction sets, callable with an identical
24*a9fa9459Szrj    interface, for making instruction-processing programs more independent
25*a9fa9459Szrj    of the instruction set being processed.  */
26*a9fa9459Szrj 
27*a9fa9459Szrj #ifndef DIS_ASM_H
28*a9fa9459Szrj #define DIS_ASM_H
29*a9fa9459Szrj 
30*a9fa9459Szrj #ifdef __cplusplus
31*a9fa9459Szrj extern "C" {
32*a9fa9459Szrj #endif
33*a9fa9459Szrj 
34*a9fa9459Szrj #include <stdio.h>
35*a9fa9459Szrj #include "bfd.h"
36*a9fa9459Szrj 
37*a9fa9459Szrj   typedef int (*fprintf_ftype) (void *, const char*, ...) ATTRIBUTE_FPTR_PRINTF_2;
38*a9fa9459Szrj 
39*a9fa9459Szrj enum dis_insn_type
40*a9fa9459Szrj {
41*a9fa9459Szrj   dis_noninsn,			/* Not a valid instruction.  */
42*a9fa9459Szrj   dis_nonbranch,		/* Not a branch instruction.  */
43*a9fa9459Szrj   dis_branch,			/* Unconditional branch.  */
44*a9fa9459Szrj   dis_condbranch,		/* Conditional branch.  */
45*a9fa9459Szrj   dis_jsr,			/* Jump to subroutine.  */
46*a9fa9459Szrj   dis_condjsr,			/* Conditional jump to subroutine.  */
47*a9fa9459Szrj   dis_dref,			/* Data reference instruction.  */
48*a9fa9459Szrj   dis_dref2			/* Two data references in instruction.  */
49*a9fa9459Szrj };
50*a9fa9459Szrj 
51*a9fa9459Szrj /* This struct is passed into the instruction decoding routine,
52*a9fa9459Szrj    and is passed back out into each callback.  The various fields are used
53*a9fa9459Szrj    for conveying information from your main routine into your callbacks,
54*a9fa9459Szrj    for passing information into the instruction decoders (such as the
55*a9fa9459Szrj    addresses of the callback functions), or for passing information
56*a9fa9459Szrj    back from the instruction decoders to their callers.
57*a9fa9459Szrj 
58*a9fa9459Szrj    It must be initialized before it is first passed; this can be done
59*a9fa9459Szrj    by hand, or using one of the initialization macros below.  */
60*a9fa9459Szrj 
61*a9fa9459Szrj typedef struct disassemble_info
62*a9fa9459Szrj {
63*a9fa9459Szrj   fprintf_ftype fprintf_func;
64*a9fa9459Szrj   void *stream;
65*a9fa9459Szrj   void *application_data;
66*a9fa9459Szrj 
67*a9fa9459Szrj   /* Target description.  We could replace this with a pointer to the bfd,
68*a9fa9459Szrj      but that would require one.  There currently isn't any such requirement
69*a9fa9459Szrj      so to avoid introducing one we record these explicitly.  */
70*a9fa9459Szrj   /* The bfd_flavour.  This can be bfd_target_unknown_flavour.  */
71*a9fa9459Szrj   enum bfd_flavour flavour;
72*a9fa9459Szrj   /* The bfd_arch value.  */
73*a9fa9459Szrj   enum bfd_architecture arch;
74*a9fa9459Szrj   /* The bfd_mach value.  */
75*a9fa9459Szrj   unsigned long mach;
76*a9fa9459Szrj   /* Endianness (for bi-endian cpus).  Mono-endian cpus can ignore this.  */
77*a9fa9459Szrj   enum bfd_endian endian;
78*a9fa9459Szrj   /* Endianness of code, for mixed-endian situations such as ARM BE8.  */
79*a9fa9459Szrj   enum bfd_endian endian_code;
80*a9fa9459Szrj   /* An arch/mach-specific bitmask of selected instruction subsets, mainly
81*a9fa9459Szrj      for processors with run-time-switchable instruction sets.  The default,
82*a9fa9459Szrj      zero, means that there is no constraint.  CGEN-based opcodes ports
83*a9fa9459Szrj      may use ISA_foo masks.  */
84*a9fa9459Szrj   void *insn_sets;
85*a9fa9459Szrj 
86*a9fa9459Szrj   /* Some targets need information about the current section to accurately
87*a9fa9459Szrj      display insns.  If this is NULL, the target disassembler function
88*a9fa9459Szrj      will have to make its best guess.  */
89*a9fa9459Szrj   asection *section;
90*a9fa9459Szrj 
91*a9fa9459Szrj   /* An array of pointers to symbols either at the location being disassembled
92*a9fa9459Szrj      or at the start of the function being disassembled.  The array is sorted
93*a9fa9459Szrj      so that the first symbol is intended to be the one used.  The others are
94*a9fa9459Szrj      present for any misc. purposes.  This is not set reliably, but if it is
95*a9fa9459Szrj      not NULL, it is correct.  */
96*a9fa9459Szrj   asymbol **symbols;
97*a9fa9459Szrj   /* Number of symbols in array.  */
98*a9fa9459Szrj   int num_symbols;
99*a9fa9459Szrj 
100*a9fa9459Szrj   /* Symbol table provided for targets that want to look at it.  This is
101*a9fa9459Szrj      used on Arm to find mapping symbols and determine Arm/Thumb code.  */
102*a9fa9459Szrj   asymbol **symtab;
103*a9fa9459Szrj   int symtab_pos;
104*a9fa9459Szrj   int symtab_size;
105*a9fa9459Szrj 
106*a9fa9459Szrj   /* For use by the disassembler.
107*a9fa9459Szrj      The top 16 bits are reserved for public use (and are documented here).
108*a9fa9459Szrj      The bottom 16 bits are for the internal use of the disassembler.  */
109*a9fa9459Szrj   unsigned long flags;
110*a9fa9459Szrj   /* Set if the disassembler has determined that there are one or more
111*a9fa9459Szrj      relocations associated with the instruction being disassembled.  */
112*a9fa9459Szrj #define INSN_HAS_RELOC	 (1 << 31)
113*a9fa9459Szrj   /* Set if the user has requested the disassembly of data as well as code.  */
114*a9fa9459Szrj #define DISASSEMBLE_DATA (1 << 30)
115*a9fa9459Szrj   /* Set if the user has specifically set the machine type encoded in the
116*a9fa9459Szrj      mach field of this structure.  */
117*a9fa9459Szrj #define USER_SPECIFIED_MACHINE_TYPE (1 << 29)
118*a9fa9459Szrj 
119*a9fa9459Szrj   /* Use internally by the target specific disassembly code.  */
120*a9fa9459Szrj   void *private_data;
121*a9fa9459Szrj 
122*a9fa9459Szrj   /* Function used to get bytes to disassemble.  MEMADDR is the
123*a9fa9459Szrj      address of the stuff to be disassembled, MYADDR is the address to
124*a9fa9459Szrj      put the bytes in, and LENGTH is the number of bytes to read.
125*a9fa9459Szrj      INFO is a pointer to this struct.
126*a9fa9459Szrj      Returns an errno value or 0 for success.  */
127*a9fa9459Szrj   int (*read_memory_func)
128*a9fa9459Szrj     (bfd_vma memaddr, bfd_byte *myaddr, unsigned int length,
129*a9fa9459Szrj      struct disassemble_info *dinfo);
130*a9fa9459Szrj 
131*a9fa9459Szrj   /* Function which should be called if we get an error that we can't
132*a9fa9459Szrj      recover from.  STATUS is the errno value from read_memory_func and
133*a9fa9459Szrj      MEMADDR is the address that we were trying to read.  INFO is a
134*a9fa9459Szrj      pointer to this struct.  */
135*a9fa9459Szrj   void (*memory_error_func)
136*a9fa9459Szrj     (int status, bfd_vma memaddr, struct disassemble_info *dinfo);
137*a9fa9459Szrj 
138*a9fa9459Szrj   /* Function called to print ADDR.  */
139*a9fa9459Szrj   void (*print_address_func)
140*a9fa9459Szrj     (bfd_vma addr, struct disassemble_info *dinfo);
141*a9fa9459Szrj 
142*a9fa9459Szrj   /* Function called to determine if there is a symbol at the given ADDR.
143*a9fa9459Szrj      If there is, the function returns 1, otherwise it returns 0.
144*a9fa9459Szrj      This is used by ports which support an overlay manager where
145*a9fa9459Szrj      the overlay number is held in the top part of an address.  In
146*a9fa9459Szrj      some circumstances we want to include the overlay number in the
147*a9fa9459Szrj      address, (normally because there is a symbol associated with
148*a9fa9459Szrj      that address), but sometimes we want to mask out the overlay bits.  */
149*a9fa9459Szrj   int (* symbol_at_address_func)
150*a9fa9459Szrj     (bfd_vma addr, struct disassemble_info *dinfo);
151*a9fa9459Szrj 
152*a9fa9459Szrj   /* Function called to check if a SYMBOL is can be displayed to the user.
153*a9fa9459Szrj      This is used by some ports that want to hide special symbols when
154*a9fa9459Szrj      displaying debugging outout.  */
155*a9fa9459Szrj   bfd_boolean (* symbol_is_valid)
156*a9fa9459Szrj     (asymbol *, struct disassemble_info *dinfo);
157*a9fa9459Szrj 
158*a9fa9459Szrj   /* These are for buffer_read_memory.  */
159*a9fa9459Szrj   bfd_byte *buffer;
160*a9fa9459Szrj   bfd_vma buffer_vma;
161*a9fa9459Szrj   unsigned int buffer_length;
162*a9fa9459Szrj 
163*a9fa9459Szrj   /* This variable may be set by the instruction decoder.  It suggests
164*a9fa9459Szrj       the number of bytes objdump should display on a single line.  If
165*a9fa9459Szrj       the instruction decoder sets this, it should always set it to
166*a9fa9459Szrj       the same value in order to get reasonable looking output.  */
167*a9fa9459Szrj   int bytes_per_line;
168*a9fa9459Szrj 
169*a9fa9459Szrj   /* The next two variables control the way objdump displays the raw data.  */
170*a9fa9459Szrj   /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
171*a9fa9459Szrj   /* output will look like this:
172*a9fa9459Szrj      00:   00000000 00000000
173*a9fa9459Szrj      with the chunks displayed according to "display_endian". */
174*a9fa9459Szrj   int bytes_per_chunk;
175*a9fa9459Szrj   enum bfd_endian display_endian;
176*a9fa9459Szrj 
177*a9fa9459Szrj   /* Number of octets per incremented target address
178*a9fa9459Szrj      Normally one, but some DSPs have byte sizes of 16 or 32 bits.  */
179*a9fa9459Szrj   unsigned int octets_per_byte;
180*a9fa9459Szrj 
181*a9fa9459Szrj   /* The number of zeroes we want to see at the end of a section before we
182*a9fa9459Szrj      start skipping them.  */
183*a9fa9459Szrj   unsigned int skip_zeroes;
184*a9fa9459Szrj 
185*a9fa9459Szrj   /* The number of zeroes to skip at the end of a section.  If the number
186*a9fa9459Szrj      of zeroes at the end is between SKIP_ZEROES_AT_END and SKIP_ZEROES,
187*a9fa9459Szrj      they will be disassembled.  If there are fewer than
188*a9fa9459Szrj      SKIP_ZEROES_AT_END, they will be skipped.  This is a heuristic
189*a9fa9459Szrj      attempt to avoid disassembling zeroes inserted by section
190*a9fa9459Szrj      alignment.  */
191*a9fa9459Szrj   unsigned int skip_zeroes_at_end;
192*a9fa9459Szrj 
193*a9fa9459Szrj   /* Whether the disassembler always needs the relocations.  */
194*a9fa9459Szrj   bfd_boolean disassembler_needs_relocs;
195*a9fa9459Szrj 
196*a9fa9459Szrj   /* Results from instruction decoders.  Not all decoders yet support
197*a9fa9459Szrj      this information.  This info is set each time an instruction is
198*a9fa9459Szrj      decoded, and is only valid for the last such instruction.
199*a9fa9459Szrj 
200*a9fa9459Szrj      To determine whether this decoder supports this information, set
201*a9fa9459Szrj      insn_info_valid to 0, decode an instruction, then check it.  */
202*a9fa9459Szrj 
203*a9fa9459Szrj   char insn_info_valid;		/* Branch info has been set. */
204*a9fa9459Szrj   char branch_delay_insns;	/* How many sequential insn's will run before
205*a9fa9459Szrj 				   a branch takes effect.  (0 = normal) */
206*a9fa9459Szrj   char data_size;		/* Size of data reference in insn, in bytes */
207*a9fa9459Szrj   enum dis_insn_type insn_type;	/* Type of instruction */
208*a9fa9459Szrj   bfd_vma target;		/* Target address of branch or dref, if known;
209*a9fa9459Szrj 				   zero if unknown.  */
210*a9fa9459Szrj   bfd_vma target2;		/* Second target address for dref2 */
211*a9fa9459Szrj 
212*a9fa9459Szrj   /* Command line options specific to the target disassembler.  */
213*a9fa9459Szrj   char * disassembler_options;
214*a9fa9459Szrj 
215*a9fa9459Szrj   /* If non-zero then try not disassemble beyond this address, even if
216*a9fa9459Szrj      there are values left in the buffer.  This address is the address
217*a9fa9459Szrj      of the nearest symbol forwards from the start of the disassembly,
218*a9fa9459Szrj      and it is assumed that it lies on the boundary between instructions.
219*a9fa9459Szrj      If an instruction spans this address then this is an error in the
220*a9fa9459Szrj      file being disassembled.  */
221*a9fa9459Szrj   bfd_vma stop_vma;
222*a9fa9459Szrj 
223*a9fa9459Szrj } disassemble_info;
224*a9fa9459Szrj 
225*a9fa9459Szrj 
226*a9fa9459Szrj /* Standard disassemblers.  Disassemble one instruction at the given
227*a9fa9459Szrj    target address.  Return number of octets processed.  */
228*a9fa9459Szrj typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
229*a9fa9459Szrj 
230*a9fa9459Szrj extern int print_insn_aarch64		(bfd_vma, disassemble_info *);
231*a9fa9459Szrj extern int print_insn_alpha		(bfd_vma, disassemble_info *);
232*a9fa9459Szrj extern int print_insn_avr		(bfd_vma, disassemble_info *);
233*a9fa9459Szrj extern int print_insn_bfin		(bfd_vma, disassemble_info *);
234*a9fa9459Szrj extern int print_insn_big_arm		(bfd_vma, disassemble_info *);
235*a9fa9459Szrj extern int print_insn_big_mips		(bfd_vma, disassemble_info *);
236*a9fa9459Szrj extern int print_insn_big_nios2		(bfd_vma, disassemble_info *);
237*a9fa9459Szrj extern int print_insn_big_powerpc	(bfd_vma, disassemble_info *);
238*a9fa9459Szrj extern int print_insn_big_score         (bfd_vma, disassemble_info *);
239*a9fa9459Szrj extern int print_insn_cr16              (bfd_vma, disassemble_info *);
240*a9fa9459Szrj extern int print_insn_crx               (bfd_vma, disassemble_info *);
241*a9fa9459Szrj extern int print_insn_d10v		(bfd_vma, disassemble_info *);
242*a9fa9459Szrj extern int print_insn_d30v		(bfd_vma, disassemble_info *);
243*a9fa9459Szrj extern int print_insn_dlx 		(bfd_vma, disassemble_info *);
244*a9fa9459Szrj extern int print_insn_epiphany		(bfd_vma, disassemble_info *);
245*a9fa9459Szrj extern int print_insn_fr30		(bfd_vma, disassemble_info *);
246*a9fa9459Szrj extern int print_insn_frv		(bfd_vma, disassemble_info *);
247*a9fa9459Szrj extern int print_insn_ft32  		(bfd_vma, disassemble_info *);
248*a9fa9459Szrj extern int print_insn_h8300		(bfd_vma, disassemble_info *);
249*a9fa9459Szrj extern int print_insn_h8300h		(bfd_vma, disassemble_info *);
250*a9fa9459Szrj extern int print_insn_h8300s		(bfd_vma, disassemble_info *);
251*a9fa9459Szrj extern int print_insn_h8500		(bfd_vma, disassemble_info *);
252*a9fa9459Szrj extern int print_insn_hppa		(bfd_vma, disassemble_info *);
253*a9fa9459Szrj extern int print_insn_i370		(bfd_vma, disassemble_info *);
254*a9fa9459Szrj extern int print_insn_i386		(bfd_vma, disassemble_info *);
255*a9fa9459Szrj extern int print_insn_i386_att		(bfd_vma, disassemble_info *);
256*a9fa9459Szrj extern int print_insn_i386_intel	(bfd_vma, disassemble_info *);
257*a9fa9459Szrj extern int print_insn_i860		(bfd_vma, disassemble_info *);
258*a9fa9459Szrj extern int print_insn_i960		(bfd_vma, disassemble_info *);
259*a9fa9459Szrj extern int print_insn_ia64		(bfd_vma, disassemble_info *);
260*a9fa9459Szrj extern int print_insn_ip2k		(bfd_vma, disassemble_info *);
261*a9fa9459Szrj extern int print_insn_iq2000		(bfd_vma, disassemble_info *);
262*a9fa9459Szrj extern int print_insn_little_arm	(bfd_vma, disassemble_info *);
263*a9fa9459Szrj extern int print_insn_little_mips	(bfd_vma, disassemble_info *);
264*a9fa9459Szrj extern int print_insn_little_nios2	(bfd_vma, disassemble_info *);
265*a9fa9459Szrj extern int print_insn_little_powerpc	(bfd_vma, disassemble_info *);
266*a9fa9459Szrj extern int print_insn_little_score      (bfd_vma, disassemble_info *);
267*a9fa9459Szrj extern int print_insn_lm32		(bfd_vma, disassemble_info *);
268*a9fa9459Szrj extern int print_insn_m32c	        (bfd_vma, disassemble_info *);
269*a9fa9459Szrj extern int print_insn_m32r		(bfd_vma, disassemble_info *);
270*a9fa9459Szrj extern int print_insn_m68hc11		(bfd_vma, disassemble_info *);
271*a9fa9459Szrj extern int print_insn_m68hc12		(bfd_vma, disassemble_info *);
272*a9fa9459Szrj extern int print_insn_m9s12x		(bfd_vma, disassemble_info *);
273*a9fa9459Szrj extern int print_insn_m9s12xg		(bfd_vma, disassemble_info *);
274*a9fa9459Szrj extern int print_insn_m68k		(bfd_vma, disassemble_info *);
275*a9fa9459Szrj extern int print_insn_m88k		(bfd_vma, disassemble_info *);
276*a9fa9459Szrj extern int print_insn_mcore		(bfd_vma, disassemble_info *);
277*a9fa9459Szrj extern int print_insn_mep		(bfd_vma, disassemble_info *);
278*a9fa9459Szrj extern int print_insn_metag		(bfd_vma, disassemble_info *);
279*a9fa9459Szrj extern int print_insn_microblaze	(bfd_vma, disassemble_info *);
280*a9fa9459Szrj extern int print_insn_mmix		(bfd_vma, disassemble_info *);
281*a9fa9459Szrj extern int print_insn_mn10200		(bfd_vma, disassemble_info *);
282*a9fa9459Szrj extern int print_insn_mn10300		(bfd_vma, disassemble_info *);
283*a9fa9459Szrj extern int print_insn_moxie		(bfd_vma, disassemble_info *);
284*a9fa9459Szrj extern int print_insn_msp430		(bfd_vma, disassemble_info *);
285*a9fa9459Szrj extern int print_insn_mt                (bfd_vma, disassemble_info *);
286*a9fa9459Szrj extern int print_insn_nds32		(bfd_vma, disassemble_info *);
287*a9fa9459Szrj extern int print_insn_ns32k		(bfd_vma, disassemble_info *);
288*a9fa9459Szrj extern int print_insn_or1k		(bfd_vma, disassemble_info *);
289*a9fa9459Szrj extern int print_insn_pdp11		(bfd_vma, disassemble_info *);
290*a9fa9459Szrj extern int print_insn_pj		(bfd_vma, disassemble_info *);
291*a9fa9459Szrj extern int print_insn_rs6000		(bfd_vma, disassemble_info *);
292*a9fa9459Szrj extern int print_insn_s390		(bfd_vma, disassemble_info *);
293*a9fa9459Szrj extern int print_insn_sh		(bfd_vma, disassemble_info *);
294*a9fa9459Szrj extern int print_insn_sh64		(bfd_vma, disassemble_info *);
295*a9fa9459Szrj extern int print_insn_sh64x_media	(bfd_vma, disassemble_info *);
296*a9fa9459Szrj extern int print_insn_sparc		(bfd_vma, disassemble_info *);
297*a9fa9459Szrj extern int print_insn_spu		(bfd_vma, disassemble_info *);
298*a9fa9459Szrj extern int print_insn_tic30		(bfd_vma, disassemble_info *);
299*a9fa9459Szrj extern int print_insn_tic4x		(bfd_vma, disassemble_info *);
300*a9fa9459Szrj extern int print_insn_tic54x		(bfd_vma, disassemble_info *);
301*a9fa9459Szrj extern int print_insn_tic6x		(bfd_vma, disassemble_info *);
302*a9fa9459Szrj extern int print_insn_tic80		(bfd_vma, disassemble_info *);
303*a9fa9459Szrj extern int print_insn_tilegx		(bfd_vma, disassemble_info *);
304*a9fa9459Szrj extern int print_insn_tilepro		(bfd_vma, disassemble_info *);
305*a9fa9459Szrj extern int print_insn_v850		(bfd_vma, disassemble_info *);
306*a9fa9459Szrj extern int print_insn_vax		(bfd_vma, disassemble_info *);
307*a9fa9459Szrj extern int print_insn_visium		(bfd_vma, disassemble_info *);
308*a9fa9459Szrj extern int print_insn_w65		(bfd_vma, disassemble_info *);
309*a9fa9459Szrj extern int print_insn_xc16x		(bfd_vma, disassemble_info *);
310*a9fa9459Szrj extern int print_insn_xgate             (bfd_vma, disassemble_info *);
311*a9fa9459Szrj extern int print_insn_xstormy16		(bfd_vma, disassemble_info *);
312*a9fa9459Szrj extern int print_insn_xtensa		(bfd_vma, disassemble_info *);
313*a9fa9459Szrj extern int print_insn_z80		(bfd_vma, disassemble_info *);
314*a9fa9459Szrj extern int print_insn_z8001		(bfd_vma, disassemble_info *);
315*a9fa9459Szrj extern int print_insn_z8002		(bfd_vma, disassemble_info *);
316*a9fa9459Szrj extern int print_insn_rx		(bfd_vma, disassemble_info *);
317*a9fa9459Szrj extern int print_insn_rl78		(bfd_vma, disassemble_info *);
318*a9fa9459Szrj extern int print_insn_rl78_g10		(bfd_vma, disassemble_info *);
319*a9fa9459Szrj extern int print_insn_rl78_g13		(bfd_vma, disassemble_info *);
320*a9fa9459Szrj extern int print_insn_rl78_g14		(bfd_vma, disassemble_info *);
321*a9fa9459Szrj 
322*a9fa9459Szrj extern disassembler_ftype arc_get_disassembler (bfd *);
323*a9fa9459Szrj extern disassembler_ftype cris_get_disassembler (bfd *);
324*a9fa9459Szrj extern disassembler_ftype rl78_get_disassembler (bfd *);
325*a9fa9459Szrj 
326*a9fa9459Szrj extern void print_aarch64_disassembler_options (FILE *);
327*a9fa9459Szrj extern void print_i386_disassembler_options (FILE *);
328*a9fa9459Szrj extern void print_mips_disassembler_options (FILE *);
329*a9fa9459Szrj extern void print_ppc_disassembler_options (FILE *);
330*a9fa9459Szrj extern void print_arm_disassembler_options (FILE *);
331*a9fa9459Szrj extern void parse_arm_disassembler_option (char *);
332*a9fa9459Szrj extern void print_s390_disassembler_options (FILE *);
333*a9fa9459Szrj extern int  get_arm_regname_num_options (void);
334*a9fa9459Szrj extern int  set_arm_regname_option (int);
335*a9fa9459Szrj extern int  get_arm_regnames (int, const char **, const char **, const char *const **);
336*a9fa9459Szrj extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *);
337*a9fa9459Szrj extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *);
338*a9fa9459Szrj extern void disassemble_init_powerpc (struct disassemble_info *);
339*a9fa9459Szrj 
340*a9fa9459Szrj /* Fetch the disassembler for a given BFD, if that support is available.  */
341*a9fa9459Szrj extern disassembler_ftype disassembler (bfd *);
342*a9fa9459Szrj 
343*a9fa9459Szrj /* Amend the disassemble_info structure as necessary for the target architecture.
344*a9fa9459Szrj    Should only be called after initialising the info->arch field.  */
345*a9fa9459Szrj extern void disassemble_init_for_target (struct disassemble_info * dinfo);
346*a9fa9459Szrj 
347*a9fa9459Szrj /* Document any target specific options available from the disassembler.  */
348*a9fa9459Szrj extern void disassembler_usage (FILE *);
349*a9fa9459Szrj 
350*a9fa9459Szrj 
351*a9fa9459Szrj /* This block of definitions is for particular callers who read instructions
352*a9fa9459Szrj    into a buffer before calling the instruction decoder.  */
353*a9fa9459Szrj 
354*a9fa9459Szrj /* Here is a function which callers may wish to use for read_memory_func.
355*a9fa9459Szrj    It gets bytes from a buffer.  */
356*a9fa9459Szrj extern int buffer_read_memory
357*a9fa9459Szrj   (bfd_vma, bfd_byte *, unsigned int, struct disassemble_info *);
358*a9fa9459Szrj 
359*a9fa9459Szrj /* This function goes with buffer_read_memory.
360*a9fa9459Szrj    It prints a message using info->fprintf_func and info->stream.  */
361*a9fa9459Szrj extern void perror_memory (int, bfd_vma, struct disassemble_info *);
362*a9fa9459Szrj 
363*a9fa9459Szrj 
364*a9fa9459Szrj /* Just print the address in hex.  This is included for completeness even
365*a9fa9459Szrj    though both GDB and objdump provide their own (to print symbolic
366*a9fa9459Szrj    addresses).  */
367*a9fa9459Szrj extern void generic_print_address
368*a9fa9459Szrj   (bfd_vma, struct disassemble_info *);
369*a9fa9459Szrj 
370*a9fa9459Szrj /* Always true.  */
371*a9fa9459Szrj extern int generic_symbol_at_address
372*a9fa9459Szrj   (bfd_vma, struct disassemble_info *);
373*a9fa9459Szrj 
374*a9fa9459Szrj /* Also always true.  */
375*a9fa9459Szrj extern bfd_boolean generic_symbol_is_valid
376*a9fa9459Szrj   (asymbol *, struct disassemble_info *);
377*a9fa9459Szrj 
378*a9fa9459Szrj /* Method to initialize a disassemble_info struct.  This should be
379*a9fa9459Szrj    called by all applications creating such a struct.  */
380*a9fa9459Szrj extern void init_disassemble_info (struct disassemble_info *dinfo, void *stream,
381*a9fa9459Szrj 				   fprintf_ftype fprintf_func);
382*a9fa9459Szrj 
383*a9fa9459Szrj /* For compatibility with existing code.  */
384*a9fa9459Szrj #define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
385*a9fa9459Szrj   init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
386*a9fa9459Szrj #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
387*a9fa9459Szrj   init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
388*a9fa9459Szrj 
389*a9fa9459Szrj 
390*a9fa9459Szrj #ifdef __cplusplus
391*a9fa9459Szrj }
392*a9fa9459Szrj #endif
393*a9fa9459Szrj 
394*a9fa9459Szrj #endif /* ! defined (DIS_ASM_H) */
395