1*6181Sroot /* mba.c 4.24 82/03/14 */ 228Sbill 32704Swnj #include "mba.h" 42704Swnj #if NMBA > 0 52383Swnj /* 63095Swnj * Massbus driver, arbitrates a massbus among attached devices. 72383Swnj */ 828Sbill #include "../h/param.h" 92383Swnj #include "../h/systm.h" 102383Swnj #include "../h/dk.h" 1128Sbill #include "../h/buf.h" 1228Sbill #include "../h/conf.h" 1328Sbill #include "../h/dir.h" 1428Sbill #include "../h/user.h" 1528Sbill #include "../h/proc.h" 162383Swnj #include "../h/map.h" 1728Sbill #include "../h/pte.h" 182981Swnj #include "../h/mbareg.h" 192981Swnj #include "../h/mbavar.h" 2028Sbill #include "../h/mtpr.h" 2128Sbill #include "../h/vm.h" 2228Sbill 233095Swnj char mbsr_bits[] = MBSR_BITS; 2428Sbill /* 252383Swnj * Start activity on a massbus device. 262981Swnj * We are given the device's mba_device structure and activate 272383Swnj * the device via the unit start routine. The unit start 282383Swnj * routine may indicate that it is finished (e.g. if the operation 292383Swnj * was a ``sense'' on a tape drive), that the (multi-ported) unit 302383Swnj * is busy (we will get an interrupt later), that it started the 312383Swnj * unit (e.g. for a non-data transfer operation), or that it has 322383Swnj * set up a data transfer operation and we should start the massbus adaptor. 3328Sbill */ 342383Swnj mbustart(mi) 352981Swnj register struct mba_device *mi; 362383Swnj { 372383Swnj register struct buf *bp; /* i/o operation at head of queue */ 382383Swnj register struct mba_hd *mhp; /* header for mba device is on */ 3928Sbill 402383Swnj loop: 412383Swnj /* 422383Swnj * Get the first thing to do off device queue. 432383Swnj */ 442383Swnj bp = mi->mi_tab.b_actf; 452383Swnj if (bp == NULL) 462383Swnj return; 472383Swnj /* 482383Swnj * Let the drivers unit start routine have at it 492383Swnj * and then process the request further, per its instructions. 502383Swnj */ 512383Swnj switch ((*mi->mi_driver->md_ustart)(mi)) { 522383Swnj 532383Swnj case MBU_NEXT: /* request is complete (e.g. ``sense'') */ 542383Swnj mi->mi_tab.b_active = 0; 552955Swnj mi->mi_tab.b_errcnt = 0; 562383Swnj mi->mi_tab.b_actf = bp->av_forw; 572383Swnj iodone(bp); 582383Swnj goto loop; 592383Swnj 602383Swnj case MBU_DODATA: /* all ready to do data transfer */ 612383Swnj /* 622981Swnj * Queue the device mba_device structure on the massbus 632383Swnj * mba_hd structure for processing as soon as the 642383Swnj * data path is available. 652383Swnj */ 662383Swnj mhp = mi->mi_hd; 672383Swnj mi->mi_forw = NULL; 682383Swnj if (mhp->mh_actf == NULL) 692383Swnj mhp->mh_actf = mi; 702383Swnj else 712383Swnj mhp->mh_actl->mi_forw = mi; 722383Swnj mhp->mh_actl = mi; 732383Swnj /* 742383Swnj * If data path is idle, start transfer now. 752383Swnj * In any case the device is ``active'' waiting for the 762383Swnj * data to transfer. 772383Swnj */ 782893Swnj mi->mi_tab.b_active = 1; 792383Swnj if (mhp->mh_active == 0) 802383Swnj mbstart(mhp); 812383Swnj return; 822383Swnj 832383Swnj case MBU_STARTED: /* driver started a non-data transfer */ 842383Swnj /* 852383Swnj * Mark device busy during non-data transfer 862383Swnj * and count this as a ``seek'' on the device. 872383Swnj */ 883182Swnj if (mi->mi_dk >= 0) { 892383Swnj dk_seek[mi->mi_dk]++; 903182Swnj dk_busy |= (1 << mi->mi_dk); 913182Swnj } 922383Swnj mi->mi_tab.b_active = 1; 932383Swnj return; 942383Swnj 952383Swnj case MBU_BUSY: /* dual port drive busy */ 962383Swnj /* 972383Swnj * We mark the device structure so that when an 982383Swnj * interrupt occurs we will know to restart the unit. 992383Swnj */ 1002383Swnj mi->mi_tab.b_flags |= B_BUSY; 1012383Swnj return; 1022383Swnj 1032383Swnj default: 1042383Swnj panic("mbustart"); 1052383Swnj } 1062403Skre } 1072383Swnj 1082383Swnj /* 1092383Swnj * Start an i/o operation on the massbus specified by the argument. 1102383Swnj * We peel the first operation off its queue and insure that the drive 1112383Swnj * is present and on-line. We then use the drivers start routine 1122383Swnj * (if any) to prepare the drive, setup the massbus map for the transfer 1132383Swnj * and start the transfer. 1142383Swnj */ 1152383Swnj mbstart(mhp) 1162383Swnj register struct mba_hd *mhp; 1172383Swnj { 1182981Swnj register struct mba_device *mi; 1192383Swnj struct buf *bp; 1202383Swnj register struct mba_regs *mbp; 1213708Sroot register int com; 1222383Swnj 1232383Swnj loop: 1242383Swnj /* 1252383Swnj * Look for an operation at the front of the queue. 1262383Swnj */ 1272955Swnj if ((mi = mhp->mh_actf) == NULL) { 1282383Swnj return; 1292955Swnj } 1302383Swnj if ((bp = mi->mi_tab.b_actf) == NULL) { 1312383Swnj mhp->mh_actf = mi->mi_forw; 1322383Swnj goto loop; 1332383Swnj } 1342383Swnj /* 1352383Swnj * If this device isn't present and on-line, then 1362383Swnj * we screwed up, and can't really do the operation. 1374757Swnj * Only check for non-tapes because tape drivers check 1384757Swnj * ONLINE themselves and because TU78 registers are 1394757Swnj * different. 1402383Swnj */ 1414757Swnj if ((mi->mi_drv->mbd_dt & MBDT_TAP) == 0) 1423095Swnj if ((mi->mi_drv->mbd_ds & MBDS_DREADY) != MBDS_DREADY) { 1432981Swnj printf("%s%d: not ready\n", mi->mi_driver->md_dname, 1442981Swnj dkunit(bp)); 1452383Swnj mi->mi_tab.b_actf = bp->av_forw; 1462893Swnj mi->mi_tab.b_errcnt = 0; 1472893Swnj mi->mi_tab.b_active = 0; 1482383Swnj bp->b_flags |= B_ERROR; 1492383Swnj iodone(bp); 1502383Swnj goto loop; 1512383Swnj } 1522383Swnj /* 1532383Swnj * We can do the operation; mark the massbus active 1542383Swnj * and let the device start routine setup any necessary 1552383Swnj * device state for the transfer (e.g. desired cylinder, etc 1562383Swnj * on disks). 1572383Swnj */ 1582383Swnj mhp->mh_active = 1; 1593708Sroot if (mi->mi_driver->md_start) { 1603708Sroot if ((com = (*mi->mi_driver->md_start)(mi)) == 0) 1613708Sroot com = (bp->b_flags & B_READ) ? 1623708Sroot MB_RCOM|MB_GO : MB_WCOM|MB_GO; 1633708Sroot } else 1643708Sroot com = (bp->b_flags & B_READ) ? MB_RCOM|MB_GO : MB_WCOM|MB_GO; 1652383Swnj 1662383Swnj /* 1672383Swnj * Setup the massbus control and map registers and start 1682383Swnj * the transfer. 1692383Swnj */ 1702383Swnj mbp = mi->mi_mba; 1712383Swnj mbp->mba_sr = -1; /* conservative */ 1722383Swnj mbp->mba_var = mbasetup(mi); 1732383Swnj mbp->mba_bcr = -bp->b_bcount; 1743708Sroot mi->mi_drv->mbd_cs1 = com; 1752383Swnj if (mi->mi_dk >= 0) { 1762383Swnj dk_busy |= 1 << mi->mi_dk; 1772383Swnj dk_xfer[mi->mi_dk]++; 1782383Swnj dk_wds[mi->mi_dk] += bp->b_bcount >> 6; 1792383Swnj } 1802383Swnj } 1812383Swnj 1822383Swnj /* 1832383Swnj * Take an interrupt off of massbus mbanum, 1842383Swnj * and dispatch to drivers as appropriate. 1852383Swnj */ 1862383Swnj mbintr(mbanum) 1872383Swnj int mbanum; 1882383Swnj { 1892383Swnj register struct mba_hd *mhp = &mba_hd[mbanum]; 1902383Swnj register struct mba_regs *mbp = mhp->mh_mba; 1912981Swnj register struct mba_device *mi; 192420Sbill register struct buf *bp; 1932383Swnj register int drive; 1942955Swnj int mbasr, as; 1952383Swnj 1962383Swnj /* 1972383Swnj * Read out the massbus status register 1982383Swnj * and attention status register and clear 1992383Swnj * the bits in same by writing them back. 2002383Swnj */ 2012955Swnj mbasr = mbp->mba_sr; 2022955Swnj mbp->mba_sr = mbasr; 2032884Swnj #if VAX750 2043095Swnj if (mbasr&MBSR_CBHUNG) { 2052930Swnj printf("mba%d: control bus hung\n", mbanum); 2062930Swnj panic("cbhung"); 2072930Swnj } 2082884Swnj #endif 2092383Swnj /* note: the mbd_as register is shared between drives */ 2102955Swnj as = mbp->mba_drv[0].mbd_as & 0xff; 2112383Swnj mbp->mba_drv[0].mbd_as = as; 2122383Swnj 2132383Swnj /* 2142383Swnj * If the mba was active, process the data transfer 2152383Swnj * complete interrupt; otherwise just process units which 2162383Swnj * are now finished. 2172383Swnj */ 2182383Swnj if (mhp->mh_active) { 2192383Swnj /* 2202383Swnj * Clear attention status for drive whose data 2213095Swnj * transfer related operation completed, 2223095Swnj * and give the dtint driver 2232383Swnj * routine a chance to say what is next. 2242383Swnj */ 2252383Swnj mi = mhp->mh_actf; 2262383Swnj as &= ~(1 << mi->mi_drive); 2272383Swnj dk_busy &= ~(1 << mi->mi_dk); 2282383Swnj bp = mi->mi_tab.b_actf; 2293095Swnj switch ((*mi->mi_driver->md_dtint)(mi, mbasr)) { 2302383Swnj 2312383Swnj case MBD_DONE: /* all done, for better or worse */ 2322383Swnj /* 2332383Swnj * Flush request from drive queue. 2342383Swnj */ 2352383Swnj mi->mi_tab.b_errcnt = 0; 2362383Swnj mi->mi_tab.b_actf = bp->av_forw; 2372383Swnj iodone(bp); 2382383Swnj /* fall into... */ 2392383Swnj case MBD_RETRY: /* attempt the operation again */ 2402383Swnj /* 2412383Swnj * Dequeue data transfer from massbus queue; 2422383Swnj * if there is still a i/o request on the device 2432383Swnj * queue then start the next operation on the device. 2442383Swnj * (Common code for DONE and RETRY). 2452383Swnj */ 2462383Swnj mhp->mh_active = 0; 2472383Swnj mi->mi_tab.b_active = 0; 2482383Swnj mhp->mh_actf = mi->mi_forw; 2492383Swnj if (mi->mi_tab.b_actf) 2502383Swnj mbustart(mi); 2512383Swnj break; 2522383Swnj 2532383Swnj case MBD_RESTARTED: /* driver restarted op (ecc, e.g.) 2542383Swnj /* 2552893Swnj * Note that mhp->mh_active is still on. 2562383Swnj */ 2572383Swnj break; 2582383Swnj 2592383Swnj default: 2602884Swnj panic("mbintr"); 2612383Swnj } 2622383Swnj } 2632383Swnj /* 2642383Swnj * Service drives which require attention 2652383Swnj * after non-data-transfer operations. 2662383Swnj */ 2672955Swnj while (drive = ffs(as)) { 2682955Swnj drive--; /* was 1 origin */ 2692955Swnj as &= ~(1 << drive); 2702981Swnj mi = mhp->mh_mbip[drive]; 2712981Swnj if (mi == NULL) 2722981Swnj continue; 2732955Swnj /* 2742981Swnj * If driver has a handler for non-data transfer 2753095Swnj * interrupts, give it a chance to tell us what to do. 2762955Swnj */ 2772955Swnj if (mi->mi_driver->md_ndint) { 2782955Swnj mi->mi_tab.b_active = 0; 2792955Swnj switch ((*mi->mi_driver->md_ndint)(mi)) { 2802383Swnj 2813095Swnj case MBN_DONE: /* operation completed */ 2822955Swnj mi->mi_tab.b_errcnt = 0; 2832981Swnj bp = mi->mi_tab.b_actf; 2842955Swnj mi->mi_tab.b_actf = bp->av_forw; 2852955Swnj iodone(bp); 2863095Swnj /* fall into common code */ 2873095Swnj case MBN_RETRY: /* operation continues */ 2882955Swnj if (mi->mi_tab.b_actf) 2892955Swnj mbustart(mi); 2902955Swnj break; 2913095Swnj case MBN_SKIP: /* ignore unsol. interrupt */ 2922981Swnj break; 2932955Swnj default: 2942955Swnj panic("mbintr"); 2952955Swnj } 2962955Swnj } else 2973095Swnj /* 2983095Swnj * If there is no non-data transfer interrupt 2993095Swnj * routine, then we should just 3003095Swnj * restart the unit, leading to a mbstart() soon. 3013095Swnj */ 3022955Swnj mbustart(mi); 3032955Swnj } 3042383Swnj /* 3052383Swnj * If there is an operation available and 3062383Swnj * the massbus isn't active, get it going. 3072383Swnj */ 3082383Swnj if (mhp->mh_actf && !mhp->mh_active) 3092383Swnj mbstart(mhp); 3103095Swnj /* THHHHATS all folks... */ 3112383Swnj } 3122383Swnj 3132383Swnj /* 3142383Swnj * Setup the mapping registers for a transfer. 3152383Swnj */ 3162383Swnj mbasetup(mi) 3172981Swnj register struct mba_device *mi; 31828Sbill { 3192383Swnj register struct mba_regs *mbap = mi->mi_mba; 3202383Swnj struct buf *bp = mi->mi_tab.b_actf; 32128Sbill register int i; 32228Sbill int npf; 32328Sbill unsigned v; 32428Sbill register struct pte *pte, *io; 32528Sbill int o; 32628Sbill int vaddr; 32728Sbill struct proc *rp; 32828Sbill 3291412Sbill io = mbap->mba_map; 3301412Sbill v = btop(bp->b_un.b_addr); 3311412Sbill o = (int)bp->b_un.b_addr & PGOFSET; 3321412Sbill npf = btoc(bp->b_bcount + o); 3331412Sbill rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc; 3341412Sbill vaddr = o; 3351412Sbill if (bp->b_flags & B_UAREA) { 3361412Sbill for (i = 0; i < UPAGES; i++) { 3371412Sbill if (rp->p_addr[i].pg_pfnum == 0) 3381412Sbill panic("mba: zero upage"); 3391412Sbill *(int *)io++ = rp->p_addr[i].pg_pfnum | PG_V; 34028Sbill } 3411412Sbill } else if ((bp->b_flags & B_PHYS) == 0) { 3421412Sbill pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)]; 3431412Sbill while (--npf >= 0) 3441412Sbill *(int *)io++ = pte++->pg_pfnum | PG_V; 3451412Sbill } else { 3461412Sbill if (bp->b_flags & B_PAGET) 3471412Sbill pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)]; 3481412Sbill else 3491412Sbill pte = vtopte(rp, v); 3501412Sbill while (--npf >= 0) { 3511412Sbill if (pte->pg_pfnum == 0) 3521412Sbill panic("mba, zero entry"); 3531412Sbill *(int *)io++ = pte++->pg_pfnum | PG_V; 3541412Sbill } 35528Sbill } 3561412Sbill *(int *)io++ = 0; 3572383Swnj return (vaddr); 35828Sbill } 3592930Swnj 360*6181Sroot #if notdef 3613095Swnj /* 3623095Swnj * Init and interrupt enable a massbus adapter. 3633095Swnj */ 3642930Swnj mbainit(mp) 3652930Swnj struct mba_regs *mp; 3662930Swnj { 3672930Swnj 3683095Swnj mp->mba_cr = MBCR_INIT; 3693095Swnj mp->mba_cr = MBCR_IE; 3702930Swnj } 3712704Swnj #endif 3724966Swnj #endif 373