1*23312Smckusick /* 2*23312Smckusick * Copyright (c) 1982 Regents of the University of California. 3*23312Smckusick * All rights reserved. The Berkeley software License Agreement 4*23312Smckusick * specifies the terms and conditions for redistribution. 5*23312Smckusick * 6*23312Smckusick * @(#)mba.c 6.4 (Berkeley) 06/08/85 7*23312Smckusick */ 828Sbill 92704Swnj #include "mba.h" 102704Swnj #if NMBA > 0 112383Swnj /* 123095Swnj * Massbus driver, arbitrates a massbus among attached devices. 1317215Smckusick * 1417215Smckusick * OPTION: 1517215Smckusick * MTRDREV - Enable mag tape read backwards error recovery 162383Swnj */ 179788Ssam #include "../machine/pte.h" 189788Ssam 1917121Sbloom #include "param.h" 2017121Sbloom #include "systm.h" 2117121Sbloom #include "dk.h" 2217121Sbloom #include "buf.h" 2317121Sbloom #include "conf.h" 2417121Sbloom #include "dir.h" 2517121Sbloom #include "user.h" 2617121Sbloom #include "proc.h" 2717121Sbloom #include "map.h" 288470Sroot #include "../vax/mtpr.h" 2917121Sbloom #include "vm.h" 3028Sbill 3117121Sbloom #include "mbareg.h" 3217121Sbloom #include "mbavar.h" 338470Sroot 343095Swnj char mbsr_bits[] = MBSR_BITS; 3528Sbill /* 362383Swnj * Start activity on a massbus device. 372981Swnj * We are given the device's mba_device structure and activate 382383Swnj * the device via the unit start routine. The unit start 392383Swnj * routine may indicate that it is finished (e.g. if the operation 402383Swnj * was a ``sense'' on a tape drive), that the (multi-ported) unit 412383Swnj * is busy (we will get an interrupt later), that it started the 422383Swnj * unit (e.g. for a non-data transfer operation), or that it has 432383Swnj * set up a data transfer operation and we should start the massbus adaptor. 4428Sbill */ 452383Swnj mbustart(mi) 462981Swnj register struct mba_device *mi; 472383Swnj { 482383Swnj register struct buf *bp; /* i/o operation at head of queue */ 492383Swnj register struct mba_hd *mhp; /* header for mba device is on */ 5028Sbill 512383Swnj loop: 522383Swnj /* 532383Swnj * Get the first thing to do off device queue. 542383Swnj */ 552383Swnj bp = mi->mi_tab.b_actf; 562383Swnj if (bp == NULL) 572383Swnj return; 582383Swnj /* 596537Ssam * Make sure the drive is still there before starting it up. 606537Ssam */ 616537Ssam if ((mi->mi_drv->mbd_dt & MBDT_TYPE) == 0) { 626537Ssam printf("%s%d: nonexistent\n", mi->mi_driver->md_dname, 636537Ssam dkunit(bp)); 646537Ssam mi->mi_alive = 0; 656537Ssam mi->mi_tab.b_actf = bp->av_forw; 666537Ssam mi->mi_tab.b_active = 0; 676537Ssam mi->mi_tab.b_errcnt = 0; 686537Ssam bp->b_flags |= B_ERROR; 696537Ssam iodone(bp); 706537Ssam goto loop; 716537Ssam } 726537Ssam /* 732383Swnj * Let the drivers unit start routine have at it 742383Swnj * and then process the request further, per its instructions. 752383Swnj */ 762383Swnj switch ((*mi->mi_driver->md_ustart)(mi)) { 772383Swnj 782383Swnj case MBU_NEXT: /* request is complete (e.g. ``sense'') */ 792383Swnj mi->mi_tab.b_active = 0; 802955Swnj mi->mi_tab.b_errcnt = 0; 812383Swnj mi->mi_tab.b_actf = bp->av_forw; 822383Swnj iodone(bp); 832383Swnj goto loop; 842383Swnj 852383Swnj case MBU_DODATA: /* all ready to do data transfer */ 862383Swnj /* 872981Swnj * Queue the device mba_device structure on the massbus 882383Swnj * mba_hd structure for processing as soon as the 892383Swnj * data path is available. 902383Swnj */ 912383Swnj mhp = mi->mi_hd; 922383Swnj mi->mi_forw = NULL; 932383Swnj if (mhp->mh_actf == NULL) 942383Swnj mhp->mh_actf = mi; 952383Swnj else 962383Swnj mhp->mh_actl->mi_forw = mi; 972383Swnj mhp->mh_actl = mi; 982383Swnj /* 992383Swnj * If data path is idle, start transfer now. 1002383Swnj * In any case the device is ``active'' waiting for the 1012383Swnj * data to transfer. 1022383Swnj */ 1032893Swnj mi->mi_tab.b_active = 1; 1042383Swnj if (mhp->mh_active == 0) 1052383Swnj mbstart(mhp); 1062383Swnj return; 1072383Swnj 1082383Swnj case MBU_STARTED: /* driver started a non-data transfer */ 1092383Swnj /* 1102383Swnj * Mark device busy during non-data transfer 1112383Swnj * and count this as a ``seek'' on the device. 1122383Swnj */ 1133182Swnj if (mi->mi_dk >= 0) { 1142383Swnj dk_seek[mi->mi_dk]++; 1153182Swnj dk_busy |= (1 << mi->mi_dk); 1163182Swnj } 1172383Swnj mi->mi_tab.b_active = 1; 1182383Swnj return; 1192383Swnj 1202383Swnj case MBU_BUSY: /* dual port drive busy */ 1212383Swnj /* 1222383Swnj * We mark the device structure so that when an 1232383Swnj * interrupt occurs we will know to restart the unit. 1242383Swnj */ 1252383Swnj mi->mi_tab.b_flags |= B_BUSY; 1262383Swnj return; 1272383Swnj 1282383Swnj default: 1292383Swnj panic("mbustart"); 1302383Swnj } 1312403Skre } 1322383Swnj 1332383Swnj /* 1342383Swnj * Start an i/o operation on the massbus specified by the argument. 1352383Swnj * We peel the first operation off its queue and insure that the drive 1362383Swnj * is present and on-line. We then use the drivers start routine 1372383Swnj * (if any) to prepare the drive, setup the massbus map for the transfer 1382383Swnj * and start the transfer. 1392383Swnj */ 1402383Swnj mbstart(mhp) 1412383Swnj register struct mba_hd *mhp; 1422383Swnj { 1432981Swnj register struct mba_device *mi; 1442383Swnj struct buf *bp; 1452383Swnj register struct mba_regs *mbp; 1463708Sroot register int com; 1472383Swnj 1482383Swnj loop: 1492383Swnj /* 1502383Swnj * Look for an operation at the front of the queue. 1512383Swnj */ 1522955Swnj if ((mi = mhp->mh_actf) == NULL) { 1532383Swnj return; 1542955Swnj } 1552383Swnj if ((bp = mi->mi_tab.b_actf) == NULL) { 1562383Swnj mhp->mh_actf = mi->mi_forw; 1572383Swnj goto loop; 1582383Swnj } 1592383Swnj /* 1602383Swnj * If this device isn't present and on-line, then 1612383Swnj * we screwed up, and can't really do the operation. 1624757Swnj * Only check for non-tapes because tape drivers check 1634757Swnj * ONLINE themselves and because TU78 registers are 1644757Swnj * different. 1652383Swnj */ 1666537Ssam if (((com = mi->mi_drv->mbd_dt) & MBDT_TAP) == 0) 1673095Swnj if ((mi->mi_drv->mbd_ds & MBDS_DREADY) != MBDS_DREADY) { 1686537Ssam if ((com & MBDT_TYPE) == 0) { 1696537Ssam mi->mi_alive = 0; 1706537Ssam printf("%s%d: nonexistent\n", mi->mi_driver->md_dname, 1716537Ssam dkunit(bp)); 1726537Ssam } else 1736537Ssam printf("%s%d: not ready\n", mi->mi_driver->md_dname, 1746537Ssam dkunit(bp)); 1752383Swnj mi->mi_tab.b_actf = bp->av_forw; 1762893Swnj mi->mi_tab.b_errcnt = 0; 1772893Swnj mi->mi_tab.b_active = 0; 1782383Swnj bp->b_flags |= B_ERROR; 1792383Swnj iodone(bp); 1802383Swnj goto loop; 1812383Swnj } 1822383Swnj /* 1832383Swnj * We can do the operation; mark the massbus active 1842383Swnj * and let the device start routine setup any necessary 1852383Swnj * device state for the transfer (e.g. desired cylinder, etc 1862383Swnj * on disks). 1872383Swnj */ 1882383Swnj mhp->mh_active = 1; 1893708Sroot if (mi->mi_driver->md_start) { 1903708Sroot if ((com = (*mi->mi_driver->md_start)(mi)) == 0) 1913708Sroot com = (bp->b_flags & B_READ) ? 1923708Sroot MB_RCOM|MB_GO : MB_WCOM|MB_GO; 1933708Sroot } else 1943708Sroot com = (bp->b_flags & B_READ) ? MB_RCOM|MB_GO : MB_WCOM|MB_GO; 1952383Swnj 1962383Swnj /* 1972383Swnj * Setup the massbus control and map registers and start 1982383Swnj * the transfer. 1992383Swnj */ 2002383Swnj mbp = mi->mi_mba; 2012383Swnj mbp->mba_sr = -1; /* conservative */ 20217215Smckusick #ifdef MTRDREV 20317215Smckusick if (bp->b_bcount >= 0) { 20417215Smckusick mbp->mba_var = mbasetup(mi); 20517215Smckusick mbp->mba_bcr = -bp->b_bcount; 20617215Smckusick } else { 20717215Smckusick mbp->mba_var = mbasetup(mi) - bp->b_bcount - 1; 20817215Smckusick mbp->mba_bcr = bp->b_bcount; 20917215Smckusick } 21017215Smckusick #else 2112383Swnj mbp->mba_var = mbasetup(mi); 2122383Swnj mbp->mba_bcr = -bp->b_bcount; 21317215Smckusick #endif 2143708Sroot mi->mi_drv->mbd_cs1 = com; 2152383Swnj if (mi->mi_dk >= 0) { 2162383Swnj dk_busy |= 1 << mi->mi_dk; 2172383Swnj dk_xfer[mi->mi_dk]++; 21817215Smckusick #ifdef MTRDREV 21917215Smckusick if (bp->b_bcount >= 0) 22017215Smckusick dk_wds[mi->mi_dk] += bp->b_bcount >> 6; 22117215Smckusick else 22217215Smckusick dk_wds[mi->mi_dk] += -(bp->b_bcount) >> 6; 22317215Smckusick #else 2242383Swnj dk_wds[mi->mi_dk] += bp->b_bcount >> 6; 22517215Smckusick #endif 2262383Swnj } 2272383Swnj } 2282383Swnj 2292383Swnj /* 2302383Swnj * Take an interrupt off of massbus mbanum, 2312383Swnj * and dispatch to drivers as appropriate. 2322383Swnj */ 2332383Swnj mbintr(mbanum) 2342383Swnj int mbanum; 2352383Swnj { 2362383Swnj register struct mba_hd *mhp = &mba_hd[mbanum]; 2372383Swnj register struct mba_regs *mbp = mhp->mh_mba; 2382981Swnj register struct mba_device *mi; 239420Sbill register struct buf *bp; 2402383Swnj register int drive; 2412955Swnj int mbasr, as; 2426537Ssam extern struct mba_device *mbaconfig(); 2432383Swnj 2442383Swnj /* 2452383Swnj * Read out the massbus status register 2462383Swnj * and attention status register and clear 2472383Swnj * the bits in same by writing them back. 2482383Swnj */ 2492955Swnj mbasr = mbp->mba_sr; 2502955Swnj mbp->mba_sr = mbasr; 2512884Swnj #if VAX750 2523095Swnj if (mbasr&MBSR_CBHUNG) { 2532930Swnj printf("mba%d: control bus hung\n", mbanum); 2542930Swnj panic("cbhung"); 2552930Swnj } 2562884Swnj #endif 2572383Swnj /* note: the mbd_as register is shared between drives */ 2582955Swnj as = mbp->mba_drv[0].mbd_as & 0xff; 2592383Swnj mbp->mba_drv[0].mbd_as = as; 2602383Swnj 2612383Swnj /* 2622383Swnj * If the mba was active, process the data transfer 2632383Swnj * complete interrupt; otherwise just process units which 2642383Swnj * are now finished. 2652383Swnj */ 2662383Swnj if (mhp->mh_active) { 2672383Swnj /* 2682383Swnj * Clear attention status for drive whose data 2693095Swnj * transfer related operation completed, 2703095Swnj * and give the dtint driver 2712383Swnj * routine a chance to say what is next. 2722383Swnj */ 2732383Swnj mi = mhp->mh_actf; 2742383Swnj as &= ~(1 << mi->mi_drive); 2752383Swnj dk_busy &= ~(1 << mi->mi_dk); 2762383Swnj bp = mi->mi_tab.b_actf; 2773095Swnj switch ((*mi->mi_driver->md_dtint)(mi, mbasr)) { 2782383Swnj 2792383Swnj case MBD_DONE: /* all done, for better or worse */ 2802383Swnj /* 2812383Swnj * Flush request from drive queue. 2822383Swnj */ 2832383Swnj mi->mi_tab.b_errcnt = 0; 2842383Swnj mi->mi_tab.b_actf = bp->av_forw; 2852383Swnj iodone(bp); 2862383Swnj /* fall into... */ 2872383Swnj case MBD_RETRY: /* attempt the operation again */ 2882383Swnj /* 2892383Swnj * Dequeue data transfer from massbus queue; 2902383Swnj * if there is still a i/o request on the device 2912383Swnj * queue then start the next operation on the device. 2922383Swnj * (Common code for DONE and RETRY). 2932383Swnj */ 2942383Swnj mhp->mh_active = 0; 2952383Swnj mi->mi_tab.b_active = 0; 2962383Swnj mhp->mh_actf = mi->mi_forw; 2972383Swnj if (mi->mi_tab.b_actf) 2982383Swnj mbustart(mi); 2992383Swnj break; 3002383Swnj 3012383Swnj case MBD_RESTARTED: /* driver restarted op (ecc, e.g.) 3022383Swnj /* 3032893Swnj * Note that mhp->mh_active is still on. 3042383Swnj */ 3052383Swnj break; 3062383Swnj 3072383Swnj default: 3082884Swnj panic("mbintr"); 3092383Swnj } 3102383Swnj } 3112383Swnj /* 3122383Swnj * Service drives which require attention 3132383Swnj * after non-data-transfer operations. 3142383Swnj */ 3152955Swnj while (drive = ffs(as)) { 3162955Swnj drive--; /* was 1 origin */ 3172955Swnj as &= ~(1 << drive); 3182981Swnj mi = mhp->mh_mbip[drive]; 3196537Ssam if (mi == NULL || mi->mi_alive == 0) { 3206537Ssam struct mba_device fnd; 3216537Ssam struct mba_drv *mbd = &mhp->mh_mba->mba_drv[drive]; 3226537Ssam int dt = mbd->mbd_dt & 0xffff; 3236537Ssam 3246537Ssam if (dt == 0 || dt == MBDT_MOH) 3256537Ssam continue; 3266537Ssam fnd.mi_mba = mhp->mh_mba; 3276537Ssam fnd.mi_mbanum = mbanum; 3286537Ssam fnd.mi_drive = drive; 3296537Ssam if ((mi = mbaconfig(&fnd, dt)) == NULL) 3306537Ssam continue; 33112507Ssam /* 33212507Ssam * If a tape, poke the slave attach routines. 33312507Ssam * Otherwise, could be a disk which we want 33412507Ssam * to swap on, so make a pass over the swap 33512507Ssam * configuration table in case the size of 33612507Ssam * the swap area must be determined by drive type. 33712507Ssam */ 33812507Ssam if (dt & MBDT_TAP) 33912507Ssam mbaddtape(mi, drive); 34012507Ssam else 34112507Ssam swapconf(); 3426537Ssam } 3432955Swnj /* 3442981Swnj * If driver has a handler for non-data transfer 3453095Swnj * interrupts, give it a chance to tell us what to do. 3462955Swnj */ 3472955Swnj if (mi->mi_driver->md_ndint) { 3482955Swnj switch ((*mi->mi_driver->md_ndint)(mi)) { 3492383Swnj 3503095Swnj case MBN_DONE: /* operation completed */ 3516537Ssam mi->mi_tab.b_active = 0; 3522955Swnj mi->mi_tab.b_errcnt = 0; 3532981Swnj bp = mi->mi_tab.b_actf; 3542955Swnj mi->mi_tab.b_actf = bp->av_forw; 3552955Swnj iodone(bp); 3563095Swnj /* fall into common code */ 3573095Swnj case MBN_RETRY: /* operation continues */ 3582955Swnj if (mi->mi_tab.b_actf) 3592955Swnj mbustart(mi); 3602955Swnj break; 3613095Swnj case MBN_SKIP: /* ignore unsol. interrupt */ 3622981Swnj break; 3632955Swnj default: 3642955Swnj panic("mbintr"); 3652955Swnj } 3662955Swnj } else 3673095Swnj /* 3683095Swnj * If there is no non-data transfer interrupt 3693095Swnj * routine, then we should just 3703095Swnj * restart the unit, leading to a mbstart() soon. 3713095Swnj */ 3722955Swnj mbustart(mi); 3732955Swnj } 3742383Swnj /* 3752383Swnj * If there is an operation available and 3762383Swnj * the massbus isn't active, get it going. 3772383Swnj */ 3782383Swnj if (mhp->mh_actf && !mhp->mh_active) 3792383Swnj mbstart(mhp); 3803095Swnj /* THHHHATS all folks... */ 3812383Swnj } 3822383Swnj 3832383Swnj /* 38412507Ssam * For autoconfig'ng tape drives on the fly. 38512507Ssam */ 38612507Ssam mbaddtape(mi, drive) 38712507Ssam struct mba_device *mi; 38812507Ssam int drive; 38912507Ssam { 39012507Ssam register struct mba_slave *ms; 39112507Ssam 39212507Ssam for (ms = mbsinit; ms->ms_driver; ms++) 39312507Ssam if (ms->ms_driver == mi->mi_driver && ms->ms_alive == 0 && 39412507Ssam (ms->ms_ctlr == mi->mi_unit || 39512507Ssam ms->ms_ctlr == '?')) { 39612507Ssam if ((*ms->ms_driver->md_slave)(mi, ms, drive)) { 39712507Ssam printf("%s%d at %s%d slave %d\n", 39812507Ssam ms->ms_driver->md_sname, 39912507Ssam ms->ms_unit, 40012507Ssam mi->mi_driver->md_dname, 40112507Ssam mi->mi_unit, 40212507Ssam ms->ms_slave); 40312507Ssam ms->ms_alive = 1; 40412507Ssam ms->ms_ctlr = mi->mi_unit; 40512507Ssam } 40612507Ssam } 40712507Ssam } 40812507Ssam 40912507Ssam /* 4102383Swnj * Setup the mapping registers for a transfer. 4112383Swnj */ 4122383Swnj mbasetup(mi) 4132981Swnj register struct mba_device *mi; 41428Sbill { 4152383Swnj register struct mba_regs *mbap = mi->mi_mba; 4162383Swnj struct buf *bp = mi->mi_tab.b_actf; 4176381Swnj register int npf; 41828Sbill unsigned v; 41928Sbill register struct pte *pte, *io; 42028Sbill int o; 42128Sbill struct proc *rp; 42228Sbill 4231412Sbill v = btop(bp->b_un.b_addr); 4241412Sbill o = (int)bp->b_un.b_addr & PGOFSET; 42517215Smckusick #ifdef MTRDREV 42617215Smckusick if (bp->b_bcount >= 0) 42717215Smckusick npf = btoc(bp->b_bcount + o); 42817215Smckusick else 42917215Smckusick npf = btoc(-(bp->b_bcount) + o); 43017215Smckusick #else 4311412Sbill npf = btoc(bp->b_bcount + o); 43217215Smckusick #endif 4331412Sbill rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc; 4346381Swnj if ((bp->b_flags & B_PHYS) == 0) 4351412Sbill pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)]; 4366381Swnj else if (bp->b_flags & B_UAREA) 4376381Swnj pte = &rp->p_addr[v]; 4386381Swnj else if (bp->b_flags & B_PAGET) 4396381Swnj pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)]; 4406381Swnj else 4416381Swnj pte = vtopte(rp, v); 4426381Swnj io = mbap->mba_map; 4436381Swnj while (--npf >= 0) { 4446381Swnj if (pte->pg_pfnum == 0) 4456381Swnj panic("mba, zero entry"); 4466381Swnj *(int *)io++ = pte++->pg_pfnum | PG_V; 44728Sbill } 4481412Sbill *(int *)io++ = 0; 4496381Swnj return (o); 45028Sbill } 4512930Swnj 4526181Sroot #if notdef 4533095Swnj /* 4543095Swnj * Init and interrupt enable a massbus adapter. 4553095Swnj */ 4562930Swnj mbainit(mp) 4572930Swnj struct mba_regs *mp; 4582930Swnj { 4592930Swnj 4603095Swnj mp->mba_cr = MBCR_INIT; 4613095Swnj mp->mba_cr = MBCR_IE; 4622930Swnj } 4632704Swnj #endif 4644966Swnj #endif 465