1*49439Sbostic /*-
2*49439Sbostic * Copyright (c) 1982, 1986 The Regents of the University of California.
3*49439Sbostic * All rights reserved.
423310Smckusick *
5*49439Sbostic * %sccs.include.proprietary.c%
6*49439Sbostic *
7*49439Sbostic * @(#)ht.c 7.14 (Berkeley) 05/08/91
823310Smckusick */
92961Swnj
102980Swnj #include "tu.h"
111563Sbill #if NHT > 0
1222Sbill /*
132926Swnj * TM03/TU?? tape driver
143094Swnj *
153094Swnj * TODO:
163204Swnj * cleanup messages on errors
173094Swnj * test ioctl's
183094Swnj * see how many rewind interrups we get if we kick when not at BOT
193204Swnj * fixup rle error on block tape code
2022Sbill */
2145802Sbostic #include "sys/param.h"
2245802Sbostic #include "sys/systm.h"
2345802Sbostic #include "sys/buf.h"
2445802Sbostic #include "sys/conf.h"
2545802Sbostic #include "sys/file.h"
2645802Sbostic #include "sys/user.h"
2745802Sbostic #include "sys/proc.h"
2845802Sbostic #include "sys/map.h"
2945802Sbostic #include "sys/ioctl.h"
3045802Sbostic #include "sys/mtio.h"
3145802Sbostic #include "sys/cmap.h"
3245802Sbostic #include "sys/tty.h"
3345802Sbostic #include "sys/syslog.h"
3445802Sbostic #include "sys/tprintf.h"
3522Sbill
3645802Sbostic #include "../include/pte.h"
3745802Sbostic #include "../include/cpu.h"
3817118Sbloom #include "mbareg.h"
3917118Sbloom #include "mbavar.h"
4017118Sbloom #include "htreg.h"
4122Sbill
422926Swnj struct buf chtbuf[NHT];
4322Sbill
442926Swnj short httypes[] =
453181Swnj { MBDT_TM03, MBDT_TE16, MBDT_TU45, MBDT_TU77, 0 };
462980Swnj struct mba_device *htinfo[NHT];
4731552Skarels struct mba_slave *tuinfo[NTU];
483103Swnj int htattach(), htslave(), htustart(), htndtint(), htdtint();
492926Swnj struct mba_driver htdriver =
502980Swnj { htattach, htslave, htustart, 0, htdtint, htndtint,
512980Swnj httypes, "ht", "tu", htinfo };
5222Sbill
532926Swnj #define MASKREG(r) ((r) & 0xffff)
5422Sbill
552926Swnj /* bits in minor device */
562980Swnj #define TUUNIT(dev) (minor(dev)&03)
572926Swnj #define H_NOREWIND 04
5831094Skarels #define H_DENS(dev) ((minor(dev) >> 3) & 03)
5922Sbill
6034220Sbostic #define HTUNIT(dev) (tuinfo[TUUNIT(dev)]->ms_ctlr)
612980Swnj
622926Swnj #define INF (daddr_t)1000000L /* a block number that wont exist */
632926Swnj
643094Swnj struct tu_softc {
652926Swnj char sc_openf;
662926Swnj char sc_flags;
672926Swnj daddr_t sc_blkno;
682926Swnj daddr_t sc_nxrec;
692926Swnj u_short sc_erreg;
702926Swnj u_short sc_dsreg;
712926Swnj short sc_resid;
722926Swnj short sc_dens;
7345802Sbostic tpr_t sc_tpr; /* tprintf handle for errors to user */
7430918Skarels int sc_blks; /* number of I/O operations since open */
7530918Skarels int sc_softerrs; /* number of soft I/O errors since open */
763094Swnj } tu_softc[NTU];
772926Swnj
782926Swnj /*
792926Swnj * Bits for sc_flags.
802926Swnj */
812926Swnj #define H_WRITTEN 1 /* last operation was a write */
822926Swnj #define H_ERASED 2 /* last write retry was an erase gap */
832926Swnj #define H_REWIND 4 /* last unit start was a rewind */
8422Sbill
853204Swnj char hter_bits[] = HTER_BITS;
863204Swnj char htds_bits[] = HTDS_BITS;
873204Swnj
882926Swnj /*ARGSUSED*/
892980Swnj htattach(mi)
902980Swnj struct mba_device *mi;
912926Swnj {
922926Swnj
932926Swnj }
942926Swnj
957430Skre htslave(mi, ms, sn)
962980Swnj struct mba_device *mi;
972980Swnj struct mba_slave *ms;
987430Skre int sn;
992980Swnj {
1004756Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
1012980Swnj
1027430Skre htaddr->httc = sn;
1034756Swnj if (htaddr->htdt & HTDT_SPR) {
10431552Skarels tuinfo[ms->ms_unit] = ms;
1054756Swnj return (1);
1064756Swnj } else
1074756Swnj return (0);
1082980Swnj }
1092980Swnj
11031094Skarels int htdens[4] = { HTTC_800BPI, HTTC_1600BPI, HTTC_6250BPI, HTTC_800BPI };
11131094Skarels
htopen(dev,flag)11222Sbill htopen(dev, flag)
1132926Swnj dev_t dev;
1142926Swnj int flag;
11522Sbill {
1163094Swnj register int tuunit;
1173094Swnj register struct tu_softc *sc;
11834220Sbostic register struct mba_slave *ms;
1193203Swnj int olddens, dens;
12022Sbill
1213094Swnj tuunit = TUUNIT(dev);
12234220Sbostic if (tuunit >= NTU || (ms = tuinfo[tuunit]) == NULL ||
12334220Sbostic ms->ms_alive == 0 || htinfo[ms->ms_ctlr]->mi_alive == 0)
1248580Sroot return (ENXIO);
12525052Skarels if ((sc = &tu_softc[tuunit])->sc_openf)
12625052Skarels return (EBUSY);
12730918Skarels sc->sc_openf = 1;
1283203Swnj olddens = sc->sc_dens;
12934220Sbostic dens = sc->sc_dens = htdens[H_DENS(dev)] | HTTC_PDP11 | ms->ms_slave;
1303203Swnj htcommand(dev, HT_SENSE, 1);
1313203Swnj sc->sc_dens = olddens;
1323707Sroot if ((sc->sc_dsreg & HTDS_MOL) == 0) {
13330918Skarels sc->sc_openf = 0;
1343717Sroot uprintf("tu%d: not online\n", tuunit);
1358580Sroot return (EIO);
1362926Swnj }
1373707Sroot if ((flag&FWRITE) && (sc->sc_dsreg&HTDS_WRL)) {
13830918Skarels sc->sc_openf = 0;
1393717Sroot uprintf("tu%d: no write ring\n", tuunit);
1408580Sroot return (EIO);
1413707Sroot }
1423707Sroot if ((sc->sc_dsreg & HTDS_BOT) == 0 && (flag&FWRITE) &&
1433707Sroot dens != sc->sc_dens) {
14430918Skarels sc->sc_openf = 0;
1453717Sroot uprintf("tu%d: can't change density in mid-tape\n", tuunit);
1468580Sroot return (EIO);
1473707Sroot }
1482926Swnj sc->sc_blkno = (daddr_t)0;
1492926Swnj sc->sc_nxrec = INF;
1502926Swnj sc->sc_flags = 0;
1513094Swnj sc->sc_dens = dens;
15230918Skarels sc->sc_blks = 0;
15330918Skarels sc->sc_softerrs = 0;
15445622Storek sc->sc_tpr = tprintf_open();
1558580Sroot return (0);
15622Sbill }
15722Sbill
htclose(dev,flag)15822Sbill htclose(dev, flag)
1592926Swnj register dev_t dev;
1602926Swnj register flag;
16122Sbill {
1623094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];
16322Sbill
1642926Swnj if (flag == FWRITE || ((flag&FWRITE) && (sc->sc_flags&H_WRITTEN))) {
1652926Swnj htcommand(dev, HT_WEOF, 1);
1662926Swnj htcommand(dev, HT_WEOF, 1);
1672926Swnj htcommand(dev, HT_SREV, 1);
16822Sbill }
1692926Swnj if ((minor(dev)&H_NOREWIND) == 0)
1702926Swnj htcommand(dev, HT_REW, 0);
17130918Skarels if (sc->sc_blks > 100 && sc->sc_softerrs > sc->sc_blks / 100)
17230918Skarels log(LOG_INFO, "tu%d: %d soft errors in %d blocks\n",
17330918Skarels TUUNIT(dev), sc->sc_softerrs, sc->sc_blks);
17445622Storek tprintf_close(sc->sc_tpr);
1752926Swnj sc->sc_openf = 0;
17640733Skarels return (0);
17722Sbill }
17822Sbill
htcommand(dev,com,count)1792926Swnj htcommand(dev, com, count)
1802926Swnj dev_t dev;
1812926Swnj int com, count;
18222Sbill {
18322Sbill register struct buf *bp;
1845436Sroot register int s;
18522Sbill
1862926Swnj bp = &chtbuf[HTUNIT(dev)];
1875436Sroot s = spl5();
1882926Swnj while (bp->b_flags&B_BUSY) {
1893157Swnj if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE))
1902980Swnj break;
19122Sbill bp->b_flags |= B_WANTED;
19222Sbill sleep((caddr_t)bp, PRIBIO);
19322Sbill }
1942943Swnj bp->b_flags = B_BUSY|B_READ;
1955436Sroot splx(s);
19622Sbill bp->b_dev = dev;
1972926Swnj bp->b_command = com;
1982926Swnj bp->b_repcnt = count;
19922Sbill bp->b_blkno = 0;
20022Sbill htstrategy(bp);
2012926Swnj if (count == 0)
2022926Swnj return;
20322Sbill iowait(bp);
2042926Swnj if (bp->b_flags&B_WANTED)
20522Sbill wakeup((caddr_t)bp);
2062926Swnj bp->b_flags &= B_ERROR;
20722Sbill }
20822Sbill
htstrategy(bp)20922Sbill htstrategy(bp)
2102926Swnj register struct buf *bp;
21122Sbill {
2123094Swnj register struct mba_device *mi = htinfo[HTUNIT(bp->b_dev)];
2132926Swnj register struct buf *dp;
2145436Sroot register int s;
21522Sbill
21622Sbill bp->av_forw = NULL;
2172926Swnj dp = &mi->mi_tab;
2185436Sroot s = spl5();
2192926Swnj if (dp->b_actf == NULL)
2202926Swnj dp->b_actf = bp;
22122Sbill else
2222926Swnj dp->b_actl->av_forw = bp;
2232926Swnj dp->b_actl = bp;
2242926Swnj if (dp->b_active == 0)
2252926Swnj mbustart(mi);
2265436Sroot splx(s);
22722Sbill }
22822Sbill
htustart(mi)2292926Swnj htustart(mi)
2302980Swnj register struct mba_device *mi;
23122Sbill {
2322926Swnj register struct htdevice *htaddr =
2332926Swnj (struct htdevice *)mi->mi_drv;
2342926Swnj register struct buf *bp = mi->mi_tab.b_actf;
2353094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(bp->b_dev)];
23622Sbill daddr_t blkno;
23722Sbill
2382926Swnj htaddr->httc = sc->sc_dens;
23915108Skarels #ifdef notdef
24015108Skarels /* unneeded, may hang controller */
2413181Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)] && bp->b_command == HT_SENSE) {
2423157Swnj htaddr->htcs1 = HT_SENSE|HT_GO;
2433157Swnj mbclrattn(mi);
2443157Swnj }
24515108Skarels #endif
2462926Swnj sc->sc_dsreg = htaddr->htds;
2472926Swnj sc->sc_erreg = htaddr->hter;
2482926Swnj sc->sc_resid = htaddr->htfc;
2492926Swnj sc->sc_flags &= ~(H_WRITTEN|H_REWIND);
2502926Swnj if ((htaddr->htdt & HTDT_SPR) == 0 || (htaddr->htds & HTDS_MOL) == 0)
2512926Swnj if (sc->sc_openf > 0)
2522926Swnj sc->sc_openf = -1;
2532926Swnj if (sc->sc_openf < 0) {
2542926Swnj bp->b_flags |= B_ERROR;
2552926Swnj return (MBU_NEXT);
2562926Swnj }
2573094Swnj if (bp != &chtbuf[HTUNIT(bp->b_dev)]) {
25834220Sbostic /* transfer: check positioning */
25934220Sbostic if (bp->b_flags & B_RAW) {
26034220Sbostic /* raw transfer: record position for retry */
26134220Sbostic if (mi->mi_tab.b_errcnt == 0) {
26234220Sbostic sc->sc_blkno = bdbtofsb(bp->b_blkno);
26334220Sbostic sc->sc_nxrec = sc->sc_blkno + 1;
26434220Sbostic }
26534220Sbostic } else {
26634220Sbostic if (bdbtofsb(bp->b_blkno) > sc->sc_nxrec) {
26734220Sbostic bp->b_flags |= B_ERROR;
26834220Sbostic bp->b_error = ENXIO;
26934220Sbostic return (MBU_NEXT);
27034220Sbostic }
27134220Sbostic if (bdbtofsb(bp->b_blkno) == sc->sc_nxrec &&
27234220Sbostic bp->b_flags&B_READ) {
27334220Sbostic bp->b_resid = bp->b_bcount;
27434220Sbostic clrbuf(bp);
27534220Sbostic return (MBU_NEXT);
27634220Sbostic }
27734220Sbostic if ((bp->b_flags&B_READ)==0)
27834220Sbostic sc->sc_nxrec = bdbtofsb(bp->b_blkno) + 1;
2793094Swnj }
2802926Swnj } else {
2812961Swnj if (bp->b_command == HT_SENSE)
2822926Swnj return (MBU_NEXT);
2832926Swnj if (bp->b_command == HT_REW)
2842926Swnj sc->sc_flags |= H_REWIND;
2852926Swnj else
2862926Swnj htaddr->htfc = -bp->b_bcount;
2872926Swnj htaddr->htcs1 = bp->b_command|HT_GO;
2882926Swnj return (MBU_STARTED);
2892926Swnj }
2907379Ssam if ((blkno = sc->sc_blkno) == bdbtofsb(bp->b_blkno)) {
2912926Swnj htaddr->htfc = -bp->b_bcount;
2922926Swnj if ((bp->b_flags&B_READ) == 0) {
2933094Swnj if (mi->mi_tab.b_errcnt) {
2943094Swnj if ((sc->sc_flags & H_ERASED) == 0) {
2952926Swnj sc->sc_flags |= H_ERASED;
2962926Swnj htaddr->htcs1 = HT_ERASE | HT_GO;
2972926Swnj return (MBU_STARTED);
2982926Swnj }
2993094Swnj sc->sc_flags &= ~H_ERASED;
3003094Swnj }
3012926Swnj if (htaddr->htds & HTDS_EOT) {
3022926Swnj bp->b_resid = bp->b_bcount;
3036812Swnj bp->b_flags |= B_ERROR;
3042926Swnj return (MBU_NEXT);
3052926Swnj }
30622Sbill }
3072926Swnj return (MBU_DODATA);
30822Sbill }
3097379Ssam if (blkno < bdbtofsb(bp->b_blkno)) {
3107379Ssam htaddr->htfc = blkno - bdbtofsb(bp->b_blkno);
3112926Swnj htaddr->htcs1 = HT_SFORW|HT_GO;
31222Sbill } else {
3137379Ssam htaddr->htfc = bdbtofsb(bp->b_blkno) - blkno;
3142926Swnj htaddr->htcs1 = HT_SREV|HT_GO;
31522Sbill }
3162926Swnj return (MBU_STARTED);
31722Sbill }
31822Sbill
htdtint(mi,mbsr)3193094Swnj htdtint(mi, mbsr)
3202980Swnj register struct mba_device *mi;
3213094Swnj int mbsr;
32222Sbill {
3232926Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
3242926Swnj register struct buf *bp = mi->mi_tab.b_actf;
3253094Swnj register struct tu_softc *sc;
3262961Swnj int ds, er, mbs;
32722Sbill
3283094Swnj sc = &tu_softc[TUUNIT(bp->b_dev)];
3292926Swnj ds = sc->sc_dsreg = MASKREG(htaddr->htds);
3302926Swnj er = sc->sc_erreg = MASKREG(htaddr->hter);
3312926Swnj sc->sc_resid = MASKREG(htaddr->htfc);
3323094Swnj mbs = mbsr;
3332926Swnj sc->sc_blkno++;
3342926Swnj if((bp->b_flags & B_READ) == 0)
3352926Swnj sc->sc_flags |= H_WRITTEN;
3363094Swnj if ((ds&(HTDS_ERR|HTDS_MOL)) != HTDS_MOL || mbs & MBSR_EBITS) {
3372926Swnj htaddr->htcs1 = HT_DCLR|HT_GO;
3382961Swnj mbclrattn(mi);
33934220Sbostic if (bp->b_flags & B_RAW) {
3402926Swnj er &= ~HTER_FCE;
3413094Swnj mbs &= ~(MBSR_DTABT|MBSR_MBEXC);
3424276Sroot }
3432926Swnj if (bp->b_flags & B_READ && ds & HTDS_PES)
3442926Swnj er &= ~(HTER_CSITM|HTER_CORCRC);
3453094Swnj if (er&HTER_HARD || mbs&MBSR_EBITS || (ds&HTDS_MOL) == 0 ||
3462961Swnj er && ++mi->mi_tab.b_errcnt >= 7) {
3472926Swnj if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
3482926Swnj sc->sc_openf = -1;
3493157Swnj if ((er&HTER_HARD) == HTER_FCE &&
3503157Swnj (mbs&MBSR_EBITS) == (MBSR_DTABT|MBSR_MBEXC) &&
3513157Swnj (ds&HTDS_MOL))
3523157Swnj goto noprint;
35345622Storek tprintf(sc->sc_tpr,
35445622Storek "tu%d: hard error bn%d mbsr=%b er=%b ds=%b\n",
3552980Swnj TUUNIT(bp->b_dev), bp->b_blkno,
3563094Swnj mbsr, mbsr_bits,
3573204Swnj sc->sc_erreg, hter_bits,
3583204Swnj sc->sc_dsreg, htds_bits);
3593157Swnj noprint:
36022Sbill bp->b_flags |= B_ERROR;
3612926Swnj return (MBD_DONE);
36222Sbill }
3632926Swnj if (er)
3642926Swnj return (MBD_RETRY);
36522Sbill }
3662926Swnj bp->b_resid = 0;
36730918Skarels sc->sc_blks++;
36830918Skarels if (mi->mi_tab.b_errcnt)
36930918Skarels sc->sc_softerrs++;
3702926Swnj if (bp->b_flags & B_READ)
3712926Swnj if (ds&HTDS_TM) { /* must be a read, right? */
3722926Swnj bp->b_resid = bp->b_bcount;
3737379Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno);
3742926Swnj } else if(bp->b_bcount > MASKREG(htaddr->htfc))
3752926Swnj bp->b_resid = bp->b_bcount - MASKREG(htaddr->htfc);
3762926Swnj return (MBD_DONE);
3772926Swnj }
37822Sbill
htndtint(mi)3792926Swnj htndtint(mi)
3802980Swnj register struct mba_device *mi;
3812926Swnj {
3822926Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
3832926Swnj register struct buf *bp = mi->mi_tab.b_actf;
3843094Swnj register struct tu_softc *sc;
3852926Swnj int er, ds, fc;
38622Sbill
3873094Swnj ds = MASKREG(htaddr->htds);
3883094Swnj er = MASKREG(htaddr->hter);
3893094Swnj fc = MASKREG(htaddr->htfc);
3903094Swnj if (er) {
3912926Swnj htaddr->htcs1 = HT_DCLR|HT_GO;
3922961Swnj mbclrattn(mi);
3932961Swnj }
3943094Swnj if (bp == 0)
3953094Swnj return (MBN_SKIP);
3963094Swnj sc = &tu_softc[TUUNIT(bp->b_dev)];
3973094Swnj sc->sc_dsreg = ds;
3983094Swnj sc->sc_erreg = er;
3993094Swnj sc->sc_resid = fc;
4003094Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
40126290Skarels switch ((int)bp->b_command) {
4023094Swnj case HT_REWOFFL:
4032926Swnj /* offline is on purpose; don't do anything special */
4042926Swnj ds |= HTDS_MOL;
4053094Swnj break;
4063094Swnj case HT_SREV:
4073094Swnj /* if backspace file hit bot, its not an error */
4083094Swnj if (er == (HTER_NEF|HTER_FCE) && ds&HTDS_BOT &&
4093094Swnj bp->b_repcnt == INF)
4103094Swnj er &= ~HTER_NEF;
4113094Swnj break;
4123094Swnj }
4132926Swnj er &= ~HTER_FCE;
4142926Swnj if (er == 0)
4152926Swnj ds &= ~HTDS_ERR;
41622Sbill }
4172926Swnj if ((ds & (HTDS_ERR|HTDS_MOL)) != HTDS_MOL) {
4182926Swnj if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
4192926Swnj sc->sc_openf = -1;
42045622Storek tprintf(sc->sc_tpr, "tu%d: hard error bn%d er=%b ds=%b\n",
4212980Swnj TUUNIT(bp->b_dev), bp->b_blkno,
4223204Swnj sc->sc_erreg, hter_bits, sc->sc_dsreg, htds_bits);
4232926Swnj bp->b_flags |= B_ERROR;
4242926Swnj return (MBN_DONE);
4252926Swnj }
4263094Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
4272926Swnj if (sc->sc_flags & H_REWIND)
4282926Swnj return (ds & HTDS_BOT ? MBN_DONE : MBN_RETRY);
4292926Swnj bp->b_resid = -sc->sc_resid;
4302926Swnj return (MBN_DONE);
4312926Swnj }
4322926Swnj if (ds & HTDS_TM)
4337379Ssam if (sc->sc_blkno > bdbtofsb(bp->b_blkno)) {
4347379Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno) - fc;
4352926Swnj sc->sc_blkno = sc->sc_nxrec;
4363094Swnj } else {
4377379Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno) + fc;
4382926Swnj sc->sc_nxrec = sc->sc_blkno - 1;
4392926Swnj }
4402926Swnj else
4417379Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno);
4422926Swnj return (MBN_RETRY);
44322Sbill }
44422Sbill
4452926Swnj /*ARGSUSED*/
htioctl(dev,cmd,data,flag)4467636Ssam htioctl(dev, cmd, data, flag)
4472926Swnj dev_t dev;
4482926Swnj int cmd;
4497636Ssam caddr_t data;
4502926Swnj int flag;
4512926Swnj {
4523094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];
4533094Swnj register struct buf *bp = &chtbuf[HTUNIT(dev)];
4542926Swnj register callcount;
45545622Storek int fcount;
4567636Ssam struct mtop *mtop;
4577636Ssam struct mtget *mtget;
4582926Swnj /* we depend of the values and order of the MT codes here */
4592926Swnj static htops[] =
4602926Swnj {HT_WEOF,HT_SFORW,HT_SREV,HT_SFORW,HT_SREV,HT_REW,HT_REWOFFL,HT_SENSE};
4611917Swnj
4622926Swnj switch (cmd) {
4637636Ssam
4647636Ssam case MTIOCTOP: /* tape operation */
4657636Ssam mtop = (struct mtop *)data;
4667636Ssam switch (mtop->mt_op) {
4677636Ssam
4682926Swnj case MTWEOF:
4697636Ssam callcount = mtop->mt_count;
4702926Swnj fcount = 1;
4712926Swnj break;
4727636Ssam
4732926Swnj case MTFSF: case MTBSF:
4747636Ssam callcount = mtop->mt_count;
4752926Swnj fcount = INF;
4762926Swnj break;
4777636Ssam
4782926Swnj case MTFSR: case MTBSR:
4792926Swnj callcount = 1;
4807636Ssam fcount = mtop->mt_count;
4812926Swnj break;
4827636Ssam
4832926Swnj case MTREW: case MTOFFL:
4842926Swnj callcount = 1;
4852926Swnj fcount = 1;
4862926Swnj break;
4877636Ssam
4882926Swnj default:
4898580Sroot return (ENXIO);
4902926Swnj }
4918580Sroot if (callcount <= 0 || fcount <= 0)
4928580Sroot return (EINVAL);
4932926Swnj while (--callcount >= 0) {
4947636Ssam htcommand(dev, htops[mtop->mt_op], fcount);
4957636Ssam if ((mtop->mt_op == MTFSR || mtop->mt_op == MTBSR) &&
4968580Sroot bp->b_resid)
4978580Sroot return (EIO);
4983094Swnj if ((bp->b_flags&B_ERROR) || sc->sc_dsreg&HTDS_BOT)
4992926Swnj break;
5002926Swnj }
50140909Ssklower if (bp->b_flags&B_ERROR)
50245622Storek return (bp->b_error ? bp->b_error : EIO);
50345622Storek return (0);
5047636Ssam
5052926Swnj case MTIOCGET:
5067636Ssam mtget = (struct mtget *)data;
5077636Ssam mtget->mt_dsreg = sc->sc_dsreg;
5087636Ssam mtget->mt_erreg = sc->sc_erreg;
5097636Ssam mtget->mt_resid = sc->sc_resid;
5107636Ssam mtget->mt_type = MT_ISHT;
5118580Sroot break;
5127636Ssam
5132926Swnj default:
5148580Sroot return (ENXIO);
5152926Swnj }
5168580Sroot return (0);
5172926Swnj }
5182926Swnj
5191917Swnj #define DBSIZE 20
5201917Swnj
htdump()5212926Swnj htdump()
5221917Swnj {
5232980Swnj register struct mba_device *mi;
5242926Swnj register struct mba_regs *mp;
5252926Swnj register struct htdevice *htaddr;
5262926Swnj int blk, num;
5272926Swnj int start;
5281917Swnj
5292926Swnj start = 0;
5302926Swnj num = maxfree;
5312926Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff))
5322926Swnj if (htinfo[0] == 0)
5332926Swnj return (ENXIO);
5342980Swnj mi = phys(htinfo[0], struct mba_device *);
5352926Swnj mp = phys(mi->mi_hd, struct mba_hd *)->mh_physmba;
5363157Swnj mp->mba_cr = MBCR_IE;
5372926Swnj htaddr = (struct htdevice *)&mp->mba_drv[mi->mi_drive];
5382926Swnj htaddr->httc = HTTC_PDP11|HTTC_1600BPI;
5392926Swnj htaddr->htcs1 = HT_DCLR|HT_GO;
5401917Swnj while (num > 0) {
5411917Swnj blk = num > DBSIZE ? DBSIZE : num;
5422926Swnj htdwrite(start, blk, htaddr, mp);
5432926Swnj start += blk;
5441917Swnj num -= blk;
5451917Swnj }
5463157Swnj hteof(htaddr);
5473157Swnj hteof(htaddr);
5482926Swnj htwait(htaddr);
5493181Swnj if (htaddr->htds&HTDS_ERR)
5503157Swnj return (EIO);
5512926Swnj htaddr->htcs1 = HT_REW|HT_GO;
5523103Swnj return (0);
5531917Swnj }
5541917Swnj
htdwrite(dbuf,num,htaddr,mp)5552926Swnj htdwrite(dbuf, num, htaddr, mp)
5562926Swnj register dbuf, num;
5572926Swnj register struct htdevice *htaddr;
5582926Swnj struct mba_regs *mp;
5591917Swnj {
5602926Swnj register struct pte *io;
5611917Swnj register int i;
5621917Swnj
5632926Swnj htwait(htaddr);
5642926Swnj io = mp->mba_map;
5651917Swnj for (i = 0; i < num; i++)
5662926Swnj *(int *)io++ = dbuf++ | PG_V;
5672926Swnj htaddr->htfc = -(num*NBPG);
5682926Swnj mp->mba_sr = -1;
5692926Swnj mp->mba_bcr = -(num*NBPG);
5702926Swnj mp->mba_var = 0;
5712926Swnj htaddr->htcs1 = HT_WCOM|HT_GO;
5721917Swnj }
5731917Swnj
5742926Swnj htwait(htaddr)
5752926Swnj struct htdevice *htaddr;
5761917Swnj {
5771917Swnj register s;
5781917Swnj
5791917Swnj do
5802926Swnj s = htaddr->htds;
5812926Swnj while ((s & HTDS_DRY) == 0);
5821917Swnj }
5831917Swnj
5842926Swnj hteof(htaddr)
5852926Swnj struct htdevice *htaddr;
5861917Swnj {
5871917Swnj
5882926Swnj htwait(htaddr);
5892926Swnj htaddr->htcs1 = HT_WEOF|HT_GO;
5901917Swnj }
5911563Sbill #endif
592