xref: /csrg-svn/sys/vax/mba/hp.c (revision 7635)
1*7635Ssam /*	hp.c	4.51	82/08/01	*/
23706Sroot 
33706Sroot #ifdef HPDEBUG
43289Swnj int	hpdebug;
53706Sroot #endif
63706Sroot #ifdef HPBDEBUG
73706Sroot int	hpbdebug;
83706Sroot #endif
921Sbill 
101939Swnj #include "hp.h"
111565Sbill #if NHP > 0
1221Sbill /*
135726Sroot  * HP disk driver for RP0x+RMxx+ML11
142827Swnj  *
152827Swnj  * TODO:
163706Sroot  *	check RM80 skip sector handling when ECC's occur later
173093Swnj  *	check offset recovery handling
183706Sroot  *	see if DCLR and/or RELEASE set attention status
193706Sroot  *	print bits of mr && mr2 symbolically
2021Sbill  */
2121Sbill 
2221Sbill #include "../h/param.h"
2321Sbill #include "../h/systm.h"
24305Sbill #include "../h/dk.h"
2521Sbill #include "../h/buf.h"
2621Sbill #include "../h/conf.h"
2721Sbill #include "../h/dir.h"
2821Sbill #include "../h/user.h"
2921Sbill #include "../h/map.h"
30420Sbill #include "../h/pte.h"
312978Swnj #include "../h/mbareg.h"
322978Swnj #include "../h/mbavar.h"
3321Sbill #include "../h/mtpr.h"
34420Sbill #include "../h/vm.h"
352362Swnj #include "../h/cmap.h"
363706Sroot #include "../h/dkbad.h"
37*7635Ssam #include "../h/ioctl.h"
385726Sroot #include "../h/dkio.h"
3921Sbill 
402383Swnj #include "../h/hpreg.h"
4121Sbill 
422383Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */
432383Swnj struct	size {
4421Sbill 	daddr_t	nblocks;
4521Sbill 	int	cyloff;
463706Sroot } hp6_sizes[8] = {
47886Sbill 	15884,	0,		/* A=cyl 0 thru 37 */
48886Sbill 	33440,	38,		/* B=cyl 38 thru 117 */
49886Sbill 	340670,	0,		/* C=cyl 0 thru 814 */
5021Sbill 	0,	0,
5121Sbill 	0,	0,
5221Sbill 	0,	0,
533726Sroot #ifndef NOBADSECT
543729Sroot 	291280,	118,		/* G=cyl 118 thru 814 */
553706Sroot #else
563706Sroot 	291346,	118,
573706Sroot #endif
5821Sbill 	0,	0,
593706Sroot }, rm3_sizes[8] = {
60886Sbill 	15884,	0,		/* A=cyl 0 thru 99 */
61886Sbill 	33440,	100,		/* B=cyl 100 thru 309 */
62886Sbill 	131680,	0,		/* C=cyl 0 thru 822 */
6321Sbill 	0,	0,
6421Sbill 	0,	0,
653442Sroot 	0,	0,
663726Sroot #ifndef NOBADSECT
673729Sroot 	81984,	310,		/* G=cyl 310 thru 822 */
683706Sroot #else
693706Sroot 	82080,	310,
703706Sroot #endif
7121Sbill 	0,	0,
72886Sbill }, rm5_sizes[8] = {
736927Ssam #ifndef CAD
74886Sbill 	15884,	0,		/* A=cyl 0 thru 26 */
75886Sbill 	33440,	27,		/* B=cyl 27 thru 81 */
763271Swnj 	500384,	0,		/* C=cyl 0 thru 822 */
77886Sbill 	15884,	562,		/* D=cyl 562 thru 588 */
78886Sbill 	55936,	589,		/* E=cyl 589 thru 680 */
793726Sroot #ifndef NOBADSECT
803729Sroot 	86240,	681,		/* F=cyl 681 thru 822 */
813729Sroot 	158592,	562,		/* G=cyl 562 thru 822 */
823706Sroot #else
835695Sroot 	86336,	681,
843706Sroot 	158688,	562,
853706Sroot #endif
86886Sbill 	291346,	82,		/* H=cyl 82 thru 561 */
876927Ssam #else
886927Ssam 	15884,	0,		/* A=cyl 0 thru 26 */
896927Ssam 	33440,	27,		/* B=cyl 27 thru 81 */
906927Ssam 	495520,	0,		/* C=cyl 0 thru 814 */
916927Ssam 	15884,	562,		/* D=cyl 562 thru 588 */
926927Ssam 	55936,	589,		/* E=cyl 589 thru 680 */
936927Ssam #ifndef NOBADSECT
946927Ssam 	81376,	681,		/* F=cyl 681 thru 814 */
956927Ssam 	153728,	562,		/* G=cyl 562 thru 814 */
966927Ssam #else
976927Ssam 	81472,	681,
986927Ssam 	153824,	562,
996927Ssam #endif
1006927Ssam 	291346,	82,		/* H=cyl 82 thru 561 */
1016927Ssam #endif
1022383Swnj }, rm80_sizes[8] = {
1032383Swnj 	15884,	0,		/* A=cyl 0 thru 36 */
1042383Swnj 	33440,	37,		/* B=cyl 37 thru 114 */
1052383Swnj 	242606,	0,		/* C=cyl 0 thru 558 */
1062383Swnj 	0,	0,
1072383Swnj 	0,	0,
1082383Swnj 	0,	0,
1092383Swnj 	82080,	115,		/* G=cyl 115 thru 304 */
1103729Sroot 	110143,	305,		/* H=cyl 305 thru 558 */
1113706Sroot }, hp7_sizes[8] = {
1126927Ssam 	15884,	0,		/* A=cyl 0 thru 9 */
1133706Sroot 	64000,	10,		/* B=cyl 10 thru 49 */
1143706Sroot 	1008000,0,		/* C=cyl 0 thru 629 */
1153706Sroot 	15884,	330,		/* D=cyl 330 thru 339 */
1163706Sroot 	256000,	340,		/* E=cyl 340 thru 499 */
1173729Sroot 	207850,	500,		/* F=cyl 500 thru 629 */
1183729Sroot 	479850,	330,		/* G=cyl 330 thru 629 */
1193706Sroot 	448000,	50,		/* H=cyl 50 thru 329 */
1206927Ssam }, si9775_sizes[8] = {
1216927Ssam 	16640,	  0,		/* A=cyl   0 thru  12 */
1226927Ssam 	34560,	 13,		/* B=cyl  13 thru  39 */
1236927Ssam 	1079040,  0,		/* C=cyl   0 thru 842 - whole disk */
1246927Ssam 	0,	  0,		/* D unused */
1256927Ssam 	0,	  0,		/* E unused */
1266927Ssam 	0,	  0,		/* F unused */
1276927Ssam 	513280,	 40,		/* G=cyl  40 thru 440 */
1286927Ssam 	513280,	441,		/* H=cyl 441 thru 841 */
1296927Ssam }, si9730_sizes[8] = {
1306927Ssam 	15884,	0,		/* A=cyl 0 thru 49 */
1316927Ssam 	33440,	50,		/* B=cyl 50 thru 154 */
1326927Ssam 	263360,	0,		/* C=cyl 0 thru 822 */
1336927Ssam 	0,	0,
1346927Ssam 	0,	0,
1356927Ssam 	0,	0,
1366927Ssam 	0,	0,
1376927Ssam #ifndef NOBADSECT
1386927Ssam 	213664,	155,		/* H=cyl 155 thru 822 */
1396927Ssam #else
1406927Ssam 	213760,	155,
1416927Ssam #endif
1426927Ssam }, hpam_sizes[8] = {
1436927Ssam 	15884,	0,		/* A=cyl 0 thru 31 */
1446927Ssam 	33440,	32,		/* B=cyl 32 thru 97 */
1456927Ssam 	524288,	0,		/* C=cyl 0 thru 1023 */
1466927Ssam 	27786,	668,
1476927Ssam 	27786,	723,
1486927Ssam 	125440,	778,
1496927Ssam 	181760,	668,		/* G=cyl 668 thru 1022 */
1506927Ssam 	291346,	98,		/* H=cyl 98 thru 667 */
15121Sbill };
1522383Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */
15321Sbill 
1542383Swnj #define	_hpSDIST	2
1552383Swnj #define	_hpRDIST	3
1562383Swnj 
1572383Swnj int	hpSDIST = _hpSDIST;
1582383Swnj int	hpRDIST = _hpRDIST;
1592383Swnj 
1606927Ssam /*
1616927Ssam  * Table for converting Massbus drive types into
1626927Ssam  * indices into the partition tables.  Slots are
1636927Ssam  * left for those drives devined from other means
1646927Ssam  * (e.g. SI, AMPEX, etc.).
1656927Ssam  */
1666927Ssam short	hptypes[] = {
1676927Ssam #define	HPDT_RM03	0
1686927Ssam 	MBDT_RM03,
1696927Ssam #define	HPDT_RM05	1
1706927Ssam 	MBDT_RM05,
1716927Ssam #define	HPDT_RP06	2
1726927Ssam 	MBDT_RP06,
1736927Ssam #define	HPDT_RM80	3
1746927Ssam 	MBDT_RM80,
1756927Ssam #define	HPDT_RP05	4
1766927Ssam 	MBDT_RP05,
1776927Ssam #define	HPDT_RP07	5
1786927Ssam 	MBDT_RP07,
1796927Ssam #define	HPDT_ML11A	6
1806927Ssam 	MBDT_ML11A,
1816927Ssam #define	HPDT_ML11B	7
1826927Ssam 	MBDT_ML11B,
1836927Ssam #define	HPDT_9775	8
1846927Ssam 	-1,
1856927Ssam #define	HPDT_9730	9
1866927Ssam 	-1,
1876927Ssam #define	HPDT_CAPRICORN	10
1886927Ssam 	-1,
1896927Ssam #define	HPDT_RM02	11
1906927Ssam 	MBDT_RM02,		/* beware, actually capricorn */
1916927Ssam 	0
1926927Ssam };
1932978Swnj struct	mba_device *hpinfo[NHP];
1942978Swnj int	hpattach(),hpustart(),hpstart(),hpdtint();
1952383Swnj struct	mba_driver hpdriver =
1962978Swnj 	{ hpattach, 0, hpustart, hpstart, hpdtint, 0,
1972978Swnj 	  hptypes, "hp", 0, hpinfo };
1982383Swnj 
1992383Swnj struct hpst {
2002383Swnj 	short	nsect;
2012383Swnj 	short	ntrak;
2022383Swnj 	short	nspc;
2032383Swnj 	short	ncyl;
2042383Swnj 	struct	size *sizes;
2052383Swnj } hpst[] = {
2063706Sroot 	32,	5,	32*5,	823,	rm3_sizes,	/* RM03 */
2072383Swnj 	32,	19,	32*19,	823,	rm5_sizes,	/* RM05 */
2083706Sroot 	22,	19,	22*19,	815,	hp6_sizes,	/* RP06 */
2093706Sroot 	31,	14, 	31*14,	559,	rm80_sizes,	/* RM80 */
2103706Sroot 	22,	19,	22*19,	411,	hp6_sizes,	/* RP05 */
2113706Sroot 	50,	32,	50*32,	630,	hp7_sizes,	/* RP07 */
2125726Sroot 	1,	1,	1,	1,	0,		/* ML11A */
2135726Sroot 	1,	1,	1,	1,	0,		/* ML11B */
2146927Ssam 	32,	40,	32*40,	843,	si9775_sizes,	/* 9775 */
2156927Ssam 	32,	10,	32*10,	823,	si9730_sizes,	/* 9730 */
2166927Ssam 	32,	16,	32*16,	1024,	hpam_sizes,	/* AMPEX capricorn */
2172383Swnj };
2182383Swnj 
2192624Swnj u_char	hp_offset[16] = {
2203093Swnj     HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400,
2213093Swnj     HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800,
2223093Swnj     HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200,
2233093Swnj     0, 0, 0, 0,
22421Sbill };
22521Sbill 
2262624Swnj struct	buf	rhpbuf[NHP];
2273726Sroot #ifndef NOBADSECT
2283706Sroot struct	buf	bhpbuf[NHP];
2293706Sroot struct	dkbad	hpbad[NHP];
2303706Sroot #endif
2315726Sroot /* SHOULD CONSOLIDATE ALL THIS STUFF INTO A STRUCTURE */
2323706Sroot char	hpinit[NHP];
2332892Swnj char	hprecal[NHP];
2345726Sroot char	hphdr[NHP];
2355726Sroot daddr_t	mlsize[NHP];
23621Sbill 
23721Sbill #define	b_cylin b_resid
23821Sbill 
2395726Sroot /* #define ML11 0  to remove ML11 support */
2405726Sroot #define	ML11	(hptypes[mi->mi_type] == MBDT_ML11A)
2415726Sroot #define	RP06	(hptypes[mi->mi_type] <= MBDT_RP06)
2425726Sroot #define	RM80	(hptypes[mi->mi_type] == MBDT_RM80)
2435726Sroot 
24421Sbill #ifdef INTRLVE
24521Sbill daddr_t dkblock();
24621Sbill #endif
24721Sbill 
2482604Swnj int	hpseek;
2492604Swnj 
2502978Swnj /*ARGSUSED*/
2512978Swnj hpattach(mi, slave)
2522978Swnj 	struct mba_device *mi;
2532604Swnj {
2546927Ssam 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
2556927Ssam 
2566927Ssam 	switch (mi->mi_type) {
2576927Ssam 
2586927Ssam 	/*
2596927Ssam 	 * Model-byte processing for SI 9400 controllers.
2606927Ssam 	 * NB:  Only deals with RM03 and RM05 emulations.
2616927Ssam 	 */
2626927Ssam 	case HPDT_RM03:
2636927Ssam 	case HPDT_RM05: {
2646927Ssam 		register int hpsn;
2656927Ssam 
2666927Ssam 		hpsn = hpaddr->hpsn;
2676927Ssam 		if ((hpsn & SIMB_LU) != mi->mi_drive)
2686927Ssam 			break;
2696927Ssam 		switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) {
2706927Ssam 
2716927Ssam 		case SI9775D:
2726927Ssam 			printf("hp%d: si 9775 (direct)\n", mi->mi_unit);
2736927Ssam 			mi->mi_type = HPDT_9775;
2746927Ssam 			break;
2756927Ssam 
2766927Ssam 		case SI9730D:
2776927Ssam 			printf("hp%d: si 9730 (direct)\n", mi->mi_unit);
2786927Ssam 			mi->mi_type = HPDT_9730;
2796927Ssam 			break;
2806927Ssam 
2816927Ssam #ifdef CAD
2827035Swnj 		/*
2837035Swnj 		 * AMPEX 9300, SI Combination needs a have the drive cleared
2847035Swnj 		 * before we start.  We do not know why, but tests show
2857035Swnj 		 * that the recalibrate fixes the problem.
2867035Swnj 		 */
2876927Ssam 		case SI9766:
2886927Ssam 			printf("hp%d: 9776/9300\n", mi->mi_unit);
2896927Ssam 			mi->mi_type = HPDT_RM05;
2907035Swnj 			hpaddr->hpcs1 = HP_RECAL|HP_GO;
2917035Swnj 			DELAY(100000);
2926927Ssam 			break;
2936927Ssam 
2946927Ssam 		case SI9762:
2956927Ssam 			printf("hp%d: 9762\n", mi->mi_unit);
2966927Ssam 			mi->mi_type = HPDT_RM03;
2976927Ssam 			break;
2986927Ssam #endif
2996927Ssam 		}
3006927Ssam 		break;
3016927Ssam 		}
3026927Ssam 
3036927Ssam 	/*
3046927Ssam 	 * CAPRICORN KLUDGE...poke the holding register
3056927Ssam 	 * to find out the number of tracks.  If it's 15
3066927Ssam 	 * we believe it's a Capricorn.
3076927Ssam 	 */
3086927Ssam 	case HPDT_RM02:
3096927Ssam 		hpaddr->hpcs1 = HP_NOP;
3106927Ssam 		hpaddr->hphr = HPHR_MAXTRAK;
3117313Ssam 		if ((hpaddr->hphr&0xffff) == 15) {
3126927Ssam 			printf("hp%d: capricorn\n", mi->mi_unit);
3136927Ssam 			mi->mi_type = HPDT_CAPRICORN;
3146927Ssam 		}
3156927Ssam 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
3166927Ssam 		break;
3176927Ssam 
3186927Ssam 	case HPDT_ML11A:
3196927Ssam 	case HPDT_ML11B: {
3205726Sroot 		register int trt, sz;
3212604Swnj 
3225726Sroot 		sz = hpaddr->hpmr & HPMR_SZ;
3235726Sroot 		if ((hpaddr->hpmr & HPMR_ARRTYP) == 0)
3245726Sroot 			sz >>= 2;
3255726Sroot 		mlsize[mi->mi_unit] = sz;
3265726Sroot 		if (mi->mi_dk >= 0) {
3275726Sroot 			trt = (hpaddr->hpmr & HPMR_TRT) >> 8;
3285726Sroot 			dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt));
3295726Sroot 		}
3306927Ssam 		/* A CHEAT - ML11B D.T. SHOULD == ML11A */
3316927Ssam 		mi->mi_type = HPDT_ML11A;
3326927Ssam 		break;
3336927Ssam 		}
3346927Ssam 	}
3356927Ssam 	if (!ML11 && mi->mi_dk >= 0) {
3365726Sroot 		register struct hpst *st = &hpst[mi->mi_type];
3375726Sroot 
3382757Swnj 		dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256);
3395726Sroot 	}
3402604Swnj }
3412604Swnj 
34221Sbill hpstrategy(bp)
3432383Swnj 	register struct buf *bp;
34421Sbill {
3452978Swnj 	register struct mba_device *mi;
3462383Swnj 	register struct hpst *st;
3472383Swnj 	register int unit;
34821Sbill 	long sz, bn;
3492383Swnj 	int xunit = minor(bp->b_dev) & 07;
3505432Sroot 	int s;
35121Sbill 
35221Sbill 	sz = bp->b_bcount;
35321Sbill 	sz = (sz+511) >> 9;
35421Sbill 	unit = dkunit(bp);
3552383Swnj 	if (unit >= NHP)
3562383Swnj 		goto bad;
3572383Swnj 	mi = hpinfo[unit];
3582395Swnj 	if (mi == 0 || mi->mi_alive == 0)
3592383Swnj 		goto bad;
3602383Swnj 	st = &hpst[mi->mi_type];
3615726Sroot 	if (ML11) {
3625726Sroot 		if (bp->b_blkno < 0 ||
3635726Sroot 		    dkblock(bp)+sz > mlsize[mi->mi_unit])
3645726Sroot 			goto bad;
3655726Sroot 		bp->b_cylin = 0;
3665726Sroot 	} else {
3675726Sroot 		if (bp->b_blkno < 0 ||
3685726Sroot 		    (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks)
3695726Sroot 			goto bad;
3705726Sroot 		bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff;
3715726Sroot 	}
3725432Sroot 	s = spl5();
3732383Swnj 	disksort(&mi->mi_tab, bp);
3742383Swnj 	if (mi->mi_tab.b_active == 0)
3752383Swnj 		mbustart(mi);
3765432Sroot 	splx(s);
3772383Swnj 	return;
3782383Swnj 
3792383Swnj bad:
3802383Swnj 	bp->b_flags |= B_ERROR;
3812383Swnj 	iodone(bp);
3822383Swnj 	return;
38321Sbill }
38421Sbill 
3852383Swnj hpustart(mi)
3862978Swnj 	register struct mba_device *mi;
38721Sbill {
3882624Swnj 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
3892383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
3903706Sroot 	register struct hpst *st = &hpst[mi->mi_type];
39121Sbill 	daddr_t bn;
3923102Swnj 	int sn, dist;
39321Sbill 
3943706Sroot 	hpaddr->hpcs1 = 0;
3952624Swnj 	if ((hpaddr->hpcs1&HP_DVA) == 0)
3962383Swnj 		return (MBU_BUSY);
3973706Sroot 	if ((hpaddr->hpds & HPDS_VV) == 0 || hpinit[mi->mi_unit] == 0) {
3983726Sroot #ifndef NOBADSECT
3993706Sroot 		struct buf *bbp = &bhpbuf[mi->mi_unit];
4003706Sroot #endif
4013706Sroot 
4023706Sroot 		hpinit[mi->mi_unit] = 1;
4032624Swnj 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
4043140Swnj 		if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive))
4053140Swnj 			printf("DCLR attn\n");
4062624Swnj 		hpaddr->hpcs1 = HP_PRESET|HP_GO;
4075726Sroot 		if (!ML11)
4085726Sroot 			hpaddr->hpof = HPOF_FMT22;
4093140Swnj 		mbclrattn(mi);
4103726Sroot #ifndef NOBADSECT
4115726Sroot 		if (!ML11) {
4125726Sroot 			bbp->b_flags = B_READ|B_BUSY;
4135726Sroot 			bbp->b_dev = bp->b_dev;
4145726Sroot 			bbp->b_bcount = 512;
4155726Sroot 			bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit];
4165726Sroot 			bbp->b_blkno = st->ncyl*st->nspc - st->nsect;
4175726Sroot 			bbp->b_cylin = st->ncyl - 1;
4185726Sroot 			mi->mi_tab.b_actf = bbp;
4195726Sroot 			bbp->av_forw = bp;
4205726Sroot 			bp = bbp;
4215726Sroot 		}
4223706Sroot #endif
42321Sbill 	}
4242604Swnj 	if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1)
4252383Swnj 		return (MBU_DODATA);
4265726Sroot 	if (ML11)
4275726Sroot 		return (MBU_DODATA);
4283093Swnj 	if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY)
4292383Swnj 		return (MBU_DODATA);
4302395Swnj 	bn = dkblock(bp);
4312395Swnj 	sn = bn%st->nspc;
4322395Swnj 	sn = (sn+st->nsect-hpSDIST)%st->nsect;
4332383Swnj 	if (bp->b_cylin == (hpaddr->hpdc & 0xffff)) {
4342604Swnj 		if (hpseek)
4352383Swnj 			return (MBU_DODATA);
4362383Swnj 		dist = ((hpaddr->hpla & 0xffff)>>6) - st->nsect + 1;
4372383Swnj 		if (dist < 0)
4382383Swnj 			dist += st->nsect;
4392383Swnj 		if (dist > st->nsect - hpRDIST)
4402383Swnj 			return (MBU_DODATA);
4412614Swnj 	} else
4422614Swnj 		hpaddr->hpdc = bp->b_cylin;
4432604Swnj 	if (hpseek)
4442624Swnj 		hpaddr->hpcs1 = HP_SEEK|HP_GO;
445305Sbill 	else {
446305Sbill 		hpaddr->hpda = sn;
4472624Swnj 		hpaddr->hpcs1 = HP_SEARCH|HP_GO;
448305Sbill 	}
4492383Swnj 	return (MBU_STARTED);
45021Sbill }
45121Sbill 
4522383Swnj hpstart(mi)
4532978Swnj 	register struct mba_device *mi;
45421Sbill {
4552624Swnj 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
4562383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
4572383Swnj 	register struct hpst *st = &hpst[mi->mi_type];
45821Sbill 	daddr_t bn;
4592383Swnj 	int sn, tn;
46021Sbill 
46121Sbill 	bn = dkblock(bp);
4625726Sroot 	if (ML11)
4635726Sroot 		hpaddr->hpda = bn;
4645726Sroot 	else {
4655726Sroot 		sn = bn%st->nspc;
4665726Sroot 		tn = sn/st->nsect;
4675726Sroot 		sn %= st->nsect;
4685726Sroot 		hpaddr->hpdc = bp->b_cylin;
4695726Sroot 		hpaddr->hpda = (tn << 8) + sn;
4705726Sroot 	}
4715726Sroot 	if (hphdr[mi->mi_unit]) {
4725726Sroot 		if (bp->b_flags & B_READ)
4735726Sroot 			return (HP_RHDR|HP_GO);
4745726Sroot 		else
4755726Sroot 			return (HP_WHDR|HP_GO);
4765726Sroot 	}
4775726Sroot 	return (0);
47821Sbill }
47921Sbill 
4803102Swnj hpdtint(mi, mbsr)
4812978Swnj 	register struct mba_device *mi;
4823102Swnj 	int mbsr;
48321Sbill {
4842624Swnj 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
4852383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
4865893Swnj 	register int er1, er2;
4872826Swnj 	int retry = 0;
48821Sbill 
4893726Sroot #ifndef NOBADSECT
4903706Sroot 	if (bp->b_flags&B_BAD) {
4913706Sroot 		if (hpecc(mi, CONT))
4923706Sroot 			return(MBD_RESTARTED);
4933706Sroot 	}
4943706Sroot #endif
4953102Swnj 	if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) {
4963706Sroot #ifdef HPDEBUG
4973289Swnj 		if (hpdebug) {
4983706Sroot 			int dc = hpaddr->hpdc, da = hpaddr->hpda;
4993706Sroot 
5003706Sroot 			printf("hperr: bp %x cyl %d blk %d as %o ",
5013706Sroot 				bp, bp->b_cylin, bp->b_blkno,
5023706Sroot 				hpaddr->hpas&0xff);
5033706Sroot 			printf("dc %x da %x\n",dc&0xffff, da&0xffff);
5043289Swnj 			printf("errcnt %d ", mi->mi_tab.b_errcnt);
5053289Swnj 			printf("mbsr=%b ", mbsr, mbsr_bits);
5063289Swnj 			printf("er1=%b er2=%b\n",
5073289Swnj 			    hpaddr->hper1, HPER1_BITS,
5083289Swnj 			    hpaddr->hper2, HPER2_BITS);
5093289Swnj 			DELAY(1000000);
5103289Swnj 		}
5113706Sroot #endif
5125858Swnj 		er1 = hpaddr->hper1;
5135893Swnj 		er2 = hpaddr->hper2;
5145893Swnj 		if (er1 & HPER1_HCRC) {
5155858Swnj 			er1 &= ~(HPER1_HCE|HPER1_FER);
5165893Swnj 			er2 &= ~HPER2_BSE;
5175893Swnj 		}
5185858Swnj 		if (er1&HPER1_WLE) {
5192925Swnj 			printf("hp%d: write locked\n", dkunit(bp));
5202826Swnj 			bp->b_flags |= B_ERROR;
5215858Swnj 		} else if ((er1&0xffff) == HPER1_FER && RP06 &&
5225726Sroot 		    hphdr[mi->mi_unit] == 0) {
5235726Sroot #ifndef NOBADSECT
5245726Sroot 			if (hpecc(mi, BSE))
5255726Sroot 				return(MBD_RESTARTED);
5265726Sroot 			else
5275726Sroot #endif
5285726Sroot 				goto hard;
5292826Swnj 		} else if (++mi->mi_tab.b_errcnt > 27 ||
5303102Swnj 		    mbsr & MBSR_HARD ||
5315858Swnj 		    er1 & HPER1_HARD ||
5325726Sroot 		    hphdr[mi->mi_unit] ||
5335893Swnj 		    (!ML11 && (er2 & HPER2_HARD))) {
5343706Sroot hard:
5352925Swnj 			harderr(bp, "hp");
5363271Swnj 			if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC)))
5373271Swnj 				printf("mbsr=%b ", mbsr, mbsr_bits);
5383706Sroot 			printf("er1=%b er2=%b",
5392826Swnj 			    hpaddr->hper1, HPER1_BITS,
5402826Swnj 			    hpaddr->hper2, HPER2_BITS);
5413706Sroot 			if (hpaddr->hpmr)
5423706Sroot 				printf(" mr=%o", hpaddr->hpmr&0xffff);
5433706Sroot 			if (hpaddr->hpmr2)
5443706Sroot 				printf(" mr2=%o", hpaddr->hpmr2&0xffff);
5453706Sroot 			printf("\n");
5462826Swnj 			bp->b_flags |= B_ERROR;
5473143Swnj 			hprecal[mi->mi_unit] = 0;
5485893Swnj 		} else if ((er2 & HPER2_BSE) && !ML11) {
5493726Sroot #ifndef NOBADSECT
5503706Sroot 			if (hpecc(mi, BSE))
5513706Sroot 				return(MBD_RESTARTED);
5523706Sroot 			else
5533706Sroot #endif
5543706Sroot 				goto hard;
5555893Swnj 		} else if (RM80 && er2&HPER2_SSE) {
5563988Sroot 			(void) hpecc(mi, SSE);
5572883Swnj 			return (MBD_RESTARTED);
5585858Swnj 		} else if ((er1&(HPER1_DCK|HPER1_ECH))==HPER1_DCK) {
5593706Sroot 			if (hpecc(mi, ECC))
5602383Swnj 				return (MBD_RESTARTED);
5612826Swnj 			/* else done */
5622826Swnj 		} else
5632826Swnj 			retry = 1;
5642826Swnj 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
5655726Sroot 		if (ML11) {
5665726Sroot 			if (mi->mi_tab.b_errcnt >= 16)
5675726Sroot 				goto hard;
5685726Sroot 		} else if ((mi->mi_tab.b_errcnt&07) == 4) {
5692826Swnj 			hpaddr->hpcs1 = HP_RECAL|HP_GO;
5703706Sroot 			hprecal[mi->mi_unit] = 1;
5713706Sroot 			return(MBD_RESTARTED);
57221Sbill 		}
5732826Swnj 		if (retry)
5742826Swnj 			return (MBD_RETRY);
5752826Swnj 	}
5763706Sroot #ifdef HPDEBUG
5773289Swnj 	else
5783289Swnj 		if (hpdebug && hprecal[mi->mi_unit]) {
5793289Swnj 			printf("recal %d ", hprecal[mi->mi_unit]);
5803289Swnj 			printf("errcnt %d\n", mi->mi_tab.b_errcnt);
5813289Swnj 			printf("mbsr=%b ", mbsr, mbsr_bits);
5823289Swnj 			printf("er1=%b er2=%b\n",
5833289Swnj 			    hpaddr->hper1, HPER1_BITS,
5843289Swnj 			    hpaddr->hper2, HPER2_BITS);
5853289Swnj 		}
5863706Sroot #endif
5873093Swnj 	switch (hprecal[mi->mi_unit]) {
5883093Swnj 
5893093Swnj 	case 1:
5903093Swnj 		hpaddr->hpdc = bp->b_cylin;
5913093Swnj 		hpaddr->hpcs1 = HP_SEEK|HP_GO;
5923706Sroot 		hprecal[mi->mi_unit]++;
5933706Sroot 		return (MBD_RESTARTED);
5943093Swnj 	case 2:
5953093Swnj 		if (mi->mi_tab.b_errcnt < 16 ||
5963289Swnj 		    (bp->b_flags & B_READ) == 0)
5973093Swnj 			goto donerecal;
5983093Swnj 		hpaddr->hpof = hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22;
5993093Swnj 		hpaddr->hpcs1 = HP_OFFSET|HP_GO;
6003093Swnj 		hprecal[mi->mi_unit]++;
6013093Swnj 		return (MBD_RESTARTED);
6023093Swnj 	donerecal:
6033158Swnj 	case 3:
6042892Swnj 		hprecal[mi->mi_unit] = 0;
6052892Swnj 		return (MBD_RETRY);
6062892Swnj 	}
6075726Sroot 	hphdr[mi->mi_unit] = 0;
6082383Swnj 	bp->b_resid = -(mi->mi_mba->mba_bcr) & 0xffff;
6093640Swnj 	if (mi->mi_tab.b_errcnt >= 16) {
6103093Swnj 		/*
6113093Swnj 		 * This is fast and occurs rarely; we don't
6123093Swnj 		 * bother with interrupts.
6133093Swnj 		 */
6142624Swnj 		hpaddr->hpcs1 = HP_RTC|HP_GO;
6153093Swnj 		while (hpaddr->hpds & HPDS_PIP)
6162383Swnj 			;
6172383Swnj 		mbclrattn(mi);
61821Sbill 	}
6195726Sroot 	if (!ML11) {
6205726Sroot 		hpaddr->hpof = HPOF_FMT22;
6215726Sroot 		hpaddr->hpcs1 = HP_RELEASE|HP_GO;
6225726Sroot 	}
6232383Swnj 	return (MBD_DONE);
62421Sbill }
62521Sbill 
62621Sbill hpread(dev)
6272624Swnj 	dev_t dev;
62821Sbill {
6292624Swnj 	register int unit = minor(dev) >> 3;
63021Sbill 
6312624Swnj 	if (unit >= NHP)
6322624Swnj 		u.u_error = ENXIO;
6332624Swnj 	else
6342624Swnj 		physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys);
63521Sbill }
63621Sbill 
63721Sbill hpwrite(dev)
6382624Swnj 	dev_t dev;
63921Sbill {
6402624Swnj 	register int unit = minor(dev) >> 3;
64121Sbill 
6422624Swnj 	if (unit >= NHP)
6432624Swnj 		u.u_error = ENXIO;
6442624Swnj 	else
6452624Swnj 		physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys);
64621Sbill }
64721Sbill 
6485726Sroot /*ARGSUSED*/
649*7635Ssam hpioctl(dev, cmd, data, flag)
6505726Sroot 	dev_t dev;
6515726Sroot 	int cmd;
652*7635Ssam 	caddr_t data;
6535726Sroot 	int flag;
6545726Sroot {
6555726Sroot 
6565726Sroot 	switch (cmd) {
657*7635Ssam 
6585726Sroot 	case DKIOCHDR:	/* do header read/write */
6595726Sroot 		hphdr[minor(dev)>>3] = 1;
6605726Sroot 		return;
6615726Sroot 
6625726Sroot 	default:
6635726Sroot 		u.u_error = ENXIO;
6645726Sroot 	}
6655726Sroot }
6665726Sroot 
6673706Sroot hpecc(mi, flag)
6682978Swnj 	register struct mba_device *mi;
6693706Sroot 	int flag;
67021Sbill {
6712383Swnj 	register struct mba_regs *mbp = mi->mi_mba;
6722624Swnj 	register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv;
6732383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
6743706Sroot 	register struct hpst *st = &hpst[mi->mi_type];
6753706Sroot 	int npf, o;
6762383Swnj 	int bn, cn, tn, sn;
677914Sbill 	int bcr;
67821Sbill 
679914Sbill 	bcr = mbp->mba_bcr & 0xffff;
680914Sbill 	if (bcr)
681914Sbill 		bcr |= 0xffff0000;		/* sxt */
6823726Sroot #ifndef NOBADSECT
6833706Sroot 	if (flag == CONT)
6843706Sroot 		npf = bp->b_error;
6853706Sroot 	else
6863706Sroot #endif
6873706Sroot 		npf = btop(bcr + bp->b_bcount);
688420Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
689420Sbill 	bn = dkblock(bp);
690420Sbill 	cn = bp->b_cylin;
6913706Sroot 	sn = bn%(st->nspc) + npf;
6922383Swnj 	tn = sn/st->nsect;
6932383Swnj 	sn %= st->nsect;
6942383Swnj 	cn += tn/st->ntrak;
6952383Swnj 	tn %= st->ntrak;
6963706Sroot 	switch (flag) {
6973706Sroot 	case ECC:
6983706Sroot 		{
6993706Sroot 		register int i;
7003706Sroot 		caddr_t addr;
7013706Sroot 		struct pte mpte;
7023706Sroot 		int bit, byte, mask;
7033706Sroot 
7043706Sroot 		npf--;		/* because block in error is previous block */
7053706Sroot 		printf("hp%d%c: soft ecc sn%d\n", dkunit(bp),
7063706Sroot 		    'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf);
7073706Sroot 		mask = rp->hpec2&0xffff;
7083706Sroot 		i = (rp->hpec1&0xffff) - 1;		/* -1 makes 0 origin */
7093706Sroot 		bit = i&07;
7103706Sroot 		i = (i&~07)>>3;
7113706Sroot 		byte = i + o;
7123706Sroot 		while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) {
7133706Sroot 			mpte = mbp->mba_map[npf+btop(byte)];
7143706Sroot 			addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET);
7153706Sroot 			putmemc(addr, getmemc(addr)^(mask<<bit));
7163706Sroot 			byte++;
7173706Sroot 			i++;
7183706Sroot 			bit -= 8;
7193706Sroot 		}
7203706Sroot 		if (bcr == 0)
7213706Sroot 			return (0);
7223847Sroot 		npf++;
7233706Sroot 		break;
7243706Sroot 		}
7253706Sroot 
7263706Sroot 	case SSE:
7273706Sroot 		rp->hpof |= HPOF_SSEI;
7283706Sroot 		mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf));
7293706Sroot 		break;
7303706Sroot 
7313726Sroot #ifndef NOBADSECT
7323706Sroot 	case BSE:
7333706Sroot #ifdef HPBDEBUG
7343706Sroot 		if (hpbdebug)
7353706Sroot 		printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn);
7363706Sroot #endif
7373706Sroot 		if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0)
7383706Sroot 			return(0);
7393706Sroot 		bp->b_flags |= B_BAD;
7403706Sroot 		bp->b_error = npf + 1;
7413706Sroot 		bn = st->ncyl*st->nspc - st->nsect - 1 - bn;
7423706Sroot 		cn = bn/st->nspc;
7433706Sroot 		sn = bn%st->nspc;
7443706Sroot 		tn = sn/st->nsect;
7453706Sroot 		sn %= st->nsect;
7463706Sroot 		mbp->mba_bcr = -512;
7473706Sroot #ifdef HPBDEBUG
7483706Sroot 		if (hpbdebug)
7493706Sroot 		printf("revector to cn %d tn %d sn %d\n", cn, tn, sn);
7503706Sroot #endif
7513706Sroot 		break;
7523706Sroot 
7533706Sroot 	case CONT:
7543706Sroot #ifdef HPBDEBUG
7553706Sroot 		if (hpbdebug)
7563706Sroot 		printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn);
7573706Sroot #endif
7583706Sroot 		npf = bp->b_error;
7593706Sroot 		bp->b_flags &= ~B_BAD;
7603706Sroot 		mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf));
7613706Sroot 		if ((mbp->mba_bcr & 0xffff) == 0)
7623706Sroot 			return(0);
7633706Sroot 		break;
7643706Sroot #endif
7653706Sroot 	}
7663706Sroot 	rp->hpcs1 = HP_DCLR|HP_GO;
7673350Swnj 	if (rp->hpof&HPOF_SSEI)
7682883Swnj 		sn++;
769420Sbill 	rp->hpdc = cn;
770420Sbill 	rp->hpda = (tn<<8) + sn;
771420Sbill 	mbp->mba_sr = -1;
7723706Sroot 	mbp->mba_var = (int)ptob(npf) + o;
7733706Sroot 	rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO;
7743706Sroot 	mi->mi_tab.b_errcnt = 0;	/* error has been corrected */
775420Sbill 	return (1);
77621Sbill }
7772362Swnj 
7782362Swnj #define	DBSIZE	20
7792362Swnj 
7802362Swnj hpdump(dev)
7812362Swnj 	dev_t dev;
7822362Swnj {
7832978Swnj 	register struct mba_device *mi;
7842383Swnj 	register struct mba_regs *mba;
7852624Swnj 	struct hpdevice *hpaddr;
7862362Swnj 	char *start;
7872383Swnj 	int num, unit;
7882383Swnj 	register struct hpst *st;
7892362Swnj 
7902362Swnj 	num = maxfree;
7912362Swnj 	start = 0;
7922362Swnj 	unit = minor(dev) >> 3;
7932827Swnj 	if (unit >= NHP)
7942827Swnj 		return (ENXIO);
7952383Swnj #define	phys(a,b)	((b)((int)(a)&0x7fffffff))
7962978Swnj 	mi = phys(hpinfo[unit],struct mba_device *);
7972827Swnj 	if (mi == 0 || mi->mi_alive == 0)
7982827Swnj 		return (ENXIO);
7992383Swnj 	mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba;
8003102Swnj 	mba->mba_cr = MBCR_INIT;
8012624Swnj 	hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive];
8023093Swnj 	if ((hpaddr->hpds & HPDS_VV) == 0) {
8032624Swnj 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
8042624Swnj 		hpaddr->hpcs1 = HP_PRESET|HP_GO;
8053093Swnj 		hpaddr->hpof = HPOF_FMT22;
8062362Swnj 	}
8072383Swnj 	st = &hpst[mi->mi_type];
8082827Swnj 	if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks)
8092827Swnj 		return (EINVAL);
8102362Swnj 	while (num > 0) {
8112383Swnj 		register struct pte *hpte = mba->mba_map;
8122362Swnj 		register int i;
8132383Swnj 		int blk, cn, sn, tn;
8142362Swnj 		daddr_t bn;
8152362Swnj 
8162362Swnj 		blk = num > DBSIZE ? DBSIZE : num;
8172362Swnj 		bn = dumplo + btop(start);
8182383Swnj 		cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff;
8192383Swnj 		sn = bn%st->nspc;
8202383Swnj 		tn = sn/st->nsect;
8212383Swnj 		sn = sn%st->nsect;
8222362Swnj 		hpaddr->hpdc = cn;
8232362Swnj 		hpaddr->hpda = (tn << 8) + sn;
8242362Swnj 		for (i = 0; i < blk; i++)
8252362Swnj 			*(int *)hpte++ = (btop(start)+i) | PG_V;
8262383Swnj 		mba->mba_sr = -1;
8272383Swnj 		mba->mba_bcr = -(blk*NBPG);
8282383Swnj 		mba->mba_var = 0;
8292624Swnj 		hpaddr->hpcs1 = HP_WCOM | HP_GO;
8303093Swnj 		while ((hpaddr->hpds & HPDS_DRY) == 0)
8312362Swnj 			;
8323093Swnj 		if (hpaddr->hpds&HPDS_ERR)
8332827Swnj 			return (EIO);
8342362Swnj 		start += blk*NBPG;
8352362Swnj 		num -= blk;
8362362Swnj 	}
8372362Swnj 	return (0);
8382362Swnj }
8391565Sbill #endif
840