1*16791Skarels /* hp.c 6.4 84/07/31 */ 23706Sroot 33706Sroot #ifdef HPDEBUG 43289Swnj int hpdebug; 53706Sroot #endif 63706Sroot #ifdef HPBDEBUG 73706Sroot int hpbdebug; 83706Sroot #endif 921Sbill 101939Swnj #include "hp.h" 111565Sbill #if NHP > 0 1221Sbill /* 135726Sroot * HP disk driver for RP0x+RMxx+ML11 142827Swnj * 152827Swnj * TODO: 163706Sroot * check RM80 skip sector handling when ECC's occur later 173093Swnj * check offset recovery handling 183706Sroot * see if DCLR and/or RELEASE set attention status 193706Sroot * print bits of mr && mr2 symbolically 2021Sbill */ 219786Ssam #include "../machine/pte.h" 2221Sbill 2321Sbill #include "../h/param.h" 2421Sbill #include "../h/systm.h" 25305Sbill #include "../h/dk.h" 2621Sbill #include "../h/buf.h" 2721Sbill #include "../h/conf.h" 2821Sbill #include "../h/dir.h" 2921Sbill #include "../h/user.h" 3021Sbill #include "../h/map.h" 318468Sroot #include "../vax/mtpr.h" 32420Sbill #include "../h/vm.h" 332362Swnj #include "../h/cmap.h" 343706Sroot #include "../h/dkbad.h" 357635Ssam #include "../h/ioctl.h" 367738Sroot #include "../h/uio.h" 3721Sbill 388988Sroot #include "../vax/dkio.h" 398468Sroot #include "../vaxmba/mbareg.h" 408468Sroot #include "../vaxmba/mbavar.h" 418468Sroot #include "../vaxmba/hpreg.h" 4221Sbill 432383Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ 442383Swnj struct size { 4521Sbill daddr_t nblocks; 4621Sbill int cyloff; 4711212Ssam } rp06_sizes[8] = { 48886Sbill 15884, 0, /* A=cyl 0 thru 37 */ 49886Sbill 33440, 38, /* B=cyl 38 thru 117 */ 50886Sbill 340670, 0, /* C=cyl 0 thru 814 */ 5111212Ssam 15884, 118, /* D=cyl 118 thru 155 */ 5211212Ssam 55936, 156, /* E=cyl 156 thru 289 */ 5311212Ssam 219384, 290, /* F=cyl 290 thru 814 */ 5411212Ssam 291280, 118, /* G=cyl 118 thru 814 */ 5521Sbill 0, 0, 5611212Ssam }, rp05_sizes[8] = { 5711212Ssam 15884, 0, /* A=cyl 0 thru 37 */ 5811212Ssam 33440, 38, /* B=cyl 38 thru 117 */ 5911212Ssam 171798, 0, /* C=cyl 0 thru 410 */ 6011212Ssam 15884, 118, /* D=cyl 118 thru 155 */ 6111212Ssam 55936, 156, /* E=cyl 156 thru 289 */ 6211212Ssam 50512, 290, /* F=cyl 290 thru 410 */ 6311212Ssam 122408, 118, /* G=cyl 118 thru 410 */ 6421Sbill 0, 0, 6511212Ssam }, rm03_sizes[8] = { 66886Sbill 15884, 0, /* A=cyl 0 thru 99 */ 6711212Ssam 33440, 100, /* B=cyl 100 thru 308 */ 68886Sbill 131680, 0, /* C=cyl 0 thru 822 */ 6911212Ssam 15884, 309, /* D=cyl 309 thru 408 */ 7011212Ssam 55936, 409, /* E=cyl 409 thru 758 */ 7111212Ssam 10144, 759, /* F=cyl 759 thru 822 */ 7211212Ssam 82144, 309, /* G=cyl 309 thru 822 */ 7321Sbill 0, 0, 7411212Ssam }, rm05_sizes[8] = { 75886Sbill 15884, 0, /* A=cyl 0 thru 26 */ 76886Sbill 33440, 27, /* B=cyl 27 thru 81 */ 773271Swnj 500384, 0, /* C=cyl 0 thru 822 */ 78886Sbill 15884, 562, /* D=cyl 562 thru 588 */ 79886Sbill 55936, 589, /* E=cyl 589 thru 680 */ 803729Sroot 86240, 681, /* F=cyl 681 thru 822 */ 813729Sroot 158592, 562, /* G=cyl 562 thru 822 */ 82886Sbill 291346, 82, /* H=cyl 82 thru 561 */ 832383Swnj }, rm80_sizes[8] = { 842383Swnj 15884, 0, /* A=cyl 0 thru 36 */ 852383Swnj 33440, 37, /* B=cyl 37 thru 114 */ 862383Swnj 242606, 0, /* C=cyl 0 thru 558 */ 8711212Ssam 15884, 115, /* D=cyl 115 thru 151 */ 8811212Ssam 55936, 152, /* E=cyl 152 thru 280 */ 8911212Ssam 120559, 281, /* F=cyl 281 thru 558 */ 9011212Ssam 192603, 115, /* G=cyl 115 thru 558 */ 912383Swnj 0, 0, 9211212Ssam }, rp07_sizes[8] = { 936927Ssam 15884, 0, /* A=cyl 0 thru 9 */ 9411212Ssam 66880, 10, /* B=cyl 10 thru 51 */ 9511212Ssam 1008000, 0, /* C=cyl 0 thru 629 */ 9611212Ssam 15884, 235, /* D=cyl 235 thru 244 */ 9711212Ssam 307200, 245, /* E=cyl 245 thru 436 */ 9811212Ssam 308650, 437, /* F=cyl 437 thru 629 */ 9911212Ssam 631850, 235, /* G=cyl 235 thru 629 */ 10011212Ssam 291346, 52, /* H=cyl 52 thru 234 */ 10111212Ssam }, cdc9775_sizes[8] = { 10211212Ssam 15884, 0, /* A=cyl 0 thru 12 */ 10311212Ssam 66880, 13, /* B=cyl 13 thru 65 */ 10415101Skarels 1077760, 0, /* C=cyl 0 thru 841 */ 10511212Ssam 15884, 294, /* D=cyl 294 thru 306 */ 10611212Ssam 307200, 307, /* E=cyl 307 thru 546 */ 10715101Skarels 377440, 547, /* F=cyl 547 thru 841 */ 10815101Skarels 701280, 294, /* G=cyl 294 thru 841 */ 10911212Ssam 291346, 66, /* H=cyl 66 thru 293 */ 11011212Ssam }, cdc9730_sizes[8] = { 1116927Ssam 15884, 0, /* A=cyl 0 thru 49 */ 1126927Ssam 33440, 50, /* B=cyl 50 thru 154 */ 1136927Ssam 263360, 0, /* C=cyl 0 thru 822 */ 11411212Ssam 15884, 155, /* D=cyl 155 thru 204 */ 11511212Ssam 55936, 205, /* E=cyl 205 thru 379 */ 11611212Ssam 141664, 380, /* F=cyl 380 thru 822 */ 11711212Ssam 213664, 155, /* G=cyl 155 thru 822 */ 1186927Ssam 0, 0, 11911212Ssam }, capricorn_sizes[8] = { 1206927Ssam 15884, 0, /* A=cyl 0 thru 31 */ 1216927Ssam 33440, 32, /* B=cyl 32 thru 97 */ 1226927Ssam 524288, 0, /* C=cyl 0 thru 1023 */ 12311212Ssam 15884, 668, /* D=cyl 668 thru 699 */ 12411212Ssam 55936, 700, /* E=cyl 700 thru 809 */ 12511212Ssam 109472, 810, /* F=cyl 810 thru 1023 */ 12611212Ssam 182176, 668, /* G=cyl 668 thru 1023 */ 1276927Ssam 291346, 98, /* H=cyl 98 thru 667 */ 12811212Ssam }, eagle_sizes[8] = { 12910734Ssam 15884, 0, /* A=cyl 0 thru 16 */ 13011212Ssam 66880, 17, /* B=cyl 17 thru 86 */ 13111629Ssam 808320, 0, /* C=cyl 0 thru 841 */ 13211212Ssam 15884, 391, /* D=cyl 391 thru 407 */ 13311212Ssam 307200, 408, /* E=cyl 408 thru 727 */ 13411629Ssam 109296, 728, /* F=cyl 728 thru 841 */ 13511629Ssam 432816, 391, /* G=cyl 391 thru 841 */ 13611212Ssam 291346, 87, /* H=cyl 87 thru 390 */ 13713202Sroot }, ampex_sizes[8] = { 13811281Ssam 15884, 0, /* A=cyl 0 thru 26 */ 13911281Ssam 33440, 27, /* B=cyl 27 thru 81 */ 14013184Shelge 495520, 0, /* C=cyl 0 thru 814 */ 14111281Ssam 15884, 562, /* D=cyl 562 thru 588 */ 14211281Ssam 55936, 589, /* E=cyl 589 thru 680 */ 14313184Shelge 81312, 681, /* F=cyl 681 thru 814 */ 14413184Shelge 153664, 562, /* G=cyl 562 thru 814 */ 14511281Ssam 291346, 82, /* H=cyl 82 thru 561 */ 14621Sbill }; 1472383Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ 14821Sbill 1496927Ssam /* 1506927Ssam * Table for converting Massbus drive types into 1516927Ssam * indices into the partition tables. Slots are 1526927Ssam * left for those drives devined from other means 1536927Ssam * (e.g. SI, AMPEX, etc.). 1546927Ssam */ 1556927Ssam short hptypes[] = { 1566927Ssam #define HPDT_RM03 0 1576927Ssam MBDT_RM03, 1586927Ssam #define HPDT_RM05 1 1596927Ssam MBDT_RM05, 1606927Ssam #define HPDT_RP06 2 1616927Ssam MBDT_RP06, 1626927Ssam #define HPDT_RM80 3 1636927Ssam MBDT_RM80, 16413157Ssam #define HPDT_RP04 4 16513157Ssam MBDT_RP04, 16613157Ssam #define HPDT_RP05 5 1676927Ssam MBDT_RP05, 16813157Ssam #define HPDT_RP07 6 1696927Ssam MBDT_RP07, 17013157Ssam #define HPDT_ML11A 7 1716927Ssam MBDT_ML11A, 17213157Ssam #define HPDT_ML11B 8 1736927Ssam MBDT_ML11B, 17413157Ssam #define HPDT_9775 9 1756927Ssam -1, 17613157Ssam #define HPDT_9730 10 1776927Ssam -1, 17813157Ssam #define HPDT_CAPRICORN 11 1796927Ssam -1, 18013157Ssam #define HPDT_EAGLE 12 1819175Ssam -1, 18213157Ssam #define HPDT_9300 13 18311281Ssam -1, 18413157Ssam #define HPDT_RM02 14 1859175Ssam MBDT_RM02, /* beware, actually capricorn or eagle */ 1866927Ssam 0 1876927Ssam }; 1882978Swnj struct mba_device *hpinfo[NHP]; 18914145Shelge int hpattach(),hpustart(),hpstart(),hpdtint(); 1902383Swnj struct mba_driver hpdriver = 1912978Swnj { hpattach, 0, hpustart, hpstart, hpdtint, 0, 1922978Swnj hptypes, "hp", 0, hpinfo }; 1932383Swnj 19412836Ssam /* 19516225Skarels * These variable are all measured in sectors. 19616225Skarels * Sdist is how much to "lead" in the search for a desired sector 19716225Skarels * (i.e. if want N, search for N-sdist.) 19816225Skarels * Maxdist and mindist define the region right before our desired sector within 19916225Skarels * which we don't bother searching. We don't search when we are already less 20016225Skarels * then maxdist and more than mindist sectors "before" our desired sector. 20116225Skarels * Maxdist should be >= sdist. 20216225Skarels * 20316225Skarels * Beware, sdist, mindist and maxdist are not well tuned 20412836Ssam * for many of the drives listed in this table. 20512836Ssam * Try patching things with something i/o intensive 20612836Ssam * running and watch iostat. 20712836Ssam */ 2082383Swnj struct hpst { 20912836Ssam short nsect; /* # sectors/track */ 21012836Ssam short ntrak; /* # tracks/cylinder */ 21112836Ssam short nspc; /* # sector/cylinders */ 21212836Ssam short ncyl; /* # cylinders */ 21312836Ssam struct size *sizes; /* partition tables */ 21412836Ssam short sdist; /* seek distance metric */ 21516225Skarels short maxdist; /* boundaries of non-searched area */ 21616225Skarels short mindist; /* preceding the target sector */ 2172383Swnj } hpst[] = { 21816225Skarels { 32, 5, 32*5, 823, rm03_sizes, 7, 4, 1 }, /* RM03 */ 21916225Skarels { 32, 19, 32*19, 823, rm05_sizes, 7, 4, 1 }, /* RM05 */ 22016225Skarels { 22,19, 22*19, 815, rp06_sizes, 7, 4, 1 }, /* RP06 */ 22116225Skarels { 31, 14, 31*14, 559, rm80_sizes, 7, 4, 1 }, /* RM80 */ 22216225Skarels { 22, 19, 22*19, 411, rp05_sizes, 7, 4, 1 }, /* RP04 */ 22316225Skarels { 22, 19, 22*19, 411, rp05_sizes, 7, 4, 1 }, /* RP05 */ 22416225Skarels { 50, 32, 50*32, 630, rp07_sizes, 15, 8, 3 }, /* RP07 */ 22516225Skarels { 1, 1, 1, 1, 0, 0, 0, 0 }, /* ML11A */ 22616225Skarels { 1, 1, 1, 1, 0, 0, 0, 0 }, /* ML11B */ 22716225Skarels { 32, 40, 32*40, 843, cdc9775_sizes, 7, 4, 1 }, /* 9775 */ 22816225Skarels { 32, 10, 32*10, 823, cdc9730_sizes, 7, 4, 1 }, /* 9730 */ 22916225Skarels { 32, 16, 32*16, 1024, capricorn_sizes,10,4, 3 }, /* Capricorn */ 23016225Skarels { 48, 20, 48*20, 842, eagle_sizes, 15, 8, 3 }, /* EAGLE */ 23116225Skarels { 32, 19, 32*19, 815, ampex_sizes, 7, 4, 1 }, /* 9300 */ 2322383Swnj }; 2332383Swnj 2342624Swnj u_char hp_offset[16] = { 2353093Swnj HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400, 2363093Swnj HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800, 2373093Swnj HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200, 2383093Swnj 0, 0, 0, 0, 23921Sbill }; 24021Sbill 2412624Swnj struct buf rhpbuf[NHP]; 2423706Sroot struct buf bhpbuf[NHP]; 2433706Sroot struct dkbad hpbad[NHP]; 24421Sbill 24510857Ssam struct hpsoftc { 24610857Ssam u_char sc_hpinit; /* drive initialized */ 24710857Ssam u_char sc_recal; /* recalibrate state */ 24810857Ssam u_char sc_hdr; /* next i/o includes header */ 24910857Ssam u_char sc_doseeks; /* perform explicit seeks */ 25010857Ssam daddr_t sc_mlsize; /* ML11 size */ 25110857Ssam } hpsoftc[NHP]; 25210857Ssam 25321Sbill #define b_cylin b_resid 25421Sbill 2555726Sroot /* #define ML11 0 to remove ML11 support */ 2565726Sroot #define ML11 (hptypes[mi->mi_type] == MBDT_ML11A) 2575726Sroot #define RP06 (hptypes[mi->mi_type] <= MBDT_RP06) 2585726Sroot #define RM80 (hptypes[mi->mi_type] == MBDT_RM80) 2595726Sroot 26011202Ssam #define MASKREG(reg) ((reg)&0xffff) 26111202Ssam 26221Sbill #ifdef INTRLVE 26321Sbill daddr_t dkblock(); 26421Sbill #endif 2652604Swnj 2662978Swnj /*ARGSUSED*/ 2672978Swnj hpattach(mi, slave) 26810734Ssam register struct mba_device *mi; 2692604Swnj { 27010734Ssam 27110734Ssam mi->mi_type = hpmaptype(mi); 27210734Ssam if (!ML11 && mi->mi_dk >= 0) { 27310734Ssam struct hpst *st = &hpst[mi->mi_type]; 27410734Ssam 27510734Ssam dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256); 27610734Ssam } 27710734Ssam } 27810734Ssam 27910734Ssam /* 28010734Ssam * Map apparent MASSBUS drive type into manufacturer 28110734Ssam * specific configuration. For SI controllers this is done 28210734Ssam * based on codes in the serial number register. For 28310734Ssam * EMULEX controllers, the track and sector attributes are 28410734Ssam * used when the drive type is an RM02 (not supported by DEC). 28510734Ssam */ 28610734Ssam hpmaptype(mi) 28710734Ssam register struct mba_device *mi; 28810734Ssam { 2896927Ssam register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 29010734Ssam register int type = mi->mi_type; 2916927Ssam 2926927Ssam /* 29311281Ssam * Model-byte processing for SI controllers. 2946927Ssam * NB: Only deals with RM03 and RM05 emulations. 2956927Ssam */ 29610734Ssam if (type == HPDT_RM03 || type == HPDT_RM05) { 29710734Ssam int hpsn = hpaddr->hpsn; 2986927Ssam 2996927Ssam if ((hpsn & SIMB_LU) != mi->mi_drive) 30010734Ssam return (type); 3016927Ssam switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) { 3026927Ssam 3036927Ssam case SI9775D: 30411281Ssam printf("hp%d: 9775 (direct)\n", mi->mi_unit); 30510734Ssam type = HPDT_9775; 3066927Ssam break; 3076927Ssam 3086927Ssam case SI9730D: 30911281Ssam printf("hp%d: 9730 (direct)\n", mi->mi_unit); 31010734Ssam type = HPDT_9730; 3116927Ssam break; 3126927Ssam 3137035Swnj /* 31411281Ssam * Beware, since the only SI controller we 31511281Ssam * have has a 9300 instead of a 9766, we map the 31611281Ssam * drive type into the 9300. This means that 31711281Ssam * on a 9766 you lose the last 8 cylinders (argh). 3187035Swnj */ 3196927Ssam case SI9766: 32011281Ssam printf("hp%d: 9300\n", mi->mi_unit); 32111281Ssam type = HPDT_9300; 3226927Ssam break; 3236927Ssam 3246927Ssam case SI9762: 3256927Ssam printf("hp%d: 9762\n", mi->mi_unit); 32610734Ssam type = HPDT_RM03; 3276927Ssam break; 32811281Ssam 32911281Ssam case SICAPD: 33011281Ssam printf("hp%d: capricorn\n", mi->mi_unit); 33111281Ssam type = HPDT_CAPRICORN; 33211281Ssam break; 33311281Ssam 33411281Ssam case SI9751D: 33511281Ssam printf("hp%d: eagle\n", mi->mi_unit); 33611281Ssam type = HPDT_EAGLE; 33711281Ssam break; 3386927Ssam } 33910734Ssam return (type); 34010734Ssam } 3416927Ssam 3426927Ssam /* 34310734Ssam * EMULEX SC750 or SC780. Poke the holding register. 3446927Ssam */ 34510734Ssam if (type == HPDT_RM02) { 34610734Ssam int ntracks, nsectors; 34710734Ssam 34811315Ssam hpaddr->hpof = HPOF_FMT22; 34911315Ssam mbclrattn(mi); 3506927Ssam hpaddr->hpcs1 = HP_NOP; 3516927Ssam hpaddr->hphr = HPHR_MAXTRAK; 35211202Ssam ntracks = MASKREG(hpaddr->hphr) + 1; 35310055Ssam if (ntracks == 16) { 3546927Ssam printf("hp%d: capricorn\n", mi->mi_unit); 35510734Ssam type = HPDT_CAPRICORN; 35610734Ssam goto done; 35710734Ssam } 35813157Ssam if (ntracks == 19) { 35913157Ssam printf("hp%d: 9300\n", mi->mi_unit); 36013157Ssam type = HPDT_9300; 36113157Ssam goto done; 36213157Ssam } 36310734Ssam hpaddr->hpcs1 = HP_NOP; 36410734Ssam hpaddr->hphr = HPHR_MAXSECT; 36511202Ssam nsectors = MASKREG(hpaddr->hphr) + 1; 36611315Ssam if (ntracks == 20 && nsectors == 48) { 36710734Ssam type = HPDT_EAGLE; 36811212Ssam printf("hp%d: eagle\n", mi->mi_unit); 36911315Ssam goto done; 37010734Ssam } 37111315Ssam printf("hp%d: ntracks %d, nsectors %d: unknown device\n", 37213157Ssam mi->mi_unit, ntracks, nsectors); 37310734Ssam done: 3746927Ssam hpaddr->hpcs1 = HP_DCLR|HP_GO; 37511315Ssam mbclrattn(mi); /* conservative */ 37610734Ssam return (type); 37710734Ssam } 3786927Ssam 37910734Ssam /* 38010734Ssam * Map all ML11's to the same type. Also calculate 38110734Ssam * transfer rates based on device characteristics. 38210734Ssam */ 38310734Ssam if (type == HPDT_ML11A || type == HPDT_ML11B) { 38410857Ssam register struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 38510857Ssam register int trt; 3862604Swnj 38710857Ssam sc->sc_mlsize = hpaddr->hpmr & HPMR_SZ; 3885726Sroot if ((hpaddr->hpmr & HPMR_ARRTYP) == 0) 38910857Ssam sc->sc_mlsize >>= 2; 3905726Sroot if (mi->mi_dk >= 0) { 3915726Sroot trt = (hpaddr->hpmr & HPMR_TRT) >> 8; 3925726Sroot dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt)); 3935726Sroot } 39410734Ssam type = HPDT_ML11A; 3956927Ssam } 39610734Ssam return (type); 3972604Swnj } 3982604Swnj 3998579Sroot hpopen(dev) 4008579Sroot dev_t dev; 4018579Sroot { 4028579Sroot register int unit = minor(dev) >> 3; 4038579Sroot register struct mba_device *mi; 4048579Sroot 4058579Sroot if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0) 4068579Sroot return (ENXIO); 4078579Sroot return (0); 4088579Sroot } 4098579Sroot 41021Sbill hpstrategy(bp) 4112383Swnj register struct buf *bp; 41221Sbill { 4132978Swnj register struct mba_device *mi; 4142383Swnj register struct hpst *st; 4152383Swnj register int unit; 41621Sbill long sz, bn; 4172383Swnj int xunit = minor(bp->b_dev) & 07; 4185432Sroot int s; 41921Sbill 42021Sbill sz = bp->b_bcount; 42121Sbill sz = (sz+511) >> 9; 42221Sbill unit = dkunit(bp); 4232383Swnj if (unit >= NHP) 4242383Swnj goto bad; 4252383Swnj mi = hpinfo[unit]; 4262395Swnj if (mi == 0 || mi->mi_alive == 0) 4272383Swnj goto bad; 4282383Swnj st = &hpst[mi->mi_type]; 4295726Sroot if (ML11) { 43010857Ssam struct hpsoftc *sc = &hpsoftc[unit]; 43110857Ssam 4325726Sroot if (bp->b_blkno < 0 || 43310857Ssam dkblock(bp)+sz > sc->sc_mlsize) 4345726Sroot goto bad; 4355726Sroot bp->b_cylin = 0; 4365726Sroot } else { 4375726Sroot if (bp->b_blkno < 0 || 4385726Sroot (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks) 4395726Sroot goto bad; 4405726Sroot bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff; 4415726Sroot } 4425432Sroot s = spl5(); 4432383Swnj disksort(&mi->mi_tab, bp); 4442383Swnj if (mi->mi_tab.b_active == 0) 4452383Swnj mbustart(mi); 4465432Sroot splx(s); 4472383Swnj return; 4482383Swnj 4492383Swnj bad: 4502383Swnj bp->b_flags |= B_ERROR; 4512383Swnj iodone(bp); 4522383Swnj return; 45321Sbill } 45421Sbill 4552383Swnj hpustart(mi) 4562978Swnj register struct mba_device *mi; 45721Sbill { 4582624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 4592383Swnj register struct buf *bp = mi->mi_tab.b_actf; 46011315Ssam register struct hpst *st; 46110857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 46221Sbill daddr_t bn; 463*16791Skarels int sn, tn, dist; 46421Sbill 46511315Ssam st = &hpst[mi->mi_type]; 4663706Sroot hpaddr->hpcs1 = 0; 4672624Swnj if ((hpaddr->hpcs1&HP_DVA) == 0) 4682383Swnj return (MBU_BUSY); 46910857Ssam if ((hpaddr->hpds & HPDS_VV) == 0 || !sc->sc_hpinit) { 4703706Sroot struct buf *bbp = &bhpbuf[mi->mi_unit]; 4713706Sroot 47210857Ssam sc->sc_hpinit = 1; 4732624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 4743140Swnj if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive)) 4753140Swnj printf("DCLR attn\n"); 4762624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 4775726Sroot if (!ML11) 4785726Sroot hpaddr->hpof = HPOF_FMT22; 4793140Swnj mbclrattn(mi); 4805726Sroot if (!ML11) { 4815726Sroot bbp->b_flags = B_READ|B_BUSY; 4825726Sroot bbp->b_dev = bp->b_dev; 4835726Sroot bbp->b_bcount = 512; 4845726Sroot bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit]; 4855726Sroot bbp->b_blkno = st->ncyl*st->nspc - st->nsect; 4865726Sroot bbp->b_cylin = st->ncyl - 1; 4875726Sroot mi->mi_tab.b_actf = bbp; 4885726Sroot bbp->av_forw = bp; 4895726Sroot bp = bbp; 4905726Sroot } 49121Sbill } 4922604Swnj if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1) 4932383Swnj return (MBU_DODATA); 4945726Sroot if (ML11) 4955726Sroot return (MBU_DODATA); 4963093Swnj if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY) 4972383Swnj return (MBU_DODATA); 4982395Swnj bn = dkblock(bp); 499*16791Skarels sn = bn % st->nspc; 500*16791Skarels tn = sn / st->nsect; 501*16791Skarels sn = sn % st->nsect; 50211202Ssam if (bp->b_cylin == MASKREG(hpaddr->hpdc)) { 50310908Ssam if (sc->sc_doseeks) 5042383Swnj return (MBU_DODATA); 50516225Skarels dist = sn - (MASKREG(hpaddr->hpla) >> 6) - 1; 5062383Swnj if (dist < 0) 5072383Swnj dist += st->nsect; 50816225Skarels if (dist > st->maxdist || dist < st->mindist) 5092383Swnj return (MBU_DODATA); 5102614Swnj } else 5112614Swnj hpaddr->hpdc = bp->b_cylin; 51210908Ssam if (sc->sc_doseeks) 5132624Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 514305Sbill else { 51516225Skarels sn = (sn + st->nsect - st->sdist) % st->nsect; 516*16791Skarels hpaddr->hpda = (tn << 8) + sn; 5172624Swnj hpaddr->hpcs1 = HP_SEARCH|HP_GO; 518305Sbill } 5192383Swnj return (MBU_STARTED); 52021Sbill } 52121Sbill 5222383Swnj hpstart(mi) 5232978Swnj register struct mba_device *mi; 52421Sbill { 5252624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 5262383Swnj register struct buf *bp = mi->mi_tab.b_actf; 5272383Swnj register struct hpst *st = &hpst[mi->mi_type]; 52810857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 52921Sbill daddr_t bn; 5302383Swnj int sn, tn; 53121Sbill 53221Sbill bn = dkblock(bp); 5335726Sroot if (ML11) 5345726Sroot hpaddr->hpda = bn; 5355726Sroot else { 5365726Sroot sn = bn%st->nspc; 5375726Sroot tn = sn/st->nsect; 5385726Sroot sn %= st->nsect; 5395726Sroot hpaddr->hpdc = bp->b_cylin; 5405726Sroot hpaddr->hpda = (tn << 8) + sn; 5415726Sroot } 54210857Ssam if (sc->sc_hdr) { 5435726Sroot if (bp->b_flags & B_READ) 5445726Sroot return (HP_RHDR|HP_GO); 5455726Sroot else 5465726Sroot return (HP_WHDR|HP_GO); 5475726Sroot } 5485726Sroot return (0); 54921Sbill } 55021Sbill 5513102Swnj hpdtint(mi, mbsr) 5522978Swnj register struct mba_device *mi; 5533102Swnj int mbsr; 55421Sbill { 5552624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 5562383Swnj register struct buf *bp = mi->mi_tab.b_actf; 55711315Ssam register struct hpst *st; 5585893Swnj register int er1, er2; 55910857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 5602826Swnj int retry = 0; 56121Sbill 56211315Ssam st = &hpst[mi->mi_type]; 56311315Ssam if (bp->b_flags&B_BAD && hpecc(mi, CONT)) 56411315Ssam return (MBD_RESTARTED); 5653102Swnj if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) { 56614145Shelge er1 = hpaddr->hper1; 56714145Shelge er2 = hpaddr->hper2; 5683706Sroot #ifdef HPDEBUG 5693289Swnj if (hpdebug) { 5703706Sroot int dc = hpaddr->hpdc, da = hpaddr->hpda; 5713706Sroot 5723706Sroot printf("hperr: bp %x cyl %d blk %d as %o ", 5733706Sroot bp, bp->b_cylin, bp->b_blkno, 5743706Sroot hpaddr->hpas&0xff); 57511202Ssam printf("dc %x da %x\n",MASKREG(dc), MASKREG(da)); 5763289Swnj printf("errcnt %d ", mi->mi_tab.b_errcnt); 5773289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 57814145Shelge printf("er1=%b er2=%b\n", MASKREG(er1), HPER1_BITS, 57914145Shelge MASKREG(er2), HPER2_BITS); 5803289Swnj DELAY(1000000); 5813289Swnj } 5823706Sroot #endif 5835893Swnj if (er1 & HPER1_HCRC) { 5845858Swnj er1 &= ~(HPER1_HCE|HPER1_FER); 5855893Swnj er2 &= ~HPER2_BSE; 5865893Swnj } 587*16791Skarels if (er1 & HPER1_WLE) { 5882925Swnj printf("hp%d: write locked\n", dkunit(bp)); 5892826Swnj bp->b_flags |= B_ERROR; 590*16791Skarels } else if (sc->sc_hdr) { 591*16791Skarels goto hard; 592*16791Skarels } else if ((er2 & HPER2_BSE) && !ML11) { 5935726Sroot if (hpecc(mi, BSE)) 59411202Ssam return (MBD_RESTARTED); 59511202Ssam goto hard; 596*16791Skarels } else if (MASKREG(er1) == HPER1_FER && RP06) { 597*16791Skarels if (hpecc(mi, BSE)) 598*16791Skarels return (MBD_RESTARTED); 599*16791Skarels goto hard; 600*16791Skarels } else if (RM80 && er2&HPER2_SSE) { 601*16791Skarels (void) hpecc(mi, SSE); 602*16791Skarels return (MBD_RESTARTED); 603*16791Skarels } else if ((er1 & (HPER1_DCK | HPER1_ECH)) == HPER1_DCK) { 604*16791Skarels if (hpecc(mi, ECC)) 605*16791Skarels return (MBD_RESTARTED); 606*16791Skarels /* else done */ 6072826Swnj } else if (++mi->mi_tab.b_errcnt > 27 || 608*16791Skarels (ML11 && mi->mi_tab.b_errcnt > 15) || 6093102Swnj mbsr & MBSR_HARD || 6105858Swnj er1 & HPER1_HARD || 6115893Swnj (!ML11 && (er2 & HPER2_HARD))) { 61210886Shelge /* 61314134Shelge * HCRC means the header is screwed up and the sector 61414134Shelge * might well exist in the bad sector table, 61514134Shelge * better check.... 61610886Shelge */ 617*16791Skarels if ((er1 & HPER1_HCRC) && !ML11 && hpecc(mi, BSE)) 61811202Ssam return (MBD_RESTARTED); 6193706Sroot hard: 62010622Shelge if (ML11) 62111202Ssam bp->b_blkno = MASKREG(hpaddr->hpda); 62210622Shelge else 62311202Ssam bp->b_blkno = MASKREG(hpaddr->hpdc) * st->nspc + 62411202Ssam (MASKREG(hpaddr->hpda) >> 8) * st->nsect + 62514145Shelge (hpaddr->hpda&0xff); 62614134Shelge /* 62714134Shelge * If we have a data check error or a hard 62814134Shelge * ecc error the bad sector has been read/written, 62914134Shelge * and the controller registers are pointing to 63014134Shelge * the next sector... 63114134Shelge */ 63214145Shelge if (er1&(HPER1_DCK|HPER1_ECH) || sc->sc_hdr) 63314134Shelge bp->b_blkno--; 6342925Swnj harderr(bp, "hp"); 6353271Swnj if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC))) 6363271Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 6373706Sroot printf("er1=%b er2=%b", 63814145Shelge MASKREG(hpaddr->hper1), HPER1_BITS, 63914145Shelge MASKREG(hpaddr->hper2), HPER2_BITS); 6403706Sroot if (hpaddr->hpmr) 64111202Ssam printf(" mr=%o", MASKREG(hpaddr->hpmr)); 6423706Sroot if (hpaddr->hpmr2) 64311202Ssam printf(" mr2=%o", MASKREG(hpaddr->hpmr2)); 64414134Shelge if (sc->sc_hdr) 64514134Shelge printf(" (hdr i/o)"); 6463706Sroot printf("\n"); 6472826Swnj bp->b_flags |= B_ERROR; 6482826Swnj } else 6492826Swnj retry = 1; 6502826Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 651*16791Skarels if ((mi->mi_tab.b_errcnt & 07) == 4) { 6522826Swnj hpaddr->hpcs1 = HP_RECAL|HP_GO; 65310857Ssam sc->sc_recal = 1; 65411202Ssam return (MBD_RESTARTED); 65521Sbill } 6562826Swnj } 6573706Sroot #ifdef HPDEBUG 6583289Swnj else 65910857Ssam if (hpdebug && sc->sc_recal) { 66010857Ssam printf("recal %d ", sc->sc_recal); 6613289Swnj printf("errcnt %d\n", mi->mi_tab.b_errcnt); 6623289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 6633289Swnj printf("er1=%b er2=%b\n", 6643289Swnj hpaddr->hper1, HPER1_BITS, 6653289Swnj hpaddr->hper2, HPER2_BITS); 6663289Swnj } 6673706Sroot #endif 66810857Ssam switch (sc->sc_recal) { 6693093Swnj 6703093Swnj case 1: 6713093Swnj hpaddr->hpdc = bp->b_cylin; 6723093Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 67310857Ssam sc->sc_recal++; 6743706Sroot return (MBD_RESTARTED); 6753093Swnj case 2: 676*16791Skarels retry = 1; 677*16791Skarels break; 678*16791Skarels } 679*16791Skarels sc->sc_recal = 0; 680*16791Skarels if (retry) { 681*16791Skarels if (mi->mi_tab.b_errcnt >= 16 && (bp->b_flags & B_READ)) { 682*16791Skarels hpaddr->hpof = 683*16791Skarels hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22; 684*16791Skarels hpaddr->hpcs1 = HP_OFFSET|HP_GO; 685*16791Skarels while ((hpaddr->hpds & (HPDS_DRY | HPDS_PIP)) != 686*16791Skarels HPDS_DRY) 687*16791Skarels DELAY(10); 688*16791Skarels mbclrattn(mi); 689*16791Skarels } 6902892Swnj return (MBD_RETRY); 6912892Swnj } 69210857Ssam sc->sc_hdr = 0; 69311202Ssam bp->b_resid = MASKREG(-mi->mi_mba->mba_bcr); 6943640Swnj if (mi->mi_tab.b_errcnt >= 16) { 6953093Swnj /* 6963093Swnj * This is fast and occurs rarely; we don't 6973093Swnj * bother with interrupts. 6983093Swnj */ 6992624Swnj hpaddr->hpcs1 = HP_RTC|HP_GO; 70016225Skarels while ((hpaddr->hpds & (HPDS_DRY | HPDS_PIP)) != HPDS_DRY) 701*16791Skarels DELAY(10); 7022383Swnj mbclrattn(mi); 70321Sbill } 7045726Sroot if (!ML11) { 7055726Sroot hpaddr->hpof = HPOF_FMT22; 7065726Sroot hpaddr->hpcs1 = HP_RELEASE|HP_GO; 7075726Sroot } 7082383Swnj return (MBD_DONE); 70921Sbill } 71021Sbill 7117738Sroot hpread(dev, uio) 7122624Swnj dev_t dev; 7137738Sroot struct uio *uio; 71421Sbill { 7152624Swnj register int unit = minor(dev) >> 3; 71621Sbill 7172624Swnj if (unit >= NHP) 7188156Sroot return (ENXIO); 7198156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys, uio)); 72021Sbill } 72121Sbill 7227831Sroot hpwrite(dev, uio) 7232624Swnj dev_t dev; 7247831Sroot struct uio *uio; 72521Sbill { 7262624Swnj register int unit = minor(dev) >> 3; 72721Sbill 7282624Swnj if (unit >= NHP) 7298156Sroot return (ENXIO); 7308156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys, uio)); 73121Sbill } 73221Sbill 7335726Sroot /*ARGSUSED*/ 7347635Ssam hpioctl(dev, cmd, data, flag) 7355726Sroot dev_t dev; 7365726Sroot int cmd; 7377635Ssam caddr_t data; 7385726Sroot int flag; 7395726Sroot { 7405726Sroot 7415726Sroot switch (cmd) { 7427635Ssam 7435726Sroot case DKIOCHDR: /* do header read/write */ 74410857Ssam hpsoftc[minor(dev) >> 3].sc_hdr = 1; 7458579Sroot return (0); 7465726Sroot 7475726Sroot default: 7488579Sroot return (ENXIO); 7495726Sroot } 7505726Sroot } 7515726Sroot 7523706Sroot hpecc(mi, flag) 7532978Swnj register struct mba_device *mi; 7543706Sroot int flag; 75521Sbill { 7562383Swnj register struct mba_regs *mbp = mi->mi_mba; 7572624Swnj register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv; 7582383Swnj register struct buf *bp = mi->mi_tab.b_actf; 7593706Sroot register struct hpst *st = &hpst[mi->mi_type]; 7603706Sroot int npf, o; 7612383Swnj int bn, cn, tn, sn; 762914Sbill int bcr; 76321Sbill 76411202Ssam bcr = MASKREG(mbp->mba_bcr); 765914Sbill if (bcr) 766914Sbill bcr |= 0xffff0000; /* sxt */ 7673706Sroot if (flag == CONT) 7683706Sroot npf = bp->b_error; 7693706Sroot else 7703706Sroot npf = btop(bcr + bp->b_bcount); 771420Sbill o = (int)bp->b_un.b_addr & PGOFSET; 772420Sbill bn = dkblock(bp); 773420Sbill cn = bp->b_cylin; 7743706Sroot sn = bn%(st->nspc) + npf; 7752383Swnj tn = sn/st->nsect; 7762383Swnj sn %= st->nsect; 7772383Swnj cn += tn/st->ntrak; 7782383Swnj tn %= st->ntrak; 7793706Sroot switch (flag) { 78010856Ssam case ECC: { 7813706Sroot register int i; 7823706Sroot caddr_t addr; 7833706Sroot struct pte mpte; 7843706Sroot int bit, byte, mask; 7853706Sroot 7863706Sroot npf--; /* because block in error is previous block */ 7873706Sroot printf("hp%d%c: soft ecc sn%d\n", dkunit(bp), 7883706Sroot 'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf); 78911202Ssam mask = MASKREG(rp->hpec2); 79011202Ssam i = MASKREG(rp->hpec1) - 1; /* -1 makes 0 origin */ 7913706Sroot bit = i&07; 7923706Sroot i = (i&~07)>>3; 7933706Sroot byte = i + o; 7943706Sroot while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { 7953706Sroot mpte = mbp->mba_map[npf+btop(byte)]; 7963706Sroot addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET); 7973706Sroot putmemc(addr, getmemc(addr)^(mask<<bit)); 7983706Sroot byte++; 7993706Sroot i++; 8003706Sroot bit -= 8; 8013706Sroot } 8023706Sroot if (bcr == 0) 8033706Sroot return (0); 8043847Sroot npf++; 8053706Sroot break; 8063706Sroot } 8073706Sroot 8083706Sroot case SSE: 8093706Sroot rp->hpof |= HPOF_SSEI; 8103706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 8113706Sroot break; 8123706Sroot 8133706Sroot case BSE: 8143706Sroot #ifdef HPBDEBUG 8153706Sroot if (hpbdebug) 8163706Sroot printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn); 8173706Sroot #endif 81811202Ssam if (rp->hpof&HPOF_SSEI) 81911202Ssam sn++; 8203706Sroot if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0) 82111202Ssam return (0); 8223706Sroot bp->b_flags |= B_BAD; 8233706Sroot bp->b_error = npf + 1; 8243706Sroot bn = st->ncyl*st->nspc - st->nsect - 1 - bn; 8253706Sroot cn = bn/st->nspc; 8263706Sroot sn = bn%st->nspc; 8273706Sroot tn = sn/st->nsect; 8283706Sroot sn %= st->nsect; 8293706Sroot mbp->mba_bcr = -512; 83010886Shelge rp->hpof &= ~HPOF_SSEI; 8313706Sroot #ifdef HPBDEBUG 8323706Sroot if (hpbdebug) 8333706Sroot printf("revector to cn %d tn %d sn %d\n", cn, tn, sn); 8343706Sroot #endif 8353706Sroot break; 8363706Sroot 8373706Sroot case CONT: 8383706Sroot #ifdef HPBDEBUG 8393706Sroot if (hpbdebug) 8403706Sroot printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn); 8413706Sroot #endif 8423706Sroot npf = bp->b_error; 8433706Sroot bp->b_flags &= ~B_BAD; 8443706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 84511202Ssam if (MASKREG(mbp->mba_bcr) == 0) 84611202Ssam return (0); 8473706Sroot break; 8483706Sroot } 8493706Sroot rp->hpcs1 = HP_DCLR|HP_GO; 8503350Swnj if (rp->hpof&HPOF_SSEI) 8512883Swnj sn++; 852420Sbill rp->hpdc = cn; 853420Sbill rp->hpda = (tn<<8) + sn; 854420Sbill mbp->mba_sr = -1; 8553706Sroot mbp->mba_var = (int)ptob(npf) + o; 8563706Sroot rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO; 8573706Sroot mi->mi_tab.b_errcnt = 0; /* error has been corrected */ 858420Sbill return (1); 85921Sbill } 8602362Swnj 8612362Swnj #define DBSIZE 20 8622362Swnj 8632362Swnj hpdump(dev) 8642362Swnj dev_t dev; 8652362Swnj { 8662978Swnj register struct mba_device *mi; 8672383Swnj register struct mba_regs *mba; 8682624Swnj struct hpdevice *hpaddr; 8692362Swnj char *start; 8702383Swnj int num, unit; 8712383Swnj register struct hpst *st; 8722362Swnj 8732362Swnj num = maxfree; 8742362Swnj start = 0; 8752362Swnj unit = minor(dev) >> 3; 8762827Swnj if (unit >= NHP) 8772827Swnj return (ENXIO); 8782383Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 8792978Swnj mi = phys(hpinfo[unit],struct mba_device *); 8802827Swnj if (mi == 0 || mi->mi_alive == 0) 8812827Swnj return (ENXIO); 8822383Swnj mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba; 8833102Swnj mba->mba_cr = MBCR_INIT; 8842624Swnj hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive]; 8853093Swnj if ((hpaddr->hpds & HPDS_VV) == 0) { 8862624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 8872624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 8883093Swnj hpaddr->hpof = HPOF_FMT22; 8892362Swnj } 8902383Swnj st = &hpst[mi->mi_type]; 8912827Swnj if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks) 8922827Swnj return (EINVAL); 8932362Swnj while (num > 0) { 8942383Swnj register struct pte *hpte = mba->mba_map; 8952362Swnj register int i; 8962383Swnj int blk, cn, sn, tn; 8972362Swnj daddr_t bn; 8982362Swnj 8992362Swnj blk = num > DBSIZE ? DBSIZE : num; 9002362Swnj bn = dumplo + btop(start); 9012383Swnj cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff; 9022383Swnj sn = bn%st->nspc; 9032383Swnj tn = sn/st->nsect; 9042383Swnj sn = sn%st->nsect; 9052362Swnj hpaddr->hpdc = cn; 9062362Swnj hpaddr->hpda = (tn << 8) + sn; 9072362Swnj for (i = 0; i < blk; i++) 9082362Swnj *(int *)hpte++ = (btop(start)+i) | PG_V; 9092383Swnj mba->mba_sr = -1; 9102383Swnj mba->mba_bcr = -(blk*NBPG); 9112383Swnj mba->mba_var = 0; 9122624Swnj hpaddr->hpcs1 = HP_WCOM | HP_GO; 9133093Swnj while ((hpaddr->hpds & HPDS_DRY) == 0) 914*16791Skarels DELAY(10); 9153093Swnj if (hpaddr->hpds&HPDS_ERR) 9162827Swnj return (EIO); 9172362Swnj start += blk*NBPG; 9182362Swnj num -= blk; 9192362Swnj } 9202362Swnj return (0); 9212362Swnj } 92212506Ssam 92312506Ssam hpsize(dev) 92412506Ssam dev_t dev; 92512506Ssam { 92612506Ssam int unit = minor(dev) >> 3; 92712506Ssam struct mba_device *mi; 92812506Ssam struct hpst *st; 92912506Ssam 93012506Ssam if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0) 93112506Ssam return (-1); 93212506Ssam st = &hpst[mi->mi_type]; 93312506Ssam return ((int)st->sizes[minor(dev) & 07].nblocks); 93412506Ssam } 9351565Sbill #endif 936