xref: /csrg-svn/sys/vax/mba/hp.c (revision 14145)
1*14145Shelge /*	hp.c	4.81	83/07/26	*/
23706Sroot 
33706Sroot #ifdef HPDEBUG
43289Swnj int	hpdebug;
53706Sroot #endif
63706Sroot #ifdef HPBDEBUG
73706Sroot int	hpbdebug;
83706Sroot #endif
921Sbill 
101939Swnj #include "hp.h"
111565Sbill #if NHP > 0
1221Sbill /*
135726Sroot  * HP disk driver for RP0x+RMxx+ML11
142827Swnj  *
152827Swnj  * TODO:
163706Sroot  *	check RM80 skip sector handling when ECC's occur later
173093Swnj  *	check offset recovery handling
183706Sroot  *	see if DCLR and/or RELEASE set attention status
193706Sroot  *	print bits of mr && mr2 symbolically
2021Sbill  */
219786Ssam #include "../machine/pte.h"
2221Sbill 
2321Sbill #include "../h/param.h"
2421Sbill #include "../h/systm.h"
25305Sbill #include "../h/dk.h"
2621Sbill #include "../h/buf.h"
2721Sbill #include "../h/conf.h"
2821Sbill #include "../h/dir.h"
2921Sbill #include "../h/user.h"
3021Sbill #include "../h/map.h"
318468Sroot #include "../vax/mtpr.h"
32420Sbill #include "../h/vm.h"
332362Swnj #include "../h/cmap.h"
343706Sroot #include "../h/dkbad.h"
357635Ssam #include "../h/ioctl.h"
367738Sroot #include "../h/uio.h"
3721Sbill 
388988Sroot #include "../vax/dkio.h"
398468Sroot #include "../vaxmba/mbareg.h"
408468Sroot #include "../vaxmba/mbavar.h"
418468Sroot #include "../vaxmba/hpreg.h"
4221Sbill 
432383Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */
442383Swnj struct	size {
4521Sbill 	daddr_t	nblocks;
4621Sbill 	int	cyloff;
4711212Ssam } rp06_sizes[8] = {
48886Sbill 	15884,	0,		/* A=cyl 0 thru 37 */
49886Sbill 	33440,	38,		/* B=cyl 38 thru 117 */
50886Sbill 	340670,	0,		/* C=cyl 0 thru 814 */
5111212Ssam 	15884,	118,		/* D=cyl 118 thru 155 */
5211212Ssam 	55936,	156,		/* E=cyl 156 thru 289 */
5311212Ssam 	219384,	290,		/* F=cyl 290 thru 814 */
5411212Ssam 	291280,	118,		/* G=cyl 118 thru 814 */
5521Sbill 	0,	0,
5611212Ssam }, rp05_sizes[8] = {
5711212Ssam 	15884,	0,		/* A=cyl 0 thru 37 */
5811212Ssam 	33440,	38,		/* B=cyl 38 thru 117 */
5911212Ssam 	171798,	0,		/* C=cyl 0 thru 410 */
6011212Ssam 	15884,	118,		/* D=cyl 118 thru 155 */
6111212Ssam 	55936,	156,		/* E=cyl 156 thru 289 */
6211212Ssam 	50512,	290,		/* F=cyl 290 thru 410 */
6311212Ssam 	122408,	118,		/* G=cyl 118 thru 410 */
6421Sbill 	0,	0,
6511212Ssam }, rm03_sizes[8] = {
66886Sbill 	15884,	0,		/* A=cyl 0 thru 99 */
6711212Ssam 	33440,	100,		/* B=cyl 100 thru 308 */
68886Sbill 	131680,	0,		/* C=cyl 0 thru 822 */
6911212Ssam 	15884,	309,		/* D=cyl 309 thru 408 */
7011212Ssam 	55936,	409,		/* E=cyl 409 thru 758 */
7111212Ssam 	10144,	759,		/* F=cyl 759 thru 822 */
7211212Ssam 	82144,	309,		/* G=cyl 309 thru 822 */
7321Sbill 	0,	0,
7411212Ssam }, rm05_sizes[8] = {
75886Sbill 	15884,	0,		/* A=cyl 0 thru 26 */
76886Sbill 	33440,	27,		/* B=cyl 27 thru 81 */
773271Swnj 	500384,	0,		/* C=cyl 0 thru 822 */
78886Sbill 	15884,	562,		/* D=cyl 562 thru 588 */
79886Sbill 	55936,	589,		/* E=cyl 589 thru 680 */
803729Sroot 	86240,	681,		/* F=cyl 681 thru 822 */
813729Sroot 	158592,	562,		/* G=cyl 562 thru 822 */
82886Sbill 	291346,	82,		/* H=cyl 82 thru 561 */
832383Swnj }, rm80_sizes[8] = {
842383Swnj 	15884,	0,		/* A=cyl 0 thru 36 */
852383Swnj 	33440,	37,		/* B=cyl 37 thru 114 */
862383Swnj 	242606,	0,		/* C=cyl 0 thru 558 */
8711212Ssam 	15884,	115,		/* D=cyl 115 thru 151 */
8811212Ssam 	55936,	152,		/* E=cyl 152 thru 280 */
8911212Ssam 	120559,	281,		/* F=cyl 281 thru 558 */
9011212Ssam 	192603,	115,		/* G=cyl 115 thru 558 */
912383Swnj 	0,	0,
9211212Ssam }, rp07_sizes[8] = {
936927Ssam 	15884,	0,		/* A=cyl 0 thru 9 */
9411212Ssam 	66880,	10,		/* B=cyl 10 thru 51 */
9511212Ssam 	1008000, 0,		/* C=cyl 0 thru 629 */
9611212Ssam 	15884,	235,		/* D=cyl 235 thru 244 */
9711212Ssam 	307200,	245,		/* E=cyl 245 thru 436 */
9811212Ssam 	308650,	437,		/* F=cyl 437 thru 629 */
9911212Ssam 	631850,	235,		/* G=cyl 235 thru 629 */
10011212Ssam 	291346,	52,		/* H=cyl 52 thru 234 */
10111212Ssam }, cdc9775_sizes[8] = {
10211212Ssam 	15884,	0,		/* A=cyl 0 thru 12 */
10311212Ssam 	66880,	13,		/* B=cyl 13 thru 65 */
10411212Ssam 	1079040, 0,		/* C=cyl 0 thru 842 */
10511212Ssam 	15884,	294,		/* D=cyl 294 thru 306 */
10611212Ssam 	307200,	307,		/* E=cyl 307 thru 546 */
10711212Ssam 	378784,	547,		/* F=cyl 547 thru 842 */
10811212Ssam 	702624,	294,		/* G=cyl 294 thru 842 */
10911212Ssam 	291346,	66,		/* H=cyl 66 thru 293 */
11011212Ssam }, cdc9730_sizes[8] = {
1116927Ssam 	15884,	0,		/* A=cyl 0 thru 49 */
1126927Ssam 	33440,	50,		/* B=cyl 50 thru 154 */
1136927Ssam 	263360,	0,		/* C=cyl 0 thru 822 */
11411212Ssam 	15884,	155,		/* D=cyl 155 thru 204 */
11511212Ssam 	55936,	205,		/* E=cyl 205 thru 379 */
11611212Ssam 	141664,	380,		/* F=cyl 380 thru 822 */
11711212Ssam 	213664,	155,		/* G=cyl 155 thru 822 */
1186927Ssam 	0,	0,
11911212Ssam }, capricorn_sizes[8] = {
1206927Ssam 	15884,	0,		/* A=cyl 0 thru 31 */
1216927Ssam 	33440,	32,		/* B=cyl 32 thru 97 */
1226927Ssam 	524288,	0,		/* C=cyl 0 thru 1023 */
12311212Ssam 	15884,	668,		/* D=cyl 668 thru 699 */
12411212Ssam 	55936,	700,		/* E=cyl 700 thru 809 */
12511212Ssam 	109472,	810,		/* F=cyl 810 thru 1023 */
12611212Ssam 	182176,	668,		/* G=cyl 668 thru 1023 */
1276927Ssam 	291346,	98,		/* H=cyl 98 thru 667 */
12811212Ssam }, eagle_sizes[8] = {
12910734Ssam 	15884,	0,		/* A=cyl 0 thru 16 */
13011212Ssam 	66880,	17,		/* B=cyl 17 thru 86 */
13111629Ssam 	808320,	0,		/* C=cyl 0 thru 841 */
13211212Ssam 	15884,	391,		/* D=cyl 391 thru 407 */
13311212Ssam 	307200,	408,		/* E=cyl 408 thru 727 */
13411629Ssam 	109296,	728,		/* F=cyl 728 thru 841 */
13511629Ssam 	432816,	391,		/* G=cyl 391 thru 841 */
13611212Ssam 	291346,	87,		/* H=cyl 87 thru 390 */
13713202Sroot }, ampex_sizes[8] = {
13811281Ssam 	15884,	0,		/* A=cyl 0 thru 26 */
13911281Ssam 	33440,	27,		/* B=cyl 27 thru 81 */
14013184Shelge 	495520,	0,		/* C=cyl 0 thru 814 */
14111281Ssam 	15884,	562,		/* D=cyl 562 thru 588 */
14211281Ssam 	55936,	589,		/* E=cyl 589 thru 680 */
14313184Shelge 	81312,	681,		/* F=cyl 681 thru 814 */
14413184Shelge 	153664,	562,		/* G=cyl 562 thru 814 */
14511281Ssam 	291346,	82,		/* H=cyl 82 thru 561 */
14621Sbill };
1472383Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */
14821Sbill 
1496927Ssam /*
1506927Ssam  * Table for converting Massbus drive types into
1516927Ssam  * indices into the partition tables.  Slots are
1526927Ssam  * left for those drives devined from other means
1536927Ssam  * (e.g. SI, AMPEX, etc.).
1546927Ssam  */
1556927Ssam short	hptypes[] = {
1566927Ssam #define	HPDT_RM03	0
1576927Ssam 	MBDT_RM03,
1586927Ssam #define	HPDT_RM05	1
1596927Ssam 	MBDT_RM05,
1606927Ssam #define	HPDT_RP06	2
1616927Ssam 	MBDT_RP06,
1626927Ssam #define	HPDT_RM80	3
1636927Ssam 	MBDT_RM80,
16413157Ssam #define	HPDT_RP04	4
16513157Ssam 	MBDT_RP04,
16613157Ssam #define	HPDT_RP05	5
1676927Ssam 	MBDT_RP05,
16813157Ssam #define	HPDT_RP07	6
1696927Ssam 	MBDT_RP07,
17013157Ssam #define	HPDT_ML11A	7
1716927Ssam 	MBDT_ML11A,
17213157Ssam #define	HPDT_ML11B	8
1736927Ssam 	MBDT_ML11B,
17413157Ssam #define	HPDT_9775	9
1756927Ssam 	-1,
17613157Ssam #define	HPDT_9730	10
1776927Ssam 	-1,
17813157Ssam #define	HPDT_CAPRICORN	11
1796927Ssam 	-1,
18013157Ssam #define HPDT_EAGLE	12
1819175Ssam 	-1,
18213157Ssam #define	HPDT_9300	13
18311281Ssam 	-1,
18413157Ssam #define HPDT_RM02	14
1859175Ssam 	MBDT_RM02,		/* beware, actually capricorn or eagle */
1866927Ssam 	0
1876927Ssam };
1882978Swnj struct	mba_device *hpinfo[NHP];
189*14145Shelge int	hpattach(),hpustart(),hpstart(),hpdtint();
1902383Swnj struct	mba_driver hpdriver =
1912978Swnj 	{ hpattach, 0, hpustart, hpstart, hpdtint, 0,
1922978Swnj 	  hptypes, "hp", 0, hpinfo };
1932383Swnj 
19412836Ssam /*
19512836Ssam  * Beware, sdist and rdist are not well tuned
19612836Ssam  * for many of the drives listed in this table.
19712836Ssam  * Try patching things with something i/o intensive
19812836Ssam  * running and watch iostat.
19912836Ssam  */
2002383Swnj struct hpst {
20112836Ssam 	short	nsect;		/* # sectors/track */
20212836Ssam 	short	ntrak;		/* # tracks/cylinder */
20312836Ssam 	short	nspc;		/* # sector/cylinders */
20412836Ssam 	short	ncyl;		/* # cylinders */
20512836Ssam 	struct	size *sizes;	/* partition tables */
20612836Ssam 	short	sdist;		/* seek distance metric */
20712836Ssam 	short	rdist;		/* rotational distance metric */
2082383Swnj } hpst[] = {
20912836Ssam 	{ 32,	5,	32*5,	823,	rm03_sizes,	3, 4 },	/* RM03 */
21012836Ssam 	{ 32,	19,	32*19,	823,	rm05_sizes,	3, 4 },	/* RM05 */
21112836Ssam 	{ 22,	19,	22*19,	815,	rp06_sizes,	3, 4 },	/* RP06 */
21212836Ssam 	{ 31,	14, 	31*14,	559,	rm80_sizes,	3, 4 },	/* RM80 */
21313157Ssam 	{ 22,	19,	22*19,	411,	rp05_sizes,	3, 4 },	/* RP04 */
21412836Ssam 	{ 22,	19,	22*19,	411,	rp05_sizes,	3, 4 },	/* RP05 */
21512836Ssam 	{ 50,	32,	50*32,	630,	rp07_sizes,	7, 8 },	/* RP07 */
21612836Ssam 	{ 1,	1,	1,	1,	0,		0, 0 },	/* ML11A */
21712836Ssam 	{ 1,	1,	1,	1,	0,		0, 0 },	/* ML11B */
21812836Ssam 	{ 32,	40,	32*40,	843,	cdc9775_sizes,	3, 4 },	/* 9775 */
21912836Ssam 	{ 32,	10,	32*10,	823,	cdc9730_sizes,	3, 4 },	/* 9730 */
22012836Ssam 	{ 32,	16,	32*16,	1024,	capricorn_sizes,7, 8 },	/* Capricorn */
22112836Ssam 	{ 48,	20,	48*20,	842,	eagle_sizes,	7, 8 },	/* EAGLE */
22213202Sroot 	{ 32,	19,	32*19,	815,	ampex_sizes,	3, 4 },	/* 9300 */
2232383Swnj };
2242383Swnj 
2252624Swnj u_char	hp_offset[16] = {
2263093Swnj     HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400,
2273093Swnj     HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800,
2283093Swnj     HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200,
2293093Swnj     0, 0, 0, 0,
23021Sbill };
23121Sbill 
2322624Swnj struct	buf	rhpbuf[NHP];
2333706Sroot struct	buf	bhpbuf[NHP];
2343706Sroot struct	dkbad	hpbad[NHP];
23521Sbill 
23610857Ssam struct	hpsoftc {
23710857Ssam 	u_char	sc_hpinit;	/* drive initialized */
23810857Ssam 	u_char	sc_recal;	/* recalibrate state */
23910857Ssam 	u_char	sc_hdr;		/* next i/o includes header */
24010857Ssam 	u_char	sc_doseeks;	/* perform explicit seeks */
24110857Ssam 	daddr_t	sc_mlsize;	/* ML11 size */
24210857Ssam } hpsoftc[NHP];
24310857Ssam 
24421Sbill #define	b_cylin b_resid
24521Sbill 
2465726Sroot /* #define ML11 0  to remove ML11 support */
2475726Sroot #define	ML11	(hptypes[mi->mi_type] == MBDT_ML11A)
2485726Sroot #define	RP06	(hptypes[mi->mi_type] <= MBDT_RP06)
2495726Sroot #define	RM80	(hptypes[mi->mi_type] == MBDT_RM80)
2505726Sroot 
25111202Ssam #define	MASKREG(reg)	((reg)&0xffff)
25211202Ssam 
25321Sbill #ifdef INTRLVE
25421Sbill daddr_t dkblock();
25521Sbill #endif
2562604Swnj 
2572978Swnj /*ARGSUSED*/
2582978Swnj hpattach(mi, slave)
25910734Ssam 	register struct mba_device *mi;
2602604Swnj {
26110734Ssam 
26210734Ssam 	mi->mi_type = hpmaptype(mi);
26310734Ssam 	if (!ML11 && mi->mi_dk >= 0) {
26410734Ssam 		struct hpst *st = &hpst[mi->mi_type];
26510734Ssam 
26610734Ssam 		dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256);
26710734Ssam 	}
26810734Ssam }
26910734Ssam 
27010734Ssam /*
27110734Ssam  * Map apparent MASSBUS drive type into manufacturer
27210734Ssam  * specific configuration.  For SI controllers this is done
27310734Ssam  * based on codes in the serial number register.  For
27410734Ssam  * EMULEX controllers, the track and sector attributes are
27510734Ssam  * used when the drive type is an RM02 (not supported by DEC).
27610734Ssam  */
27710734Ssam hpmaptype(mi)
27810734Ssam 	register struct mba_device *mi;
27910734Ssam {
2806927Ssam 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
28110734Ssam 	register int type = mi->mi_type;
2826927Ssam 
2836927Ssam 	/*
28411281Ssam 	 * Model-byte processing for SI controllers.
2856927Ssam 	 * NB:  Only deals with RM03 and RM05 emulations.
2866927Ssam 	 */
28710734Ssam 	if (type == HPDT_RM03 || type == HPDT_RM05) {
28810734Ssam 		int hpsn = hpaddr->hpsn;
2896927Ssam 
2906927Ssam 		if ((hpsn & SIMB_LU) != mi->mi_drive)
29110734Ssam 			return (type);
2926927Ssam 		switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) {
2936927Ssam 
2946927Ssam 		case SI9775D:
29511281Ssam 			printf("hp%d: 9775 (direct)\n", mi->mi_unit);
29610734Ssam 			type = HPDT_9775;
2976927Ssam 			break;
2986927Ssam 
2996927Ssam 		case SI9730D:
30011281Ssam 			printf("hp%d: 9730 (direct)\n", mi->mi_unit);
30110734Ssam 			type = HPDT_9730;
3026927Ssam 			break;
3036927Ssam 
3047035Swnj 		/*
30511281Ssam 		 * Beware, since the only SI controller we
30611281Ssam 		 * have has a 9300 instead of a 9766, we map the
30711281Ssam 		 * drive type into the 9300.  This means that
30811281Ssam 		 * on a 9766 you lose the last 8 cylinders (argh).
3097035Swnj 		 */
3106927Ssam 		case SI9766:
31111281Ssam 			printf("hp%d: 9300\n", mi->mi_unit);
31211281Ssam 			type = HPDT_9300;
3136927Ssam 			break;
3146927Ssam 
3156927Ssam 		case SI9762:
3166927Ssam 			printf("hp%d: 9762\n", mi->mi_unit);
31710734Ssam 			type = HPDT_RM03;
3186927Ssam 			break;
31911281Ssam 
32011281Ssam 		case SICAPD:
32111281Ssam 			printf("hp%d: capricorn\n", mi->mi_unit);
32211281Ssam 			type = HPDT_CAPRICORN;
32311281Ssam 			break;
32411281Ssam 
32511281Ssam 		case SI9751D:
32611281Ssam 			printf("hp%d: eagle\n", mi->mi_unit);
32711281Ssam 			type = HPDT_EAGLE;
32811281Ssam 			break;
3296927Ssam 		}
33010734Ssam 		return (type);
33110734Ssam 	}
3326927Ssam 
3336927Ssam 	/*
33410734Ssam 	 * EMULEX SC750 or SC780.  Poke the holding register.
3356927Ssam 	 */
33610734Ssam 	if (type == HPDT_RM02) {
33710734Ssam 		int ntracks, nsectors;
33810734Ssam 
33911315Ssam 		hpaddr->hpof = HPOF_FMT22;
34011315Ssam 		mbclrattn(mi);
3416927Ssam 		hpaddr->hpcs1 = HP_NOP;
3426927Ssam 		hpaddr->hphr = HPHR_MAXTRAK;
34311202Ssam 		ntracks = MASKREG(hpaddr->hphr) + 1;
34410055Ssam 		if (ntracks == 16) {
3456927Ssam 			printf("hp%d: capricorn\n", mi->mi_unit);
34610734Ssam 			type = HPDT_CAPRICORN;
34710734Ssam 			goto done;
34810734Ssam 		}
34913157Ssam 		if (ntracks == 19) {
35013157Ssam 			printf("hp%d: 9300\n", mi->mi_unit);
35113157Ssam 			type = HPDT_9300;
35213157Ssam 			goto done;
35313157Ssam 		}
35410734Ssam 		hpaddr->hpcs1 = HP_NOP;
35510734Ssam 		hpaddr->hphr = HPHR_MAXSECT;
35611202Ssam 		nsectors = MASKREG(hpaddr->hphr) + 1;
35711315Ssam 		if (ntracks == 20 && nsectors == 48) {
35810734Ssam 			type = HPDT_EAGLE;
35911212Ssam 			printf("hp%d: eagle\n", mi->mi_unit);
36011315Ssam 			goto done;
36110734Ssam 		}
36211315Ssam 		printf("hp%d: ntracks %d, nsectors %d: unknown device\n",
36313157Ssam 			mi->mi_unit, ntracks, nsectors);
36410734Ssam done:
3656927Ssam 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
36611315Ssam 		mbclrattn(mi);		/* conservative */
36710734Ssam 		return (type);
36810734Ssam 	}
3696927Ssam 
37010734Ssam 	/*
37110734Ssam 	 * Map all ML11's to the same type.  Also calculate
37210734Ssam 	 * transfer rates based on device characteristics.
37310734Ssam 	 */
37410734Ssam 	if (type == HPDT_ML11A || type == HPDT_ML11B) {
37510857Ssam 		register struct hpsoftc *sc = &hpsoftc[mi->mi_unit];
37610857Ssam 		register int trt;
3772604Swnj 
37810857Ssam 		sc->sc_mlsize = hpaddr->hpmr & HPMR_SZ;
3795726Sroot 		if ((hpaddr->hpmr & HPMR_ARRTYP) == 0)
38010857Ssam 			sc->sc_mlsize >>= 2;
3815726Sroot 		if (mi->mi_dk >= 0) {
3825726Sroot 			trt = (hpaddr->hpmr & HPMR_TRT) >> 8;
3835726Sroot 			dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt));
3845726Sroot 		}
38510734Ssam 		type = HPDT_ML11A;
3866927Ssam 	}
38710734Ssam 	return (type);
3882604Swnj }
3892604Swnj 
3908579Sroot hpopen(dev)
3918579Sroot 	dev_t dev;
3928579Sroot {
3938579Sroot 	register int unit = minor(dev) >> 3;
3948579Sroot 	register struct mba_device *mi;
3958579Sroot 
3968579Sroot 	if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0)
3978579Sroot 		return (ENXIO);
3988579Sroot 	return (0);
3998579Sroot }
4008579Sroot 
40121Sbill hpstrategy(bp)
4022383Swnj 	register struct buf *bp;
40321Sbill {
4042978Swnj 	register struct mba_device *mi;
4052383Swnj 	register struct hpst *st;
4062383Swnj 	register int unit;
40721Sbill 	long sz, bn;
4082383Swnj 	int xunit = minor(bp->b_dev) & 07;
4095432Sroot 	int s;
41021Sbill 
41121Sbill 	sz = bp->b_bcount;
41221Sbill 	sz = (sz+511) >> 9;
41321Sbill 	unit = dkunit(bp);
4142383Swnj 	if (unit >= NHP)
4152383Swnj 		goto bad;
4162383Swnj 	mi = hpinfo[unit];
4172395Swnj 	if (mi == 0 || mi->mi_alive == 0)
4182383Swnj 		goto bad;
4192383Swnj 	st = &hpst[mi->mi_type];
4205726Sroot 	if (ML11) {
42110857Ssam 		struct hpsoftc *sc = &hpsoftc[unit];
42210857Ssam 
4235726Sroot 		if (bp->b_blkno < 0 ||
42410857Ssam 		    dkblock(bp)+sz > sc->sc_mlsize)
4255726Sroot 			goto bad;
4265726Sroot 		bp->b_cylin = 0;
4275726Sroot 	} else {
4285726Sroot 		if (bp->b_blkno < 0 ||
4295726Sroot 		    (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks)
4305726Sroot 			goto bad;
4315726Sroot 		bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff;
4325726Sroot 	}
4335432Sroot 	s = spl5();
4342383Swnj 	disksort(&mi->mi_tab, bp);
4352383Swnj 	if (mi->mi_tab.b_active == 0)
4362383Swnj 		mbustart(mi);
4375432Sroot 	splx(s);
4382383Swnj 	return;
4392383Swnj 
4402383Swnj bad:
4412383Swnj 	bp->b_flags |= B_ERROR;
4422383Swnj 	iodone(bp);
4432383Swnj 	return;
44421Sbill }
44521Sbill 
4462383Swnj hpustart(mi)
4472978Swnj 	register struct mba_device *mi;
44821Sbill {
4492624Swnj 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
4502383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
45111315Ssam 	register struct hpst *st;
45210857Ssam 	struct hpsoftc *sc = &hpsoftc[mi->mi_unit];
45321Sbill 	daddr_t bn;
4543102Swnj 	int sn, dist;
45521Sbill 
45611315Ssam 	st = &hpst[mi->mi_type];
4573706Sroot 	hpaddr->hpcs1 = 0;
4582624Swnj 	if ((hpaddr->hpcs1&HP_DVA) == 0)
4592383Swnj 		return (MBU_BUSY);
46010857Ssam 	if ((hpaddr->hpds & HPDS_VV) == 0 || !sc->sc_hpinit) {
4613706Sroot 		struct buf *bbp = &bhpbuf[mi->mi_unit];
4623706Sroot 
46310857Ssam 		sc->sc_hpinit = 1;
4642624Swnj 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
4653140Swnj 		if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive))
4663140Swnj 			printf("DCLR attn\n");
4672624Swnj 		hpaddr->hpcs1 = HP_PRESET|HP_GO;
4685726Sroot 		if (!ML11)
4695726Sroot 			hpaddr->hpof = HPOF_FMT22;
4703140Swnj 		mbclrattn(mi);
4715726Sroot 		if (!ML11) {
4725726Sroot 			bbp->b_flags = B_READ|B_BUSY;
4735726Sroot 			bbp->b_dev = bp->b_dev;
4745726Sroot 			bbp->b_bcount = 512;
4755726Sroot 			bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit];
4765726Sroot 			bbp->b_blkno = st->ncyl*st->nspc - st->nsect;
4775726Sroot 			bbp->b_cylin = st->ncyl - 1;
4785726Sroot 			mi->mi_tab.b_actf = bbp;
4795726Sroot 			bbp->av_forw = bp;
4805726Sroot 			bp = bbp;
4815726Sroot 		}
48221Sbill 	}
4832604Swnj 	if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1)
4842383Swnj 		return (MBU_DODATA);
4855726Sroot 	if (ML11)
4865726Sroot 		return (MBU_DODATA);
4873093Swnj 	if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY)
4882383Swnj 		return (MBU_DODATA);
4892395Swnj 	bn = dkblock(bp);
4902395Swnj 	sn = bn%st->nspc;
49112836Ssam 	sn = (sn + st->nsect - st->sdist) % st->nsect;
49211202Ssam 	if (bp->b_cylin == MASKREG(hpaddr->hpdc)) {
49310908Ssam 		if (sc->sc_doseeks)
4942383Swnj 			return (MBU_DODATA);
49511202Ssam 		dist = (MASKREG(hpaddr->hpla) >> 6) - st->nsect + 1;
4962383Swnj 		if (dist < 0)
4972383Swnj 			dist += st->nsect;
49812836Ssam 		if (dist > st->nsect - st->rdist)
4992383Swnj 			return (MBU_DODATA);
5002614Swnj 	} else
5012614Swnj 		hpaddr->hpdc = bp->b_cylin;
50210908Ssam 	if (sc->sc_doseeks)
5032624Swnj 		hpaddr->hpcs1 = HP_SEEK|HP_GO;
504305Sbill 	else {
505305Sbill 		hpaddr->hpda = sn;
5062624Swnj 		hpaddr->hpcs1 = HP_SEARCH|HP_GO;
507305Sbill 	}
5082383Swnj 	return (MBU_STARTED);
50921Sbill }
51021Sbill 
5112383Swnj hpstart(mi)
5122978Swnj 	register struct mba_device *mi;
51321Sbill {
5142624Swnj 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
5152383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
5162383Swnj 	register struct hpst *st = &hpst[mi->mi_type];
51710857Ssam 	struct hpsoftc *sc = &hpsoftc[mi->mi_unit];
51821Sbill 	daddr_t bn;
5192383Swnj 	int sn, tn;
52021Sbill 
52121Sbill 	bn = dkblock(bp);
5225726Sroot 	if (ML11)
5235726Sroot 		hpaddr->hpda = bn;
5245726Sroot 	else {
5255726Sroot 		sn = bn%st->nspc;
5265726Sroot 		tn = sn/st->nsect;
5275726Sroot 		sn %= st->nsect;
5285726Sroot 		hpaddr->hpdc = bp->b_cylin;
5295726Sroot 		hpaddr->hpda = (tn << 8) + sn;
5305726Sroot 	}
53110857Ssam 	if (sc->sc_hdr) {
5325726Sroot 		if (bp->b_flags & B_READ)
5335726Sroot 			return (HP_RHDR|HP_GO);
5345726Sroot 		else
5355726Sroot 			return (HP_WHDR|HP_GO);
5365726Sroot 	}
5375726Sroot 	return (0);
53821Sbill }
53921Sbill 
5403102Swnj hpdtint(mi, mbsr)
5412978Swnj 	register struct mba_device *mi;
5423102Swnj 	int mbsr;
54321Sbill {
5442624Swnj 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
5452383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
54611315Ssam 	register struct hpst *st;
5475893Swnj 	register int er1, er2;
54810857Ssam 	struct hpsoftc *sc = &hpsoftc[mi->mi_unit];
5492826Swnj 	int retry = 0;
55021Sbill 
55111315Ssam 	st = &hpst[mi->mi_type];
55211315Ssam 	if (bp->b_flags&B_BAD && hpecc(mi, CONT))
55311315Ssam 		return (MBD_RESTARTED);
5543102Swnj 	if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) {
555*14145Shelge 		er1 = hpaddr->hper1;
556*14145Shelge 		er2 = hpaddr->hper2;
5573706Sroot #ifdef HPDEBUG
5583289Swnj 		if (hpdebug) {
5593706Sroot 			int dc = hpaddr->hpdc, da = hpaddr->hpda;
5603706Sroot 
5613706Sroot 			printf("hperr: bp %x cyl %d blk %d as %o ",
5623706Sroot 				bp, bp->b_cylin, bp->b_blkno,
5633706Sroot 				hpaddr->hpas&0xff);
56411202Ssam 			printf("dc %x da %x\n",MASKREG(dc), MASKREG(da));
5653289Swnj 			printf("errcnt %d ", mi->mi_tab.b_errcnt);
5663289Swnj 			printf("mbsr=%b ", mbsr, mbsr_bits);
567*14145Shelge 			printf("er1=%b er2=%b\n", MASKREG(er1), HPER1_BITS,
568*14145Shelge 			    MASKREG(er2), HPER2_BITS);
5693289Swnj 			DELAY(1000000);
5703289Swnj 		}
5713706Sroot #endif
5725893Swnj 		if (er1 & HPER1_HCRC) {
5735858Swnj 			er1 &= ~(HPER1_HCE|HPER1_FER);
5745893Swnj 			er2 &= ~HPER2_BSE;
5755893Swnj 		}
5765858Swnj 		if (er1&HPER1_WLE) {
5772925Swnj 			printf("hp%d: write locked\n", dkunit(bp));
5782826Swnj 			bp->b_flags |= B_ERROR;
57911202Ssam 		} else if (MASKREG(er1) == HPER1_FER && RP06 && !sc->sc_hdr) {
5805726Sroot 			if (hpecc(mi, BSE))
58111202Ssam 				return (MBD_RESTARTED);
58211202Ssam 			goto hard;
5832826Swnj 		} else if (++mi->mi_tab.b_errcnt > 27 ||
5843102Swnj 		    mbsr & MBSR_HARD ||
5855858Swnj 		    er1 & HPER1_HARD ||
58610857Ssam 		    sc->sc_hdr ||
5875893Swnj 		    (!ML11 && (er2 & HPER2_HARD))) {
58810886Shelge  			/*
58914134Shelge  			 * HCRC means the header is screwed up and the sector
59014134Shelge  			 * might well exist in the bad sector table,
59114134Shelge 			 * better check....
59210886Shelge  			 */
59314134Shelge  			if ((er1&HPER1_HCRC) &&
59414134Shelge 			    !ML11 && !sc->sc_hdr && hpecc(mi, BSE))
59511202Ssam 				return (MBD_RESTARTED);
5963706Sroot hard:
59710622Shelge 			if (ML11)
59811202Ssam 				bp->b_blkno = MASKREG(hpaddr->hpda);
59910622Shelge 			else
60011202Ssam 				bp->b_blkno = MASKREG(hpaddr->hpdc) * st->nspc +
60111202Ssam 				   (MASKREG(hpaddr->hpda) >> 8) * st->nsect +
602*14145Shelge 				   (hpaddr->hpda&0xff);
60314134Shelge 			/*
60414134Shelge 			 * If we have a data check error or a hard
60514134Shelge 			 * ecc error the bad sector has been read/written,
60614134Shelge 			 * and the controller registers are pointing to
60714134Shelge 			 * the next sector...
60814134Shelge 			 */
609*14145Shelge 			 if (er1&(HPER1_DCK|HPER1_ECH) || sc->sc_hdr)
61014134Shelge 				bp->b_blkno--;
6112925Swnj 			harderr(bp, "hp");
6123271Swnj 			if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC)))
6133271Swnj 				printf("mbsr=%b ", mbsr, mbsr_bits);
6143706Sroot 			printf("er1=%b er2=%b",
615*14145Shelge 			    MASKREG(hpaddr->hper1), HPER1_BITS,
616*14145Shelge 			    MASKREG(hpaddr->hper2), HPER2_BITS);
6173706Sroot 			if (hpaddr->hpmr)
61811202Ssam 				printf(" mr=%o", MASKREG(hpaddr->hpmr));
6193706Sroot 			if (hpaddr->hpmr2)
62011202Ssam 				printf(" mr2=%o", MASKREG(hpaddr->hpmr2));
62114134Shelge 			if (sc->sc_hdr)
62214134Shelge 				printf(" (hdr i/o)");
6233706Sroot 			printf("\n");
6242826Swnj 			bp->b_flags |= B_ERROR;
62510622Shelge 			retry = 0;
62610857Ssam 			sc->sc_recal = 0;
6275893Swnj 		} else if ((er2 & HPER2_BSE) && !ML11) {
6283706Sroot 			if (hpecc(mi, BSE))
62911202Ssam 				return (MBD_RESTARTED);
63011315Ssam 			goto hard;
6315893Swnj 		} else if (RM80 && er2&HPER2_SSE) {
6323988Sroot 			(void) hpecc(mi, SSE);
6332883Swnj 			return (MBD_RESTARTED);
6345858Swnj 		} else if ((er1&(HPER1_DCK|HPER1_ECH))==HPER1_DCK) {
6353706Sroot 			if (hpecc(mi, ECC))
6362383Swnj 				return (MBD_RESTARTED);
6372826Swnj 			/* else done */
6382826Swnj 		} else
6392826Swnj 			retry = 1;
6402826Swnj 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
6415726Sroot 		if (ML11) {
6425726Sroot 			if (mi->mi_tab.b_errcnt >= 16)
6435726Sroot 				goto hard;
6445726Sroot 		} else if ((mi->mi_tab.b_errcnt&07) == 4) {
6452826Swnj 			hpaddr->hpcs1 = HP_RECAL|HP_GO;
64610857Ssam 			sc->sc_recal = 1;
64711202Ssam 			return (MBD_RESTARTED);
64821Sbill 		}
6492826Swnj 		if (retry)
6502826Swnj 			return (MBD_RETRY);
6512826Swnj 	}
6523706Sroot #ifdef HPDEBUG
6533289Swnj 	else
65410857Ssam 		if (hpdebug && sc->sc_recal) {
65510857Ssam 			printf("recal %d ", sc->sc_recal);
6563289Swnj 			printf("errcnt %d\n", mi->mi_tab.b_errcnt);
6573289Swnj 			printf("mbsr=%b ", mbsr, mbsr_bits);
6583289Swnj 			printf("er1=%b er2=%b\n",
6593289Swnj 			    hpaddr->hper1, HPER1_BITS,
6603289Swnj 			    hpaddr->hper2, HPER2_BITS);
6613289Swnj 		}
6623706Sroot #endif
66310857Ssam 	switch (sc->sc_recal) {
6643093Swnj 
6653093Swnj 	case 1:
6663093Swnj 		hpaddr->hpdc = bp->b_cylin;
6673093Swnj 		hpaddr->hpcs1 = HP_SEEK|HP_GO;
66810857Ssam 		sc->sc_recal++;
6693706Sroot 		return (MBD_RESTARTED);
6703093Swnj 	case 2:
6713093Swnj 		if (mi->mi_tab.b_errcnt < 16 ||
6723289Swnj 		    (bp->b_flags & B_READ) == 0)
6733093Swnj 			goto donerecal;
6743093Swnj 		hpaddr->hpof = hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22;
6753093Swnj 		hpaddr->hpcs1 = HP_OFFSET|HP_GO;
67610857Ssam 		sc->sc_recal++;
6773093Swnj 		return (MBD_RESTARTED);
6783093Swnj 	donerecal:
6793158Swnj 	case 3:
68010857Ssam 		sc->sc_recal = 0;
6812892Swnj 		return (MBD_RETRY);
6822892Swnj 	}
68310857Ssam 	sc->sc_hdr = 0;
68411202Ssam 	bp->b_resid = MASKREG(-mi->mi_mba->mba_bcr);
6853640Swnj 	if (mi->mi_tab.b_errcnt >= 16) {
6863093Swnj 		/*
6873093Swnj 		 * This is fast and occurs rarely; we don't
6883093Swnj 		 * bother with interrupts.
6893093Swnj 		 */
6902624Swnj 		hpaddr->hpcs1 = HP_RTC|HP_GO;
6913093Swnj 		while (hpaddr->hpds & HPDS_PIP)
6922383Swnj 			;
6932383Swnj 		mbclrattn(mi);
69421Sbill 	}
6955726Sroot 	if (!ML11) {
6965726Sroot 		hpaddr->hpof = HPOF_FMT22;
6975726Sroot 		hpaddr->hpcs1 = HP_RELEASE|HP_GO;
6985726Sroot 	}
6992383Swnj 	return (MBD_DONE);
70021Sbill }
70121Sbill 
7027738Sroot hpread(dev, uio)
7032624Swnj 	dev_t dev;
7047738Sroot 	struct uio *uio;
70521Sbill {
7062624Swnj 	register int unit = minor(dev) >> 3;
70721Sbill 
7082624Swnj 	if (unit >= NHP)
7098156Sroot 		return (ENXIO);
7108156Sroot 	return (physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys, uio));
71121Sbill }
71221Sbill 
7137831Sroot hpwrite(dev, uio)
7142624Swnj 	dev_t dev;
7157831Sroot 	struct uio *uio;
71621Sbill {
7172624Swnj 	register int unit = minor(dev) >> 3;
71821Sbill 
7192624Swnj 	if (unit >= NHP)
7208156Sroot 		return (ENXIO);
7218156Sroot 	return (physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys, uio));
72221Sbill }
72321Sbill 
7245726Sroot /*ARGSUSED*/
7257635Ssam hpioctl(dev, cmd, data, flag)
7265726Sroot 	dev_t dev;
7275726Sroot 	int cmd;
7287635Ssam 	caddr_t data;
7295726Sroot 	int flag;
7305726Sroot {
7315726Sroot 
7325726Sroot 	switch (cmd) {
7337635Ssam 
7345726Sroot 	case DKIOCHDR:	/* do header read/write */
73510857Ssam 		hpsoftc[minor(dev) >> 3].sc_hdr = 1;
7368579Sroot 		return (0);
7375726Sroot 
7385726Sroot 	default:
7398579Sroot 		return (ENXIO);
7405726Sroot 	}
7415726Sroot }
7425726Sroot 
7433706Sroot hpecc(mi, flag)
7442978Swnj 	register struct mba_device *mi;
7453706Sroot 	int flag;
74621Sbill {
7472383Swnj 	register struct mba_regs *mbp = mi->mi_mba;
7482624Swnj 	register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv;
7492383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
7503706Sroot 	register struct hpst *st = &hpst[mi->mi_type];
7513706Sroot 	int npf, o;
7522383Swnj 	int bn, cn, tn, sn;
753914Sbill 	int bcr;
75421Sbill 
75511202Ssam 	bcr = MASKREG(mbp->mba_bcr);
756914Sbill 	if (bcr)
757914Sbill 		bcr |= 0xffff0000;		/* sxt */
7583706Sroot 	if (flag == CONT)
7593706Sroot 		npf = bp->b_error;
7603706Sroot 	else
7613706Sroot 		npf = btop(bcr + bp->b_bcount);
762420Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
763420Sbill 	bn = dkblock(bp);
764420Sbill 	cn = bp->b_cylin;
7653706Sroot 	sn = bn%(st->nspc) + npf;
7662383Swnj 	tn = sn/st->nsect;
7672383Swnj 	sn %= st->nsect;
7682383Swnj 	cn += tn/st->ntrak;
7692383Swnj 	tn %= st->ntrak;
7703706Sroot 	switch (flag) {
77110856Ssam 	case ECC: {
7723706Sroot 		register int i;
7733706Sroot 		caddr_t addr;
7743706Sroot 		struct pte mpte;
7753706Sroot 		int bit, byte, mask;
7763706Sroot 
7773706Sroot 		npf--;		/* because block in error is previous block */
7783706Sroot 		printf("hp%d%c: soft ecc sn%d\n", dkunit(bp),
7793706Sroot 		    'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf);
78011202Ssam 		mask = MASKREG(rp->hpec2);
78111202Ssam 		i = MASKREG(rp->hpec1) - 1;		/* -1 makes 0 origin */
7823706Sroot 		bit = i&07;
7833706Sroot 		i = (i&~07)>>3;
7843706Sroot 		byte = i + o;
7853706Sroot 		while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) {
7863706Sroot 			mpte = mbp->mba_map[npf+btop(byte)];
7873706Sroot 			addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET);
7883706Sroot 			putmemc(addr, getmemc(addr)^(mask<<bit));
7893706Sroot 			byte++;
7903706Sroot 			i++;
7913706Sroot 			bit -= 8;
7923706Sroot 		}
7933706Sroot 		if (bcr == 0)
7943706Sroot 			return (0);
7953847Sroot 		npf++;
7963706Sroot 		break;
7973706Sroot 		}
7983706Sroot 
7993706Sroot 	case SSE:
8003706Sroot 		rp->hpof |= HPOF_SSEI;
8013706Sroot 		mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf));
8023706Sroot 		break;
8033706Sroot 
8043706Sroot 	case BSE:
8053706Sroot #ifdef HPBDEBUG
8063706Sroot 		if (hpbdebug)
8073706Sroot 		printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn);
8083706Sroot #endif
80911202Ssam  		if (rp->hpof&HPOF_SSEI)
81011202Ssam  			sn++;
8113706Sroot 		if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0)
81211202Ssam 			return (0);
8133706Sroot 		bp->b_flags |= B_BAD;
8143706Sroot 		bp->b_error = npf + 1;
8153706Sroot 		bn = st->ncyl*st->nspc - st->nsect - 1 - bn;
8163706Sroot 		cn = bn/st->nspc;
8173706Sroot 		sn = bn%st->nspc;
8183706Sroot 		tn = sn/st->nsect;
8193706Sroot 		sn %= st->nsect;
8203706Sroot 		mbp->mba_bcr = -512;
82110886Shelge  		rp->hpof &= ~HPOF_SSEI;
8223706Sroot #ifdef HPBDEBUG
8233706Sroot 		if (hpbdebug)
8243706Sroot 		printf("revector to cn %d tn %d sn %d\n", cn, tn, sn);
8253706Sroot #endif
8263706Sroot 		break;
8273706Sroot 
8283706Sroot 	case CONT:
8293706Sroot #ifdef HPBDEBUG
8303706Sroot 		if (hpbdebug)
8313706Sroot 		printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn);
8323706Sroot #endif
8333706Sroot 		npf = bp->b_error;
8343706Sroot 		bp->b_flags &= ~B_BAD;
8353706Sroot 		mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf));
83611202Ssam 		if (MASKREG(mbp->mba_bcr) == 0)
83711202Ssam 			return (0);
8383706Sroot 		break;
8393706Sroot 	}
8403706Sroot 	rp->hpcs1 = HP_DCLR|HP_GO;
8413350Swnj 	if (rp->hpof&HPOF_SSEI)
8422883Swnj 		sn++;
843420Sbill 	rp->hpdc = cn;
844420Sbill 	rp->hpda = (tn<<8) + sn;
845420Sbill 	mbp->mba_sr = -1;
8463706Sroot 	mbp->mba_var = (int)ptob(npf) + o;
8473706Sroot 	rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO;
8483706Sroot 	mi->mi_tab.b_errcnt = 0;	/* error has been corrected */
849420Sbill 	return (1);
85021Sbill }
8512362Swnj 
8522362Swnj #define	DBSIZE	20
8532362Swnj 
8542362Swnj hpdump(dev)
8552362Swnj 	dev_t dev;
8562362Swnj {
8572978Swnj 	register struct mba_device *mi;
8582383Swnj 	register struct mba_regs *mba;
8592624Swnj 	struct hpdevice *hpaddr;
8602362Swnj 	char *start;
8612383Swnj 	int num, unit;
8622383Swnj 	register struct hpst *st;
8632362Swnj 
8642362Swnj 	num = maxfree;
8652362Swnj 	start = 0;
8662362Swnj 	unit = minor(dev) >> 3;
8672827Swnj 	if (unit >= NHP)
8682827Swnj 		return (ENXIO);
8692383Swnj #define	phys(a,b)	((b)((int)(a)&0x7fffffff))
8702978Swnj 	mi = phys(hpinfo[unit],struct mba_device *);
8712827Swnj 	if (mi == 0 || mi->mi_alive == 0)
8722827Swnj 		return (ENXIO);
8732383Swnj 	mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba;
8743102Swnj 	mba->mba_cr = MBCR_INIT;
8752624Swnj 	hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive];
8763093Swnj 	if ((hpaddr->hpds & HPDS_VV) == 0) {
8772624Swnj 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
8782624Swnj 		hpaddr->hpcs1 = HP_PRESET|HP_GO;
8793093Swnj 		hpaddr->hpof = HPOF_FMT22;
8802362Swnj 	}
8812383Swnj 	st = &hpst[mi->mi_type];
8822827Swnj 	if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks)
8832827Swnj 		return (EINVAL);
8842362Swnj 	while (num > 0) {
8852383Swnj 		register struct pte *hpte = mba->mba_map;
8862362Swnj 		register int i;
8872383Swnj 		int blk, cn, sn, tn;
8882362Swnj 		daddr_t bn;
8892362Swnj 
8902362Swnj 		blk = num > DBSIZE ? DBSIZE : num;
8912362Swnj 		bn = dumplo + btop(start);
8922383Swnj 		cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff;
8932383Swnj 		sn = bn%st->nspc;
8942383Swnj 		tn = sn/st->nsect;
8952383Swnj 		sn = sn%st->nsect;
8962362Swnj 		hpaddr->hpdc = cn;
8972362Swnj 		hpaddr->hpda = (tn << 8) + sn;
8982362Swnj 		for (i = 0; i < blk; i++)
8992362Swnj 			*(int *)hpte++ = (btop(start)+i) | PG_V;
9002383Swnj 		mba->mba_sr = -1;
9012383Swnj 		mba->mba_bcr = -(blk*NBPG);
9022383Swnj 		mba->mba_var = 0;
9032624Swnj 		hpaddr->hpcs1 = HP_WCOM | HP_GO;
9043093Swnj 		while ((hpaddr->hpds & HPDS_DRY) == 0)
9052362Swnj 			;
9063093Swnj 		if (hpaddr->hpds&HPDS_ERR)
9072827Swnj 			return (EIO);
9082362Swnj 		start += blk*NBPG;
9092362Swnj 		num -= blk;
9102362Swnj 	}
9112362Swnj 	return (0);
9122362Swnj }
91312506Ssam 
91412506Ssam hpsize(dev)
91512506Ssam 	dev_t dev;
91612506Ssam {
91712506Ssam 	int unit = minor(dev) >> 3;
91812506Ssam 	struct mba_device *mi;
91912506Ssam 	struct hpst *st;
92012506Ssam 
92112506Ssam 	if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0)
92212506Ssam 		return (-1);
92312506Ssam 	st = &hpst[mi->mi_type];
92412506Ssam 	return ((int)st->sizes[minor(dev) & 07].nblocks);
92512506Ssam }
9261565Sbill #endif
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