1*11202Ssam /* hp.c 4.68 83/02/21 */ 23706Sroot 33706Sroot #ifdef HPDEBUG 43289Swnj int hpdebug; 53706Sroot #endif 63706Sroot #ifdef HPBDEBUG 73706Sroot int hpbdebug; 83706Sroot #endif 921Sbill 101939Swnj #include "hp.h" 111565Sbill #if NHP > 0 1221Sbill /* 135726Sroot * HP disk driver for RP0x+RMxx+ML11 142827Swnj * 152827Swnj * TODO: 163706Sroot * check RM80 skip sector handling when ECC's occur later 173093Swnj * check offset recovery handling 183706Sroot * see if DCLR and/or RELEASE set attention status 193706Sroot * print bits of mr && mr2 symbolically 2021Sbill */ 219786Ssam #include "../machine/pte.h" 2221Sbill 2321Sbill #include "../h/param.h" 2421Sbill #include "../h/systm.h" 25305Sbill #include "../h/dk.h" 2621Sbill #include "../h/buf.h" 2721Sbill #include "../h/conf.h" 2821Sbill #include "../h/dir.h" 2921Sbill #include "../h/user.h" 3021Sbill #include "../h/map.h" 318468Sroot #include "../vax/mtpr.h" 32420Sbill #include "../h/vm.h" 332362Swnj #include "../h/cmap.h" 343706Sroot #include "../h/dkbad.h" 357635Ssam #include "../h/ioctl.h" 367738Sroot #include "../h/uio.h" 3721Sbill 388988Sroot #include "../vax/dkio.h" 398468Sroot #include "../vaxmba/mbareg.h" 408468Sroot #include "../vaxmba/mbavar.h" 418468Sroot #include "../vaxmba/hpreg.h" 4221Sbill 432383Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ 442383Swnj struct size { 4521Sbill daddr_t nblocks; 4621Sbill int cyloff; 473706Sroot } hp6_sizes[8] = { 48886Sbill 15884, 0, /* A=cyl 0 thru 37 */ 49886Sbill 33440, 38, /* B=cyl 38 thru 117 */ 50886Sbill 340670, 0, /* C=cyl 0 thru 814 */ 5121Sbill 0, 0, 5221Sbill 0, 0, 5321Sbill 0, 0, 543729Sroot 291280, 118, /* G=cyl 118 thru 814 */ 5521Sbill 0, 0, 563706Sroot }, rm3_sizes[8] = { 57886Sbill 15884, 0, /* A=cyl 0 thru 99 */ 58886Sbill 33440, 100, /* B=cyl 100 thru 309 */ 59886Sbill 131680, 0, /* C=cyl 0 thru 822 */ 6021Sbill 0, 0, 6121Sbill 0, 0, 623442Sroot 0, 0, 633729Sroot 81984, 310, /* G=cyl 310 thru 822 */ 6421Sbill 0, 0, 65886Sbill }, rm5_sizes[8] = { 66886Sbill 15884, 0, /* A=cyl 0 thru 26 */ 67886Sbill 33440, 27, /* B=cyl 27 thru 81 */ 683271Swnj 500384, 0, /* C=cyl 0 thru 822 */ 69886Sbill 15884, 562, /* D=cyl 562 thru 588 */ 70886Sbill 55936, 589, /* E=cyl 589 thru 680 */ 713729Sroot 86240, 681, /* F=cyl 681 thru 822 */ 723729Sroot 158592, 562, /* G=cyl 562 thru 822 */ 73886Sbill 291346, 82, /* H=cyl 82 thru 561 */ 742383Swnj }, rm80_sizes[8] = { 752383Swnj 15884, 0, /* A=cyl 0 thru 36 */ 762383Swnj 33440, 37, /* B=cyl 37 thru 114 */ 772383Swnj 242606, 0, /* C=cyl 0 thru 558 */ 782383Swnj 0, 0, 792383Swnj 0, 0, 802383Swnj 0, 0, 812383Swnj 82080, 115, /* G=cyl 115 thru 304 */ 823729Sroot 110143, 305, /* H=cyl 305 thru 558 */ 833706Sroot }, hp7_sizes[8] = { 846927Ssam 15884, 0, /* A=cyl 0 thru 9 */ 853706Sroot 64000, 10, /* B=cyl 10 thru 49 */ 863706Sroot 1008000,0, /* C=cyl 0 thru 629 */ 873706Sroot 15884, 330, /* D=cyl 330 thru 339 */ 883706Sroot 256000, 340, /* E=cyl 340 thru 499 */ 893729Sroot 207850, 500, /* F=cyl 500 thru 629 */ 903729Sroot 479850, 330, /* G=cyl 330 thru 629 */ 913706Sroot 448000, 50, /* H=cyl 50 thru 329 */ 926927Ssam }, si9775_sizes[8] = { 9310856Ssam 16640, 0, /* A=cyl 0 thru 12 */ 9410856Ssam 34560, 13, /* B=cyl 13 thru 39 */ 9510856Ssam 1079040, 0, /* C=cyl 0 thru 842 */ 9610856Ssam 0, 0, 9710856Ssam 0, 0, 9810856Ssam 0, 0, 9910856Ssam 513280, 40, /* G=cyl 40 thru 440 */ 1006927Ssam 513280, 441, /* H=cyl 441 thru 841 */ 1016927Ssam }, si9730_sizes[8] = { 1026927Ssam 15884, 0, /* A=cyl 0 thru 49 */ 1036927Ssam 33440, 50, /* B=cyl 50 thru 154 */ 1046927Ssam 263360, 0, /* C=cyl 0 thru 822 */ 1056927Ssam 0, 0, 1066927Ssam 0, 0, 1076927Ssam 0, 0, 1086927Ssam 0, 0, 1096927Ssam 213664, 155, /* H=cyl 155 thru 822 */ 1106927Ssam }, hpam_sizes[8] = { 1116927Ssam 15884, 0, /* A=cyl 0 thru 31 */ 1126927Ssam 33440, 32, /* B=cyl 32 thru 97 */ 1136927Ssam 524288, 0, /* C=cyl 0 thru 1023 */ 1146927Ssam 27786, 668, 1156927Ssam 27786, 723, 1166927Ssam 125440, 778, 1176927Ssam 181760, 668, /* G=cyl 668 thru 1022 */ 1186927Ssam 291346, 98, /* H=cyl 98 thru 667 */ 1199175Ssam }, hpfj_sizes[8] = { 1209175Ssam 15884, 0, /* A=cyl 0 thru 18 */ 1219175Ssam 33440, 19, /* B=cyl 19 thru 58 */ 12210055Ssam 724120, 0, /* C=cyl 0 thru 841 */ 1239175Ssam 0, 0, 1249175Ssam 0, 0, 1259175Ssam 0, 0, 1269175Ssam 381711, 398, /* G=cyl 398 thru 841 */ 1279175Ssam 291346, 59, /* H=cyl 59 thru 397 */ 12810734Ssam }, hpfj48_sizes[8] = { 12910734Ssam 15884, 0, /* A=cyl 0 thru 16 */ 13010734Ssam 33440, 17, /* B=cyl 17 thru 52 */ 13110734Ssam 808176, 0, /* C=cyl 0 thru 841 */ 13210734Ssam 0, 0, 13310734Ssam 0, 0, 13410734Ssam 0, 0, 13510734Ssam 465456, 357, /* G=cyl 357 thru 841 */ 13610734Ssam 291346, 53, /* H=cyl 52 thru 356 */ 13721Sbill }; 1382383Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ 13921Sbill 1402383Swnj #define _hpSDIST 2 1412383Swnj #define _hpRDIST 3 1422383Swnj 1432383Swnj int hpSDIST = _hpSDIST; 1442383Swnj int hpRDIST = _hpRDIST; 1452383Swnj 1466927Ssam /* 1476927Ssam * Table for converting Massbus drive types into 1486927Ssam * indices into the partition tables. Slots are 1496927Ssam * left for those drives devined from other means 1506927Ssam * (e.g. SI, AMPEX, etc.). 1516927Ssam */ 1526927Ssam short hptypes[] = { 1536927Ssam #define HPDT_RM03 0 1546927Ssam MBDT_RM03, 1556927Ssam #define HPDT_RM05 1 1566927Ssam MBDT_RM05, 1576927Ssam #define HPDT_RP06 2 1586927Ssam MBDT_RP06, 1596927Ssam #define HPDT_RM80 3 1606927Ssam MBDT_RM80, 1616927Ssam #define HPDT_RP05 4 1626927Ssam MBDT_RP05, 1636927Ssam #define HPDT_RP07 5 1646927Ssam MBDT_RP07, 1656927Ssam #define HPDT_ML11A 6 1666927Ssam MBDT_ML11A, 1676927Ssam #define HPDT_ML11B 7 1686927Ssam MBDT_ML11B, 1696927Ssam #define HPDT_9775 8 1706927Ssam -1, 1716927Ssam #define HPDT_9730 9 1726927Ssam -1, 1736927Ssam #define HPDT_CAPRICORN 10 1746927Ssam -1, 1759175Ssam #define HPDT_EAGLE 11 1769175Ssam -1, 17710734Ssam #define HPDT_EAGLE48 12 17810734Ssam -1, 17910734Ssam #define HPDT_RM02 13 1809175Ssam MBDT_RM02, /* beware, actually capricorn or eagle */ 1816927Ssam 0 1826927Ssam }; 1832978Swnj struct mba_device *hpinfo[NHP]; 1842978Swnj int hpattach(),hpustart(),hpstart(),hpdtint(); 1852383Swnj struct mba_driver hpdriver = 1862978Swnj { hpattach, 0, hpustart, hpstart, hpdtint, 0, 1872978Swnj hptypes, "hp", 0, hpinfo }; 1882383Swnj 1892383Swnj struct hpst { 1902383Swnj short nsect; 1912383Swnj short ntrak; 1922383Swnj short nspc; 1932383Swnj short ncyl; 1942383Swnj struct size *sizes; 1952383Swnj } hpst[] = { 1963706Sroot 32, 5, 32*5, 823, rm3_sizes, /* RM03 */ 1972383Swnj 32, 19, 32*19, 823, rm5_sizes, /* RM05 */ 1983706Sroot 22, 19, 22*19, 815, hp6_sizes, /* RP06 */ 1993706Sroot 31, 14, 31*14, 559, rm80_sizes, /* RM80 */ 2003706Sroot 22, 19, 22*19, 411, hp6_sizes, /* RP05 */ 2013706Sroot 50, 32, 50*32, 630, hp7_sizes, /* RP07 */ 2025726Sroot 1, 1, 1, 1, 0, /* ML11A */ 2035726Sroot 1, 1, 1, 1, 0, /* ML11B */ 2046927Ssam 32, 40, 32*40, 843, si9775_sizes, /* 9775 */ 2056927Ssam 32, 10, 32*10, 823, si9730_sizes, /* 9730 */ 2066927Ssam 32, 16, 32*16, 1024, hpam_sizes, /* AMPEX capricorn */ 20710055Ssam 43, 20, 43*20, 842, hpfj_sizes, /* Fujitsu EAGLE */ 20810734Ssam 48, 20, 48*20, 842, hpfj48_sizes, /* 48 sector EAGLE */ 2092383Swnj }; 2102383Swnj 2112624Swnj u_char hp_offset[16] = { 2123093Swnj HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400, 2133093Swnj HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800, 2143093Swnj HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200, 2153093Swnj 0, 0, 0, 0, 21621Sbill }; 21721Sbill 2182624Swnj struct buf rhpbuf[NHP]; 2193706Sroot struct buf bhpbuf[NHP]; 2203706Sroot struct dkbad hpbad[NHP]; 22121Sbill 22210857Ssam struct hpsoftc { 22310857Ssam u_char sc_hpinit; /* drive initialized */ 22410857Ssam u_char sc_recal; /* recalibrate state */ 22510857Ssam u_char sc_hdr; /* next i/o includes header */ 22610857Ssam u_char sc_doseeks; /* perform explicit seeks */ 22710857Ssam daddr_t sc_mlsize; /* ML11 size */ 22810857Ssam } hpsoftc[NHP]; 22910857Ssam 23021Sbill #define b_cylin b_resid 23121Sbill 2325726Sroot /* #define ML11 0 to remove ML11 support */ 2335726Sroot #define ML11 (hptypes[mi->mi_type] == MBDT_ML11A) 2345726Sroot #define RP06 (hptypes[mi->mi_type] <= MBDT_RP06) 2355726Sroot #define RM80 (hptypes[mi->mi_type] == MBDT_RM80) 2365726Sroot 237*11202Ssam #define MASKREG(reg) ((reg)&0xffff) 238*11202Ssam 23921Sbill #ifdef INTRLVE 24021Sbill daddr_t dkblock(); 24121Sbill #endif 2422604Swnj 2432978Swnj /*ARGSUSED*/ 2442978Swnj hpattach(mi, slave) 24510734Ssam register struct mba_device *mi; 2462604Swnj { 24710734Ssam 24810734Ssam mi->mi_type = hpmaptype(mi); 24910734Ssam if (!ML11 && mi->mi_dk >= 0) { 25010734Ssam struct hpst *st = &hpst[mi->mi_type]; 25110734Ssam 25210734Ssam dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256); 25310734Ssam } 25410734Ssam } 25510734Ssam 25610734Ssam /* 25710734Ssam * Map apparent MASSBUS drive type into manufacturer 25810734Ssam * specific configuration. For SI controllers this is done 25910734Ssam * based on codes in the serial number register. For 26010734Ssam * EMULEX controllers, the track and sector attributes are 26110734Ssam * used when the drive type is an RM02 (not supported by DEC). 26210734Ssam */ 26310734Ssam hpmaptype(mi) 26410734Ssam register struct mba_device *mi; 26510734Ssam { 2666927Ssam register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 26710734Ssam register int type = mi->mi_type; 2686927Ssam 2696927Ssam /* 2706927Ssam * Model-byte processing for SI 9400 controllers. 2716927Ssam * NB: Only deals with RM03 and RM05 emulations. 2726927Ssam */ 27310734Ssam if (type == HPDT_RM03 || type == HPDT_RM05) { 27410734Ssam int hpsn = hpaddr->hpsn; 2756927Ssam 2766927Ssam if ((hpsn & SIMB_LU) != mi->mi_drive) 27710734Ssam return (type); 2786927Ssam switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) { 2796927Ssam 2806927Ssam case SI9775D: 2816927Ssam printf("hp%d: si 9775 (direct)\n", mi->mi_unit); 28210734Ssam type = HPDT_9775; 2836927Ssam break; 2846927Ssam 2856927Ssam case SI9730D: 2866927Ssam printf("hp%d: si 9730 (direct)\n", mi->mi_unit); 28710734Ssam type = HPDT_9730; 2886927Ssam break; 2896927Ssam 2907035Swnj /* 29110734Ssam * AMPEX 9300, SI Combination needs a have the 29210734Ssam * drive cleared before we start. We do not know 29310734Ssam * why, but tests show that the recalibrate fixes 29410734Ssam * the problem. 2957035Swnj */ 2966927Ssam case SI9766: 2976927Ssam printf("hp%d: 9776/9300\n", mi->mi_unit); 29810734Ssam type = HPDT_RM05; 2997035Swnj hpaddr->hpcs1 = HP_RECAL|HP_GO; 3007035Swnj DELAY(100000); 3016927Ssam break; 3026927Ssam 3036927Ssam case SI9762: 3046927Ssam printf("hp%d: 9762\n", mi->mi_unit); 30510734Ssam type = HPDT_RM03; 3066927Ssam break; 3076927Ssam } 30810734Ssam return (type); 30910734Ssam } 3106927Ssam 3116927Ssam /* 31210734Ssam * EMULEX SC750 or SC780. Poke the holding register. 3136927Ssam */ 31410734Ssam if (type == HPDT_RM02) { 31510734Ssam int ntracks, nsectors; 31610734Ssam 3176927Ssam hpaddr->hpcs1 = HP_NOP; 3186927Ssam hpaddr->hphr = HPHR_MAXTRAK; 319*11202Ssam ntracks = MASKREG(hpaddr->hphr) + 1; 32010055Ssam if (ntracks == 16) { 3216927Ssam printf("hp%d: capricorn\n", mi->mi_unit); 32210734Ssam type = HPDT_CAPRICORN; 32310734Ssam goto done; 32410734Ssam } 32510734Ssam if (ntracks != 20) { 32610055Ssam printf("hp%d: ntracks %d: unknown device\n", ntracks); 32710734Ssam goto done; 32810734Ssam } 32910734Ssam hpaddr->hpcs1 = HP_NOP; 33010734Ssam hpaddr->hphr = HPHR_MAXSECT; 331*11202Ssam nsectors = MASKREG(hpaddr->hphr) + 1; 33210734Ssam printf("hp%d: ", mi->mi_unit); 33310734Ssam if (nsectors == 43) 33410734Ssam type = HPDT_EAGLE; 33510734Ssam else { 33610734Ssam type = HPDT_EAGLE48; 33710734Ssam printf("modified "); 33810734Ssam } 33910734Ssam printf("eagle\n"); 34010734Ssam done: 3416927Ssam hpaddr->hpcs1 = HP_DCLR|HP_GO; 34210734Ssam return (type); 34310734Ssam } 3446927Ssam 34510734Ssam /* 34610734Ssam * Map all ML11's to the same type. Also calculate 34710734Ssam * transfer rates based on device characteristics. 34810734Ssam */ 34910734Ssam if (type == HPDT_ML11A || type == HPDT_ML11B) { 35010857Ssam register struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 35110857Ssam register int trt; 3522604Swnj 35310857Ssam sc->sc_mlsize = hpaddr->hpmr & HPMR_SZ; 3545726Sroot if ((hpaddr->hpmr & HPMR_ARRTYP) == 0) 35510857Ssam sc->sc_mlsize >>= 2; 3565726Sroot if (mi->mi_dk >= 0) { 3575726Sroot trt = (hpaddr->hpmr & HPMR_TRT) >> 8; 3585726Sroot dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt)); 3595726Sroot } 36010734Ssam type = HPDT_ML11A; 3616927Ssam } 36210734Ssam return (type); 3632604Swnj } 3642604Swnj 3658579Sroot hpopen(dev) 3668579Sroot dev_t dev; 3678579Sroot { 3688579Sroot register int unit = minor(dev) >> 3; 3698579Sroot register struct mba_device *mi; 3708579Sroot 3718579Sroot if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0) 3728579Sroot return (ENXIO); 3738579Sroot return (0); 3748579Sroot } 3758579Sroot 37621Sbill hpstrategy(bp) 3772383Swnj register struct buf *bp; 37821Sbill { 3792978Swnj register struct mba_device *mi; 3802383Swnj register struct hpst *st; 3812383Swnj register int unit; 38221Sbill long sz, bn; 3832383Swnj int xunit = minor(bp->b_dev) & 07; 3845432Sroot int s; 38521Sbill 38621Sbill sz = bp->b_bcount; 38721Sbill sz = (sz+511) >> 9; 38821Sbill unit = dkunit(bp); 3892383Swnj if (unit >= NHP) 3902383Swnj goto bad; 3912383Swnj mi = hpinfo[unit]; 3922395Swnj if (mi == 0 || mi->mi_alive == 0) 3932383Swnj goto bad; 3942383Swnj st = &hpst[mi->mi_type]; 3955726Sroot if (ML11) { 39610857Ssam struct hpsoftc *sc = &hpsoftc[unit]; 39710857Ssam 3985726Sroot if (bp->b_blkno < 0 || 39910857Ssam dkblock(bp)+sz > sc->sc_mlsize) 4005726Sroot goto bad; 4015726Sroot bp->b_cylin = 0; 4025726Sroot } else { 4035726Sroot if (bp->b_blkno < 0 || 4045726Sroot (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks) 4055726Sroot goto bad; 4065726Sroot bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff; 4075726Sroot } 4085432Sroot s = spl5(); 4092383Swnj disksort(&mi->mi_tab, bp); 4102383Swnj if (mi->mi_tab.b_active == 0) 4112383Swnj mbustart(mi); 4125432Sroot splx(s); 4132383Swnj return; 4142383Swnj 4152383Swnj bad: 4162383Swnj bp->b_flags |= B_ERROR; 4172383Swnj iodone(bp); 4182383Swnj return; 41921Sbill } 42021Sbill 4212383Swnj hpustart(mi) 4222978Swnj register struct mba_device *mi; 42321Sbill { 4242624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 4252383Swnj register struct buf *bp = mi->mi_tab.b_actf; 4263706Sroot register struct hpst *st = &hpst[mi->mi_type]; 42710857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 42821Sbill daddr_t bn; 4293102Swnj int sn, dist; 43021Sbill 4313706Sroot hpaddr->hpcs1 = 0; 4322624Swnj if ((hpaddr->hpcs1&HP_DVA) == 0) 4332383Swnj return (MBU_BUSY); 43410857Ssam if ((hpaddr->hpds & HPDS_VV) == 0 || !sc->sc_hpinit) { 4353706Sroot struct buf *bbp = &bhpbuf[mi->mi_unit]; 4363706Sroot 43710857Ssam sc->sc_hpinit = 1; 4382624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 4393140Swnj if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive)) 4403140Swnj printf("DCLR attn\n"); 4412624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 4425726Sroot if (!ML11) 4435726Sroot hpaddr->hpof = HPOF_FMT22; 4443140Swnj mbclrattn(mi); 4455726Sroot if (!ML11) { 4465726Sroot bbp->b_flags = B_READ|B_BUSY; 4475726Sroot bbp->b_dev = bp->b_dev; 4485726Sroot bbp->b_bcount = 512; 4495726Sroot bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit]; 4505726Sroot bbp->b_blkno = st->ncyl*st->nspc - st->nsect; 4515726Sroot bbp->b_cylin = st->ncyl - 1; 4525726Sroot mi->mi_tab.b_actf = bbp; 4535726Sroot bbp->av_forw = bp; 4545726Sroot bp = bbp; 4555726Sroot } 45621Sbill } 4572604Swnj if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1) 4582383Swnj return (MBU_DODATA); 4595726Sroot if (ML11) 4605726Sroot return (MBU_DODATA); 4613093Swnj if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY) 4622383Swnj return (MBU_DODATA); 4632395Swnj bn = dkblock(bp); 4642395Swnj sn = bn%st->nspc; 4652395Swnj sn = (sn+st->nsect-hpSDIST)%st->nsect; 466*11202Ssam if (bp->b_cylin == MASKREG(hpaddr->hpdc)) { 46710908Ssam if (sc->sc_doseeks) 4682383Swnj return (MBU_DODATA); 469*11202Ssam dist = (MASKREG(hpaddr->hpla) >> 6) - st->nsect + 1; 4702383Swnj if (dist < 0) 4712383Swnj dist += st->nsect; 4722383Swnj if (dist > st->nsect - hpRDIST) 4732383Swnj return (MBU_DODATA); 4742614Swnj } else 4752614Swnj hpaddr->hpdc = bp->b_cylin; 47610908Ssam if (sc->sc_doseeks) 4772624Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 478305Sbill else { 479305Sbill hpaddr->hpda = sn; 4802624Swnj hpaddr->hpcs1 = HP_SEARCH|HP_GO; 481305Sbill } 4822383Swnj return (MBU_STARTED); 48321Sbill } 48421Sbill 4852383Swnj hpstart(mi) 4862978Swnj register struct mba_device *mi; 48721Sbill { 4882624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 4892383Swnj register struct buf *bp = mi->mi_tab.b_actf; 4902383Swnj register struct hpst *st = &hpst[mi->mi_type]; 49110857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 49221Sbill daddr_t bn; 4932383Swnj int sn, tn; 49421Sbill 49521Sbill bn = dkblock(bp); 4965726Sroot if (ML11) 4975726Sroot hpaddr->hpda = bn; 4985726Sroot else { 4995726Sroot sn = bn%st->nspc; 5005726Sroot tn = sn/st->nsect; 5015726Sroot sn %= st->nsect; 5025726Sroot hpaddr->hpdc = bp->b_cylin; 5035726Sroot hpaddr->hpda = (tn << 8) + sn; 5045726Sroot } 50510857Ssam if (sc->sc_hdr) { 5065726Sroot if (bp->b_flags & B_READ) 5075726Sroot return (HP_RHDR|HP_GO); 5085726Sroot else 5095726Sroot return (HP_WHDR|HP_GO); 5105726Sroot } 5115726Sroot return (0); 51221Sbill } 51321Sbill 5143102Swnj hpdtint(mi, mbsr) 5152978Swnj register struct mba_device *mi; 5163102Swnj int mbsr; 51721Sbill { 5182624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 5192383Swnj register struct buf *bp = mi->mi_tab.b_actf; 52010622Shelge register struct hpst *st = &hpst[mi->mi_type]; 5215893Swnj register int er1, er2; 52210857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 5232826Swnj int retry = 0; 52421Sbill 5253706Sroot if (bp->b_flags&B_BAD) { 5263706Sroot if (hpecc(mi, CONT)) 527*11202Ssam return (MBD_RESTARTED); 5283706Sroot } 5293102Swnj if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) { 5303706Sroot #ifdef HPDEBUG 5313289Swnj if (hpdebug) { 5323706Sroot int dc = hpaddr->hpdc, da = hpaddr->hpda; 5333706Sroot 5343706Sroot printf("hperr: bp %x cyl %d blk %d as %o ", 5353706Sroot bp, bp->b_cylin, bp->b_blkno, 5363706Sroot hpaddr->hpas&0xff); 537*11202Ssam printf("dc %x da %x\n",MASKREG(dc), MASKREG(da)); 5383289Swnj printf("errcnt %d ", mi->mi_tab.b_errcnt); 5393289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 5403289Swnj printf("er1=%b er2=%b\n", 5413289Swnj hpaddr->hper1, HPER1_BITS, 5423289Swnj hpaddr->hper2, HPER2_BITS); 5433289Swnj DELAY(1000000); 5443289Swnj } 5453706Sroot #endif 5465858Swnj er1 = hpaddr->hper1; 5475893Swnj er2 = hpaddr->hper2; 5485893Swnj if (er1 & HPER1_HCRC) { 5495858Swnj er1 &= ~(HPER1_HCE|HPER1_FER); 5505893Swnj er2 &= ~HPER2_BSE; 5515893Swnj } 5525858Swnj if (er1&HPER1_WLE) { 5532925Swnj printf("hp%d: write locked\n", dkunit(bp)); 5542826Swnj bp->b_flags |= B_ERROR; 555*11202Ssam } else if (MASKREG(er1) == HPER1_FER && RP06 && !sc->sc_hdr) { 5565726Sroot if (hpecc(mi, BSE)) 557*11202Ssam return (MBD_RESTARTED); 558*11202Ssam goto hard; 5592826Swnj } else if (++mi->mi_tab.b_errcnt > 27 || 5603102Swnj mbsr & MBSR_HARD || 5615858Swnj er1 & HPER1_HARD || 56210857Ssam sc->sc_hdr || 5635893Swnj (!ML11 && (er2 & HPER2_HARD))) { 56410886Shelge /* 56510886Shelge * If HCRC the header is screwed up and the sector 566*11202Ssam * might be in the bad sector table, better check.. 567*11202Ssam * 56810886Shelge * Note: If the header is screwed up on a skip sector 56910886Shelge * track, then the appropriate replacement sector 570*11202Ssam * cannot be found. 57110886Shelge */ 572*11202Ssam if (er1&HPER1_HCRC && !ML11 && hpecc(mi, BSE)) 573*11202Ssam return (MBD_RESTARTED); 5743706Sroot hard: 57510622Shelge if (ML11) 576*11202Ssam bp->b_blkno = MASKREG(hpaddr->hpda); 57710622Shelge else 578*11202Ssam bp->b_blkno = MASKREG(hpaddr->hpdc) * st->nspc + 579*11202Ssam (MASKREG(hpaddr->hpda) >> 8) * st->nsect + 580*11202Ssam (hpaddr->hpda&0x1f); 5812925Swnj harderr(bp, "hp"); 5823271Swnj if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC))) 5833271Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 5843706Sroot printf("er1=%b er2=%b", 5852826Swnj hpaddr->hper1, HPER1_BITS, 5862826Swnj hpaddr->hper2, HPER2_BITS); 5873706Sroot if (hpaddr->hpmr) 588*11202Ssam printf(" mr=%o", MASKREG(hpaddr->hpmr)); 5893706Sroot if (hpaddr->hpmr2) 590*11202Ssam printf(" mr2=%o", MASKREG(hpaddr->hpmr2)); 5913706Sroot printf("\n"); 5922826Swnj bp->b_flags |= B_ERROR; 59310622Shelge retry = 0; 59410857Ssam sc->sc_recal = 0; 5955893Swnj } else if ((er2 & HPER2_BSE) && !ML11) { 5963706Sroot if (hpecc(mi, BSE)) 597*11202Ssam return (MBD_RESTARTED); 5983706Sroot else 5993706Sroot goto hard; 6005893Swnj } else if (RM80 && er2&HPER2_SSE) { 6013988Sroot (void) hpecc(mi, SSE); 6022883Swnj return (MBD_RESTARTED); 6035858Swnj } else if ((er1&(HPER1_DCK|HPER1_ECH))==HPER1_DCK) { 6043706Sroot if (hpecc(mi, ECC)) 6052383Swnj return (MBD_RESTARTED); 6062826Swnj /* else done */ 6072826Swnj } else 6082826Swnj retry = 1; 6092826Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 6105726Sroot if (ML11) { 6115726Sroot if (mi->mi_tab.b_errcnt >= 16) 6125726Sroot goto hard; 6135726Sroot } else if ((mi->mi_tab.b_errcnt&07) == 4) { 6142826Swnj hpaddr->hpcs1 = HP_RECAL|HP_GO; 61510857Ssam sc->sc_recal = 1; 616*11202Ssam return (MBD_RESTARTED); 61721Sbill } 6182826Swnj if (retry) 6192826Swnj return (MBD_RETRY); 6202826Swnj } 6213706Sroot #ifdef HPDEBUG 6223289Swnj else 62310857Ssam if (hpdebug && sc->sc_recal) { 62410857Ssam printf("recal %d ", sc->sc_recal); 6253289Swnj printf("errcnt %d\n", mi->mi_tab.b_errcnt); 6263289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 6273289Swnj printf("er1=%b er2=%b\n", 6283289Swnj hpaddr->hper1, HPER1_BITS, 6293289Swnj hpaddr->hper2, HPER2_BITS); 6303289Swnj } 6313706Sroot #endif 63210857Ssam switch (sc->sc_recal) { 6333093Swnj 6343093Swnj case 1: 6353093Swnj hpaddr->hpdc = bp->b_cylin; 6363093Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 63710857Ssam sc->sc_recal++; 6383706Sroot return (MBD_RESTARTED); 6393093Swnj case 2: 6403093Swnj if (mi->mi_tab.b_errcnt < 16 || 6413289Swnj (bp->b_flags & B_READ) == 0) 6423093Swnj goto donerecal; 6433093Swnj hpaddr->hpof = hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22; 6443093Swnj hpaddr->hpcs1 = HP_OFFSET|HP_GO; 64510857Ssam sc->sc_recal++; 6463093Swnj return (MBD_RESTARTED); 6473093Swnj donerecal: 6483158Swnj case 3: 64910857Ssam sc->sc_recal = 0; 6502892Swnj return (MBD_RETRY); 6512892Swnj } 65210857Ssam sc->sc_hdr = 0; 653*11202Ssam bp->b_resid = MASKREG(-mi->mi_mba->mba_bcr); 6543640Swnj if (mi->mi_tab.b_errcnt >= 16) { 6553093Swnj /* 6563093Swnj * This is fast and occurs rarely; we don't 6573093Swnj * bother with interrupts. 6583093Swnj */ 6592624Swnj hpaddr->hpcs1 = HP_RTC|HP_GO; 6603093Swnj while (hpaddr->hpds & HPDS_PIP) 6612383Swnj ; 6622383Swnj mbclrattn(mi); 66321Sbill } 6645726Sroot if (!ML11) { 6655726Sroot hpaddr->hpof = HPOF_FMT22; 6665726Sroot hpaddr->hpcs1 = HP_RELEASE|HP_GO; 6675726Sroot } 6682383Swnj return (MBD_DONE); 66921Sbill } 67021Sbill 6717738Sroot hpread(dev, uio) 6722624Swnj dev_t dev; 6737738Sroot struct uio *uio; 67421Sbill { 6752624Swnj register int unit = minor(dev) >> 3; 67621Sbill 6772624Swnj if (unit >= NHP) 6788156Sroot return (ENXIO); 6798156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys, uio)); 68021Sbill } 68121Sbill 6827831Sroot hpwrite(dev, uio) 6832624Swnj dev_t dev; 6847831Sroot struct uio *uio; 68521Sbill { 6862624Swnj register int unit = minor(dev) >> 3; 68721Sbill 6882624Swnj if (unit >= NHP) 6898156Sroot return (ENXIO); 6908156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys, uio)); 69121Sbill } 69221Sbill 6935726Sroot /*ARGSUSED*/ 6947635Ssam hpioctl(dev, cmd, data, flag) 6955726Sroot dev_t dev; 6965726Sroot int cmd; 6977635Ssam caddr_t data; 6985726Sroot int flag; 6995726Sroot { 7005726Sroot 7015726Sroot switch (cmd) { 7027635Ssam 7035726Sroot case DKIOCHDR: /* do header read/write */ 70410857Ssam hpsoftc[minor(dev) >> 3].sc_hdr = 1; 7058579Sroot return (0); 7065726Sroot 7075726Sroot default: 7088579Sroot return (ENXIO); 7095726Sroot } 7105726Sroot } 7115726Sroot 7123706Sroot hpecc(mi, flag) 7132978Swnj register struct mba_device *mi; 7143706Sroot int flag; 71521Sbill { 7162383Swnj register struct mba_regs *mbp = mi->mi_mba; 7172624Swnj register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv; 7182383Swnj register struct buf *bp = mi->mi_tab.b_actf; 7193706Sroot register struct hpst *st = &hpst[mi->mi_type]; 7203706Sroot int npf, o; 7212383Swnj int bn, cn, tn, sn; 722914Sbill int bcr; 72321Sbill 724*11202Ssam bcr = MASKREG(mbp->mba_bcr); 725914Sbill if (bcr) 726914Sbill bcr |= 0xffff0000; /* sxt */ 7273706Sroot if (flag == CONT) 7283706Sroot npf = bp->b_error; 7293706Sroot else 7303706Sroot npf = btop(bcr + bp->b_bcount); 731420Sbill o = (int)bp->b_un.b_addr & PGOFSET; 732420Sbill bn = dkblock(bp); 733420Sbill cn = bp->b_cylin; 7343706Sroot sn = bn%(st->nspc) + npf; 7352383Swnj tn = sn/st->nsect; 7362383Swnj sn %= st->nsect; 7372383Swnj cn += tn/st->ntrak; 7382383Swnj tn %= st->ntrak; 7393706Sroot switch (flag) { 74010856Ssam case ECC: { 7413706Sroot register int i; 7423706Sroot caddr_t addr; 7433706Sroot struct pte mpte; 7443706Sroot int bit, byte, mask; 7453706Sroot 7463706Sroot npf--; /* because block in error is previous block */ 7473706Sroot printf("hp%d%c: soft ecc sn%d\n", dkunit(bp), 7483706Sroot 'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf); 749*11202Ssam mask = MASKREG(rp->hpec2); 750*11202Ssam i = MASKREG(rp->hpec1) - 1; /* -1 makes 0 origin */ 7513706Sroot bit = i&07; 7523706Sroot i = (i&~07)>>3; 7533706Sroot byte = i + o; 7543706Sroot while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { 7553706Sroot mpte = mbp->mba_map[npf+btop(byte)]; 7563706Sroot addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET); 7573706Sroot putmemc(addr, getmemc(addr)^(mask<<bit)); 7583706Sroot byte++; 7593706Sroot i++; 7603706Sroot bit -= 8; 7613706Sroot } 7623706Sroot if (bcr == 0) 7633706Sroot return (0); 7643847Sroot npf++; 7653706Sroot break; 7663706Sroot } 7673706Sroot 7683706Sroot case SSE: 7693706Sroot rp->hpof |= HPOF_SSEI; 7703706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 7713706Sroot break; 7723706Sroot 7733706Sroot case BSE: 7743706Sroot #ifdef HPBDEBUG 7753706Sroot if (hpbdebug) 7763706Sroot printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn); 7773706Sroot #endif 778*11202Ssam if (rp->hpof&HPOF_SSEI) 779*11202Ssam sn++; 7803706Sroot if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0) 781*11202Ssam return (0); 7823706Sroot bp->b_flags |= B_BAD; 7833706Sroot bp->b_error = npf + 1; 7843706Sroot bn = st->ncyl*st->nspc - st->nsect - 1 - bn; 7853706Sroot cn = bn/st->nspc; 7863706Sroot sn = bn%st->nspc; 7873706Sroot tn = sn/st->nsect; 7883706Sroot sn %= st->nsect; 7893706Sroot mbp->mba_bcr = -512; 79010886Shelge rp->hpof &= ~HPOF_SSEI; 7913706Sroot #ifdef HPBDEBUG 7923706Sroot if (hpbdebug) 7933706Sroot printf("revector to cn %d tn %d sn %d\n", cn, tn, sn); 7943706Sroot #endif 7953706Sroot break; 7963706Sroot 7973706Sroot case CONT: 7983706Sroot #ifdef HPBDEBUG 7993706Sroot if (hpbdebug) 8003706Sroot printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn); 8013706Sroot #endif 8023706Sroot npf = bp->b_error; 8033706Sroot bp->b_flags &= ~B_BAD; 8043706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 805*11202Ssam if (MASKREG(mbp->mba_bcr) == 0) 806*11202Ssam return (0); 8073706Sroot break; 8083706Sroot } 8093706Sroot rp->hpcs1 = HP_DCLR|HP_GO; 8103350Swnj if (rp->hpof&HPOF_SSEI) 8112883Swnj sn++; 812420Sbill rp->hpdc = cn; 813420Sbill rp->hpda = (tn<<8) + sn; 814420Sbill mbp->mba_sr = -1; 8153706Sroot mbp->mba_var = (int)ptob(npf) + o; 8163706Sroot rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO; 8173706Sroot mi->mi_tab.b_errcnt = 0; /* error has been corrected */ 818420Sbill return (1); 81921Sbill } 8202362Swnj 8212362Swnj #define DBSIZE 20 8222362Swnj 8232362Swnj hpdump(dev) 8242362Swnj dev_t dev; 8252362Swnj { 8262978Swnj register struct mba_device *mi; 8272383Swnj register struct mba_regs *mba; 8282624Swnj struct hpdevice *hpaddr; 8292362Swnj char *start; 8302383Swnj int num, unit; 8312383Swnj register struct hpst *st; 8322362Swnj 8332362Swnj num = maxfree; 8342362Swnj start = 0; 8352362Swnj unit = minor(dev) >> 3; 8362827Swnj if (unit >= NHP) 8372827Swnj return (ENXIO); 8382383Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 8392978Swnj mi = phys(hpinfo[unit],struct mba_device *); 8402827Swnj if (mi == 0 || mi->mi_alive == 0) 8412827Swnj return (ENXIO); 8422383Swnj mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba; 8433102Swnj mba->mba_cr = MBCR_INIT; 8442624Swnj hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive]; 8453093Swnj if ((hpaddr->hpds & HPDS_VV) == 0) { 8462624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 8472624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 8483093Swnj hpaddr->hpof = HPOF_FMT22; 8492362Swnj } 8502383Swnj st = &hpst[mi->mi_type]; 8512827Swnj if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks) 8522827Swnj return (EINVAL); 8532362Swnj while (num > 0) { 8542383Swnj register struct pte *hpte = mba->mba_map; 8552362Swnj register int i; 8562383Swnj int blk, cn, sn, tn; 8572362Swnj daddr_t bn; 8582362Swnj 8592362Swnj blk = num > DBSIZE ? DBSIZE : num; 8602362Swnj bn = dumplo + btop(start); 8612383Swnj cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff; 8622383Swnj sn = bn%st->nspc; 8632383Swnj tn = sn/st->nsect; 8642383Swnj sn = sn%st->nsect; 8652362Swnj hpaddr->hpdc = cn; 8662362Swnj hpaddr->hpda = (tn << 8) + sn; 8672362Swnj for (i = 0; i < blk; i++) 8682362Swnj *(int *)hpte++ = (btop(start)+i) | PG_V; 8692383Swnj mba->mba_sr = -1; 8702383Swnj mba->mba_bcr = -(blk*NBPG); 8712383Swnj mba->mba_var = 0; 8722624Swnj hpaddr->hpcs1 = HP_WCOM | HP_GO; 8733093Swnj while ((hpaddr->hpds & HPDS_DRY) == 0) 8742362Swnj ; 8753093Swnj if (hpaddr->hpds&HPDS_ERR) 8762827Swnj return (EIO); 8772362Swnj start += blk*NBPG; 8782362Swnj num -= blk; 8792362Swnj } 8802362Swnj return (0); 8812362Swnj } 8821565Sbill #endif 883