1*10857Ssam /* hp.c 4.65 83/02/10 */ 23706Sroot 33706Sroot #ifdef HPDEBUG 43289Swnj int hpdebug; 53706Sroot #endif 63706Sroot #ifdef HPBDEBUG 73706Sroot int hpbdebug; 83706Sroot #endif 921Sbill 101939Swnj #include "hp.h" 111565Sbill #if NHP > 0 1221Sbill /* 135726Sroot * HP disk driver for RP0x+RMxx+ML11 142827Swnj * 152827Swnj * TODO: 163706Sroot * check RM80 skip sector handling when ECC's occur later 173093Swnj * check offset recovery handling 183706Sroot * see if DCLR and/or RELEASE set attention status 193706Sroot * print bits of mr && mr2 symbolically 2021Sbill */ 219786Ssam #include "../machine/pte.h" 2221Sbill 2321Sbill #include "../h/param.h" 2421Sbill #include "../h/systm.h" 25305Sbill #include "../h/dk.h" 2621Sbill #include "../h/buf.h" 2721Sbill #include "../h/conf.h" 2821Sbill #include "../h/dir.h" 2921Sbill #include "../h/user.h" 3021Sbill #include "../h/map.h" 318468Sroot #include "../vax/mtpr.h" 32420Sbill #include "../h/vm.h" 332362Swnj #include "../h/cmap.h" 343706Sroot #include "../h/dkbad.h" 357635Ssam #include "../h/ioctl.h" 367738Sroot #include "../h/uio.h" 3721Sbill 388988Sroot #include "../vax/dkio.h" 398468Sroot #include "../vaxmba/mbareg.h" 408468Sroot #include "../vaxmba/mbavar.h" 418468Sroot #include "../vaxmba/hpreg.h" 4221Sbill 432383Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ 442383Swnj struct size { 4521Sbill daddr_t nblocks; 4621Sbill int cyloff; 473706Sroot } hp6_sizes[8] = { 48886Sbill 15884, 0, /* A=cyl 0 thru 37 */ 49886Sbill 33440, 38, /* B=cyl 38 thru 117 */ 50886Sbill 340670, 0, /* C=cyl 0 thru 814 */ 5121Sbill 0, 0, 5221Sbill 0, 0, 5321Sbill 0, 0, 543729Sroot 291280, 118, /* G=cyl 118 thru 814 */ 5521Sbill 0, 0, 563706Sroot }, rm3_sizes[8] = { 57886Sbill 15884, 0, /* A=cyl 0 thru 99 */ 58886Sbill 33440, 100, /* B=cyl 100 thru 309 */ 59886Sbill 131680, 0, /* C=cyl 0 thru 822 */ 6021Sbill 0, 0, 6121Sbill 0, 0, 623442Sroot 0, 0, 633729Sroot 81984, 310, /* G=cyl 310 thru 822 */ 6421Sbill 0, 0, 65886Sbill }, rm5_sizes[8] = { 66886Sbill 15884, 0, /* A=cyl 0 thru 26 */ 67886Sbill 33440, 27, /* B=cyl 27 thru 81 */ 683271Swnj 500384, 0, /* C=cyl 0 thru 822 */ 69886Sbill 15884, 562, /* D=cyl 562 thru 588 */ 70886Sbill 55936, 589, /* E=cyl 589 thru 680 */ 713729Sroot 86240, 681, /* F=cyl 681 thru 822 */ 723729Sroot 158592, 562, /* G=cyl 562 thru 822 */ 73886Sbill 291346, 82, /* H=cyl 82 thru 561 */ 742383Swnj }, rm80_sizes[8] = { 752383Swnj 15884, 0, /* A=cyl 0 thru 36 */ 762383Swnj 33440, 37, /* B=cyl 37 thru 114 */ 772383Swnj 242606, 0, /* C=cyl 0 thru 558 */ 782383Swnj 0, 0, 792383Swnj 0, 0, 802383Swnj 0, 0, 812383Swnj 82080, 115, /* G=cyl 115 thru 304 */ 823729Sroot 110143, 305, /* H=cyl 305 thru 558 */ 833706Sroot }, hp7_sizes[8] = { 846927Ssam 15884, 0, /* A=cyl 0 thru 9 */ 853706Sroot 64000, 10, /* B=cyl 10 thru 49 */ 863706Sroot 1008000,0, /* C=cyl 0 thru 629 */ 873706Sroot 15884, 330, /* D=cyl 330 thru 339 */ 883706Sroot 256000, 340, /* E=cyl 340 thru 499 */ 893729Sroot 207850, 500, /* F=cyl 500 thru 629 */ 903729Sroot 479850, 330, /* G=cyl 330 thru 629 */ 913706Sroot 448000, 50, /* H=cyl 50 thru 329 */ 926927Ssam }, si9775_sizes[8] = { 9310856Ssam 16640, 0, /* A=cyl 0 thru 12 */ 9410856Ssam 34560, 13, /* B=cyl 13 thru 39 */ 9510856Ssam 1079040, 0, /* C=cyl 0 thru 842 */ 9610856Ssam 0, 0, 9710856Ssam 0, 0, 9810856Ssam 0, 0, 9910856Ssam 513280, 40, /* G=cyl 40 thru 440 */ 1006927Ssam 513280, 441, /* H=cyl 441 thru 841 */ 1016927Ssam }, si9730_sizes[8] = { 1026927Ssam 15884, 0, /* A=cyl 0 thru 49 */ 1036927Ssam 33440, 50, /* B=cyl 50 thru 154 */ 1046927Ssam 263360, 0, /* C=cyl 0 thru 822 */ 1056927Ssam 0, 0, 1066927Ssam 0, 0, 1076927Ssam 0, 0, 1086927Ssam 0, 0, 1096927Ssam 213664, 155, /* H=cyl 155 thru 822 */ 1106927Ssam }, hpam_sizes[8] = { 1116927Ssam 15884, 0, /* A=cyl 0 thru 31 */ 1126927Ssam 33440, 32, /* B=cyl 32 thru 97 */ 1136927Ssam 524288, 0, /* C=cyl 0 thru 1023 */ 1146927Ssam 27786, 668, 1156927Ssam 27786, 723, 1166927Ssam 125440, 778, 1176927Ssam 181760, 668, /* G=cyl 668 thru 1022 */ 1186927Ssam 291346, 98, /* H=cyl 98 thru 667 */ 1199175Ssam }, hpfj_sizes[8] = { 1209175Ssam 15884, 0, /* A=cyl 0 thru 18 */ 1219175Ssam 33440, 19, /* B=cyl 19 thru 58 */ 12210055Ssam 724120, 0, /* C=cyl 0 thru 841 */ 1239175Ssam 0, 0, 1249175Ssam 0, 0, 1259175Ssam 0, 0, 1269175Ssam 381711, 398, /* G=cyl 398 thru 841 */ 1279175Ssam 291346, 59, /* H=cyl 59 thru 397 */ 12810734Ssam }, hpfj48_sizes[8] = { 12910734Ssam 15884, 0, /* A=cyl 0 thru 16 */ 13010734Ssam 33440, 17, /* B=cyl 17 thru 52 */ 13110734Ssam 808176, 0, /* C=cyl 0 thru 841 */ 13210734Ssam 0, 0, 13310734Ssam 0, 0, 13410734Ssam 0, 0, 13510734Ssam 465456, 357, /* G=cyl 357 thru 841 */ 13610734Ssam 291346, 53, /* H=cyl 52 thru 356 */ 13721Sbill }; 1382383Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ 13921Sbill 1402383Swnj #define _hpSDIST 2 1412383Swnj #define _hpRDIST 3 1422383Swnj 1432383Swnj int hpSDIST = _hpSDIST; 1442383Swnj int hpRDIST = _hpRDIST; 1452383Swnj 1466927Ssam /* 1476927Ssam * Table for converting Massbus drive types into 1486927Ssam * indices into the partition tables. Slots are 1496927Ssam * left for those drives devined from other means 1506927Ssam * (e.g. SI, AMPEX, etc.). 1516927Ssam */ 1526927Ssam short hptypes[] = { 1536927Ssam #define HPDT_RM03 0 1546927Ssam MBDT_RM03, 1556927Ssam #define HPDT_RM05 1 1566927Ssam MBDT_RM05, 1576927Ssam #define HPDT_RP06 2 1586927Ssam MBDT_RP06, 1596927Ssam #define HPDT_RM80 3 1606927Ssam MBDT_RM80, 1616927Ssam #define HPDT_RP05 4 1626927Ssam MBDT_RP05, 1636927Ssam #define HPDT_RP07 5 1646927Ssam MBDT_RP07, 1656927Ssam #define HPDT_ML11A 6 1666927Ssam MBDT_ML11A, 1676927Ssam #define HPDT_ML11B 7 1686927Ssam MBDT_ML11B, 1696927Ssam #define HPDT_9775 8 1706927Ssam -1, 1716927Ssam #define HPDT_9730 9 1726927Ssam -1, 1736927Ssam #define HPDT_CAPRICORN 10 1746927Ssam -1, 1759175Ssam #define HPDT_EAGLE 11 1769175Ssam -1, 17710734Ssam #define HPDT_EAGLE48 12 17810734Ssam -1, 17910734Ssam #define HPDT_RM02 13 1809175Ssam MBDT_RM02, /* beware, actually capricorn or eagle */ 1816927Ssam 0 1826927Ssam }; 1832978Swnj struct mba_device *hpinfo[NHP]; 1842978Swnj int hpattach(),hpustart(),hpstart(),hpdtint(); 1852383Swnj struct mba_driver hpdriver = 1862978Swnj { hpattach, 0, hpustart, hpstart, hpdtint, 0, 1872978Swnj hptypes, "hp", 0, hpinfo }; 1882383Swnj 1892383Swnj struct hpst { 1902383Swnj short nsect; 1912383Swnj short ntrak; 1922383Swnj short nspc; 1932383Swnj short ncyl; 1942383Swnj struct size *sizes; 1952383Swnj } hpst[] = { 1963706Sroot 32, 5, 32*5, 823, rm3_sizes, /* RM03 */ 1972383Swnj 32, 19, 32*19, 823, rm5_sizes, /* RM05 */ 1983706Sroot 22, 19, 22*19, 815, hp6_sizes, /* RP06 */ 1993706Sroot 31, 14, 31*14, 559, rm80_sizes, /* RM80 */ 2003706Sroot 22, 19, 22*19, 411, hp6_sizes, /* RP05 */ 2013706Sroot 50, 32, 50*32, 630, hp7_sizes, /* RP07 */ 2025726Sroot 1, 1, 1, 1, 0, /* ML11A */ 2035726Sroot 1, 1, 1, 1, 0, /* ML11B */ 2046927Ssam 32, 40, 32*40, 843, si9775_sizes, /* 9775 */ 2056927Ssam 32, 10, 32*10, 823, si9730_sizes, /* 9730 */ 2066927Ssam 32, 16, 32*16, 1024, hpam_sizes, /* AMPEX capricorn */ 20710055Ssam 43, 20, 43*20, 842, hpfj_sizes, /* Fujitsu EAGLE */ 20810734Ssam 48, 20, 48*20, 842, hpfj48_sizes, /* 48 sector EAGLE */ 2092383Swnj }; 2102383Swnj 2112624Swnj u_char hp_offset[16] = { 2123093Swnj HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400, 2133093Swnj HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800, 2143093Swnj HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200, 2153093Swnj 0, 0, 0, 0, 21621Sbill }; 21721Sbill 2182624Swnj struct buf rhpbuf[NHP]; 2193706Sroot struct buf bhpbuf[NHP]; 2203706Sroot struct dkbad hpbad[NHP]; 22121Sbill 222*10857Ssam struct hpsoftc { 223*10857Ssam u_char sc_hpinit; /* drive initialized */ 224*10857Ssam u_char sc_recal; /* recalibrate state */ 225*10857Ssam u_char sc_hdr; /* next i/o includes header */ 226*10857Ssam u_char sc_doseeks; /* perform explicit seeks */ 227*10857Ssam daddr_t sc_mlsize; /* ML11 size */ 228*10857Ssam } hpsoftc[NHP]; 229*10857Ssam 23021Sbill #define b_cylin b_resid 23121Sbill 2325726Sroot /* #define ML11 0 to remove ML11 support */ 2335726Sroot #define ML11 (hptypes[mi->mi_type] == MBDT_ML11A) 2345726Sroot #define RP06 (hptypes[mi->mi_type] <= MBDT_RP06) 2355726Sroot #define RM80 (hptypes[mi->mi_type] == MBDT_RM80) 2365726Sroot 23721Sbill #ifdef INTRLVE 23821Sbill daddr_t dkblock(); 23921Sbill #endif 2402604Swnj 2412978Swnj /*ARGSUSED*/ 2422978Swnj hpattach(mi, slave) 24310734Ssam register struct mba_device *mi; 2442604Swnj { 24510734Ssam 24610734Ssam mi->mi_type = hpmaptype(mi); 24710734Ssam if (!ML11 && mi->mi_dk >= 0) { 24810734Ssam struct hpst *st = &hpst[mi->mi_type]; 24910734Ssam 25010734Ssam dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256); 25110734Ssam } 25210734Ssam } 25310734Ssam 25410734Ssam /* 25510734Ssam * Map apparent MASSBUS drive type into manufacturer 25610734Ssam * specific configuration. For SI controllers this is done 25710734Ssam * based on codes in the serial number register. For 25810734Ssam * EMULEX controllers, the track and sector attributes are 25910734Ssam * used when the drive type is an RM02 (not supported by DEC). 26010734Ssam */ 26110734Ssam hpmaptype(mi) 26210734Ssam register struct mba_device *mi; 26310734Ssam { 2646927Ssam register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 26510734Ssam register int type = mi->mi_type; 2666927Ssam 2676927Ssam /* 2686927Ssam * Model-byte processing for SI 9400 controllers. 2696927Ssam * NB: Only deals with RM03 and RM05 emulations. 2706927Ssam */ 27110734Ssam if (type == HPDT_RM03 || type == HPDT_RM05) { 27210734Ssam int hpsn = hpaddr->hpsn; 2736927Ssam 2746927Ssam if ((hpsn & SIMB_LU) != mi->mi_drive) 27510734Ssam return (type); 2766927Ssam switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) { 2776927Ssam 2786927Ssam case SI9775D: 2796927Ssam printf("hp%d: si 9775 (direct)\n", mi->mi_unit); 28010734Ssam type = HPDT_9775; 2816927Ssam break; 2826927Ssam 2836927Ssam case SI9730D: 2846927Ssam printf("hp%d: si 9730 (direct)\n", mi->mi_unit); 28510734Ssam type = HPDT_9730; 2866927Ssam break; 2876927Ssam 2887035Swnj /* 28910734Ssam * AMPEX 9300, SI Combination needs a have the 29010734Ssam * drive cleared before we start. We do not know 29110734Ssam * why, but tests show that the recalibrate fixes 29210734Ssam * the problem. 2937035Swnj */ 2946927Ssam case SI9766: 2956927Ssam printf("hp%d: 9776/9300\n", mi->mi_unit); 29610734Ssam type = HPDT_RM05; 2977035Swnj hpaddr->hpcs1 = HP_RECAL|HP_GO; 2987035Swnj DELAY(100000); 2996927Ssam break; 3006927Ssam 3016927Ssam case SI9762: 3026927Ssam printf("hp%d: 9762\n", mi->mi_unit); 30310734Ssam type = HPDT_RM03; 3046927Ssam break; 3056927Ssam } 30610734Ssam return (type); 30710734Ssam } 3086927Ssam 3096927Ssam /* 31010734Ssam * EMULEX SC750 or SC780. Poke the holding register. 3116927Ssam */ 31210734Ssam if (type == HPDT_RM02) { 31310734Ssam int ntracks, nsectors; 31410734Ssam 3156927Ssam hpaddr->hpcs1 = HP_NOP; 3166927Ssam hpaddr->hphr = HPHR_MAXTRAK; 31710055Ssam ntracks = (hpaddr->hphr & 0xffff) + 1; 31810055Ssam if (ntracks == 16) { 3196927Ssam printf("hp%d: capricorn\n", mi->mi_unit); 32010734Ssam type = HPDT_CAPRICORN; 32110734Ssam goto done; 32210734Ssam } 32310734Ssam if (ntracks != 20) { 32410055Ssam printf("hp%d: ntracks %d: unknown device\n", ntracks); 32510734Ssam goto done; 32610734Ssam } 32710734Ssam hpaddr->hpcs1 = HP_NOP; 32810734Ssam hpaddr->hphr = HPHR_MAXSECT; 32910734Ssam nsectors = (hpaddr->hphr & 0xffff) + 1; 33010734Ssam printf("hp%d: ", mi->mi_unit); 33110734Ssam if (nsectors == 43) 33210734Ssam type = HPDT_EAGLE; 33310734Ssam else { 33410734Ssam type = HPDT_EAGLE48; 33510734Ssam printf("modified "); 33610734Ssam } 33710734Ssam printf("eagle\n"); 33810734Ssam done: 3396927Ssam hpaddr->hpcs1 = HP_DCLR|HP_GO; 34010734Ssam return (type); 34110734Ssam } 3426927Ssam 34310734Ssam /* 34410734Ssam * Map all ML11's to the same type. Also calculate 34510734Ssam * transfer rates based on device characteristics. 34610734Ssam */ 34710734Ssam if (type == HPDT_ML11A || type == HPDT_ML11B) { 348*10857Ssam register struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 349*10857Ssam register int trt; 3502604Swnj 351*10857Ssam sc->sc_mlsize = hpaddr->hpmr & HPMR_SZ; 3525726Sroot if ((hpaddr->hpmr & HPMR_ARRTYP) == 0) 353*10857Ssam sc->sc_mlsize >>= 2; 3545726Sroot if (mi->mi_dk >= 0) { 3555726Sroot trt = (hpaddr->hpmr & HPMR_TRT) >> 8; 3565726Sroot dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt)); 3575726Sroot } 35810734Ssam type = HPDT_ML11A; 3596927Ssam } 36010734Ssam return (type); 3612604Swnj } 3622604Swnj 3638579Sroot hpopen(dev) 3648579Sroot dev_t dev; 3658579Sroot { 3668579Sroot register int unit = minor(dev) >> 3; 3678579Sroot register struct mba_device *mi; 3688579Sroot 3698579Sroot if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0) 3708579Sroot return (ENXIO); 3718579Sroot return (0); 3728579Sroot } 3738579Sroot 37421Sbill hpstrategy(bp) 3752383Swnj register struct buf *bp; 37621Sbill { 3772978Swnj register struct mba_device *mi; 3782383Swnj register struct hpst *st; 3792383Swnj register int unit; 38021Sbill long sz, bn; 3812383Swnj int xunit = minor(bp->b_dev) & 07; 3825432Sroot int s; 38321Sbill 38421Sbill sz = bp->b_bcount; 38521Sbill sz = (sz+511) >> 9; 38621Sbill unit = dkunit(bp); 3872383Swnj if (unit >= NHP) 3882383Swnj goto bad; 3892383Swnj mi = hpinfo[unit]; 3902395Swnj if (mi == 0 || mi->mi_alive == 0) 3912383Swnj goto bad; 3922383Swnj st = &hpst[mi->mi_type]; 3935726Sroot if (ML11) { 394*10857Ssam struct hpsoftc *sc = &hpsoftc[unit]; 395*10857Ssam 3965726Sroot if (bp->b_blkno < 0 || 397*10857Ssam dkblock(bp)+sz > sc->sc_mlsize) 3985726Sroot goto bad; 3995726Sroot bp->b_cylin = 0; 4005726Sroot } else { 4015726Sroot if (bp->b_blkno < 0 || 4025726Sroot (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks) 4035726Sroot goto bad; 4045726Sroot bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff; 4055726Sroot } 4065432Sroot s = spl5(); 4072383Swnj disksort(&mi->mi_tab, bp); 4082383Swnj if (mi->mi_tab.b_active == 0) 4092383Swnj mbustart(mi); 4105432Sroot splx(s); 4112383Swnj return; 4122383Swnj 4132383Swnj bad: 4142383Swnj bp->b_flags |= B_ERROR; 4152383Swnj iodone(bp); 4162383Swnj return; 41721Sbill } 41821Sbill 4192383Swnj hpustart(mi) 4202978Swnj register struct mba_device *mi; 42121Sbill { 4222624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 4232383Swnj register struct buf *bp = mi->mi_tab.b_actf; 4243706Sroot register struct hpst *st = &hpst[mi->mi_type]; 425*10857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 42621Sbill daddr_t bn; 4273102Swnj int sn, dist; 42821Sbill 4293706Sroot hpaddr->hpcs1 = 0; 4302624Swnj if ((hpaddr->hpcs1&HP_DVA) == 0) 4312383Swnj return (MBU_BUSY); 432*10857Ssam if ((hpaddr->hpds & HPDS_VV) == 0 || !sc->sc_hpinit) { 4333706Sroot struct buf *bbp = &bhpbuf[mi->mi_unit]; 4343706Sroot 435*10857Ssam sc->sc_hpinit = 1; 4362624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 4373140Swnj if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive)) 4383140Swnj printf("DCLR attn\n"); 4392624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 4405726Sroot if (!ML11) 4415726Sroot hpaddr->hpof = HPOF_FMT22; 4423140Swnj mbclrattn(mi); 4435726Sroot if (!ML11) { 4445726Sroot bbp->b_flags = B_READ|B_BUSY; 4455726Sroot bbp->b_dev = bp->b_dev; 4465726Sroot bbp->b_bcount = 512; 4475726Sroot bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit]; 4485726Sroot bbp->b_blkno = st->ncyl*st->nspc - st->nsect; 4495726Sroot bbp->b_cylin = st->ncyl - 1; 4505726Sroot mi->mi_tab.b_actf = bbp; 4515726Sroot bbp->av_forw = bp; 4525726Sroot bp = bbp; 4535726Sroot } 45421Sbill } 4552604Swnj if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1) 4562383Swnj return (MBU_DODATA); 4575726Sroot if (ML11) 4585726Sroot return (MBU_DODATA); 4593093Swnj if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY) 4602383Swnj return (MBU_DODATA); 4612395Swnj bn = dkblock(bp); 4622395Swnj sn = bn%st->nspc; 4632395Swnj sn = (sn+st->nsect-hpSDIST)%st->nsect; 4642383Swnj if (bp->b_cylin == (hpaddr->hpdc & 0xffff)) { 465*10857Ssam if (sc->sc_seek) 4662383Swnj return (MBU_DODATA); 4672383Swnj dist = ((hpaddr->hpla & 0xffff)>>6) - st->nsect + 1; 4682383Swnj if (dist < 0) 4692383Swnj dist += st->nsect; 4702383Swnj if (dist > st->nsect - hpRDIST) 4712383Swnj return (MBU_DODATA); 4722614Swnj } else 4732614Swnj hpaddr->hpdc = bp->b_cylin; 474*10857Ssam if (sc->sc_seek) 4752624Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 476305Sbill else { 477305Sbill hpaddr->hpda = sn; 4782624Swnj hpaddr->hpcs1 = HP_SEARCH|HP_GO; 479305Sbill } 4802383Swnj return (MBU_STARTED); 48121Sbill } 48221Sbill 4832383Swnj hpstart(mi) 4842978Swnj register struct mba_device *mi; 48521Sbill { 4862624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 4872383Swnj register struct buf *bp = mi->mi_tab.b_actf; 4882383Swnj register struct hpst *st = &hpst[mi->mi_type]; 489*10857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 49021Sbill daddr_t bn; 4912383Swnj int sn, tn; 49221Sbill 49321Sbill bn = dkblock(bp); 4945726Sroot if (ML11) 4955726Sroot hpaddr->hpda = bn; 4965726Sroot else { 4975726Sroot sn = bn%st->nspc; 4985726Sroot tn = sn/st->nsect; 4995726Sroot sn %= st->nsect; 5005726Sroot hpaddr->hpdc = bp->b_cylin; 5015726Sroot hpaddr->hpda = (tn << 8) + sn; 5025726Sroot } 503*10857Ssam if (sc->sc_hdr) { 5045726Sroot if (bp->b_flags & B_READ) 5055726Sroot return (HP_RHDR|HP_GO); 5065726Sroot else 5075726Sroot return (HP_WHDR|HP_GO); 5085726Sroot } 5095726Sroot return (0); 51021Sbill } 51121Sbill 5123102Swnj hpdtint(mi, mbsr) 5132978Swnj register struct mba_device *mi; 5143102Swnj int mbsr; 51521Sbill { 5162624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 5172383Swnj register struct buf *bp = mi->mi_tab.b_actf; 51810622Shelge register struct hpst *st = &hpst[mi->mi_type]; 5195893Swnj register int er1, er2; 520*10857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 5212826Swnj int retry = 0; 52221Sbill 5233706Sroot if (bp->b_flags&B_BAD) { 5243706Sroot if (hpecc(mi, CONT)) 5253706Sroot return(MBD_RESTARTED); 5263706Sroot } 5273102Swnj if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) { 5283706Sroot #ifdef HPDEBUG 5293289Swnj if (hpdebug) { 5303706Sroot int dc = hpaddr->hpdc, da = hpaddr->hpda; 5313706Sroot 5323706Sroot printf("hperr: bp %x cyl %d blk %d as %o ", 5333706Sroot bp, bp->b_cylin, bp->b_blkno, 5343706Sroot hpaddr->hpas&0xff); 5353706Sroot printf("dc %x da %x\n",dc&0xffff, da&0xffff); 5363289Swnj printf("errcnt %d ", mi->mi_tab.b_errcnt); 5373289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 5383289Swnj printf("er1=%b er2=%b\n", 5393289Swnj hpaddr->hper1, HPER1_BITS, 5403289Swnj hpaddr->hper2, HPER2_BITS); 5413289Swnj DELAY(1000000); 5423289Swnj } 5433706Sroot #endif 5445858Swnj er1 = hpaddr->hper1; 5455893Swnj er2 = hpaddr->hper2; 5465893Swnj if (er1 & HPER1_HCRC) { 5475858Swnj er1 &= ~(HPER1_HCE|HPER1_FER); 5485893Swnj er2 &= ~HPER2_BSE; 5495893Swnj } 5505858Swnj if (er1&HPER1_WLE) { 5512925Swnj printf("hp%d: write locked\n", dkunit(bp)); 5522826Swnj bp->b_flags |= B_ERROR; 553*10857Ssam } else if ((er1&0xffff) == HPER1_FER && RP06 && !sc->sc_hdr) { 5545726Sroot if (hpecc(mi, BSE)) 5555726Sroot return(MBD_RESTARTED); 5565726Sroot else 5575726Sroot goto hard; 5582826Swnj } else if (++mi->mi_tab.b_errcnt > 27 || 5593102Swnj mbsr & MBSR_HARD || 5605858Swnj er1 & HPER1_HARD || 561*10857Ssam sc->sc_hdr || 5625893Swnj (!ML11 && (er2 & HPER2_HARD))) { 5633706Sroot hard: 56410622Shelge if (ML11) 56510622Shelge bp->b_blkno = hpaddr->hpda&0xffff; 56610622Shelge else 56710622Shelge bp->b_blkno = (hpaddr->hpdc*st->nspc)&0xffff + 56810622Shelge ((hpaddr->hpda>>8)&0xffff)*st->nsect + 56910622Shelge (hpaddr->hpda&0x1f); 5702925Swnj harderr(bp, "hp"); 5713271Swnj if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC))) 5723271Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 5733706Sroot printf("er1=%b er2=%b", 5742826Swnj hpaddr->hper1, HPER1_BITS, 5752826Swnj hpaddr->hper2, HPER2_BITS); 5763706Sroot if (hpaddr->hpmr) 5773706Sroot printf(" mr=%o", hpaddr->hpmr&0xffff); 5783706Sroot if (hpaddr->hpmr2) 5793706Sroot printf(" mr2=%o", hpaddr->hpmr2&0xffff); 5803706Sroot printf("\n"); 5812826Swnj bp->b_flags |= B_ERROR; 58210622Shelge retry = 0; 583*10857Ssam sc->sc_recal = 0; 5845893Swnj } else if ((er2 & HPER2_BSE) && !ML11) { 5853706Sroot if (hpecc(mi, BSE)) 5863706Sroot return(MBD_RESTARTED); 5873706Sroot else 5883706Sroot goto hard; 5895893Swnj } else if (RM80 && er2&HPER2_SSE) { 5903988Sroot (void) hpecc(mi, SSE); 5912883Swnj return (MBD_RESTARTED); 5925858Swnj } else if ((er1&(HPER1_DCK|HPER1_ECH))==HPER1_DCK) { 5933706Sroot if (hpecc(mi, ECC)) 5942383Swnj return (MBD_RESTARTED); 5952826Swnj /* else done */ 5962826Swnj } else 5972826Swnj retry = 1; 5982826Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 5995726Sroot if (ML11) { 6005726Sroot if (mi->mi_tab.b_errcnt >= 16) 6015726Sroot goto hard; 6025726Sroot } else if ((mi->mi_tab.b_errcnt&07) == 4) { 6032826Swnj hpaddr->hpcs1 = HP_RECAL|HP_GO; 604*10857Ssam sc->sc_recal = 1; 6053706Sroot return(MBD_RESTARTED); 60621Sbill } 6072826Swnj if (retry) 6082826Swnj return (MBD_RETRY); 6092826Swnj } 6103706Sroot #ifdef HPDEBUG 6113289Swnj else 612*10857Ssam if (hpdebug && sc->sc_recal) { 613*10857Ssam printf("recal %d ", sc->sc_recal); 6143289Swnj printf("errcnt %d\n", mi->mi_tab.b_errcnt); 6153289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 6163289Swnj printf("er1=%b er2=%b\n", 6173289Swnj hpaddr->hper1, HPER1_BITS, 6183289Swnj hpaddr->hper2, HPER2_BITS); 6193289Swnj } 6203706Sroot #endif 621*10857Ssam switch (sc->sc_recal) { 6223093Swnj 6233093Swnj case 1: 6243093Swnj hpaddr->hpdc = bp->b_cylin; 6253093Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 626*10857Ssam sc->sc_recal++; 6273706Sroot return (MBD_RESTARTED); 6283093Swnj case 2: 6293093Swnj if (mi->mi_tab.b_errcnt < 16 || 6303289Swnj (bp->b_flags & B_READ) == 0) 6313093Swnj goto donerecal; 6323093Swnj hpaddr->hpof = hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22; 6333093Swnj hpaddr->hpcs1 = HP_OFFSET|HP_GO; 634*10857Ssam sc->sc_recal++; 6353093Swnj return (MBD_RESTARTED); 6363093Swnj donerecal: 6373158Swnj case 3: 638*10857Ssam sc->sc_recal = 0; 6392892Swnj return (MBD_RETRY); 6402892Swnj } 641*10857Ssam sc->sc_hdr = 0; 6422383Swnj bp->b_resid = -(mi->mi_mba->mba_bcr) & 0xffff; 6433640Swnj if (mi->mi_tab.b_errcnt >= 16) { 6443093Swnj /* 6453093Swnj * This is fast and occurs rarely; we don't 6463093Swnj * bother with interrupts. 6473093Swnj */ 6482624Swnj hpaddr->hpcs1 = HP_RTC|HP_GO; 6493093Swnj while (hpaddr->hpds & HPDS_PIP) 6502383Swnj ; 6512383Swnj mbclrattn(mi); 65221Sbill } 6535726Sroot if (!ML11) { 6545726Sroot hpaddr->hpof = HPOF_FMT22; 6555726Sroot hpaddr->hpcs1 = HP_RELEASE|HP_GO; 6565726Sroot } 6572383Swnj return (MBD_DONE); 65821Sbill } 65921Sbill 6607738Sroot hpread(dev, uio) 6612624Swnj dev_t dev; 6627738Sroot struct uio *uio; 66321Sbill { 6642624Swnj register int unit = minor(dev) >> 3; 66521Sbill 6662624Swnj if (unit >= NHP) 6678156Sroot return (ENXIO); 6688156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys, uio)); 66921Sbill } 67021Sbill 6717831Sroot hpwrite(dev, uio) 6722624Swnj dev_t dev; 6737831Sroot struct uio *uio; 67421Sbill { 6752624Swnj register int unit = minor(dev) >> 3; 67621Sbill 6772624Swnj if (unit >= NHP) 6788156Sroot return (ENXIO); 6798156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys, uio)); 68021Sbill } 68121Sbill 6825726Sroot /*ARGSUSED*/ 6837635Ssam hpioctl(dev, cmd, data, flag) 6845726Sroot dev_t dev; 6855726Sroot int cmd; 6867635Ssam caddr_t data; 6875726Sroot int flag; 6885726Sroot { 6895726Sroot 6905726Sroot switch (cmd) { 6917635Ssam 6925726Sroot case DKIOCHDR: /* do header read/write */ 693*10857Ssam hpsoftc[minor(dev) >> 3].sc_hdr = 1; 6948579Sroot return (0); 6955726Sroot 6965726Sroot default: 6978579Sroot return (ENXIO); 6985726Sroot } 6995726Sroot } 7005726Sroot 7013706Sroot hpecc(mi, flag) 7022978Swnj register struct mba_device *mi; 7033706Sroot int flag; 70421Sbill { 7052383Swnj register struct mba_regs *mbp = mi->mi_mba; 7062624Swnj register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv; 7072383Swnj register struct buf *bp = mi->mi_tab.b_actf; 7083706Sroot register struct hpst *st = &hpst[mi->mi_type]; 7093706Sroot int npf, o; 7102383Swnj int bn, cn, tn, sn; 711914Sbill int bcr; 71221Sbill 713914Sbill bcr = mbp->mba_bcr & 0xffff; 714914Sbill if (bcr) 715914Sbill bcr |= 0xffff0000; /* sxt */ 7163706Sroot if (flag == CONT) 7173706Sroot npf = bp->b_error; 7183706Sroot else 7193706Sroot npf = btop(bcr + bp->b_bcount); 720420Sbill o = (int)bp->b_un.b_addr & PGOFSET; 721420Sbill bn = dkblock(bp); 722420Sbill cn = bp->b_cylin; 7233706Sroot sn = bn%(st->nspc) + npf; 7242383Swnj tn = sn/st->nsect; 7252383Swnj sn %= st->nsect; 7262383Swnj cn += tn/st->ntrak; 7272383Swnj tn %= st->ntrak; 7283706Sroot switch (flag) { 72910856Ssam case ECC: { 7303706Sroot register int i; 7313706Sroot caddr_t addr; 7323706Sroot struct pte mpte; 7333706Sroot int bit, byte, mask; 7343706Sroot 7353706Sroot npf--; /* because block in error is previous block */ 7363706Sroot printf("hp%d%c: soft ecc sn%d\n", dkunit(bp), 7373706Sroot 'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf); 7383706Sroot mask = rp->hpec2&0xffff; 7393706Sroot i = (rp->hpec1&0xffff) - 1; /* -1 makes 0 origin */ 7403706Sroot bit = i&07; 7413706Sroot i = (i&~07)>>3; 7423706Sroot byte = i + o; 7433706Sroot while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { 7443706Sroot mpte = mbp->mba_map[npf+btop(byte)]; 7453706Sroot addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET); 7463706Sroot putmemc(addr, getmemc(addr)^(mask<<bit)); 7473706Sroot byte++; 7483706Sroot i++; 7493706Sroot bit -= 8; 7503706Sroot } 7513706Sroot if (bcr == 0) 7523706Sroot return (0); 7533847Sroot npf++; 7543706Sroot break; 7553706Sroot } 7563706Sroot 7573706Sroot case SSE: 7583706Sroot rp->hpof |= HPOF_SSEI; 7593706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 7603706Sroot break; 7613706Sroot 7623706Sroot case BSE: 7633706Sroot #ifdef HPBDEBUG 7643706Sroot if (hpbdebug) 7653706Sroot printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn); 7663706Sroot #endif 7673706Sroot if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0) 7683706Sroot return(0); 7693706Sroot bp->b_flags |= B_BAD; 7703706Sroot bp->b_error = npf + 1; 7713706Sroot bn = st->ncyl*st->nspc - st->nsect - 1 - bn; 7723706Sroot cn = bn/st->nspc; 7733706Sroot sn = bn%st->nspc; 7743706Sroot tn = sn/st->nsect; 7753706Sroot sn %= st->nsect; 7763706Sroot mbp->mba_bcr = -512; 7773706Sroot #ifdef HPBDEBUG 7783706Sroot if (hpbdebug) 7793706Sroot printf("revector to cn %d tn %d sn %d\n", cn, tn, sn); 7803706Sroot #endif 7813706Sroot break; 7823706Sroot 7833706Sroot case CONT: 7843706Sroot #ifdef HPBDEBUG 7853706Sroot if (hpbdebug) 7863706Sroot printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn); 7873706Sroot #endif 7883706Sroot npf = bp->b_error; 7893706Sroot bp->b_flags &= ~B_BAD; 7903706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 7913706Sroot if ((mbp->mba_bcr & 0xffff) == 0) 7923706Sroot return(0); 7933706Sroot break; 7943706Sroot } 7953706Sroot rp->hpcs1 = HP_DCLR|HP_GO; 7963350Swnj if (rp->hpof&HPOF_SSEI) 7972883Swnj sn++; 798420Sbill rp->hpdc = cn; 799420Sbill rp->hpda = (tn<<8) + sn; 800420Sbill mbp->mba_sr = -1; 8013706Sroot mbp->mba_var = (int)ptob(npf) + o; 8023706Sroot rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO; 8033706Sroot mi->mi_tab.b_errcnt = 0; /* error has been corrected */ 804420Sbill return (1); 80521Sbill } 8062362Swnj 8072362Swnj #define DBSIZE 20 8082362Swnj 8092362Swnj hpdump(dev) 8102362Swnj dev_t dev; 8112362Swnj { 8122978Swnj register struct mba_device *mi; 8132383Swnj register struct mba_regs *mba; 8142624Swnj struct hpdevice *hpaddr; 8152362Swnj char *start; 8162383Swnj int num, unit; 8172383Swnj register struct hpst *st; 8182362Swnj 8192362Swnj num = maxfree; 8202362Swnj start = 0; 8212362Swnj unit = minor(dev) >> 3; 8222827Swnj if (unit >= NHP) 8232827Swnj return (ENXIO); 8242383Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 8252978Swnj mi = phys(hpinfo[unit],struct mba_device *); 8262827Swnj if (mi == 0 || mi->mi_alive == 0) 8272827Swnj return (ENXIO); 8282383Swnj mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba; 8293102Swnj mba->mba_cr = MBCR_INIT; 8302624Swnj hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive]; 8313093Swnj if ((hpaddr->hpds & HPDS_VV) == 0) { 8322624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 8332624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 8343093Swnj hpaddr->hpof = HPOF_FMT22; 8352362Swnj } 8362383Swnj st = &hpst[mi->mi_type]; 8372827Swnj if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks) 8382827Swnj return (EINVAL); 8392362Swnj while (num > 0) { 8402383Swnj register struct pte *hpte = mba->mba_map; 8412362Swnj register int i; 8422383Swnj int blk, cn, sn, tn; 8432362Swnj daddr_t bn; 8442362Swnj 8452362Swnj blk = num > DBSIZE ? DBSIZE : num; 8462362Swnj bn = dumplo + btop(start); 8472383Swnj cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff; 8482383Swnj sn = bn%st->nspc; 8492383Swnj tn = sn/st->nsect; 8502383Swnj sn = sn%st->nsect; 8512362Swnj hpaddr->hpdc = cn; 8522362Swnj hpaddr->hpda = (tn << 8) + sn; 8532362Swnj for (i = 0; i < blk; i++) 8542362Swnj *(int *)hpte++ = (btop(start)+i) | PG_V; 8552383Swnj mba->mba_sr = -1; 8562383Swnj mba->mba_bcr = -(blk*NBPG); 8572383Swnj mba->mba_var = 0; 8582624Swnj hpaddr->hpcs1 = HP_WCOM | HP_GO; 8593093Swnj while ((hpaddr->hpds & HPDS_DRY) == 0) 8602362Swnj ; 8613093Swnj if (hpaddr->hpds&HPDS_ERR) 8622827Swnj return (EIO); 8632362Swnj start += blk*NBPG; 8642362Swnj num -= blk; 8652362Swnj } 8662362Swnj return (0); 8672362Swnj } 8681565Sbill #endif 869