xref: /csrg-svn/sys/vax/mba/hp.c (revision 10734)
1*10734Ssam /*	hp.c	4.63	83/02/05	*/
23706Sroot 
33706Sroot #ifdef HPDEBUG
43289Swnj int	hpdebug;
53706Sroot #endif
63706Sroot #ifdef HPBDEBUG
73706Sroot int	hpbdebug;
83706Sroot #endif
921Sbill 
101939Swnj #include "hp.h"
111565Sbill #if NHP > 0
1221Sbill /*
135726Sroot  * HP disk driver for RP0x+RMxx+ML11
142827Swnj  *
152827Swnj  * TODO:
163706Sroot  *	check RM80 skip sector handling when ECC's occur later
173093Swnj  *	check offset recovery handling
183706Sroot  *	see if DCLR and/or RELEASE set attention status
193706Sroot  *	print bits of mr && mr2 symbolically
2021Sbill  */
219786Ssam #include "../machine/pte.h"
2221Sbill 
2321Sbill #include "../h/param.h"
2421Sbill #include "../h/systm.h"
25305Sbill #include "../h/dk.h"
2621Sbill #include "../h/buf.h"
2721Sbill #include "../h/conf.h"
2821Sbill #include "../h/dir.h"
2921Sbill #include "../h/user.h"
3021Sbill #include "../h/map.h"
318468Sroot #include "../vax/mtpr.h"
32420Sbill #include "../h/vm.h"
332362Swnj #include "../h/cmap.h"
343706Sroot #include "../h/dkbad.h"
357635Ssam #include "../h/ioctl.h"
367738Sroot #include "../h/uio.h"
3721Sbill 
388988Sroot #include "../vax/dkio.h"
398468Sroot #include "../vaxmba/mbareg.h"
408468Sroot #include "../vaxmba/mbavar.h"
418468Sroot #include "../vaxmba/hpreg.h"
4221Sbill 
432383Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */
442383Swnj struct	size {
4521Sbill 	daddr_t	nblocks;
4621Sbill 	int	cyloff;
473706Sroot } hp6_sizes[8] = {
48886Sbill 	15884,	0,		/* A=cyl 0 thru 37 */
49886Sbill 	33440,	38,		/* B=cyl 38 thru 117 */
50886Sbill 	340670,	0,		/* C=cyl 0 thru 814 */
5121Sbill 	0,	0,
5221Sbill 	0,	0,
5321Sbill 	0,	0,
543726Sroot #ifndef NOBADSECT
553729Sroot 	291280,	118,		/* G=cyl 118 thru 814 */
563706Sroot #else
573706Sroot 	291346,	118,
583706Sroot #endif
5921Sbill 	0,	0,
603706Sroot }, rm3_sizes[8] = {
61886Sbill 	15884,	0,		/* A=cyl 0 thru 99 */
62886Sbill 	33440,	100,		/* B=cyl 100 thru 309 */
63886Sbill 	131680,	0,		/* C=cyl 0 thru 822 */
6421Sbill 	0,	0,
6521Sbill 	0,	0,
663442Sroot 	0,	0,
673726Sroot #ifndef NOBADSECT
683729Sroot 	81984,	310,		/* G=cyl 310 thru 822 */
693706Sroot #else
703706Sroot 	82080,	310,
713706Sroot #endif
7221Sbill 	0,	0,
73886Sbill }, rm5_sizes[8] = {
74886Sbill 	15884,	0,		/* A=cyl 0 thru 26 */
75886Sbill 	33440,	27,		/* B=cyl 27 thru 81 */
763271Swnj 	500384,	0,		/* C=cyl 0 thru 822 */
77886Sbill 	15884,	562,		/* D=cyl 562 thru 588 */
78886Sbill 	55936,	589,		/* E=cyl 589 thru 680 */
793726Sroot #ifndef NOBADSECT
803729Sroot 	86240,	681,		/* F=cyl 681 thru 822 */
813729Sroot 	158592,	562,		/* G=cyl 562 thru 822 */
823706Sroot #else
835695Sroot 	86336,	681,
843706Sroot 	158688,	562,
853706Sroot #endif
86886Sbill 	291346,	82,		/* H=cyl 82 thru 561 */
872383Swnj }, rm80_sizes[8] = {
882383Swnj 	15884,	0,		/* A=cyl 0 thru 36 */
892383Swnj 	33440,	37,		/* B=cyl 37 thru 114 */
902383Swnj 	242606,	0,		/* C=cyl 0 thru 558 */
912383Swnj 	0,	0,
922383Swnj 	0,	0,
932383Swnj 	0,	0,
942383Swnj 	82080,	115,		/* G=cyl 115 thru 304 */
953729Sroot 	110143,	305,		/* H=cyl 305 thru 558 */
963706Sroot }, hp7_sizes[8] = {
976927Ssam 	15884,	0,		/* A=cyl 0 thru 9 */
983706Sroot 	64000,	10,		/* B=cyl 10 thru 49 */
993706Sroot 	1008000,0,		/* C=cyl 0 thru 629 */
1003706Sroot 	15884,	330,		/* D=cyl 330 thru 339 */
1013706Sroot 	256000,	340,		/* E=cyl 340 thru 499 */
1023729Sroot 	207850,	500,		/* F=cyl 500 thru 629 */
1033729Sroot 	479850,	330,		/* G=cyl 330 thru 629 */
1043706Sroot 	448000,	50,		/* H=cyl 50 thru 329 */
1056927Ssam }, si9775_sizes[8] = {
1066927Ssam 	16640,	  0,		/* A=cyl   0 thru  12 */
1076927Ssam 	34560,	 13,		/* B=cyl  13 thru  39 */
1086927Ssam 	1079040,  0,		/* C=cyl   0 thru 842 - whole disk */
1096927Ssam 	0,	  0,		/* D unused */
1106927Ssam 	0,	  0,		/* E unused */
1116927Ssam 	0,	  0,		/* F unused */
1126927Ssam 	513280,	 40,		/* G=cyl  40 thru 440 */
1136927Ssam 	513280,	441,		/* H=cyl 441 thru 841 */
1146927Ssam }, si9730_sizes[8] = {
1156927Ssam 	15884,	0,		/* A=cyl 0 thru 49 */
1166927Ssam 	33440,	50,		/* B=cyl 50 thru 154 */
1176927Ssam 	263360,	0,		/* C=cyl 0 thru 822 */
1186927Ssam 	0,	0,
1196927Ssam 	0,	0,
1206927Ssam 	0,	0,
1216927Ssam 	0,	0,
1226927Ssam #ifndef NOBADSECT
1236927Ssam 	213664,	155,		/* H=cyl 155 thru 822 */
1246927Ssam #else
1256927Ssam 	213760,	155,
1266927Ssam #endif
1276927Ssam }, hpam_sizes[8] = {
1286927Ssam 	15884,	0,		/* A=cyl 0 thru 31 */
1296927Ssam 	33440,	32,		/* B=cyl 32 thru 97 */
1306927Ssam 	524288,	0,		/* C=cyl 0 thru 1023 */
1316927Ssam 	27786,	668,
1326927Ssam 	27786,	723,
1336927Ssam 	125440,	778,
1346927Ssam 	181760,	668,		/* G=cyl 668 thru 1022 */
1356927Ssam 	291346,	98,		/* H=cyl 98 thru 667 */
1369175Ssam }, hpfj_sizes[8] = {
1379175Ssam 	15884,	0,		/* A=cyl 0 thru 18 */
1389175Ssam 	33440,	19,		/* B=cyl 19 thru 58 */
13910055Ssam 	724120,	0,		/* C=cyl 0 thru 841 */
1409175Ssam 	0, 0,
1419175Ssam 	0, 0,
1429175Ssam 	0, 0,
1439175Ssam 	381711, 398,		/* G=cyl 398 thru 841 */
1449175Ssam 	291346, 59,		/* H=cyl 59 thru 397 */
145*10734Ssam }, hpfj48_sizes[8] = {
146*10734Ssam 	15884,	0,		/* A=cyl 0 thru 16 */
147*10734Ssam 	33440,	17,		/* B=cyl 17 thru 52 */
148*10734Ssam 	808176,	0,		/* C=cyl 0 thru 841 */
149*10734Ssam 	0, 0,
150*10734Ssam 	0, 0,
151*10734Ssam 	0, 0,
152*10734Ssam 	465456, 357,		/* G=cyl 357 thru 841 */
153*10734Ssam 	291346, 53,		/* H=cyl 52 thru 356 */
15421Sbill };
1552383Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */
15621Sbill 
1572383Swnj #define	_hpSDIST	2
1582383Swnj #define	_hpRDIST	3
1592383Swnj 
1602383Swnj int	hpSDIST = _hpSDIST;
1612383Swnj int	hpRDIST = _hpRDIST;
1622383Swnj 
1636927Ssam /*
1646927Ssam  * Table for converting Massbus drive types into
1656927Ssam  * indices into the partition tables.  Slots are
1666927Ssam  * left for those drives devined from other means
1676927Ssam  * (e.g. SI, AMPEX, etc.).
1686927Ssam  */
1696927Ssam short	hptypes[] = {
1706927Ssam #define	HPDT_RM03	0
1716927Ssam 	MBDT_RM03,
1726927Ssam #define	HPDT_RM05	1
1736927Ssam 	MBDT_RM05,
1746927Ssam #define	HPDT_RP06	2
1756927Ssam 	MBDT_RP06,
1766927Ssam #define	HPDT_RM80	3
1776927Ssam 	MBDT_RM80,
1786927Ssam #define	HPDT_RP05	4
1796927Ssam 	MBDT_RP05,
1806927Ssam #define	HPDT_RP07	5
1816927Ssam 	MBDT_RP07,
1826927Ssam #define	HPDT_ML11A	6
1836927Ssam 	MBDT_ML11A,
1846927Ssam #define	HPDT_ML11B	7
1856927Ssam 	MBDT_ML11B,
1866927Ssam #define	HPDT_9775	8
1876927Ssam 	-1,
1886927Ssam #define	HPDT_9730	9
1896927Ssam 	-1,
1906927Ssam #define	HPDT_CAPRICORN	10
1916927Ssam 	-1,
1929175Ssam #define HPDT_EAGLE	11
1939175Ssam 	-1,
194*10734Ssam #define	HPDT_EAGLE48	12
195*10734Ssam 	-1,
196*10734Ssam #define HPDT_RM02	13
1979175Ssam 	MBDT_RM02,		/* beware, actually capricorn or eagle */
1986927Ssam 	0
1996927Ssam };
2002978Swnj struct	mba_device *hpinfo[NHP];
2012978Swnj int	hpattach(),hpustart(),hpstart(),hpdtint();
2022383Swnj struct	mba_driver hpdriver =
2032978Swnj 	{ hpattach, 0, hpustart, hpstart, hpdtint, 0,
2042978Swnj 	  hptypes, "hp", 0, hpinfo };
2052383Swnj 
2062383Swnj struct hpst {
2072383Swnj 	short	nsect;
2082383Swnj 	short	ntrak;
2092383Swnj 	short	nspc;
2102383Swnj 	short	ncyl;
2112383Swnj 	struct	size *sizes;
2122383Swnj } hpst[] = {
2133706Sroot 	32,	5,	32*5,	823,	rm3_sizes,	/* RM03 */
2142383Swnj 	32,	19,	32*19,	823,	rm5_sizes,	/* RM05 */
2153706Sroot 	22,	19,	22*19,	815,	hp6_sizes,	/* RP06 */
2163706Sroot 	31,	14, 	31*14,	559,	rm80_sizes,	/* RM80 */
2173706Sroot 	22,	19,	22*19,	411,	hp6_sizes,	/* RP05 */
2183706Sroot 	50,	32,	50*32,	630,	hp7_sizes,	/* RP07 */
2195726Sroot 	1,	1,	1,	1,	0,		/* ML11A */
2205726Sroot 	1,	1,	1,	1,	0,		/* ML11B */
2216927Ssam 	32,	40,	32*40,	843,	si9775_sizes,	/* 9775 */
2226927Ssam 	32,	10,	32*10,	823,	si9730_sizes,	/* 9730 */
2236927Ssam 	32,	16,	32*16,	1024,	hpam_sizes,	/* AMPEX capricorn */
22410055Ssam 	43,	20,	43*20,	842,	hpfj_sizes,	/* Fujitsu EAGLE */
225*10734Ssam 	48,	20,	48*20,	842,	hpfj48_sizes,	/* 48 sector EAGLE */
2262383Swnj };
2272383Swnj 
2282624Swnj u_char	hp_offset[16] = {
2293093Swnj     HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400,
2303093Swnj     HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800,
2313093Swnj     HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200,
2323093Swnj     0, 0, 0, 0,
23321Sbill };
23421Sbill 
2352624Swnj struct	buf	rhpbuf[NHP];
2363726Sroot #ifndef NOBADSECT
2373706Sroot struct	buf	bhpbuf[NHP];
2383706Sroot struct	dkbad	hpbad[NHP];
2393706Sroot #endif
2405726Sroot /* SHOULD CONSOLIDATE ALL THIS STUFF INTO A STRUCTURE */
2413706Sroot char	hpinit[NHP];
2422892Swnj char	hprecal[NHP];
2435726Sroot char	hphdr[NHP];
2445726Sroot daddr_t	mlsize[NHP];
24521Sbill 
24621Sbill #define	b_cylin b_resid
24721Sbill 
2485726Sroot /* #define ML11 0  to remove ML11 support */
2495726Sroot #define	ML11	(hptypes[mi->mi_type] == MBDT_ML11A)
2505726Sroot #define	RP06	(hptypes[mi->mi_type] <= MBDT_RP06)
2515726Sroot #define	RM80	(hptypes[mi->mi_type] == MBDT_RM80)
2525726Sroot 
25321Sbill #ifdef INTRLVE
25421Sbill daddr_t dkblock();
25521Sbill #endif
25621Sbill 
2572604Swnj int	hpseek;
2582604Swnj 
2592978Swnj /*ARGSUSED*/
2602978Swnj hpattach(mi, slave)
261*10734Ssam 	register struct mba_device *mi;
2622604Swnj {
263*10734Ssam 
264*10734Ssam 	mi->mi_type = hpmaptype(mi);
265*10734Ssam 	if (!ML11 && mi->mi_dk >= 0) {
266*10734Ssam 		struct hpst *st = &hpst[mi->mi_type];
267*10734Ssam 
268*10734Ssam 		dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256);
269*10734Ssam 	}
270*10734Ssam }
271*10734Ssam 
272*10734Ssam /*
273*10734Ssam  * Map apparent MASSBUS drive type into manufacturer
274*10734Ssam  * specific configuration.  For SI controllers this is done
275*10734Ssam  * based on codes in the serial number register.  For
276*10734Ssam  * EMULEX controllers, the track and sector attributes are
277*10734Ssam  * used when the drive type is an RM02 (not supported by DEC).
278*10734Ssam  */
279*10734Ssam hpmaptype(mi)
280*10734Ssam 	register struct mba_device *mi;
281*10734Ssam {
2826927Ssam 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
283*10734Ssam 	register int type = mi->mi_type;
2846927Ssam 
2856927Ssam 	/*
2866927Ssam 	 * Model-byte processing for SI 9400 controllers.
2876927Ssam 	 * NB:  Only deals with RM03 and RM05 emulations.
2886927Ssam 	 */
289*10734Ssam 	if (type == HPDT_RM03 || type == HPDT_RM05) {
290*10734Ssam 		int hpsn = hpaddr->hpsn;
2916927Ssam 
2926927Ssam 		if ((hpsn & SIMB_LU) != mi->mi_drive)
293*10734Ssam 			return (type);
2946927Ssam 		switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) {
2956927Ssam 
2966927Ssam 		case SI9775D:
2976927Ssam 			printf("hp%d: si 9775 (direct)\n", mi->mi_unit);
298*10734Ssam 			type = HPDT_9775;
2996927Ssam 			break;
3006927Ssam 
3016927Ssam 		case SI9730D:
3026927Ssam 			printf("hp%d: si 9730 (direct)\n", mi->mi_unit);
303*10734Ssam 			type = HPDT_9730;
3046927Ssam 			break;
3056927Ssam 
3067035Swnj 		/*
307*10734Ssam 		 * AMPEX 9300, SI Combination needs a have the
308*10734Ssam 		 * drive cleared before we start.  We do not know
309*10734Ssam 		 * why, but tests show that the recalibrate fixes
310*10734Ssam 		 * the problem.
3117035Swnj 		 */
3126927Ssam 		case SI9766:
3136927Ssam 			printf("hp%d: 9776/9300\n", mi->mi_unit);
314*10734Ssam 			type = HPDT_RM05;
3157035Swnj 			hpaddr->hpcs1 = HP_RECAL|HP_GO;
3167035Swnj 			DELAY(100000);
3176927Ssam 			break;
3186927Ssam 
3196927Ssam 		case SI9762:
3206927Ssam 			printf("hp%d: 9762\n", mi->mi_unit);
321*10734Ssam 			type = HPDT_RM03;
3226927Ssam 			break;
3236927Ssam 		}
324*10734Ssam 		return (type);
325*10734Ssam 	}
3266927Ssam 
3276927Ssam 	/*
328*10734Ssam 	 * EMULEX SC750 or SC780.  Poke the holding register.
3296927Ssam 	 */
330*10734Ssam 	if (type == HPDT_RM02) {
331*10734Ssam 		int ntracks, nsectors;
332*10734Ssam 
3336927Ssam 		hpaddr->hpcs1 = HP_NOP;
3346927Ssam 		hpaddr->hphr = HPHR_MAXTRAK;
33510055Ssam 		ntracks = (hpaddr->hphr & 0xffff) + 1;
33610055Ssam 		if (ntracks == 16) {
3376927Ssam 			printf("hp%d: capricorn\n", mi->mi_unit);
338*10734Ssam 			type = HPDT_CAPRICORN;
339*10734Ssam 			goto done;
340*10734Ssam 		}
341*10734Ssam 		if (ntracks != 20) {
34210055Ssam 			printf("hp%d: ntracks %d: unknown device\n", ntracks);
343*10734Ssam 			goto done;
344*10734Ssam 		}
345*10734Ssam 		hpaddr->hpcs1 = HP_NOP;
346*10734Ssam 		hpaddr->hphr = HPHR_MAXSECT;
347*10734Ssam 		nsectors = (hpaddr->hphr & 0xffff) + 1;
348*10734Ssam 		printf("hp%d: ", mi->mi_unit);
349*10734Ssam 		if (nsectors == 43)
350*10734Ssam 			type = HPDT_EAGLE;
351*10734Ssam 		else {
352*10734Ssam 			type = HPDT_EAGLE48;
353*10734Ssam 			printf("modified ");
354*10734Ssam 		}
355*10734Ssam 		printf("eagle\n");
356*10734Ssam done:
3576927Ssam 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
358*10734Ssam 		return (type);
359*10734Ssam 	}
3606927Ssam 
361*10734Ssam 	/*
362*10734Ssam 	 * Map all ML11's to the same type.  Also calculate
363*10734Ssam 	 * transfer rates based on device characteristics.
364*10734Ssam 	 */
365*10734Ssam 	if (type == HPDT_ML11A || type == HPDT_ML11B) {
3665726Sroot 		register int trt, sz;
3672604Swnj 
3685726Sroot 		sz = hpaddr->hpmr & HPMR_SZ;
3695726Sroot 		if ((hpaddr->hpmr & HPMR_ARRTYP) == 0)
3705726Sroot 			sz >>= 2;
3715726Sroot 		mlsize[mi->mi_unit] = sz;
3725726Sroot 		if (mi->mi_dk >= 0) {
3735726Sroot 			trt = (hpaddr->hpmr & HPMR_TRT) >> 8;
3745726Sroot 			dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt));
3755726Sroot 		}
376*10734Ssam 		type = HPDT_ML11A;
3776927Ssam 	}
378*10734Ssam 	return (type);
3792604Swnj }
3802604Swnj 
3818579Sroot hpopen(dev)
3828579Sroot 	dev_t dev;
3838579Sroot {
3848579Sroot 	register int unit = minor(dev) >> 3;
3858579Sroot 	register struct mba_device *mi;
3868579Sroot 
3878579Sroot 	if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0)
3888579Sroot 		return (ENXIO);
3898579Sroot 	return (0);
3908579Sroot }
3918579Sroot 
39221Sbill hpstrategy(bp)
3932383Swnj 	register struct buf *bp;
39421Sbill {
3952978Swnj 	register struct mba_device *mi;
3962383Swnj 	register struct hpst *st;
3972383Swnj 	register int unit;
39821Sbill 	long sz, bn;
3992383Swnj 	int xunit = minor(bp->b_dev) & 07;
4005432Sroot 	int s;
40121Sbill 
40221Sbill 	sz = bp->b_bcount;
40321Sbill 	sz = (sz+511) >> 9;
40421Sbill 	unit = dkunit(bp);
4052383Swnj 	if (unit >= NHP)
4062383Swnj 		goto bad;
4072383Swnj 	mi = hpinfo[unit];
4082395Swnj 	if (mi == 0 || mi->mi_alive == 0)
4092383Swnj 		goto bad;
4102383Swnj 	st = &hpst[mi->mi_type];
4115726Sroot 	if (ML11) {
4125726Sroot 		if (bp->b_blkno < 0 ||
4135726Sroot 		    dkblock(bp)+sz > mlsize[mi->mi_unit])
4145726Sroot 			goto bad;
4155726Sroot 		bp->b_cylin = 0;
4165726Sroot 	} else {
4175726Sroot 		if (bp->b_blkno < 0 ||
4185726Sroot 		    (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks)
4195726Sroot 			goto bad;
4205726Sroot 		bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff;
4215726Sroot 	}
4225432Sroot 	s = spl5();
4232383Swnj 	disksort(&mi->mi_tab, bp);
4242383Swnj 	if (mi->mi_tab.b_active == 0)
4252383Swnj 		mbustart(mi);
4265432Sroot 	splx(s);
4272383Swnj 	return;
4282383Swnj 
4292383Swnj bad:
4302383Swnj 	bp->b_flags |= B_ERROR;
4312383Swnj 	iodone(bp);
4322383Swnj 	return;
43321Sbill }
43421Sbill 
4352383Swnj hpustart(mi)
4362978Swnj 	register struct mba_device *mi;
43721Sbill {
4382624Swnj 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
4392383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
4403706Sroot 	register struct hpst *st = &hpst[mi->mi_type];
44121Sbill 	daddr_t bn;
4423102Swnj 	int sn, dist;
44321Sbill 
4443706Sroot 	hpaddr->hpcs1 = 0;
4452624Swnj 	if ((hpaddr->hpcs1&HP_DVA) == 0)
4462383Swnj 		return (MBU_BUSY);
4473706Sroot 	if ((hpaddr->hpds & HPDS_VV) == 0 || hpinit[mi->mi_unit] == 0) {
4483726Sroot #ifndef NOBADSECT
4493706Sroot 		struct buf *bbp = &bhpbuf[mi->mi_unit];
4503706Sroot #endif
4513706Sroot 
4523706Sroot 		hpinit[mi->mi_unit] = 1;
4532624Swnj 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
4543140Swnj 		if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive))
4553140Swnj 			printf("DCLR attn\n");
4562624Swnj 		hpaddr->hpcs1 = HP_PRESET|HP_GO;
4575726Sroot 		if (!ML11)
4585726Sroot 			hpaddr->hpof = HPOF_FMT22;
4593140Swnj 		mbclrattn(mi);
4603726Sroot #ifndef NOBADSECT
4615726Sroot 		if (!ML11) {
4625726Sroot 			bbp->b_flags = B_READ|B_BUSY;
4635726Sroot 			bbp->b_dev = bp->b_dev;
4645726Sroot 			bbp->b_bcount = 512;
4655726Sroot 			bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit];
4665726Sroot 			bbp->b_blkno = st->ncyl*st->nspc - st->nsect;
4675726Sroot 			bbp->b_cylin = st->ncyl - 1;
4685726Sroot 			mi->mi_tab.b_actf = bbp;
4695726Sroot 			bbp->av_forw = bp;
4705726Sroot 			bp = bbp;
4715726Sroot 		}
4723706Sroot #endif
47321Sbill 	}
4742604Swnj 	if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1)
4752383Swnj 		return (MBU_DODATA);
4765726Sroot 	if (ML11)
4775726Sroot 		return (MBU_DODATA);
4783093Swnj 	if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY)
4792383Swnj 		return (MBU_DODATA);
4802395Swnj 	bn = dkblock(bp);
4812395Swnj 	sn = bn%st->nspc;
4822395Swnj 	sn = (sn+st->nsect-hpSDIST)%st->nsect;
4832383Swnj 	if (bp->b_cylin == (hpaddr->hpdc & 0xffff)) {
4842604Swnj 		if (hpseek)
4852383Swnj 			return (MBU_DODATA);
4862383Swnj 		dist = ((hpaddr->hpla & 0xffff)>>6) - st->nsect + 1;
4872383Swnj 		if (dist < 0)
4882383Swnj 			dist += st->nsect;
4892383Swnj 		if (dist > st->nsect - hpRDIST)
4902383Swnj 			return (MBU_DODATA);
4912614Swnj 	} else
4922614Swnj 		hpaddr->hpdc = bp->b_cylin;
4932604Swnj 	if (hpseek)
4942624Swnj 		hpaddr->hpcs1 = HP_SEEK|HP_GO;
495305Sbill 	else {
496305Sbill 		hpaddr->hpda = sn;
4972624Swnj 		hpaddr->hpcs1 = HP_SEARCH|HP_GO;
498305Sbill 	}
4992383Swnj 	return (MBU_STARTED);
50021Sbill }
50121Sbill 
5022383Swnj hpstart(mi)
5032978Swnj 	register struct mba_device *mi;
50421Sbill {
5052624Swnj 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
5062383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
5072383Swnj 	register struct hpst *st = &hpst[mi->mi_type];
50821Sbill 	daddr_t bn;
5092383Swnj 	int sn, tn;
51021Sbill 
51121Sbill 	bn = dkblock(bp);
5125726Sroot 	if (ML11)
5135726Sroot 		hpaddr->hpda = bn;
5145726Sroot 	else {
5155726Sroot 		sn = bn%st->nspc;
5165726Sroot 		tn = sn/st->nsect;
5175726Sroot 		sn %= st->nsect;
5185726Sroot 		hpaddr->hpdc = bp->b_cylin;
5195726Sroot 		hpaddr->hpda = (tn << 8) + sn;
5205726Sroot 	}
5215726Sroot 	if (hphdr[mi->mi_unit]) {
5225726Sroot 		if (bp->b_flags & B_READ)
5235726Sroot 			return (HP_RHDR|HP_GO);
5245726Sroot 		else
5255726Sroot 			return (HP_WHDR|HP_GO);
5265726Sroot 	}
5275726Sroot 	return (0);
52821Sbill }
52921Sbill 
5303102Swnj hpdtint(mi, mbsr)
5312978Swnj 	register struct mba_device *mi;
5323102Swnj 	int mbsr;
53321Sbill {
5342624Swnj 	register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
5352383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
53610622Shelge 	register struct hpst *st = &hpst[mi->mi_type];
5375893Swnj 	register int er1, er2;
5382826Swnj 	int retry = 0;
53921Sbill 
5403726Sroot #ifndef NOBADSECT
5413706Sroot 	if (bp->b_flags&B_BAD) {
5423706Sroot 		if (hpecc(mi, CONT))
5433706Sroot 			return(MBD_RESTARTED);
5443706Sroot 	}
5453706Sroot #endif
5463102Swnj 	if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) {
5473706Sroot #ifdef HPDEBUG
5483289Swnj 		if (hpdebug) {
5493706Sroot 			int dc = hpaddr->hpdc, da = hpaddr->hpda;
5503706Sroot 
5513706Sroot 			printf("hperr: bp %x cyl %d blk %d as %o ",
5523706Sroot 				bp, bp->b_cylin, bp->b_blkno,
5533706Sroot 				hpaddr->hpas&0xff);
5543706Sroot 			printf("dc %x da %x\n",dc&0xffff, da&0xffff);
5553289Swnj 			printf("errcnt %d ", mi->mi_tab.b_errcnt);
5563289Swnj 			printf("mbsr=%b ", mbsr, mbsr_bits);
5573289Swnj 			printf("er1=%b er2=%b\n",
5583289Swnj 			    hpaddr->hper1, HPER1_BITS,
5593289Swnj 			    hpaddr->hper2, HPER2_BITS);
5603289Swnj 			DELAY(1000000);
5613289Swnj 		}
5623706Sroot #endif
5635858Swnj 		er1 = hpaddr->hper1;
5645893Swnj 		er2 = hpaddr->hper2;
5655893Swnj 		if (er1 & HPER1_HCRC) {
5665858Swnj 			er1 &= ~(HPER1_HCE|HPER1_FER);
5675893Swnj 			er2 &= ~HPER2_BSE;
5685893Swnj 		}
5695858Swnj 		if (er1&HPER1_WLE) {
5702925Swnj 			printf("hp%d: write locked\n", dkunit(bp));
5712826Swnj 			bp->b_flags |= B_ERROR;
5725858Swnj 		} else if ((er1&0xffff) == HPER1_FER && RP06 &&
5735726Sroot 		    hphdr[mi->mi_unit] == 0) {
5745726Sroot #ifndef NOBADSECT
5755726Sroot 			if (hpecc(mi, BSE))
5765726Sroot 				return(MBD_RESTARTED);
5775726Sroot 			else
5785726Sroot #endif
5795726Sroot 				goto hard;
5802826Swnj 		} else if (++mi->mi_tab.b_errcnt > 27 ||
5813102Swnj 		    mbsr & MBSR_HARD ||
5825858Swnj 		    er1 & HPER1_HARD ||
5835726Sroot 		    hphdr[mi->mi_unit] ||
5845893Swnj 		    (!ML11 && (er2 & HPER2_HARD))) {
5853706Sroot hard:
58610622Shelge 			if (ML11)
58710622Shelge 				bp->b_blkno = hpaddr->hpda&0xffff;
58810622Shelge 			else
58910622Shelge 				bp->b_blkno = (hpaddr->hpdc*st->nspc)&0xffff +
59010622Shelge 					  ((hpaddr->hpda>>8)&0xffff)*st->nsect +
59110622Shelge 						(hpaddr->hpda&0x1f);
5922925Swnj 			harderr(bp, "hp");
5933271Swnj 			if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC)))
5943271Swnj 				printf("mbsr=%b ", mbsr, mbsr_bits);
5953706Sroot 			printf("er1=%b er2=%b",
5962826Swnj 			    hpaddr->hper1, HPER1_BITS,
5972826Swnj 			    hpaddr->hper2, HPER2_BITS);
5983706Sroot 			if (hpaddr->hpmr)
5993706Sroot 				printf(" mr=%o", hpaddr->hpmr&0xffff);
6003706Sroot 			if (hpaddr->hpmr2)
6013706Sroot 				printf(" mr2=%o", hpaddr->hpmr2&0xffff);
6023706Sroot 			printf("\n");
6032826Swnj 			bp->b_flags |= B_ERROR;
60410622Shelge 			retry = 0;
6053143Swnj 			hprecal[mi->mi_unit] = 0;
6065893Swnj 		} else if ((er2 & HPER2_BSE) && !ML11) {
6073726Sroot #ifndef NOBADSECT
6083706Sroot 			if (hpecc(mi, BSE))
6093706Sroot 				return(MBD_RESTARTED);
6103706Sroot 			else
6113706Sroot #endif
6123706Sroot 				goto hard;
6135893Swnj 		} else if (RM80 && er2&HPER2_SSE) {
6143988Sroot 			(void) hpecc(mi, SSE);
6152883Swnj 			return (MBD_RESTARTED);
6165858Swnj 		} else if ((er1&(HPER1_DCK|HPER1_ECH))==HPER1_DCK) {
6173706Sroot 			if (hpecc(mi, ECC))
6182383Swnj 				return (MBD_RESTARTED);
6192826Swnj 			/* else done */
6202826Swnj 		} else
6212826Swnj 			retry = 1;
6222826Swnj 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
6235726Sroot 		if (ML11) {
6245726Sroot 			if (mi->mi_tab.b_errcnt >= 16)
6255726Sroot 				goto hard;
6265726Sroot 		} else if ((mi->mi_tab.b_errcnt&07) == 4) {
6272826Swnj 			hpaddr->hpcs1 = HP_RECAL|HP_GO;
6283706Sroot 			hprecal[mi->mi_unit] = 1;
6293706Sroot 			return(MBD_RESTARTED);
63021Sbill 		}
6312826Swnj 		if (retry)
6322826Swnj 			return (MBD_RETRY);
6332826Swnj 	}
6343706Sroot #ifdef HPDEBUG
6353289Swnj 	else
6363289Swnj 		if (hpdebug && hprecal[mi->mi_unit]) {
6373289Swnj 			printf("recal %d ", hprecal[mi->mi_unit]);
6383289Swnj 			printf("errcnt %d\n", mi->mi_tab.b_errcnt);
6393289Swnj 			printf("mbsr=%b ", mbsr, mbsr_bits);
6403289Swnj 			printf("er1=%b er2=%b\n",
6413289Swnj 			    hpaddr->hper1, HPER1_BITS,
6423289Swnj 			    hpaddr->hper2, HPER2_BITS);
6433289Swnj 		}
6443706Sroot #endif
6453093Swnj 	switch (hprecal[mi->mi_unit]) {
6463093Swnj 
6473093Swnj 	case 1:
6483093Swnj 		hpaddr->hpdc = bp->b_cylin;
6493093Swnj 		hpaddr->hpcs1 = HP_SEEK|HP_GO;
6503706Sroot 		hprecal[mi->mi_unit]++;
6513706Sroot 		return (MBD_RESTARTED);
6523093Swnj 	case 2:
6533093Swnj 		if (mi->mi_tab.b_errcnt < 16 ||
6543289Swnj 		    (bp->b_flags & B_READ) == 0)
6553093Swnj 			goto donerecal;
6563093Swnj 		hpaddr->hpof = hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22;
6573093Swnj 		hpaddr->hpcs1 = HP_OFFSET|HP_GO;
6583093Swnj 		hprecal[mi->mi_unit]++;
6593093Swnj 		return (MBD_RESTARTED);
6603093Swnj 	donerecal:
6613158Swnj 	case 3:
6622892Swnj 		hprecal[mi->mi_unit] = 0;
6632892Swnj 		return (MBD_RETRY);
6642892Swnj 	}
6655726Sroot 	hphdr[mi->mi_unit] = 0;
6662383Swnj 	bp->b_resid = -(mi->mi_mba->mba_bcr) & 0xffff;
6673640Swnj 	if (mi->mi_tab.b_errcnt >= 16) {
6683093Swnj 		/*
6693093Swnj 		 * This is fast and occurs rarely; we don't
6703093Swnj 		 * bother with interrupts.
6713093Swnj 		 */
6722624Swnj 		hpaddr->hpcs1 = HP_RTC|HP_GO;
6733093Swnj 		while (hpaddr->hpds & HPDS_PIP)
6742383Swnj 			;
6752383Swnj 		mbclrattn(mi);
67621Sbill 	}
6775726Sroot 	if (!ML11) {
6785726Sroot 		hpaddr->hpof = HPOF_FMT22;
6795726Sroot 		hpaddr->hpcs1 = HP_RELEASE|HP_GO;
6805726Sroot 	}
6812383Swnj 	return (MBD_DONE);
68221Sbill }
68321Sbill 
6847738Sroot hpread(dev, uio)
6852624Swnj 	dev_t dev;
6867738Sroot 	struct uio *uio;
68721Sbill {
6882624Swnj 	register int unit = minor(dev) >> 3;
68921Sbill 
6902624Swnj 	if (unit >= NHP)
6918156Sroot 		return (ENXIO);
6928156Sroot 	return (physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys, uio));
69321Sbill }
69421Sbill 
6957831Sroot hpwrite(dev, uio)
6962624Swnj 	dev_t dev;
6977831Sroot 	struct uio *uio;
69821Sbill {
6992624Swnj 	register int unit = minor(dev) >> 3;
70021Sbill 
7012624Swnj 	if (unit >= NHP)
7028156Sroot 		return (ENXIO);
7038156Sroot 	return (physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys, uio));
70421Sbill }
70521Sbill 
7065726Sroot /*ARGSUSED*/
7077635Ssam hpioctl(dev, cmd, data, flag)
7085726Sroot 	dev_t dev;
7095726Sroot 	int cmd;
7107635Ssam 	caddr_t data;
7115726Sroot 	int flag;
7125726Sroot {
7135726Sroot 
7145726Sroot 	switch (cmd) {
7157635Ssam 
7165726Sroot 	case DKIOCHDR:	/* do header read/write */
7175726Sroot 		hphdr[minor(dev)>>3] = 1;
7188579Sroot 		return (0);
7195726Sroot 
7205726Sroot 	default:
7218579Sroot 		return (ENXIO);
7225726Sroot 	}
7235726Sroot }
7245726Sroot 
7253706Sroot hpecc(mi, flag)
7262978Swnj 	register struct mba_device *mi;
7273706Sroot 	int flag;
72821Sbill {
7292383Swnj 	register struct mba_regs *mbp = mi->mi_mba;
7302624Swnj 	register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv;
7312383Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
7323706Sroot 	register struct hpst *st = &hpst[mi->mi_type];
7333706Sroot 	int npf, o;
7342383Swnj 	int bn, cn, tn, sn;
735914Sbill 	int bcr;
73621Sbill 
737914Sbill 	bcr = mbp->mba_bcr & 0xffff;
738914Sbill 	if (bcr)
739914Sbill 		bcr |= 0xffff0000;		/* sxt */
7403726Sroot #ifndef NOBADSECT
7413706Sroot 	if (flag == CONT)
7423706Sroot 		npf = bp->b_error;
7433706Sroot 	else
7443706Sroot #endif
7453706Sroot 		npf = btop(bcr + bp->b_bcount);
746420Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
747420Sbill 	bn = dkblock(bp);
748420Sbill 	cn = bp->b_cylin;
7493706Sroot 	sn = bn%(st->nspc) + npf;
7502383Swnj 	tn = sn/st->nsect;
7512383Swnj 	sn %= st->nsect;
7522383Swnj 	cn += tn/st->ntrak;
7532383Swnj 	tn %= st->ntrak;
7543706Sroot 	switch (flag) {
7553706Sroot 	case ECC:
7563706Sroot 		{
7573706Sroot 		register int i;
7583706Sroot 		caddr_t addr;
7593706Sroot 		struct pte mpte;
7603706Sroot 		int bit, byte, mask;
7613706Sroot 
7623706Sroot 		npf--;		/* because block in error is previous block */
7633706Sroot 		printf("hp%d%c: soft ecc sn%d\n", dkunit(bp),
7643706Sroot 		    'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf);
7653706Sroot 		mask = rp->hpec2&0xffff;
7663706Sroot 		i = (rp->hpec1&0xffff) - 1;		/* -1 makes 0 origin */
7673706Sroot 		bit = i&07;
7683706Sroot 		i = (i&~07)>>3;
7693706Sroot 		byte = i + o;
7703706Sroot 		while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) {
7713706Sroot 			mpte = mbp->mba_map[npf+btop(byte)];
7723706Sroot 			addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET);
7733706Sroot 			putmemc(addr, getmemc(addr)^(mask<<bit));
7743706Sroot 			byte++;
7753706Sroot 			i++;
7763706Sroot 			bit -= 8;
7773706Sroot 		}
7783706Sroot 		if (bcr == 0)
7793706Sroot 			return (0);
7803847Sroot 		npf++;
7813706Sroot 		break;
7823706Sroot 		}
7833706Sroot 
7843706Sroot 	case SSE:
7853706Sroot 		rp->hpof |= HPOF_SSEI;
7863706Sroot 		mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf));
7873706Sroot 		break;
7883706Sroot 
7893726Sroot #ifndef NOBADSECT
7903706Sroot 	case BSE:
7913706Sroot #ifdef HPBDEBUG
7923706Sroot 		if (hpbdebug)
7933706Sroot 		printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn);
7943706Sroot #endif
7953706Sroot 		if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0)
7963706Sroot 			return(0);
7973706Sroot 		bp->b_flags |= B_BAD;
7983706Sroot 		bp->b_error = npf + 1;
7993706Sroot 		bn = st->ncyl*st->nspc - st->nsect - 1 - bn;
8003706Sroot 		cn = bn/st->nspc;
8013706Sroot 		sn = bn%st->nspc;
8023706Sroot 		tn = sn/st->nsect;
8033706Sroot 		sn %= st->nsect;
8043706Sroot 		mbp->mba_bcr = -512;
8053706Sroot #ifdef HPBDEBUG
8063706Sroot 		if (hpbdebug)
8073706Sroot 		printf("revector to cn %d tn %d sn %d\n", cn, tn, sn);
8083706Sroot #endif
8093706Sroot 		break;
8103706Sroot 
8113706Sroot 	case CONT:
8123706Sroot #ifdef HPBDEBUG
8133706Sroot 		if (hpbdebug)
8143706Sroot 		printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn);
8153706Sroot #endif
8163706Sroot 		npf = bp->b_error;
8173706Sroot 		bp->b_flags &= ~B_BAD;
8183706Sroot 		mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf));
8193706Sroot 		if ((mbp->mba_bcr & 0xffff) == 0)
8203706Sroot 			return(0);
8213706Sroot 		break;
8223706Sroot #endif
8233706Sroot 	}
8243706Sroot 	rp->hpcs1 = HP_DCLR|HP_GO;
8253350Swnj 	if (rp->hpof&HPOF_SSEI)
8262883Swnj 		sn++;
827420Sbill 	rp->hpdc = cn;
828420Sbill 	rp->hpda = (tn<<8) + sn;
829420Sbill 	mbp->mba_sr = -1;
8303706Sroot 	mbp->mba_var = (int)ptob(npf) + o;
8313706Sroot 	rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO;
8323706Sroot 	mi->mi_tab.b_errcnt = 0;	/* error has been corrected */
833420Sbill 	return (1);
83421Sbill }
8352362Swnj 
8362362Swnj #define	DBSIZE	20
8372362Swnj 
8382362Swnj hpdump(dev)
8392362Swnj 	dev_t dev;
8402362Swnj {
8412978Swnj 	register struct mba_device *mi;
8422383Swnj 	register struct mba_regs *mba;
8432624Swnj 	struct hpdevice *hpaddr;
8442362Swnj 	char *start;
8452383Swnj 	int num, unit;
8462383Swnj 	register struct hpst *st;
8472362Swnj 
8482362Swnj 	num = maxfree;
8492362Swnj 	start = 0;
8502362Swnj 	unit = minor(dev) >> 3;
8512827Swnj 	if (unit >= NHP)
8522827Swnj 		return (ENXIO);
8532383Swnj #define	phys(a,b)	((b)((int)(a)&0x7fffffff))
8542978Swnj 	mi = phys(hpinfo[unit],struct mba_device *);
8552827Swnj 	if (mi == 0 || mi->mi_alive == 0)
8562827Swnj 		return (ENXIO);
8572383Swnj 	mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba;
8583102Swnj 	mba->mba_cr = MBCR_INIT;
8592624Swnj 	hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive];
8603093Swnj 	if ((hpaddr->hpds & HPDS_VV) == 0) {
8612624Swnj 		hpaddr->hpcs1 = HP_DCLR|HP_GO;
8622624Swnj 		hpaddr->hpcs1 = HP_PRESET|HP_GO;
8633093Swnj 		hpaddr->hpof = HPOF_FMT22;
8642362Swnj 	}
8652383Swnj 	st = &hpst[mi->mi_type];
8662827Swnj 	if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks)
8672827Swnj 		return (EINVAL);
8682362Swnj 	while (num > 0) {
8692383Swnj 		register struct pte *hpte = mba->mba_map;
8702362Swnj 		register int i;
8712383Swnj 		int blk, cn, sn, tn;
8722362Swnj 		daddr_t bn;
8732362Swnj 
8742362Swnj 		blk = num > DBSIZE ? DBSIZE : num;
8752362Swnj 		bn = dumplo + btop(start);
8762383Swnj 		cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff;
8772383Swnj 		sn = bn%st->nspc;
8782383Swnj 		tn = sn/st->nsect;
8792383Swnj 		sn = sn%st->nsect;
8802362Swnj 		hpaddr->hpdc = cn;
8812362Swnj 		hpaddr->hpda = (tn << 8) + sn;
8822362Swnj 		for (i = 0; i < blk; i++)
8832362Swnj 			*(int *)hpte++ = (btop(start)+i) | PG_V;
8842383Swnj 		mba->mba_sr = -1;
8852383Swnj 		mba->mba_bcr = -(blk*NBPG);
8862383Swnj 		mba->mba_var = 0;
8872624Swnj 		hpaddr->hpcs1 = HP_WCOM | HP_GO;
8883093Swnj 		while ((hpaddr->hpds & HPDS_DRY) == 0)
8892362Swnj 			;
8903093Swnj 		if (hpaddr->hpds&HPDS_ERR)
8912827Swnj 			return (EIO);
8922362Swnj 		start += blk*NBPG;
8932362Swnj 		num -= blk;
8942362Swnj 	}
8952362Swnj 	return (0);
8962362Swnj }
8971565Sbill #endif
898