1 /* vd.c 1.3 86/01/12 */ 2 3 #include "fsd.h" 4 #if NVD > 0 5 /* 6 * VDDC - Versabus SMD/ESMD driver. 7 */ 8 #include "../tahoe/mtpr.h" 9 #include "../tahoe/pte.h" 10 11 #include "param.h" 12 #include "buf.h" 13 #include "cmap.h" 14 #include "conf.h" 15 #include "dir.h" 16 #include "dk.h" 17 #include "map.h" 18 #include "systm.h" 19 #include "user.h" 20 #include "vmmac.h" 21 #include "proc.h" 22 #include "uio.h" 23 24 #include "../tahoevba/vbavar.h" 25 #define VDGENDATA 26 #include "../tahoevba/vddcreg.h" 27 #undef VDGENDATA 28 29 #define MAX_BLOCKSIZE (MAXBPTE*NBPG) 30 #define DUMPSIZE 64 /* controller limit */ 31 32 #define VDUNIT(x) (minor(x) >> 3) 33 #define FILSYS(x) (minor(x) & 0x07) 34 #define PHYS(x) (vtoph((struct proc *)0, (unsigned)(x))) 35 #define TRUE 1 36 #define FALSE 0 37 38 #define CTLR_ERROR 1 39 #define DRIVE_ERROR 2 40 #define HARD_DATA_ERROR 3 41 #define SOFT_DATA_ERROR 4 42 43 #define b_cylin b_resid 44 #define b_daddr b_error 45 46 struct vba_ctlr *vdminfo[NVD]; 47 struct vba_device *vddinfo[NFSD]; 48 int vdprobe(), vdslave(), vdattach(), vddgo(); 49 struct vba_driver vddriver = 50 { vdprobe, vdslave, vdattach, vddgo, vddcaddr, "smd/fsd", 51 vddinfo, "vd", vdminfo }; 52 53 /* 54 * Per-drive state. 55 */ 56 typedef struct { 57 struct buf raw_q_element; 58 short sec_per_blk; 59 short sec_per_cyl; 60 char status; 61 struct buf xfer_queue; 62 int drive_type; 63 fs_tab info; 64 } unit_tab; 65 66 /* 67 * Per-controller state. 68 */ 69 typedef struct { 70 char ctlr_type; /* controller type */ 71 char *map; /* i/o page map */ 72 char *utl; /* mapped i/o space */ 73 u_int cur_slave:8; /* last active unit number */ 74 u_int int_expected:1; /* expect an interupt */ 75 u_int ctlr_started:1; /* start command was issued */ 76 u_int overlap_seeks:1;/* should overlap seeks */ 77 u_int off_cylinder:16;/* off cylinder bit map */ 78 u_int unit_type[16]; /* slave types */ 79 u_int cur_cyl[16]; /* cylinder last selected */ 80 long cur_trk[16]; /* track last selected */ 81 fmt_mdcb ctlr_mdcb; /* controller mdcb */ 82 fmt_dcb ctlr_dcb; /* r/w dcb */ 83 fmt_dcb seek_dcb[4]; /* dcbs for overlapped seeks */ 84 /* buffer for raw/swap i/o */ 85 char rawbuf[MAX_BLOCKSIZE]; 86 } ctlr_tab; 87 88 extern char vd0utl[]; 89 #if NVD > 1 90 extern char vd1utl[]; 91 #endif 92 #if NVD > 2 93 extern char vd2utl[]; 94 #endif 95 #if NVD > 3 96 extern char vd3utl[]; 97 #endif 98 99 #define VDCINIT(map, utl) { \ 100 UNKNOWN, (char *)map, utl, 0, FALSE, FALSE, TRUE, 0, \ 101 { UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN, \ 102 UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN } \ 103 } 104 ctlr_tab vdctlr_info[NVD] = { 105 VDCINIT(VD0map, vd0utl), 106 #if NVD > 1 107 VDCINIT(VD1map, vd1utl), 108 #endif 109 #if NVD > 2 110 VDCINIT(VD2map, vd2utl), 111 #endif 112 #if NVD > 3 113 VDCINIT(VD3map, vd3utl), 114 #endif 115 }; 116 117 unit_tab vdunit_info[NFSD]; 118 119 /* 120 * See if the controller is really there; if so, initialize it. 121 */ 122 vdprobe(reg, vm) 123 caddr_t reg; 124 struct vba_ctlr *vm; 125 { 126 register br, cvec; /* must be r12, r11 */ 127 register cdr *cp = (cdr *)reg; 128 129 if (badaddr((caddr_t)reg, 2)) 130 return (0); 131 cp->cdr_reset = 0xffffffff; 132 DELAY(1000000); 133 if (cp->cdr_reset != (unsigned)0xffffffff) { 134 DELAY(1000000); 135 } else { 136 cp->cdr_reserved = 0x0; 137 DELAY(3000000); 138 } 139 br = 0x17, cvec = 0xe0 + vm->um_ctlr; /* XXX */ 140 return (sizeof (*cp)); 141 } 142 143 /* 144 * See if a drive is really there 145 * Try to reset/configure the drive, then test its status. 146 */ 147 vdslave(vi, addr) 148 register struct vba_device *vi; 149 register cdr *addr; 150 { 151 register ctlr_tab *ci = &vdctlr_info[vi->ui_ctlr]; 152 register unit_tab *ui = &vdunit_info[vi->ui_unit]; 153 register fmt_mdcb *mdcb = &ci->ctlr_mdcb; 154 register fmt_dcb *dcb = &ci->ctlr_dcb; 155 register int type; 156 157 if (ci->ctlr_type == UNKNOWN) { 158 addr->cdr_reset = 0xffffffff; 159 DELAY(1000000); 160 if (addr->cdr_reset != (unsigned)0xffffffff) { 161 ci->ctlr_type = SMDCTLR; 162 ci->overlap_seeks = 0; 163 DELAY(1000000); 164 } else { 165 ci->overlap_seeks = 1; 166 ci->ctlr_type = SMD_ECTLR; 167 addr->cdr_reserved = 0x0; 168 DELAY(3000000); 169 addr->cdr_csr = 0; 170 addr->mdcb_tcf = AM_ENPDA; 171 addr->dcb_tcf = AM_ENPDA; 172 addr->trail_tcf = AM_ENPDA; 173 addr->data_tcf = AM_ENPDA; 174 addr->cdr_ccf = CCF_STS | XMD_32BIT | BSZ_16WRD | 175 CCF_ENP | CCF_EPE | CCF_EDE | CCF_ECE | CCF_ERR; 176 } 177 if (vdnotrailer(addr, 178 vi->ui_ctlr, vi->ui_slave, INIT, 10) & HRDERR) { 179 printf("vd%d: init error\n", vi->ui_unit); 180 return (0); 181 } 182 if (vdnotrailer(addr, 183 vi->ui_ctlr, vi->ui_slave, DIAG, 10) & HRDERR) { 184 printf("vd%d: diagnostic error\n", vi->ui_unit); 185 return (0); 186 } 187 } 188 /* 189 * Seek on all drive types starting from the largest one. 190 * a successful seek to the last sector/cylinder/track verifies 191 * the drive type connected to this port. 192 */ 193 for (type = 0; type < nvddrv; type++) { 194 /* XXX */ 195 if (ci->ctlr_type == SMDCTLR && vdst[type].nsec != 32) 196 continue; 197 /* XXX */ 198 if (!vdconfigure_drive(addr, vi->ui_ctlr, vi->ui_slave, type,0)) 199 return (0); 200 dcb->opcode = (short)RD; 201 dcb->intflg = NOINT; 202 dcb->nxtdcb = (fmt_dcb *)0; /* end of chain */ 203 dcb->operrsta = 0; 204 dcb->devselect = (char)(vi->ui_slave); 205 dcb->trailcnt = (char)(sizeof (trrw) / sizeof (long)); 206 dcb->trail.rwtrail.memadr = (char *)PHYS(ci->rawbuf); 207 dcb->trail.rwtrail.wcount = vdst[type].secsize/sizeof(short); 208 dcb->trail.rwtrail.disk.cylinder = vdst[type].ncyl - 2; 209 dcb->trail.rwtrail.disk.track = vdst[type].ntrak - 1; 210 dcb->trail.rwtrail.disk.sector = vdst[type].nsec - 1; 211 mdcb->firstdcb = (fmt_dcb *)(PHYS(dcb)); 212 mdcb->vddcstat = 0; 213 VDDC_ATTENTION(addr, (fmt_mdcb *)(PHYS(mdcb)), ci->ctlr_type); 214 POLLTILLDONE(addr, dcb, 60, ci->ctlr_type); 215 if (vdtimeout <= 0) 216 printf(" during probe\n"); 217 if ((dcb->operrsta&HRDERR) == 0) 218 break; 219 } 220 if (type >= nvddrv) { 221 /* 222 * If reached here, a drive which is not defined in the 223 * 'vdst' tables is connected. Cannot set it's type. 224 */ 225 printf("vd%d: unknown drive type\n", vi->ui_unit); 226 return (0); 227 } 228 ui->drive_type = type; 229 ui->info = vdst[type]; 230 ui->sec_per_blk = DEV_BSIZE / ui->info.secsize; 231 vi->ui_type = type; 232 vi->ui_dk = 1; 233 vddriver.ud_dname = ui->info.type_name; 234 return (1); 235 } 236 237 vdconfigure_drive(addr, ctlr, slave, type, pass) 238 register cdr *addr; 239 int ctlr, slave, type, pass; 240 { 241 register ctlr_tab *ci = &vdctlr_info[ctlr]; 242 243 ci->ctlr_dcb.opcode = RSTCFG; /* command */ 244 ci->ctlr_dcb.intflg = NOINT; 245 ci->ctlr_dcb.nxtdcb = (fmt_dcb *)0; /* end of chain */ 246 ci->ctlr_dcb.operrsta = 0; 247 ci->ctlr_dcb.devselect = (char)slave; 248 ci->ctlr_dcb.trail.rstrail.ncyl = vdst[type].ncyl; 249 ci->ctlr_dcb.trail.rstrail.nsurfaces = vdst[type].ntrak; 250 if (ci->ctlr_type == SMD_ECTLR) { 251 ci->ctlr_dcb.trailcnt = (char)4; 252 ci->ctlr_dcb.trail.rstrail.nsectors = vdst[type].nsec; 253 ci->ctlr_dcb.trail.rstrail.slip_sec = vdst[type].nslip; 254 } else 255 ci->ctlr_dcb.trailcnt = (char)2; 256 ci->ctlr_mdcb.firstdcb = (fmt_dcb *)(PHYS(&ci->ctlr_dcb)); 257 ci->ctlr_mdcb.vddcstat = 0; 258 VDDC_ATTENTION(addr, (fmt_mdcb *)(PHYS(&ci->ctlr_mdcb)), ci->ctlr_type); 259 POLLTILLDONE(addr, &ci->ctlr_dcb, 5, ci->ctlr_type); 260 if (vdtimeout <= 0) { 261 printf(" during config\n"); 262 return (0); 263 } 264 if (ci->ctlr_dcb.operrsta & HRDERR) { 265 if ((ci->ctlr_dcb.operrsta & (NOTCYLERR|DRVNRDY)) == 0) 266 printf("vd%d: drive %d: config error\n", ctlr, slave); 267 else if (pass == 0) { 268 vdstart_drive(addr, ctlr, slave); 269 return (vdconfigure_drive(addr, ctlr, slave, type, 1)); 270 } else if (pass == 2) 271 return (vdconfigure_drive(addr, ctlr, slave, type, 3)); 272 return (0); 273 } 274 return (1); 275 } 276 277 vdstart_drive(addr, ctlr, slave) 278 cdr *addr; 279 register int ctlr, slave; 280 { 281 int error = 0; 282 283 printf("vd%d: starting drive %d, wait...", ctlr, slave); 284 if (vdctlr_info[ctlr].ctlr_started) { 285 printf("DELAY(5500000)..."); 286 DELAY(5500000); 287 goto done; 288 } 289 vdctlr_info[ctlr].ctlr_started = 1; 290 error = vdnotrailer(addr, ctlr, 0, VDSTART, (slave*6)+62) & HRDERR; 291 if (!error) { 292 printf("DELAY(%d)...", (slave * 5500000) + 62000000); 293 DELAY((slave * 5500000) + 62000000); 294 } 295 done: 296 printf("\n"); 297 return (error == 0); 298 } 299 300 vdnotrailer(addr, ctlr, unit, function, time) 301 register cdr *addr; 302 int ctlr, unit, function, time; 303 { 304 fmt_mdcb *mdcb = &vdctlr_info[ctlr].ctlr_mdcb; 305 fmt_dcb *dcb = &vdctlr_info[ctlr].ctlr_dcb; 306 int type = vdctlr_info[ctlr].ctlr_type; 307 308 dcb->opcode = function; /* command */ 309 dcb->intflg = NOINT; 310 dcb->nxtdcb = (fmt_dcb *)0; /* end of chain */ 311 dcb->operrsta = 0; 312 dcb->devselect = (char)unit; 313 dcb->trailcnt = (char)0; 314 mdcb->firstdcb = (fmt_dcb *)(PHYS(dcb)); 315 mdcb->vddcstat = 0; 316 VDDC_ATTENTION(addr, (fmt_mdcb *)(PHYS(mdcb)), type); 317 POLLTILLDONE(addr, dcb, time, type); 318 if (vdtimeout <= 0) { 319 printf(" during init\n"); 320 return (DCBCMP|ANYERR|HRDERR|OPABRT); 321 } 322 return (dcb->operrsta); 323 } 324 325 vdattach(vi) 326 register struct vba_device *vi; 327 { 328 register unit_tab *ui = &vdunit_info[vi->ui_unit]; 329 register ctlr_tab *ci = &vdctlr_info[vi->ui_ctlr]; 330 register struct buf *cq = &vi->ui_mi->um_tab; 331 register struct buf *uq = cq->b_forw; 332 register struct buf *start_queue = uq; 333 register fs_tab *fs = &ui->info; 334 335 ui->info = vdst[vi->ui_type]; 336 ui->sec_per_blk = DEV_BSIZE / ui->info.secsize; 337 ui->sec_per_cyl = ui->info.nsec * ui->info.ntrak; 338 ui->xfer_queue.b_dev = vi->ui_slave; 339 ci->unit_type[vi->ui_slave] = vi->ui_type; 340 /* load unit into controller's active unit list */ 341 if (uq == NULL) { 342 cq->b_forw = &ui->xfer_queue; 343 ui->xfer_queue.b_forw = &ui->xfer_queue; 344 ui->xfer_queue.b_back = &ui->xfer_queue; 345 } else { 346 while (uq->b_forw != start_queue) 347 uq = uq->b_forw; 348 ui->xfer_queue.b_forw = start_queue; 349 ui->xfer_queue.b_back = uq; 350 uq->b_forw = &ui->xfer_queue; 351 start_queue->b_back = &ui->xfer_queue; 352 } 353 /* 354 * (60 / rpm) / (number of sectors per track * (bytes per sector / 2)) 355 */ 356 dk_mspw[vi->ui_unit] = 120.0 / (fs->rpm * fs->nsec * fs->secsize); 357 } 358 359 /*ARGSUSED*/ 360 vddgo(um) 361 struct vba_ctlr *um; 362 { 363 364 } 365 366 vdstrategy(bp) 367 register struct buf *bp; 368 { 369 register int unit = VDUNIT(bp->b_dev); 370 register struct vba_device *vi = vddinfo[unit]; 371 register par_tab *par; 372 register unit_tab *ui; 373 register fs_tab *fs; 374 register int blks, bn, s; 375 376 if (bp->b_bcount == 0 || vi == 0 || vi->ui_alive == 0) 377 goto bad; 378 ui = &vdunit_info[unit]; 379 fs = &ui->info; 380 par = &fs->partition[FILSYS(bp->b_dev)]; 381 blks = (bp->b_bcount + DEV_BSIZE-1) >> DEV_BSHIFT; 382 if (bp->b_blkno + blks >= par->par_len) { 383 blks = par->par_len - bp->b_blkno; 384 if (blks <= 0) 385 goto bad; 386 bp->b_bcount = blks * DEV_BSIZE; 387 } 388 bn = bp->b_blkno + par->par_start; 389 bn *= ui->sec_per_blk; 390 bp->b_daddr = (bn / fs->nsec) % fs->ntrak; 391 bp->b_cylin = bn / ui->sec_per_cyl; 392 vbasetup(bp, ui->info.secsize); 393 s = spl7(); 394 if (ui->xfer_queue.av_forw == NULL) { 395 register ctlr_tab *ci = &vdctlr_info[vi->ui_ctlr]; 396 int slave = vi->ui_slave; 397 398 if (bp->b_cylin != ci->cur_cyl[slave] || 399 bp->b_daddr != ci->cur_trk[slave]) 400 ci->off_cylinder |= 1 << slave; 401 } 402 bp->b_daddr |= (bn % fs->nsec) << 8; 403 disksort(&ui->xfer_queue, bp); 404 if (!vddinfo[unit]->ui_mi->um_tab.b_active++) { 405 splx(s); 406 vdstart(vddinfo[unit]->ui_mi); 407 } else 408 splx(s); 409 return; 410 bad: 411 bp->b_flags |= B_ERROR, bp->b_error = ENXIO; 412 bp->b_resid = bp->b_bcount; 413 iodone(bp); 414 } 415 416 /* 417 * Start up a transfer on a drive. 418 */ 419 vdstart(ci) 420 register struct vba_ctlr *ci; 421 { 422 register struct buf *cq = &ci->um_tab; 423 register struct buf *uq = cq->b_forw; 424 425 /* search for next ready unit */ 426 cq->b_forw = cq->b_forw->b_forw; 427 uq = cq->b_forw; 428 do { 429 if (uq->av_forw != NULL) { 430 cq->b_forw = uq; 431 vdexecute(ci, uq); 432 return; 433 } 434 uq = uq->b_forw; 435 } while (uq != cq->b_forw); 436 } 437 438 /* 439 * Initiate seeks for all drives off-cylinder. 440 */ 441 vdload_seeks(ci, uq) 442 register ctlr_tab *ci; 443 register struct buf *uq; 444 { 445 register int unit, slave, nseeks; 446 register fmt_dcb *dcb; 447 register struct buf *bp; 448 register struct buf *start_queue = uq; 449 450 nseeks = 0; 451 do { 452 bp = uq->av_forw; 453 if (bp != NULL) { 454 unit = VDUNIT(bp->b_dev); 455 slave = vddinfo[unit]->ui_slave; 456 if (ci->off_cylinder & (1 << slave)) { 457 ci->off_cylinder &= ~(1 << slave); 458 if (ci->cur_cyl[slave] != bp->b_cylin) { 459 ci->cur_cyl[slave] = bp->b_cylin; 460 dk_seek[unit]++; 461 } 462 ci->cur_trk[slave] = bp->b_daddr&0xff; 463 dcb = &ci->seek_dcb[nseeks++]; 464 dcb->opcode = SEEK; 465 dcb->intflg = NOINT | INT_PBA; 466 dcb->operrsta = 0; 467 dcb->devselect = (char)slave; 468 dcb->trailcnt = (char)1; 469 dcb->trail.sktrail.skaddr.cylinder = 470 bp->b_cylin; 471 dcb->trail.sktrail.skaddr.track = 472 bp->b_daddr & 0xff; 473 dcb->trail.sktrail.skaddr.sector = 0; 474 } 475 } 476 uq = uq->b_forw; 477 } while (uq != start_queue && nseeks < 4); 478 return (nseeks); 479 } 480 481 extern vd_int_timeout(); 482 /* 483 * Execute the next command on the unit queue uq. 484 */ 485 vdexecute(controller_info, uq) 486 register struct vba_ctlr *controller_info; 487 register struct buf *uq; 488 { 489 register struct buf *bp = uq->av_forw; 490 register int ctlr = controller_info->um_ctlr; 491 register ctlr_tab *ci = &vdctlr_info[ctlr]; 492 register int unit = VDUNIT(bp->b_dev); 493 register int slave = vddinfo[unit]->ui_slave; 494 register fmt_mdcb *mdcb = &ci->ctlr_mdcb; 495 register fmt_dcb *dcb = &ci->ctlr_dcb; 496 497 /* 498 * If there are overlapped seeks to perform, shuffle 499 * them to the front of the queue and get them started 500 * before any data transfers (to get some parallelism). 501 */ 502 if ((ci->off_cylinder & ~(1<<slave)) && ci->overlap_seeks) { 503 register int i, nseeks; 504 505 /* setup seek requests in seek-q */ 506 nseeks = vdload_seeks(ci, uq); 507 /* place at the front of the master q */ 508 mdcb->firstdcb = (fmt_dcb *)PHYS(&ci->seek_dcb[0]); 509 /* shuffle any remaining seeks up in the seek-q */ 510 for (i = 1; i < nseeks; i++) 511 ci->seek_dcb[i-1].nxtdcb = 512 (fmt_dcb *)PHYS(&ci->seek_dcb[i]); 513 ci->seek_dcb[nseeks-1].nxtdcb = (fmt_dcb *)PHYS(dcb); 514 } else { 515 if (bp->b_cylin != ci->cur_cyl[slave]) { 516 ci->cur_cyl[slave] = bp->b_cylin; 517 dk_seek[unit]++; 518 } 519 ci->cur_trk[slave] = bp->b_daddr & 0xff; 520 ci->off_cylinder = 0; 521 mdcb->firstdcb = (fmt_dcb *)(PHYS(dcb)); 522 } 523 dcb->opcode = (bp->b_flags & B_READ) ? RD : WD; 524 dcb->intflg = INTDONE; 525 dcb->nxtdcb = (fmt_dcb *)0; /* end of chain */ 526 dcb->operrsta = 0; 527 dcb->devselect = (char)slave; 528 dcb->trailcnt = (char)(sizeof (trrw) / sizeof (long)); 529 dcb->trail.rwtrail.memadr = (char *) 530 vbastart(bp, ci->rawbuf, (long *)ci->map, ci->utl); 531 dcb->trail.rwtrail.wcount = (short)((bp->b_bcount+1) / sizeof (short)); 532 dcb->trail.rwtrail.disk.cylinder = bp->b_cylin; 533 dcb->trail.rwtrail.disk.track = bp->b_daddr & 0xff; 534 dcb->trail.rwtrail.disk.sector = bp->b_daddr >> 8; 535 mdcb->vddcstat = 0; 536 dk_wds[unit] += bp->b_bcount / 32; 537 ci->int_expected = 1; 538 timeout(vd_int_timeout, (caddr_t)ctlr, 20*60); 539 dk_busy |= 1 << unit; 540 #ifdef VDDCPERF 541 scope_out(1); 542 #endif 543 VDDC_ATTENTION((cdr *)(vdminfo[ctlr]->um_addr), 544 (fmt_mdcb *)(PHYS(mdcb)), ci->ctlr_type); 545 } 546 547 /* 548 * Watch for lost interrupts. 549 */ 550 vd_int_timeout(ctlr) 551 register int ctlr; 552 { 553 register ctlr_tab *ci = &vdctlr_info[ctlr]; 554 register fmt_dcb *dcb = &ci->ctlr_dcb; 555 556 uncache(&dcb->operrsta); 557 printf("vd%d: lost interupt, status %x", ctlr, dcb->operrsta); 558 if (ci->ctlr_type == SMD_ECTLR) { 559 uncache(&dcb->err_code); 560 printf(", error code %x", dcb->err_code); 561 } 562 printf("\n"); 563 if ((dcb->operrsta&DCBCMP) == 0) { 564 VDDC_ABORT((cdr *)(vdminfo[ctlr]->um_addr), ci->ctlr_type); 565 dcb->operrsta |= DCBUSC | DCBABT | ANYERR | HRDERR | CTLRERR; 566 } 567 vdintr(ctlr); 568 } 569 570 /* 571 * Handle a disk interrupt. 572 */ 573 vdintr(ctlr) 574 register int ctlr; 575 { 576 register ctlr_tab *ci; 577 register struct buf *cq, *uq, *bp; 578 register int slave, unit; 579 register fmt_mdcb *mdcb; 580 register fmt_dcb *dcb; 581 int code, s; 582 583 untimeout(vd_int_timeout, (caddr_t)ctlr); 584 #ifdef VDDCPERF 585 scope_out(2); 586 #endif 587 ci = &vdctlr_info[ctlr]; 588 if (!ci->int_expected) { 589 printf("vd%d: stray interrupt\n", ctlr); 590 return; 591 } 592 /* 593 * Take first request off controller's queue. 594 */ 595 cq = &vdminfo[ctlr]->um_tab; 596 uq = cq->b_forw; 597 bp = uq->av_forw; 598 unit = VDUNIT(bp->b_dev); 599 dk_busy &= ~(1 << unit); 600 dk_xfer[unit]++; 601 ci->int_expected = 0; 602 /* find associated control blocks */ 603 mdcb = &ci->ctlr_mdcb, uncache(&mdcb->intdcb); 604 dcb = &ci->ctlr_dcb, uncache(&dcb->operrsta); 605 if (ci->ctlr_type == SMD_ECTLR) 606 uncache(&dcb->err_code); 607 slave = uq->b_dev; 608 switch (code = vddecode_error(dcb)) { 609 610 case CTLR_ERROR: 611 case DRIVE_ERROR: 612 if (cq->b_errcnt >= 2) 613 vdhard_error(ci, bp, dcb); 614 if (code == CTLR_ERROR) 615 vdreset_ctlr((cdr *)vdminfo[ctlr]->um_addr, ctlr); 616 else 617 reset_drive((cdr *)vdminfo[ctlr]->um_addr, ctlr, 618 slave, 2); 619 if (cq->b_errcnt++ < 2) { /* retry error */ 620 cq->b_forw = uq->b_back; 621 vdstart(vdminfo[ctlr]); 622 return; 623 } 624 bp->b_resid = bp->b_bcount; 625 break; 626 627 case HARD_DATA_ERROR: 628 vdhard_error(ci, bp, dcb); 629 bp->b_resid = 0; 630 break; 631 632 case SOFT_DATA_ERROR: 633 vdsoft_error(ci, bp, dcb); 634 /* fall thru... */ 635 636 default: /* operation completed */ 637 bp->b_error = 0; 638 bp->b_resid = 0; 639 break; 640 } 641 vbadone(bp, ci->rawbuf, (long *)ci->map, ci->utl); 642 /* 643 * Take next request on this unit q, or, if none, 644 * the next request on the next active unit q. 645 */ 646 s = spl7(); 647 uq->av_forw = bp->av_forw; 648 if (uq->av_back != bp) { 649 register struct buf *next; 650 651 unit = VDUNIT(uq->av_forw->b_dev); 652 slave = vddinfo[unit]->ui_slave; 653 next = uq->av_forw; 654 if (next->b_cylin != ci->cur_cyl[slave] || 655 (next->b_daddr & 0xff) != ci->cur_trk[slave]) 656 ci->off_cylinder |= 1 << slave; 657 } else 658 uq->av_back = NULL; 659 splx(s); 660 /* reset controller state */ 661 cq->b_errcnt = 0; 662 cq->b_active--; 663 #ifdef VDDCPERF 664 scope_out(3); 665 #endif 666 if (bp->b_flags & B_ERROR) 667 bp->b_error = EIO; 668 iodone(bp); 669 vdstart(vdminfo[ctlr]); 670 } 671 672 /* 673 * Convert controller status to internal operation/error code. 674 */ 675 vddecode_error(dcb) 676 register fmt_dcb *dcb; 677 { 678 679 if (dcb->operrsta & HRDERR) { 680 if (dcb->operrsta & (HCRCERR | HCMPERR | UCDATERR | WPTERR | 681 DSEEKERR | NOTCYLERR |DRVNRDY | INVDADR)) 682 return (DRIVE_ERROR); 683 if (dcb->operrsta & (CTLRERR | OPABRT | INVCMD | DNEMEM)) 684 return (CTLR_ERROR); 685 return (HARD_DATA_ERROR); 686 } 687 if (dcb->operrsta & SFTERR) 688 return (SOFT_DATA_ERROR); 689 return (0); 690 } 691 692 /* 693 * Report a hard error. 694 */ 695 vdhard_error(ci, bp, dcb) 696 ctlr_tab *ci; 697 register struct buf *bp; 698 register fmt_dcb *dcb; 699 { 700 unit_tab *ui = &vdunit_info[VDUNIT(bp->b_dev)]; 701 702 bp->b_flags |= B_ERROR; 703 harderr(bp, ui->info.type_name); 704 printf("status %x", dcb->operrsta); 705 if (ci->ctlr_type == SMD_ECTLR) 706 printf(" ecode %x", dcb->err_code); 707 printf("\n"); 708 } 709 710 /* 711 * Report a soft error. 712 */ 713 vdsoft_error(ci, bp, dcb) 714 ctlr_tab *ci; 715 register struct buf *bp; 716 register fmt_dcb *dcb; 717 { 718 unit_tab *ui = &vdunit_info[VDUNIT(bp->b_dev)]; 719 720 printf("%s%d%c: soft error sn%d status %x", ui->info.type_name, 721 minor(bp->b_dev) >> 3, 'a'+(minor(bp->b_dev)&07), bp->b_blkno, 722 dcb->operrsta); 723 if (ci->ctlr_type == SMD_ECTLR) 724 printf(" ecode %x", dcb->err_code); 725 printf("\n"); 726 } 727 728 /*ARGSUSED*/ 729 vdopen(dev, flag) 730 dev_t dev; 731 int flag; 732 { 733 register unit = VDUNIT(dev); 734 register struct vba_device *vi = vddinfo[unit]; 735 736 if (vi == 0 || vi->ui_alive == 0 || vi->ui_type >= nvddrv) 737 return (ENXIO); 738 if (vdunit_info[unit].info.partition[FILSYS(dev)].par_len == 0) 739 return (ENXIO); 740 return (0); 741 } 742 743 vdread(dev, uio) 744 dev_t dev; 745 struct uio *uio; 746 { 747 register int unit = VDUNIT(dev); 748 register unit_tab *ui = &vdunit_info[unit]; 749 750 if (unit >= NFSD) 751 return (ENXIO); 752 return (physio(vdstrategy, &ui->raw_q_element, dev, B_READ, 753 minphys, uio)); 754 } 755 756 vdwrite(dev, uio) 757 dev_t dev; 758 struct uio *uio; 759 { 760 register int unit = VDUNIT(dev); 761 register unit_tab *ui = &vdunit_info[unit]; 762 763 if (unit >= NFSD) 764 return (ENXIO); 765 return (physio(vdstrategy, &ui->raw_q_element, dev, B_WRITE, 766 minphys, uio)); 767 } 768 769 /* 770 * Crash dump. 771 */ 772 vddump(dev) 773 dev_t dev; 774 { 775 register int unit = VDUNIT(dev); 776 register unit_tab *ui = &vdunit_info[unit]; 777 register fs_tab *fs = &ui->info; 778 register int ctlr = vddinfo[unit]->ui_ctlr; 779 register struct vba_ctlr *vba_vdctlr_info = vdminfo[ctlr]; 780 register int filsys = FILSYS(dev); 781 register cdr *addr = (cdr *)(vba_vdctlr_info->um_addr); 782 register int cur_blk, blkcount, blocks; 783 caddr_t memaddr; 784 785 vdreset_ctlr(addr, ctlr); 786 blkcount = maxfree - 2; /* In 1k byte pages */ 787 if (dumplo + blkcount > fs->partition[filsys].par_len) { 788 blkcount = fs->partition[filsys].par_len - dumplo; 789 printf("vd%d: Dump truncated to %dMB\n", unit, blkcount/1024); 790 } 791 cur_blk = fs->partition[filsys].par_start + dumplo; 792 memaddr = 0; 793 while (blkcount > 0) { 794 blocks = MIN(blkcount, DUMPSIZE); 795 if (!vdwrite_block(addr, ctlr, unit, memaddr, cur_blk, blocks)) 796 return (EIO); 797 blkcount -= blocks; 798 memaddr += blocks * NBPG; 799 cur_blk += blocks; 800 } 801 return (0); 802 } 803 804 /* 805 * Write a block to disk during a crash dump. 806 */ 807 vdwrite_block(caddr, ctlr, unit, addr, block, blocks) 808 register cdr *caddr; 809 register int ctlr, unit; 810 register caddr_t addr; 811 register int block, blocks; 812 { 813 register fmt_mdcb *mdcb = &vdctlr_info[ctlr].ctlr_mdcb; 814 register fmt_dcb *dcb = &vdctlr_info[ctlr].ctlr_dcb; 815 register unit_tab *ui = &vdunit_info[unit]; 816 register fs_tab *fs = &ui->info; 817 818 block *= (int)ui->sec_per_blk; 819 blocks *= (int)ui->sec_per_blk; 820 mdcb->firstdcb = (fmt_dcb *)(PHYS(dcb)); 821 dcb->intflg = NOINT; 822 dcb->opcode = WD; 823 dcb->operrsta = 0; 824 dcb->devselect = (char)(vddinfo[unit])->ui_slave; 825 dcb->trailcnt = (char)(sizeof (trrw) / sizeof (long)); 826 dcb->trail.rwtrail.memadr = addr; 827 dcb->trail.rwtrail.wcount = (short) 828 ((blocks * fs->secsize)/ sizeof (short)); 829 dcb->trail.rwtrail.disk.cylinder = (short)(block / ui->sec_per_cyl); 830 dcb->trail.rwtrail.disk.track = (char)((block / fs->nsec) % fs->ntrak); 831 dcb->trail.rwtrail.disk.sector = (char)(block % fs->nsec); 832 VDDC_ATTENTION(caddr, (fmt_mdcb *)(PHYS(mdcb)), 833 vdctlr_info[ctlr].ctlr_type); 834 POLLTILLDONE(caddr, dcb, 5, vdctlr_info[ctlr].ctlr_type); 835 if (vdtimeout <= 0) { 836 printf(" during dump\n"); 837 return (0); 838 } 839 if (dcb->operrsta & HRDERR) { 840 printf("vd%d: hard error, status %x\n", unit, dcb->operrsta); 841 return (0); 842 } 843 return (1); 844 } 845 846 vdsize(dev) 847 dev_t dev; 848 { 849 struct vba_device *vi = vddinfo[VDUNIT(dev)]; 850 851 if (vi == 0 || vi->ui_alive == 0 || vi->ui_type >= nvddrv) 852 return (-1); 853 return (vdunit_info[VDUNIT(dev)].info.partition[FILSYS(dev)].par_len); 854 } 855 856 /* 857 * Perform a controller reset. 858 */ 859 vdreset_ctlr(addr, ctlr) 860 register cdr *addr; 861 register int ctlr; 862 { 863 register struct buf *cq = &vdminfo[ctlr]->um_tab; 864 register struct buf *uq = cq->b_forw; 865 register ctlr_tab *ci = &vdctlr_info[ctlr]; 866 867 VDDC_RESET(addr, ci->ctlr_type); 868 ci->ctlr_started = 0; 869 if (ci->ctlr_type == SMD_ECTLR) { 870 addr->cdr_csr = 0; 871 addr->mdcb_tcf = AM_ENPDA; 872 addr->dcb_tcf = AM_ENPDA; 873 addr->trail_tcf = AM_ENPDA; 874 addr->data_tcf = AM_ENPDA; 875 addr->cdr_ccf = CCF_STS | XMD_32BIT | BSZ_16WRD | 876 CCF_ENP | CCF_EPE | CCF_EDE | CCF_ECE | CCF_ERR; 877 } 878 if (vdnotrailer(addr, ctlr, 0, INIT, 10) & HRDERR) { 879 printf("failed to init\n"); 880 return (0); 881 } 882 if (vdnotrailer(addr, ctlr, 0, DIAG, 10) & HRDERR) { 883 printf("diagnostic error\n"); 884 return (0); 885 } 886 /* reset all units attached to controller */ 887 uq = cq->b_forw; 888 do { 889 reset_drive(addr, ctlr, uq->b_dev, 0); 890 uq = uq->b_forw; 891 } while (uq != cq->b_forw); 892 return (1); 893 } 894 895 /* 896 * Perform a reset on a drive. 897 */ 898 reset_drive(addr, ctlr, slave, start) 899 register cdr *addr; 900 register int ctlr, slave, start; 901 { 902 register int type = vdctlr_info[ctlr].unit_type[slave]; 903 904 if (type == UNKNOWN) 905 return; 906 if (!vdconfigure_drive(addr, ctlr, slave, type, start)) 907 printf("vd%d: drive %d: couldn't reset\n", ctlr, slave); 908 } 909 910 #ifdef notdef 911 /* 912 * Dump the mdcb and DCB for diagnostic purposes. 913 */ 914 vdprintdcb(lp) 915 register long *lp; 916 { 917 register int i, dcb, tc; 918 919 for (dcb = 0; lp; lp = (long *)(*lp), dcb++) { 920 lp = (long *)((long)lp | 0xc0000000); 921 printf("\nDump of dcb%d@%x:", dcb, lp); 922 for (i = 0, tc = lp[3] & 0xff; i < tc+7; i++) 923 printf(" %lx", lp[i]); 924 printf("\n"); 925 } 926 DELAY(1750000); 927 } 928 #endif 929 #endif 930