1*25675Ssam /* udc.h 1.2 86/01/05 */ 223998Ssam 323998Ssam struct UDPAC { /* UDC command packet */ 423998Ssam char _stx ; 523998Ssam char _pkid ; 623998Ssam char _pksiz ; /* 21 bytes */ 723998Ssam char _pkdev ; /* device # */ 823998Ssam char _pkcmd ; /* Command type */ 923998Ssam char _pkfnc ; /* Function type */ 1023998Ssam short _pkcnt ; /* # of data blocks (1/4K each) */ 1123998Ssam short _pbsiz ; /* Block length size (0x100 = 1/4K) */ 1223998Ssam short _pkmem[2] ; /* Starting memory address.Should be 'long' but 1323998Ssam we can't write it this way on Tahoe, 1423998Ssam because of alignment problems - the C 1523998Ssam will gap after the previous 'short' */ 1623998Ssam short _pcksm ; /* Checksum (unused) */ 1723998Ssam long _psecno ; /* Starting sector # */ 1823998Ssam char _etx ; 1923998Ssam } 2023998Ssam ; 2123998Ssam 2223998Ssam #define SECTSIZ 256 /* sector size */ 2323998Ssam #define L2SIZ 8 /* log2 of sector size */ 2423998Ssam #define L2BSIZ 10 /* log2 of block size */ 2523998Ssam #define NUDC 1 /* number of UDC controllers */ 2623998Ssam #define NUNIT 8 /* number of units per controller */ 2723998Ssam #define NUDDRV 5 /* number of drive types supported */ 2823998Ssam #define DK_N 1 /* Monitoring device bit */ 2923998Ssam 3023998Ssam /* 3123998Ssam ** Block devices sizes structure 3223998Ssam */ 3323998Ssam 3423998Ssam struct size 3523998Ssam { 3623998Ssam daddr_t nblocks; 3723998Ssam int block0; 3823998Ssam }; 3923998Ssam 4023998Ssam #define udaddr ( (char *)(0xff0000+IOBASE) ) 4123998Ssam #define INT 0x00d /* interrupt offset */ 4223998Ssam #define RST 0x00f /* controller reset offset */ 4323998Ssam #define OB1 0x101 4423998Ssam #define OB2 0x103 4523998Ssam #define IB1 0x181 4623998Ssam #define IB2 0x183 4723998Ssam #define PKID 0x187 /* packet id */ 4823998Ssam #define PKLEN 0x189 /* packet length */ 4923998Ssam #define PKDEV 0x18b /* device # */ 5023998Ssam #define PKCMD 0x18d /* command type */ 5123998Ssam #define PKSTT 0x18f /* status type */ 5223998Ssam #define STAT1 0x191 /* i/o status result offset */ 5323998Ssam #define STAT2 0x193 5423998Ssam #define DEVSTAT1 0x195 5523998Ssam #define DEVSTAT2 0x197 5623998Ssam #define DEVSIZE 0x199 /* # of sectors in device status message */ 5723998Ssam 5823998Ssam #define UDREAD 0x10 5923998Ssam #define UDWTRY 0x01 /* read with retry */ 6023998Ssam 6123998Ssam #define UDWRITE 0x20 6223998Ssam #define UDWCRC 0x01 /* write sectors and check CRC */ 6323998Ssam #define UDWSECT 0x02 /* write sectors */ 6423998Ssam 6523998Ssam #define UDTEST 0x30 6623998Ssam #define UDSTAT 0x02 /* Test status */ 6723998Ssam 6823998Ssam #define DEVRDY 0x80 /* device ready bit in status byte */ 6923998Ssam #define DEVTYPE 0x7 /* bits 0-2 in status byte define device */ 7023998Ssam #define FLP 0x1 7123998Ssam #define HARDDISK 0x2 7223998Ssam #define TAPE 0x5 7323998Ssam 7423998Ssam /* Some I/O addresses used to generate pulses for scopes */ 7523998Ssam #define OUT1 0xffffb034 7623998Ssam #define OUT2 0xffffb018 7723998Ssam #define OUT3 0xffffb020 7823998Ssam #define OUT4 0xffffb004 7923998Ssam #define OUT5 0xffffb024 8023998Ssam #define OUT6 0xffffb00c 8123998Ssam #define OUT7 0xffffb02c 8223998Ssam 8323998Ssam #define IN1 0xffffb030 8423998Ssam #define IN2 0xffffb03c 8523998Ssam #define IN3 0xffffb004 8623998Ssam #define IN4 0xffffb00c 8723998Ssam #define IN5 0xffffb02c 8823998Ssam 8923998Ssam int dummy; 9023998Ssam extern char vmem[][16*NBPG]; 9123998Ssam 92*25675Ssam #define IOaddr(off) (caddr_t)((int)vmem + ((off) & 0x0fffff)) 9323998Ssam 9423998Ssam int iospace_mapped; 95*25675Ssam #define scope_out(x) if(iospace_mapped) movob(IOaddr(OUT/**/x),0) 9623998Ssam #define scope_in(x) if(iospace_mapped) dummy = *IOaddr(IN/**/x) 97