1*49429Sbostic /*- 2*49429Sbostic * Copyright (c) 1985 The Regents of the University of California. 3*49429Sbostic * All rights reserved. 4*49429Sbostic * 5*49429Sbostic * This code is derived from software contributed to Berkeley by 6*49429Sbostic * Computer Consoles Inc. 7*49429Sbostic * 8*49429Sbostic * %sccs.include.redist.c% 9*49429Sbostic * 10*49429Sbostic * @(#)psl.h 7.2 (Berkeley) 05/08/91 1134408Skarels */ 1224027Ssam 1324027Ssam /* 1425678Ssam * TAHOE processor status longword. 1524027Ssam */ 1624027Ssam #define PSL_C 0x00000001 /* carry bit */ 1724027Ssam #define PSL_V 0x00000002 /* overflow bit */ 1824027Ssam #define PSL_Z 0x00000004 /* zero bit */ 1924027Ssam #define PSL_N 0x00000008 /* negative bit */ 2024027Ssam #define PSL_ALLCC 0x0000000f /* all cc bits - unlikely */ 2124027Ssam #define PSL_T 0x00000010 /* trace enable bit */ 2224027Ssam #define PSL_IV 0x00000020 /* integer overflow enable bit */ 2324027Ssam #define PSL_FU 0x00000040 /* float underflow enable */ 2424027Ssam #define PSL_DBL 0x00000080 /* f.p. prescision indicator */ 2524027Ssam #define PSL_SFE 0x00000100 /* system-forced-exception */ 2624027Ssam #define PSL_IPL 0x001f0000 /* interrupt priority level */ 2725678Ssam #define PSL_PRVMOD 0x00000000 /* previous mode (kernel mode) */ 2824027Ssam #define PSL_CURMOD 0x01000000 /* current mode (all on is user) */ 2924027Ssam #define PSL_IS 0x04000000 /* interrupt stack */ 3024027Ssam #define PSL_TP 0x40000000 /* trace pending */ 3124027Ssam 3225678Ssam #define PSL_MBZ 0xbae0fe00 /* must be zero bits */ 3324027Ssam 3424027Ssam #define PSL_USERSET (PSL_CURMOD) 3525678Ssam #define PSL_USERCLR (PSL_IS|PSL_IPL|PSL_MBZ|PSL_SFE|PSL_DBL|PSL_FU) 36