1 /* if_enpreg.h 1.1 86/07/20 */ 2 3 /* Copyright (c) 1984 by Communication Machinery Corporation 4 * 5 * This file contains material which is proprietary to 6 * Communication Machinery Corporation (CMC) and which 7 * may not be divulged without the written permission 8 * of CMC. 9 * 10 * ENP-10 Ram Definition 11 * 12 * 3/15/85 Jon Phares 13 * Update 7/10/85 S. Holmgren 14 * ENP-10 update 7/21/85 J. Mullen 15 * ENP-20 update 8/11/85 J. Mullen 16 * Mods for CCI TAHOE system 8/14/85 J. Mullen 17 * 18 */ 19 20 #define K *1024 21 22 #define ENPSIZE (124 K) /* VME bus space allocated to enp */ 23 #define MINPKTSIZE 60 /* minimum ethernet packet size */ 24 25 /* Note: paged window (4 K) is identity mapped by ENP kernel to provide 26 * 124 K contiguous RAM (as reflected in RAM_SIZE) 27 */ 28 29 #define RAM_WINDOW (128 K) 30 #define IOACCESS_WINDOW (512) 31 #define FIXED_WINDOW (RAM_WINDOW - IOACCESS_WINDOW) 32 #define RAMROM_SWAP (4 K) 33 #define RAM_SIZE (FIXED_WINDOW - RAMROM_SWAP) 34 35 #define HOST_RAMSIZE (48 K) 36 #define ENP_RAMSIZE (20 K) 37 38 /* ...top of 4K local i/o space for ENP */ 39 40 #ifdef notdef 41 typedef struct iow10 { 42 char pad1[0x81]; 43 /* written to: causes an interrupt on the host at the vector written 44 read from : returns the most significant 8 bits of the slave address */ 45 char vector; 46 char pad2[0x1F]; 47 char csrarr[0x1E]; 48 char pad3[2]; 49 char ier; /* intr. enable reg., 0x80 == enable,0 == off*/ 50 char pad4[1]; 51 char tir; /* transmit intr. (Level 4 INP autovector) */ 52 char pad5[1]; 53 char rir; /* receive intr. (Level 5 INP autovector) */ 54 char pad6[1]; 55 char uir; /* utility intr. (Level 1 INP autovector) */ 56 char pad7[7]; 57 char mapfirst4k; /* bit 7 set means ram, clear means rom */ 58 char pad8[0x11]; 59 char exr; /* exception register, see bit defines above */ 60 char pad9[0xD1F]; 61 char hst2enp_interrupt; /* R or W interrupts ENP */ 62 char pad10[0xFF]; 63 char hst2enp_reset; /* R or W resets ENP */ 64 } iow10; 65 #endif notdef 66 67 typedef struct iow20 68 { 69 char pad0; 70 char hst2enp_interrupt; 71 char pad1[510]; 72 } iow20; 73 74 75 #ifdef notdef 76 typedef struct iow30 77 { 78 char pad0; 79 char impucsr; 80 char pad1[0x1d]; 81 short bus2mpu_interrupt; 82 short bs2enp_wsctl; 83 short bs2enp_rsctl; 84 short enp2hst_clear_intr; /* 0x27 */ 85 short enp_rcv_intr; 86 short enp_xmit_intr; 87 short hst2enp_interrupt; /* 0x2d */ 88 short pad2; 89 char pad3[0xf]; 90 short bus_page; /* Bus page register */ 91 char pad4[0x1d]; 92 short lock_ctrl; 93 char pad5[0x1d]; 94 short duart[0x10]; /* 16 duart regs */ 95 char pad6[0x1f]; 96 short bus_window; 97 } iow30; 98 #endif notdef 99 100 struct ether_addr 101 { 102 u_char ea_addr[6]; 103 }; 104 105 #define ETHADDR struct ether_addr 106 #define ETHADDR_SIZE 6 /* size of ethernet address */ 107 108 typedef 109 struct ethlist 110 { 111 int e_listsize; /* active addr entries */ 112 ETHADDR e_baseaddr; /* addr lance is working with */ 113 ETHADDR e_addrs[ 16 ]; /* possible addresses */ 114 } ETHLIST; 115 116 typedef 117 struct enpstat 118 { 119 unsigned long e_xmit_successful; /* Successful transmissions */ 120 unsigned long e_mult_retry; /* multiple retries on xmit */ 121 unsigned long e_one_retry; /* single retries */ 122 unsigned long e_fail_retry; /* too many retries */ 123 unsigned long e_deferrals; /* transmission delayed due 124 to active medium */ 125 unsigned long e_xmit_buff_err; /* xmit data chaining failed -- 126 "can't happen" */ 127 unsigned long e_silo_underrun; /* transmit data fetch failed */ 128 unsigned long e_late_coll; /* collision after xmit */ 129 unsigned long e_lost_carrier; 130 unsigned long e_babble; /* xmit length > 1518 */ 131 unsigned long e_collision; 132 unsigned long e_xmit_mem_err; 133 unsigned long e_rcv_successful; /* good receptions */ 134 unsigned long e_rcv_missed; /* no recv buff available */ 135 unsigned long e_crc_err; /* checksum failed */ 136 unsigned long e_frame_err; /* crc error AND 137 data length != 0 mod 8 */ 138 unsigned long e_rcv_buff_err; /* rcv data chain failure -- 139 "can't happen" */ 140 unsigned long e_silo_overrun; /* receive data store failed */ 141 unsigned long e_rcv_mem_err; 142 } ENPSTAT; 143 144 typedef struct RING 145 { 146 short r_rdidx; 147 short r_wrtidx; 148 short r_size; 149 short r_pad; 150 int r_slot[1]; 151 } RING; 152 153 typedef struct RING32 154 { 155 short r_rdidx; 156 short r_wrtidx; 157 short r_size; 158 short r_pad; /* to make VAXen happy */ 159 int r_slot[ 32 ]; 160 } RING32; 161 162 /* 163 * ENP Ram data layout 164 * 165 * If you don't put it here - it isn't there 166 * 167 */ 168 169 typedef struct enpdevice { 170 #ifdef notdef 171 char enp_ram_rom[4 K]; 172 #endif notdef 173 union { 174 char all_ram[RAM_SIZE]; 175 struct { 176 unsigned int t_go; 177 unsigned int t_pstart; 178 } t; 179 struct { 180 char nram[RAM_SIZE - (HOST_RAMSIZE + ENP_RAMSIZE)]; 181 char hram[HOST_RAMSIZE]; 182 char kram[ENP_RAMSIZE]; 183 } u_ram; 184 struct 185 { 186 char pad7[ 0x100 ]; /* starts 0x1100 - 0x2000 */ 187 short e_enpstate; /* 1102 */ 188 short e_enpmode; /* 1104 */ 189 int e_enpbase; /* 1104 */ 190 int e_enprun; /* 1108 */ 191 unsigned short e_intrvec; 192 unsigned short e_dummy[3]; 193 194 RING32 h_toenp; /* 110C */ 195 RING32 h_hostfree; 196 RING32 e_tohost; 197 RING32 e_enpfree; 198 199 ENPSTAT e_stat; 200 ETHLIST e_netaddr; 201 } iface; 202 } enp_u; 203 iow20 enp_iow; 204 } ENPDEVICE; 205 206 #define enp_ram enp_u.all_ram 207 #define enp_nram enp_u.u_ram.nram 208 #define enp_hram enp_u.u_ram.hram 209 #define enp_kram enp_u.u_ram.kram 210 #define enp_go enp_u.t.t_go 211 #define enp_prog_start enp_u.t.t_pstart 212 #define enp_intrvec enp_u.iface.e_intrvec 213 #define enp_state enp_u.iface.e_enpstate 214 #define enp_mode enp_u.iface.e_enpmode 215 #define enp_base enp_u.iface.e_enpbase 216 #define enp_enprun enp_u.iface.e_enprun 217 #define enp_toenp enp_u.iface.h_toenp 218 #define enp_hostfree enp_u.iface.h_hostfree 219 #define enp_tohost enp_u.iface.e_tohost 220 #define enp_enpfree enp_u.iface.e_enpfree 221 #define enp_freembuf enp_u.iface.h_freembuf 222 #define enp_stat enp_u.iface.e_stat 223 #define enp_addr enp_u.iface.e_netaddr 224 225 #define ENPVAL 0xff /* value to poke in enp_iow.hst2enp_interrupt */ 226 #define RESETVAL 0x00 /* value to poke in enp_iow.enp2hst_clear_intr */ 227 228 #define INTR_ENP(addr) addr->enp_iow.hst2enp_interrupt = ENPVAL 229 230 #if ENP == 30 231 #define ACK_ENP_INTR(addr) addr->enp_iow.enp2hst_clear_intr = RESETVAL 232 #define IS_ENP_INTR(addr) (addr->enp_iow.enp2hst_clear_intr&0x80) 233 # else 234 #define ACK_ENP_INTR(addr) 235 #define IS_ENP_INTR(addr) ( 1 ) 236 #endif ENP == 30 237 238 #ifdef notdef 239 #define RESET_ENP(addr) addr->enp_iow.hst2enp_reset = 01 240 # else 241 #define RESET_ENP(addr) 242 #endif notdef 243 244 #ifdef TAHOE 245 #define ENP_GO( addr,start ) {int v; v = start; \ 246 enpcopy(&v, &addr->enp_prog_start, sizeof(v) ); \ 247 v = 0x80800000; \ 248 enpcopy( &v, &addr->enp_go, sizeof(v) ); } 249 #else 250 #define ENP_GO( addr,start,intvec ) { addr->enp_prog_start = (unsigned int)(start); \ 251 addr->enp_intrvec = (unsigned short) intvec; \ 252 addr->enp_go = 0x80800000; } 253 #endif TAHOE 254 255 #define SPL_ENP spl4 256 257 258 /* 259 * state bits 260 */ 261 262 #define S_ENPRESET 01 /* enp is in reset state */ 263 #define S_ENPRUN 02 /* enp is in run state */ 264 265 /* 266 * mode bits 267 */ 268 269 #define E_SWAP16 0x1 /* swap two octets within 16 */ 270 #define E_SWAP32 0x2 /* swap 16s within 32 */ 271 #define E_SWAPRD 0x4 /* swap on read */ 272 #define E_SWAPWRT 0x8 /* swap on write */ 273 #define E_DMA 0x10 /* enp does data moving */ 274 275 #define E_EXAM_LIST 0x80000000 /*enp should examine addrlist */ 276 #define E_ADDR_SUPP 0x40000000 /*enp should use supplied addr*/ 277 278 279 /* 280 * Download ioctl definitions 281 */ 282 283 #define mkioctl(type,value) (0x20000000|('type'<<8)|value) 284 285 #define ENPIOGO mkioctl( S,1 ) /* start the enp */ 286 #define ENPIORESET mkioctl( S,2 ) /* reset the enp */ 287 288 /* 289 * The ENP Data Buffer Structure 290 */ 291 292 typedef struct BCB 293 { 294 struct BCB *b_link; 295 short b_stat; 296 short b_len; 297 char *b_addr; 298 short b_msglen; 299 short b_reserved; 300 }BCB; 301 302 struct enp_softc 303 { 304 struct arpcom es_ac; /* common ethernet structures */ 305 struct ether_addr es_boardaddr;/* board ethernet address */ 306 }; 307 308 #define es_if es_ac.ac_if /* network-visible interface */ 309 #define es_enaddr es_ac.ac_enaddr /* hardware ethernet address */ 310 311 #define ENP_OPEN 1 /* device enpram opened */ 312 #define ENP_CLOSE 2 /* device enpram closed */ 313