xref: /csrg-svn/sys/i386/isa/icu.h (revision 63364)
141054Swilliam /*-
2*63364Sbostic  * Copyright (c) 1990, 1993
3*63364Sbostic  *	The Regents of the University of California.  All rights reserved.
441054Swilliam  *
541054Swilliam  * This code is derived from software contributed to Berkeley by
641054Swilliam  * William Jolitz.
741054Swilliam  *
853416Sbostic  * %sccs.include.redist.c%
941054Swilliam  *
10*63364Sbostic  *	@(#)icu.h	8.1 (Berkeley) 06/11/93
1141054Swilliam  */
1241054Swilliam 
1343593Sdonahn #ifndef	__ICU__
1443593Sdonahn #define	__ICU__
1543593Sdonahn 
1641054Swilliam #ifndef	LOCORE
1745624Sbill 
1845624Sbill /*
1945624Sbill  * Interrupt "level" mechanism variables, masks, and macros
2045624Sbill  */
2141054Swilliam extern	unsigned short	imen;	/* interrupt mask enable */
2245624Sbill extern	unsigned short	cpl;	/* current priority level mask */
2341054Swilliam 
2445624Sbill extern	unsigned short highmask; /* group of interrupts masked with splhigh() */
2545624Sbill extern	unsigned short ttymask; /* group of interrupts masked with spltty() */
2645624Sbill extern	unsigned short biomask; /* group of interrupts masked with splbio() */
2745624Sbill extern	unsigned short netmask; /* group of interrupts masked with splimp() */
2843593Sdonahn 
2941054Swilliam #define	INTREN(s)	imen &= ~(s)
3041054Swilliam #define	INTRDIS(s)	imen |= (s)
3145544Sbill #define	INTRMASK(msk,s)	msk |= (s)
3245624Sbill 
3345624Sbill #else
3445624Sbill 
3545624Sbill /*
3645624Sbill  * Macro's for interrupt level priority masks (used in interrupt vector entry)
3745624Sbill  */
3845624Sbill 
3945624Sbill /* Mask a group of interrupts atomically */
4053415Sbostic #define	INTR_HEAD(unit,mask,offst) \
4153415Sbostic 	pushl	$ offst ; \
4245624Sbill 	pushl	$ T_ASTFLT ; \
4345624Sbill 	pushal ; \
4451730Swilliam 	movb	$0x20,%al ; \
4553415Sbostic 
4653415Sbostic #define INTR_TAIL(unit,mask,offst) \
4751730Swilliam 	outb	%al,$ IO_ICU1 ; \
4851730Swilliam 	pushl	%ds ; \
4951730Swilliam 	pushl	%es ; \
5045624Sbill 	movw	$0x10, %ax ; \
5145624Sbill 	movw	%ax, %ds ; \
5245624Sbill 	movw	%ax,%es ; \
5345624Sbill 	incl	_cnt+V_INTR ; \
5449597Swilliam 	incl	_isa_intr + offst * 4 ; \
5545624Sbill 	movzwl	_cpl,%eax ; \
5645624Sbill 	pushl	%eax ; \
5749597Swilliam 	pushl	$ unit ; \
5849597Swilliam 	orw	mask ,%ax ; \
5945624Sbill 	movw	%ax,_cpl ; \
6045624Sbill 	orw	_imen,%ax ; \
6145624Sbill 	outb	%al,$ IO_ICU1+1 ; \
6245624Sbill 	movb	%ah,%al ; \
6345624Sbill 	outb	%al,$ IO_ICU2+1	; \
6451730Swilliam 	sti ;
6545624Sbill 
6653415Sbostic #define INTR1(unit,mask,offst) \
6753415Sbostic 	INTR_HEAD(unit,mask,offst) \
6853415Sbostic 	INTR_TAIL(unit,mask,offst)
6953415Sbostic 
7053415Sbostic #define INTR2(unit,mask,offst) \
7153415Sbostic 	INTR_HEAD(unit,mask,offst) \
7253415Sbostic 	outb	%al,$ IO_ICU2 ; \
7353415Sbostic 	INTR_TAIL(unit,mask,offst)
7453415Sbostic 
7553415Sbostic 
7653415Sbostic 
7745624Sbill /* Interrupt vector exit macros */
7845624Sbill 
7945624Sbill /* First eight interrupts (ICU1) */
8049597Swilliam #define	INTREXIT1	\
8145624Sbill 	jmp	doreti
8245624Sbill 
8345624Sbill /* Second eight interrupts (ICU2) */
8449597Swilliam #define	INTREXIT2	\
8545624Sbill 	jmp	doreti
8645624Sbill 
8741054Swilliam #endif
8841054Swilliam 
8945624Sbill /*
9045624Sbill  * Interrupt enable bits -- in order of priority
9145624Sbill  */
9245544Sbill #define	IRQ0		0x0001		/* highest priority - timer */
9345544Sbill #define	IRQ1		0x0002
9445544Sbill #define	IRQ_SLAVE	0x0004
9545544Sbill #define	IRQ8		0x0100
9645544Sbill #define	IRQ9		0x0200
9745544Sbill #define	IRQ2		IRQ9
9845544Sbill #define	IRQ10		0x0400
9945544Sbill #define	IRQ11		0x0800
10045544Sbill #define	IRQ12		0x1000
10145544Sbill #define	IRQ13		0x2000
10245544Sbill #define	IRQ14		0x4000
10345544Sbill #define	IRQ15		0x8000
10445544Sbill #define	IRQ3		0x0008
10545544Sbill #define	IRQ4		0x0010
10645544Sbill #define	IRQ5		0x0020
10745544Sbill #define	IRQ6		0x0040
10845544Sbill #define	IRQ7		0x0080		/* lowest - parallel printer */
10941054Swilliam 
11045624Sbill /*
11145624Sbill  * Interrupt Control offset into Interrupt descriptor table (IDT)
11245624Sbill  */
11345624Sbill #define	ICU_OFFSET	32		/* 0-31 are processor exceptions */
11445624Sbill #define	ICU_LEN		16		/* 32-47 are ISA interrupts */
11545624Sbill 
11643593Sdonahn #endif	__ICU__
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