141480Smckusick /*
241480Smckusick * Copyright (c) 1988 University of Utah.
363151Sbostic * Copyright (c) 1990, 1993
463151Sbostic * The Regents of the University of California. All rights reserved.
541480Smckusick *
641480Smckusick * This code is derived from software contributed to Berkeley by
741480Smckusick * the Systems Programming Group of the University of Utah Computer
841480Smckusick * Science Department.
941480Smckusick *
1041480Smckusick * %sccs.include.redist.c%
1141480Smckusick *
1264472Shibler * from: Utah $Hdr: grf_dv.c 1.12 93/08/13$
1341480Smckusick *
14*65631Sbostic * @(#)grf_dv.c 8.4 (Berkeley) 01/12/94
1541480Smckusick */
1641480Smckusick
1741480Smckusick #include "grf.h"
1841480Smckusick #if NGRF > 0
1941480Smckusick
2041480Smckusick /*
2141480Smckusick * Graphics routines for the DaVinci, HP98730/98731 Graphics system.
2241480Smckusick */
2356507Sbostic #include <sys/param.h>
2456507Sbostic #include <sys/errno.h>
2541480Smckusick
2656507Sbostic #include <hp/dev/grfioctl.h>
2756507Sbostic #include <hp/dev/grfvar.h>
2856507Sbostic #include <hp300/dev/grf_dvreg.h>
2941480Smckusick
3056507Sbostic #include <machine/cpu.h>
3141480Smckusick
3241480Smckusick /*
3341480Smckusick * Initialize hardware.
3441480Smckusick * Must point g_display at a grfinfo structure describing the hardware.
3541480Smckusick * Returns 0 if hardware not present, non-zero ow.
3641480Smckusick */
3741480Smckusick dv_init(gp, addr)
3841480Smckusick struct grf_softc *gp;
3949312Shibler caddr_t addr;
4041480Smckusick {
4141480Smckusick register struct dvboxfb *dbp;
4241480Smckusick struct grfinfo *gi = &gp->g_display;
4341480Smckusick int fboff;
4449312Shibler extern caddr_t sctopa(), iomap();
4541480Smckusick
4641480Smckusick dbp = (struct dvboxfb *) addr;
4749312Shibler if (ISIIOVA(addr))
4849312Shibler gi->gd_regaddr = (caddr_t) IIOP(addr);
4949312Shibler else
5049312Shibler gi->gd_regaddr = sctopa(vatosc(addr));
5141480Smckusick gi->gd_regsize = 0x20000;
5241480Smckusick gi->gd_fbwidth = (dbp->fbwmsb << 8) | dbp->fbwlsb;
5341480Smckusick gi->gd_fbheight = (dbp->fbhmsb << 8) | dbp->fbhlsb;
5449312Shibler gi->gd_fbsize = gi->gd_fbwidth * gi->gd_fbheight;
5541480Smckusick fboff = (dbp->fbomsb << 8) | dbp->fbolsb;
5649312Shibler gi->gd_fbaddr = (caddr_t) (*((u_char *)addr + fboff) << 16);
5749312Shibler if (gi->gd_regaddr >= (caddr_t)DIOIIBASE) {
5849312Shibler /*
5949312Shibler * For DIO II space the fbaddr just computed is the offset
6049312Shibler * from the select code base (regaddr) of the framebuffer.
6149312Shibler * Hence it is also implicitly the size of the register set.
6249312Shibler */
6349312Shibler gi->gd_regsize = (int) gi->gd_fbaddr;
6449312Shibler gi->gd_fbaddr += (int) gi->gd_regaddr;
6549312Shibler gp->g_regkva = addr;
6649312Shibler gp->g_fbkva = addr + gi->gd_regsize;
6749312Shibler } else {
6849312Shibler /*
6949312Shibler * For DIO space we need to map the seperate framebuffer.
7049312Shibler */
7149312Shibler gp->g_regkva = addr;
7249312Shibler gp->g_fbkva = iomap(gi->gd_fbaddr, gi->gd_fbsize);
7349312Shibler }
7441480Smckusick gi->gd_dwidth = (dbp->dwmsb << 8) | dbp->dwlsb;
7541480Smckusick gi->gd_dheight = (dbp->dwmsb << 8) | dbp->dwlsb;
7641480Smckusick gi->gd_planes = 0; /* ?? */
7741480Smckusick gi->gd_colors = 256;
7841480Smckusick
7941480Smckusick dv_reset(dbp);
8041480Smckusick return(1);
8141480Smckusick }
8241480Smckusick
8341480Smckusick /*
8441480Smckusick * Magic code herein.
8541480Smckusick */
dv_reset(dbp)8641480Smckusick dv_reset(dbp)
8741480Smckusick register struct dvboxfb *dbp;
8841480Smckusick {
8941480Smckusick dbp->reset = 0x80;
9041480Smckusick DELAY(100);
9141480Smckusick
9241480Smckusick dbp->interrupt = 0x04;
9341480Smckusick dbp->en_scan = 0x01;
9441480Smckusick dbp->fbwen = ~0;
9541480Smckusick dbp->opwen = ~0;
9641480Smckusick dbp->fold = 0x01;
9741480Smckusick dbp->drive = 0x01;
9841480Smckusick dbp->rep_rule = 0x33;
9941480Smckusick dbp->alt_rr = 0x33;
10041480Smckusick dbp->zrr = 0x33;
10141480Smckusick
10241480Smckusick dbp->fbvenp = 0xFF;
10341480Smckusick dbp->dispen = 0x01;
10441480Smckusick dbp->fbvens = 0x0;
10541480Smckusick dbp->fv_trig = 0x01;
10641480Smckusick DELAY(100);
10741480Smckusick dbp->vdrive = 0x0;
10841480Smckusick dbp->zconfig = 0x0;
10941480Smckusick
11041480Smckusick while (dbp->wbusy & 0x01)
11141480Smckusick DELAY(100);
11241480Smckusick
11341480Smckusick dbp->cmapbank = 0;
11441480Smckusick
11541480Smckusick dbp->red0 = 0;
11641480Smckusick dbp->red1 = 0;
11741480Smckusick dbp->green0 = 0;
11841480Smckusick dbp->green1 = 0;
11941480Smckusick dbp->blue0 = 0;
12041480Smckusick dbp->blue1 = 0;
12141480Smckusick
12241480Smckusick dbp->panxh = 0;
12341480Smckusick dbp->panxl = 0;
12441480Smckusick dbp->panyh = 0;
12541480Smckusick dbp->panyl = 0;
12641480Smckusick dbp->zoom = 0;
12741480Smckusick dbp->cdwidth = 0x50;
12841480Smckusick dbp->chstart = 0x52;
12941480Smckusick dbp->cvwidth = 0x22;
13041480Smckusick dbp->pz_trig = 1;
13141480Smckusick }
13241480Smckusick
13341480Smckusick /*
13441480Smckusick * Change the mode of the display.
13541480Smckusick * Right now all we can do is grfon/grfoff.
13641480Smckusick * Return a UNIX error number or 0 for success.
13741480Smckusick */
dv_mode(gp,cmd,data)13864472Shibler dv_mode(gp, cmd, data)
13941480Smckusick register struct grf_softc *gp;
140*65631Sbostic int cmd;
14164472Shibler caddr_t data;
14241480Smckusick {
14341480Smckusick register struct dvboxfb *dbp;
14441480Smckusick int error = 0;
14541480Smckusick
14649312Shibler dbp = (struct dvboxfb *) gp->g_regkva;
14741480Smckusick switch (cmd) {
14841480Smckusick case GM_GRFON:
14941480Smckusick dbp->dispen = 0x01;
15041480Smckusick break;
15164472Shibler
15241480Smckusick case GM_GRFOFF:
15341480Smckusick break;
15464472Shibler
15541480Smckusick case GM_GRFOVON:
15641480Smckusick dbp->opwen = 0xF;
15741480Smckusick dbp->drive = 0x10;
15841480Smckusick break;
15964472Shibler
16041480Smckusick case GM_GRFOVOFF:
16141480Smckusick dbp->opwen = 0;
16241480Smckusick dbp->drive = 0x01;
16341480Smckusick break;
16464472Shibler
16564472Shibler /*
16664472Shibler * Remember UVA of mapping for GCDESCRIBE.
16764472Shibler * XXX this should be per-process.
16864472Shibler */
16964472Shibler case GM_MAP:
17064472Shibler gp->g_data = data;
17164472Shibler break;
17264472Shibler
17364472Shibler case GM_UNMAP:
17464472Shibler gp->g_data = 0;
17564472Shibler break;
17664472Shibler
17764472Shibler #ifdef HPUXCOMPAT
17864472Shibler case GM_DESCRIBE:
17964472Shibler {
18064472Shibler struct grf_fbinfo *fi = (struct grf_fbinfo *)data;
18164472Shibler struct grfinfo *gi = &gp->g_display;
18265485Sbostic int i;
18364472Shibler
18464472Shibler /* feed it what HP-UX expects */
18564472Shibler fi->id = gi->gd_id;
18664472Shibler fi->mapsize = gi->gd_fbsize;
18764472Shibler fi->dwidth = gi->gd_dwidth;
18864472Shibler fi->dlength = gi->gd_dheight;
18964472Shibler fi->width = gi->gd_fbwidth;
19064472Shibler fi->length = gi->gd_fbheight;
19164472Shibler fi->bpp = NBBY;
19264472Shibler fi->xlen = (fi->width * fi->bpp) / NBBY;
19364472Shibler fi->npl = gi->gd_planes;
19464472Shibler fi->bppu = fi->npl;
19564472Shibler fi->nplbytes = fi->xlen * ((fi->length * fi->bpp) / NBBY);
19664472Shibler bcopy("HP98730", fi->name, 8);
19764472Shibler fi->attr = 2; /* HW block mover */
19864472Shibler /*
19964472Shibler * If mapped, return the UVA where mapped.
20064472Shibler */
20164472Shibler if (gp->g_data) {
20264472Shibler fi->regbase = gp->g_data;
20364472Shibler fi->fbbase = fi->regbase + gp->g_display.gd_regsize;
20464472Shibler } else {
20564472Shibler fi->fbbase = 0;
20664472Shibler fi->regbase = 0;
20764472Shibler }
20864472Shibler for (i = 0; i < 6; i++)
20964472Shibler fi->regions[i] = 0;
21064472Shibler break;
21164472Shibler }
21264472Shibler #endif
21364472Shibler
21441480Smckusick default:
21541480Smckusick error = EINVAL;
21641480Smckusick break;
21741480Smckusick }
21841480Smckusick return(error);
21941480Smckusick }
22041480Smckusick
22141480Smckusick #endif
222